Changeset 108909 in vbox
- Timestamp:
- Apr 9, 2025 9:03:34 AM (11 days ago)
- svn:sync-xref-src-repo-rev:
- 168377
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GITSAll.cpp
r108907 r108909 60 60 61 61 /** Release the device critical section. */ 62 #define GITS_CRIT_SECT_LEAVE(a_pDevIns) PDMDevHlpCritSectLeave((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo))62 #define GITS_CRIT_SECT_LEAVE(a_pDevIns) PDMDevHlpCritSectLeave((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo)) 63 63 64 64 /** Returns whether the critical section is held. */ 65 #define GITS_CRIT_SECT_IS_OWNER(a_pDevIns) PDMDevHlpCritSectIsOwner((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo))65 #define GITS_CRIT_SECT_IS_OWNER(a_pDevIns) PDMDevHlpCritSectIsOwner((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo)) 66 66 67 67 /** GITS diagnostic enum description expansion. 68 68 * The below construct ensures typos in the input to this macro are caught 69 69 * during compile time. */ 70 #define GITSDIAG_DESC(a_Name) RT_CONCAT(kGitsDiag_, a_Name) < kGitsDiag_End ? RT_STR(a_Name) : "Ignored" 71 72 73 /********************************************************************************************************************************* 74 * Structures and Typedefs * 75 *********************************************************************************************************************************/ 76 /** 77 * Interrupt Table Entry (ITE). 78 */ 79 typedef struct GITSITE 80 { 81 bool fValid; 82 uint8_t uType; 83 uint16_t uIntrCollectId; 84 VMCPUID idTargetCpu; 85 } GITSITE; 86 AssertCompileSize(GITSITE, 8); 70 #define GITSDIAG_DESC(a_Name) RT_CONCAT(kGitsDiag_, a_Name) < kGitsDiag_End ? RT_STR(a_Name) : "Ignored" 71 /** @} */ 87 72 88 73 … … 94 79 { 95 80 GITSDIAG_DESC(None), 96 GITSDIAG_DESC(CmdQueue_PhysAddr_Invalid), 81 GITSDIAG_DESC(CmdQueue_Unknown_Cmd), 82 GITSDIAG_DESC(CmdQueue_Invalid_PhysAddr), 97 83 /* kGitsDiag_End */ 98 84 }; … … 172 158 static void gitsCmdQueueSetError(PPDMDEVINS pDevIns, PGITSDEV pGitsDev, GITSDIAG enmError, bool fStallQueue) 173 159 { 174 Assert(GITS_CRIT_SECT_IS_OWNER(pDevIns)); 175 NOREF(pDevIns); 160 GITS_CRIT_SECT_ENTER(pDevIns); 176 161 177 162 /* Record the error and stall the queue. */ … … 182 167 /* Since we don't support SEIs, so there should be nothing more to do here. */ 183 168 Assert(!RT_BF_GET(pGitsDev->uTypeReg.u, GITS_BF_CTRL_REG_TYPER_SEIS)); 169 170 GITS_CRIT_SECT_LEAVE(pDevIns); 184 171 } 185 172 … … 402 389 /*| RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_VIRTUAL, 0) */ /* Virtual LPIs not supported. */ 403 390 | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_CCT, 0) /* Collections in memory not supported. */ 404 | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_ITT_ENTRY_SIZE, sizeof(GITSITE)) /* ITE size in bytes. */391 | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_ITT_ENTRY_SIZE, GITS_ITE_SIZE) /* ITE size in bytes. */ 405 392 | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_ID_BITS, 31) /* 32-bit event IDs. */ 406 393 | RT_BF_MAKE(GITS_BF_CTRL_REG_TYPER_DEV_BITS, 31) /* 32-bit device IDs. */ … … 421 408 GITS_CTLR.Enabled and GITS_BASER<n>.Valid. */ 422 409 RT_ZERO(pGitsDev->aItsTableRegs); 410 //pGitsDev->aItsTableRegs[0].u = RT_BF_MAKE(GITS_BF_CTRL_REG_BASER_ENTRY_SIZE, ) 411 423 412 pGitsDev->uCmdBaseReg.u = 0; 424 413 pGitsDev->uCmdReadReg = 0; 425 414 pGitsDev->uCmdWriteReg = 0; 426 RT_ZERO(pGitsDev->a Ctes);415 RT_ZERO(pGitsDev->auCtes); 427 416 } 428 417 … … 507 496 pHlp->pfnPrintf(pHlp, " Collection Table:\n"); 508 497 bool fHasValidCtes = false; 509 for (unsigned i = 0; i < RT_ELEMENTS(pGitsDev->a Ctes); i++)498 for (unsigned i = 0; i < RT_ELEMENTS(pGitsDev->auCtes); i++) 510 499 { 511 if (pGitsDev->aCtes[i].fValid) 500 bool const fValid = RT_BF_GET(pGitsDev->auCtes[i], GITS_BF_CTE_VALID); 501 if (fValid) 512 502 { 513 AssertCompile(sizeof(pGitsDev->aCtes[i].idTargetCpu) == sizeof(uint16_t));514 pHlp->pfnPrintf(pHlp, " aCtes[%u].idTargetCpu = %#RX16\n", i, pGitsDev->aCtes[i].idTargetCpu);515 503 fHasValidCtes = true; 504 pHlp->pfnPrintf(pHlp, " Target CPUID = %#RX16\n", i, RT_BF_GET(pGitsDev->auCtes[i], GITS_BF_CTE_RDBASE)); 516 505 } 517 506 } … … 575 564 /* Indicate to the guest we've fetched all commands. */ 576 565 GITS_CRIT_SECT_ENTER(pDevIns); 577 pGitsDev->uCmdReadReg = offWrite; 566 pGitsDev->uCmdReadReg = offWrite; 567 pGitsDev->uCmdWriteReg &= ~GITS_BF_CTRL_REG_CWRITER_RETRY_MASK; 578 568 579 569 /* Don't hold the critical section while processing commands. */ … … 591 581 uint64_t const uDw2 = pCmd->au64[2].u; 592 582 bool const fValid = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_VALID); 593 uint 32_t const uTargetCpuId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_RDBASE);583 uint16_t const uTargetCpuId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_RDBASE); 594 584 uint16_t const uIntrCollectionId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_IC_ID); 595 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->a Ctes)); /** @todo later figure ideal/correct CT size. */585 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->auCtes)); /** @todo later figure ideal/correct CT size. */ 596 586 597 587 GITS_CRIT_SECT_ENTER(pDevIns); 598 588 Assert(!RT_BF_GET(pGitsDev->uTypeReg.u, GITS_BF_CTRL_REG_TYPER_PTA)); 599 pGitsDev->a Ctes[uIntrCollectionId].fValid = fValid;600 pGitsDev->aCtes[uIntrCollectionId].idTargetCpu = uTargetCpuId;589 pGitsDev->auCtes[uIntrCollectionId] = RT_BF_MAKE(GITS_BF_CTE_VALID, fValid) 590 | RT_BF_MAKE(GITS_BF_CTE_RDBASE, uTargetCpuId); 601 591 GITS_CRIT_SECT_LEAVE(pDevIns); 602 592 STAM_COUNTER_INC(&pGitsDev->StatCmdMapc); … … 619 609 620 610 default: 611 { 612 gitsCmdQueueSetError(pDevIns, pGitsDev, kGitsDiag_CmdQueue_Unknown_Cmd, true /* fStall */); 621 613 AssertReleaseMsgFailed(("Cmd=%#x (%s) idxCmd=%u cCmds=%u offRead=%#RX32 offWrite=%#RX32\n", 622 614 uCmdId, gitsGetCommandName(uCmdId), idxCmd, cCmds, offRead, offWrite)); 623 615 break; 616 } 624 617 } 625 618 } … … 628 621 629 622 /* Failed to read command queue from the physical address specified by the guest, stall queue and retry later. */ 630 gitsCmdQueueSetError(pDevIns, pGitsDev, kGitsDiag_CmdQueue_PhysAddr_Invalid, true /* fStall */); 631 GITS_CRIT_SECT_LEAVE(pDevIns); 623 gitsCmdQueueSetError(pDevIns, pGitsDev, kGitsDiag_CmdQueue_Invalid_PhysAddr, true /* fStall */); 632 624 return VINF_TRY_AGAIN; 633 625 } -
trunk/src/VBox/VMM/include/GITSInternal.h
r108882 r108909 44 44 */ 45 45 46 /** @name GITS Device Table Entry (DTE). 47 * @{ */ 48 #define GITS_BF_DTE_ITT_RANGE_SHIFT 0 49 #define GITS_BF_DTE_ITT_RANGE_MASK UINT64_C(0x000000000000000f) 50 #define GITS_BF_DTE_RSVD_11_4_SHIFT 4 51 #define GITS_BF_DTE_RSVD_11_4_MASK UINT64_C(0x0000000000000ff0) 52 #define GITS_BF_DTE_ITT_ADDR_SHIFT 12 53 #define GITS_BF_DTE_ITT_ADDR_MASK UINT64_C(0x000ffffffffff000) 54 #define GITS_BF_DTE_RSVD_62_52_SHIFT 52 55 #define GITS_BF_DTE_RSVD_62_52_MASK UINT64_C(0x7ff0000000000000) 56 #define GITS_BF_DTE_VALID_SHIFT 63 57 #define GITS_BF_DTE_VALID_MASK UINT64_C(0x8000000000000000) 58 RT_BF_ASSERT_COMPILE_CHECKS(GITS_BF_DTE_, UINT64_C(0), UINT64_MAX, 59 (ITT_RANGE, RSVD_11_4, ITT_ADDR, RSVD_62_52, VALID)); 60 #define GITS_DTE_VALID_MASK (UINT64_MAX & ~(GITS_BF_DTE_RSVD_11_4_MASK | GITS_BF_DTE_RSVD_62_52_MASK)); 61 /** GITS DTE: Size of the DTE in bytes. */ 62 #define GITS_DTE_SIZE 8 63 /** @} */ 64 65 /** @name GITS Interrupt Translation Entry (ITE). 66 * @{ */ 67 #define GITS_BF_ITE_ICID_SHIFT 0 68 #define GITS_BF_ITE_ICID_MASK UINT64_C(0x000000000000ffff) 69 #define GITS_BF_ITE_INTID_SHIFT 16 70 #define GITS_BF_ITE_INTID_MASK UINT64_C(0x00000000ffff0000) 71 #define GITS_BF_ITE_RSVD_62_32_SHIFT 32 72 #define GITS_BF_ITE_RSVD_62_32_MASK UINT64_C(0x7fffffff00000000) 73 #define GITS_BF_ITE_VALID_SHIFT 63 74 #define GITS_BF_ITE_VALID_MASK UINT64_C(0x8000000000000000) 75 RT_BF_ASSERT_COMPILE_CHECKS(GITS_BF_ITE_, UINT64_C(0), UINT64_MAX, 76 (ICID, INTID, RSVD_62_32, VALID)); 77 /** GITS ITE: Size of the ITE in bytes. */ 78 #define GITS_ITE_SIZE 8 79 /** @} */ 80 81 /** @name GITS Collection Table Entry (CTE). 82 * @{ */ 83 #define GITS_BF_CTE_RDBASE_SHIFT 0 84 #define GITS_BF_CTE_RDBASE_MASK UINT32_C(0x0000ffff) 85 #define GITS_BF_CTE_RSVD_30_16_SHIFT 16 86 #define GITS_BF_CTE_RSVD_30_16_MASK UINT32_C(0x7fff0000) 87 #define GITS_BF_CTE_VALID_SHIFT 31 88 #define GITS_BF_CTE_VALID_MASK UINT32_C(0x80000000) 89 RT_BF_ASSERT_COMPILE_CHECKS(GITS_BF_CTE_, UINT32_C(0), UINT32_MAX, 90 (RDBASE, RSVD_30_16, VALID)); 91 /** GITS CTE: Size of the CTE in bytes. */ 92 #define GITS_CTE_SIZE 4 93 46 94 /** 47 95 * GITS error diagnostics. 48 96 * Sorted alphabetically so it's easier to add and locate items, no other reason. 49 97 * 50 * @note Members of this enum are used as array indices, so no gaps in enum 51 * values are not allowed. Update g_apszItsDiagDesc when you modify52 * fields in thisenum.98 * @note Members of this enum are used as array indices, so no gaps in enum values 99 * are not allowed. Update g_apszGitsDiagDesc when you modify fields in this 100 * enum. 53 101 */ 54 102 typedef enum GITSDIAG … … 58 106 59 107 /* Command queue errors. */ 60 kGitsDiag_CmdQueue_PhysAddr_Invalid, 108 kGitsDiag_CmdQueue_Unknown_Cmd, 109 kGitsDiag_CmdQueue_Invalid_PhysAddr, 61 110 62 111 /* Member for determining array index limit. */ … … 67 116 } GITSDIAG; 68 117 AssertCompileSize(GITSDIAG, 4); 69 70 #if 071 /**72 * Interrupt Translation Table Base.73 */74 typedef struct GITSITSBASE75 {76 /** The physical address of the table. */77 RTGCPHYS GCPhys;78 /** Size of every allocated page in bytes. */79 uint32_t cbPageSize;80 /** Number of pages allocated. */81 uint8_t cPages;82 /** Size of each entry in bytes. */83 uint8_t cbEntry;84 /** Whether this is a two-level or flat table. */85 bool fTwoLevel;86 /** Whether software has memory allocated for the table. */87 bool fValid;88 /** Memory shareability attributes. */89 GITSATTRSHARE AttrShare;90 /** Memory cacheability attributes (Inner). */91 GITSATTRMEM AttrMemInner;92 /** Memory cacheability attributes (Outer). */93 GITSATTRMEM AttrMemOuter;94 } GITSITSBASE;95 AssertCompileSizeAlignment(GITSITSBASE, 8);96 AssertCompileMemberAlignment(GITSITSBASE, AttrShare, 8);97 #endif98 99 /**100 * GITS Collection Table Entry (CTE).101 */102 typedef struct GITSCTE103 {104 /** Whether this entry is valid. */105 bool fValid;106 /** Alignment. */107 bool afPadding;108 /** Target CPU ID (size based on GICR_TYPER.Processor_Number). */109 uint16_t idTargetCpu;110 } GITSCTE;111 /** Pointer to a GITS Collection Table Entry (CTE). */112 typedef GITSCTE *PGITSCTE;113 /** Pointer to a const GITS Collection Table Entry (CTE). */114 typedef GITSCTE const *PCGITSCTE;115 AssertCompileSize(GITSCTE, 4);116 118 117 119 /** … … 158 160 */ 159 161 /** The collection table. */ 160 GITSCTE aCtes[2048];162 uint32_t auCtes[2048]; 161 163 /** @} */ 162 164 … … 187 189 AssertCompileMemberAlignment(GITSDEV, uCmdWriteReg, 4); 188 190 AssertCompileMemberAlignment(GITSDEV, hEvtCmdQueue, 8); 189 AssertCompileMemberAlignment(GITSDEV, a Ctes, 8);191 AssertCompileMemberAlignment(GITSDEV, auCtes, 8); 190 192 AssertCompileMemberAlignment(GITSDEV, uArchRev, 8); 193 AssertCompileMemberSize(GITSDEV, auCtes, RT_ELEMENTS(GITSDEV::auCtes) * GITS_CTE_SIZE); 191 194 192 195 DECL_HIDDEN_CALLBACK(void) gitsInit(PGITSDEV pGitsDev);
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