Changeset 108976 in vbox

Timestamp:

Apr 15, 2025 12:30:07 PM (5 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168496

Message:

VMM/GIC: bugref:10877 Minus 1 bites us again and LPI configuration table work-in-progress.

Location:

trunk

Files:

• include/VBox/gic.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/GICAll.cpp (modified) (3 diffs)
• src/VBox/VMM/VMMR3/GICR3.cpp (modified) (1 diff)

trunk/include/VBox/gic.h

@@ -728 +728 @@
 /** GITS LPI Configuration   */
 /** GITS LPI CTE: Enable. */
-#define GITS_BF_LPI_CTE_ENABLE_SHIFT                            0
-#define GITS_BF_LPI_CTE_ENABLE_MASK                             UINT8_C(0x1)
+#define GIC_BF_LPI_CTE_ENABLE_SHIFT                     0
+#define GIC_BF_LPI_CTE_ENABLE_MASK                      UINT8_C(0x1)
 /** GITS LPI CTE: Reserved (bit 1). */
-#define GITS_BF_LPI_CTE_RSVD_1_SHIFT                            1
-#define GITS_BF_LPI_CTE_RSVD_1_MASK                             UINT8_C(0x2)
+#define GIC_BF_LPI_CTE_RSVD_1_SHIFT                     1
+#define GIC_BF_LPI_CTE_RSVD_1_MASK                      UINT8_C(0x2)
 /** GITS LPI CTE: Priority. */
-#define GITS_BF_LPI_CTE_PRIORITY_SHIFT                          2
-#define GITS_BF_LPI_CTE_PRIORITY_MASK                           UINT8_C(0xfc)
-RT_BF_ASSERT_COMPILE_CHECKS(GITS_BF_LPI_CTE_, UINT8_C(0), UINT8_MAX,
+#define GIC_BF_LPI_CTE_PRIORITY_SHIFT                   2
+#define GIC_BF_LPI_CTE_PRIORITY_MASK                    UINT8_C(0xfc)
+RT_BF_ASSERT_COMPILE_CHECKS(GIC_BF_LPI_CTE_, UINT8_C(0), UINT8_MAX,
                             (ENABLE, RSVD_1, PRIORITY));
+
+/** Minimum number of bits required to enable LPIs (i.e. should accomodate
+ *  GIC_INTID_RANGE_LPI_START). */
+#define GIC_LPI_ID_BITS_MIN                             14
+
 /** @} */
 

trunk/src/VBox/VMM/VMMAll/GICAll.cpp

@@ -661 +661 @@
 
 
+static void gicDistReadLpiConfigTableFromMemory(PPDMDEVINS pDevIns, PGICDEV pGicDev)
+{
+    Assert(pGicDev->fEnableLpis);
+    LogFlowFunc(("\n"));
+
+    /* Check if the guest is disabling LPIs by setting GICR_PROPBASER.IDBits < 13. */
+    uint8_t const cIdBits = RT_BF_GET(pGicDev->uLpiConfigBaseReg.u, GIC_BF_REDIST_REG_PROPBASER_ID_BITS) + 1;
+    if (cIdBits < GIC_LPI_ID_BITS_MIN)
+        return;
+
+    /* Copy the LPI config table from guest memory to our internal cache. */
+    Assert(UINT32_C(2) << pGicDev->uMaxLpi <= RT_ELEMENTS(pGicDev->abLpiConfig));
+    RTGCPHYS const GCPhysLpiConfigTable = pGicDev->uLpiConfigBaseReg.u & GIC_BF_REDIST_REG_PROPBASER_PHYS_ADDR_MASK;
+    uint32_t const cbLpiConfigTable     = sizeof(pGicDev->abLpiConfig);
+
+    /** @todo Try releasing and re-acquiring the device critical section here.
+     *        Probably safe, but haven't verified this... */
+    int const rc = PDMDevHlpPhysReadMeta(pDevIns, GCPhysLpiConfigTable, (void *)&pGicDev->abLpiConfig[0], cbLpiConfigTable);
+    AssertRC(rc);
+}
+
+
 /**
  * Updates the internal IRQ state and sets or clears the appropriate force action
@@ -2050 +2072 @@
                      | (pGicDev->fMbi ? GIC_DIST_REG_TYPER_MBIS : 0)
                      | (pGicDev->fRangeSel ? GIC_DIST_REG_TYPER_RSS : 0)
-                     | GIC_DIST_REG_TYPER_IDBITS_SET(16)             /* We only support 16-bit interrupt IDs. */
+                     | GIC_DIST_REG_TYPER_IDBITS_SET(15)             /* We only support 16-bit interrupt IDs. */
                      | (pGicDev->fAff3Levels ? GIC_DIST_REG_TYPER_A3V : 0);
             if (pGicDev->fExtSpi)
@@ -2461 +2483 @@
         case GIC_REDIST_REG_CTLR_OFF:
             pGicDev->fEnableLpis = RT_BOOL(uValue & GIC_REDIST_REG_CTLR_ENABLE_LPI);
+            if (pGicDev->fEnableLpis)
+                gicDistReadLpiConfigTableFromMemory(pDevIns, pGicDev);
             break;
         case GIC_REDIST_REG_PROPBASER_OFF:

trunk/src/VBox/VMM/VMMR3/GICR3.cpp

@@ -342 +342 @@
     }
 
-    /* */
-    {
-
-    }
-    /** @todo Dump LPI config and LPI pending registers. */
+    /* LPI CTE (Configuration Table Entries). */
+    {
+        uint32_t const cLpiCtes   = RT_ELEMENTS(pGicDev->abLpiConfig);
+        uint32_t       cLpiCtesEn = 0;
+        for (uint32_t i = 0; i < cLpiCtes; i++)
+            if (RT_BF_GET(pGicDev->abLpiConfig[i], GIC_BF_LPI_CTE_ENABLE))
+                ++cLpiCtesEn;
+
+        pHlp->pfnPrintf(pHlp, "  LPI config table (capacity=%u entries, enabled=%u entries)%s\n", cLpiCtes, cLpiCtesEn,
+                        cLpiCtesEn > 0 ? ":" : "");
+        for (uint32_t i = 0; i < cLpiCtesEn; i++)
+        {
+            uint8_t const uLpiCte   = pGicDev->abLpiConfig[i];
+            uint8_t const uPriority = RT_BF_GET(uLpiCte, GIC_BF_LPI_CTE_PRIORITY);
+            pHlp->pfnPrintf(pHlp, "    [%4u]               = %#x (priority=%u)\n", uLpiCte, uPriority);
+        }
+    }
+
+    /** @todo Dump LPI pending registers. */
 }