Changeset 108994 in vbox

Timestamp:

Apr 16, 2025 6:34:54 AM (4 days ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168517

Message:

VMM/TRPM: bugref:3409 Add TRPMGetTrapAll to allow fetching existing trap info without a failure path.

Location:

trunk

Files:

• include/VBox/vmm/trpm.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/TRPMAll.cpp (modified) (1 diff)

trunk/include/VBox/vmm/trpm.h

@@ -84 +84 @@
 VMMDECL(int)        TRPMQueryTrapAll(PVMCPU pVCpu, uint8_t *pu8TrapNo, PTRPMEVENT pEnmType, uint32_t *puErrorCode,
                                      PRTGCUINTPTR puCR2, uint8_t *pcbInstr, bool *pfIcebp);
+VMMDECL(uint8_t)    TRPMGetTrapAll(PVMCPU pVCpu, PTRPMEVENT pEnmType, uint32_t *puErrorCode, PRTGCUINTPTR puCR2,
+                                   uint8_t *pcbInstr, bool *pfIcebp);
 
 #ifdef IN_RING3

trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

@@ -440 +440 @@
 }
 
+
+/**
+ * Gets all info about the current trap.
+ * This must be used only when the caller has determined that a trap is active.
+ *
+ * @returns The active vector.
+ * @param   pVCpu           The cross context virtual CPU structure.
+ * @param   pEnmType        Where to store the trap type.
+ * @param   puErrorCode     Where to store the error code associated with some
+ *                          traps.
+ * @param   puCR2           Where to store the CR2 associated with a trap 0E.
+ * @param   pcbInstr        Where to store the instruction-length associated with
+ *                          some traps. Optional, can be NULL.
+ * @param   pfIcebp         Where to store whether the trap is a \#DB caused by an
+ *                          INT1/ICEBP instruction. Optional, can be NULL.
+ */
+VMMDECL(uint8_t) TRPMGetTrapAll(PVMCPU pVCpu, TRPMEVENT *pEnmType, uint32_t *puErrorCode, PRTGCUINTPTR puCR2, uint8_t *pcbInstr,
+                                bool *pfIcebp)
+{
+    Assert(pVCpu->trpm.s.uActiveVector != ~0U);
+    Assert(pEnmType);
+    Assert(puErrorCode);
+    Assert(puCR2);
+    *pEnmType    = pVCpu->trpm.s.enmActiveType;
+    *puErrorCode = pVCpu->trpm.s.uActiveErrorCode;
+    *puCR2       = pVCpu->trpm.s.uActiveCR2;
+    if (pcbInstr)
+        *pcbInstr = pVCpu->trpm.s.cbInstr;
+    if (pfIcebp)
+        *pfIcebp  = pVCpu->trpm.s.fIcebp;
+    return pVCpu->trpm.s.uActiveVector;
+}
+