VirtualBox

Changeset 109212 in vbox


Ignore:
Timestamp:
May 9, 2025 6:25:38 AM (10 days ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
168790
Message:

GIC: bugref:10877 Add MSI registeration callbacks in PCI ECAM configured when the ITS is enabled. Added invoking of the GIC backend's MSI handler from PDM.

Location:
trunk
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/pdmgic.h

    r108716 r109212  
    127127     *                      Cannot be NIL_PCIBDF.
    128128     * @param   pMsi        The MSI to send.
    129      * @param   uEventId    The event ID specified by the device.
    130129     * @param   uTagSrc     The IRQ tag and source (for tracing).
    131130     */
    132     DECLR3CALLBACKMEMBER(int, pfnSendMsi, (PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uEventId, uint32_t uTagSrc));
     131    DECLR3CALLBACKMEMBER(int, pfnSendMsi, (PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc));
    133132
    134133    /** @name Reserved for future (MBZ).
  • trunk/src/VBox/Devices/Bus/DevPciGenericEcam.cpp

    r106061 r109212  
    318318                                           "|IntPinB"
    319319                                           "|IntPinC"
    320                                            "|IntPinD", "");
     320                                           "|IntPinD"
     321                                           "|Msi", "");
    321322
    322323    int rc = pHlp->pfnCFGMQueryU64Def(pCfg, "MmioEcamBase", &pPciRoot->u64PciConfigMMioAddress, 0);
     
    344345    AssertRCReturn(rc, PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to read \"IntPinD\"")));
    345346
     347    bool fMsi;
     348    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Msi", &fMsi, false);
     349    AssertRCReturn(rc, PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to read \"Msi\"")));
     350
    346351    Log(("PCI: fUseIoApic=%RTbool McfgBase=%#RX64 McfgLength=%#RX64 fR0Enabled=%RTbool fRCEnabled=%RTbool\n", pPciRoot->fUseIoApic,
    347352         pPciRoot->u64PciConfigMMioAddress, pPciRoot->u64PciConfigMMioLength, pDevIns->fR0Enabled, pDevIns->fRCEnabled));
    348     Log(("PCI: IntPinA=%u IntPinB=%u IntPinC=%u IntPinD=%u\n", pPciRoot->u.GenericEcam.auPciIrqNr[0],
    349          pPciRoot->u.GenericEcam.auPciIrqNr[1], pPciRoot->u.GenericEcam.auPciIrqNr[2], pPciRoot->u.GenericEcam.auPciIrqNr[3]));
     353    Log(("PCI: IntPinA=%u IntPinB=%u IntPinC=%u IntPinD=%u fMsi=%RTbool\n", pPciRoot->u.GenericEcam.auPciIrqNr[0],
     354         pPciRoot->u.GenericEcam.auPciIrqNr[1], pPciRoot->u.GenericEcam.auPciIrqNr[2], pPciRoot->u.GenericEcam.auPciIrqNr[3], fMsi));
    350355
    351356    /*
     
    376381    PciBusReg.u32Version                 = PDM_PCIBUSREGCC_VERSION;
    377382    PciBusReg.pfnRegisterR3              = devpciR3CommonRegisterDevice;
    378     PciBusReg.pfnRegisterMsiR3           = NULL;
     383    PciBusReg.pfnRegisterMsiR3           = fMsi ? devpciR3CommonRegisterMsi : NULL;
    379384    PciBusReg.pfnIORegionRegisterR3      = devpciR3CommonIORegionRegister;
    380385    PciBusReg.pfnInterceptConfigAccesses = devpciR3CommonInterceptConfigAccesses;
     
    518523     * Validate and read configuration.
    519524     */
    520     PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "ExpressEnabled|ExpressPortType", "");
     525    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "ExpressEnabled|ExpressPortType|Msi", "");
    521526
    522527    /* check if we're supposed to implement a PCIe bridge. */
     
    532537    Log(("PCI/bridge#%u: fR0Enabled=%RTbool fRCEnabled=%RTbool fExpress=%RTbool uExpressPortType=%u (%s)\n",
    533538         iInstance, pDevIns->fR0Enabled, pDevIns->fRCEnabled, fExpress, uExpressPortType, szExpressPortType));
     539
     540    bool fMsi;
     541    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "Msi", &fMsi, false);
     542    AssertRCReturn(rc, PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to query boolean value \"Msi\"")));
    534543
    535544    /*
     
    550559    PciBusReg.u32Version                 = PDM_PCIBUSREGCC_VERSION;
    551560    PciBusReg.pfnRegisterR3              = devpcibridgeR3CommonRegisterDevice;
    552     PciBusReg.pfnRegisterMsiR3           = NULL;
     561    PciBusReg.pfnRegisterMsiR3           = fMsi ? devpciR3CommonRegisterMsi : NULL;
    553562    PciBusReg.pfnIORegionRegisterR3      = devpciR3CommonIORegionRegister;
    554563    PciBusReg.pfnInterceptConfigAccesses = devpciR3CommonInterceptConfigAccesses;
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r106061 r109212  
    997997
    998998
    999 static DECLCALLBACK(int) ich9pciRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
     999DECLCALLBACK(int) devpciR3CommonRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
    10001000{
    10011001    //PDEVPCIBUS   pBus   = PDMINS_2_DATA(pDevIns, PDEVPCIBUS);
     
    33873387    PciBusReg.u32Version                 = PDM_PCIBUSREGCC_VERSION;
    33883388    PciBusReg.pfnRegisterR3              = devpciR3CommonRegisterDevice;
    3389     PciBusReg.pfnRegisterMsiR3           = ich9pciRegisterMsi;
     3389    PciBusReg.pfnRegisterMsiR3           = devpciR3CommonRegisterMsi;
    33903390    PciBusReg.pfnIORegionRegisterR3      = devpciR3CommonIORegionRegister;
    33913391    PciBusReg.pfnInterceptConfigAccesses = devpciR3CommonInterceptConfigAccesses;
     
    36973697    PciBusReg.u32Version                 = PDM_PCIBUSREGCC_VERSION;
    36983698    PciBusReg.pfnRegisterR3              = devpcibridgeR3CommonRegisterDevice;
    3699     PciBusReg.pfnRegisterMsiR3           = ich9pciRegisterMsi;
     3699    PciBusReg.pfnRegisterMsiR3           = devpciR3CommonRegisterMsi;
    37003700    PciBusReg.pfnIORegionRegisterR3      = devpciR3CommonIORegionRegister;
    37013701    PciBusReg.pfnInterceptConfigAccesses = devpciR3CommonInterceptConfigAccesses;
  • trunk/src/VBox/Devices/Bus/DevPciInternal.h

    r106061 r109212  
    272272DECLCALLBACK(int)  devpcibridgeR3CommonRegisterDevice(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
    273273                                                      uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName);
     274DECLCALLBACK(int)  devpciR3CommonRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg);
    274275DECLCALLBACK(int)  devpciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    275276                                                  RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
  • trunk/src/VBox/Main/src-client/ConsoleImplConfigArmV8.cpp

    r109112 r109212  
    469469        InsertConfigNode(pRoot, "Devices", &pDevices);
    470470
    471         InsertConfigNode(pDevices, "pci-generic-ecam-bridge", NULL);
     471        InsertConfigNode(pDevices, "pci-generic-ecam-bridge", &pDev);
     472        InsertConfigNode(pDev,     "0",                       &pInst);
     473        InsertConfigNode(pInst,    "Config",                  &pCfg);
     474        if (fGicIts == TRUE)
     475            InsertConfigInteger(pCfg,  "Msi", 1);
    472476
    473477        InsertConfigNode(pDevices, "platform",              &pDev);
     
    828832        InsertConfigInteger(pCfg,  "IntPinC",        aPinIrqs[2]);
    829833        InsertConfigInteger(pCfg,  "IntPinD",        aPinIrqs[3]);
     834        if (fGicIts == TRUE)
     835            InsertConfigInteger(pCfg,  "Msi", 1);
    830836        vrc = RTFdtNodeAddF(hFdt, "pcie@%RGp", GCPhysPciMmio);                              VRC();
    831837        vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map-mask", 4, 0xf800, 0, 0, 7); VRC();
  • trunk/src/VBox/VMM/VMMAll/GITSAll.cpp

    r109206 r109212  
    10011001 * @interface_method_impl{PDMGICBACKEND,pfnSendMsi}
    10021002 */
    1003 DECL_HIDDEN_CALLBACK(int) gitsSendMsi(PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uEventId, uint32_t uTagSrc)
    1004 {
    1005     Log4Func(("uBusDevFn=%#RX32 uEventId=%#RX32\n", uBusDevFn, uEventId));
    1006     RT_NOREF(pVM, uBusDevFn, pMsi, uEventId, uTagSrc);
     1003DECL_HIDDEN_CALLBACK(int) gitsSendMsi(PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc)
     1004{
     1005    AssertPtrReturn(pMsi, VERR_INVALID_PARAMETER);
     1006    Log4Func(("uBusDevFn=%#RX32 Msi.Addr=%#RX64 Msi.Data=%#RX32\n", uBusDevFn, pMsi->Addr.u64, pMsi->Data.u32));
     1007    RT_NOREF(pVM, uBusDevFn, pMsi, uTagSrc);
     1008    AssertMsgFailed(("uBusDevFn=%#RX32 Msi.Addr=%#RX64 Msi.Data=%#RX32\n", uBusDevFn, pMsi->Addr.u64, pMsi->Data.u32));
    10071009    return VERR_NOT_IMPLEMENTED;
    10081010}
  • trunk/src/VBox/VMM/VMMAll/PDMAll.cpp

    r107308 r109212  
    275275{
    276276    Log9(("PDMIoApicSendMsi: addr=%#RX64 data=%#RX32 tag=%#x src=%#x\n", pMsi->Addr.u64, pMsi->Data.u32, uTagSrc, uBusDevFn));
     277#ifdef VBOX_VMM_TARGET_ARMV8
     278    PCPDMGICBACKEND pGic = &pVM->pdm.s.Ic.u.armv8.GicBackend;
     279    if (pGic->pfnSendMsi)
     280        pGic->pfnSendMsi(pVM, uBusDevFn, pMsi, uTagSrc);
     281#else
    277282    PCPDMIOAPIC pIoApic = &pVM->pdm.s.IoApic;
    278 #ifdef IN_RING0
     283# ifdef IN_RING0
    279284    if (pIoApic->pDevInsR0)
    280285        pIoApic->pfnSendMsiR0(pIoApic->pDevInsR0, uBusDevFn, pMsi, uTagSrc);
     
    295300            AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
    296301    }
    297 #else
     302# else
    298303    if (pIoApic->pDevInsR3)
    299304    {
     
    301306        pIoApic->pfnSendMsiR3(pIoApic->pDevInsR3, uBusDevFn, pMsi, uTagSrc);
    302307    }
     308# endif
    303309#endif
    304310}
  • trunk/src/VBox/VMM/include/GITSInternal.h

    r109206 r109212  
    276276
    277277DECL_HIDDEN_CALLBACK(void)         gitsInit(PGITSDEV pGitsDev);
    278 DECL_HIDDEN_CALLBACK(int)          gitsSendMsi(PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uEventId, uint32_t uTagSrc);
     278DECL_HIDDEN_CALLBACK(int)          gitsSendMsi(PVMCC pVM, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc);
    279279DECL_HIDDEN_CALLBACK(uint64_t)     gitsMmioReadCtrl(PCGITSDEV pGitsDev, uint16_t offReg, unsigned cb);
    280280DECL_HIDDEN_CALLBACK(uint64_t)     gitsMmioReadTranslate(PCGITSDEV pGitsDev, uint16_t offReg, unsigned cb);
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