VirtualBox

Changeset 11143 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Aug 5, 2008 6:15:06 PM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
34124
Message:

DevATA/DevAHCI: janitorial work - do not duplicate the ATA structures. TODO: someone fix the code duplication, please...

Location:
trunk/src/VBox/Devices/Storage
Files:
1 added
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Storage/DevATA.cpp

    r9572 r11143  
     1/* $Id$ */
    12/** @file
    2  *
    3  * VBox storage devices:
    4  * ATA/ATAPI controller device (disk and cdrom).
     3 * VBox storage devices: ATA/ATAPI controller device (disk and cdrom).
    54 */
    65
    … …  
    4443#include <VBox/scsi.h>
    4544
    46 #include "Builtins.h"
    4745#include "PIIX3ATABmDma.h"
    4846#include "ide.h"
    49 
    50 /**
    51  * Maximum number of sectors to transfer in a READ/WRITE MULTIPLE request.
    52  * Set to 1 to disable multi-sector read support. According to the ATA
    53  * specification this must be a power of 2 and it must fit in an 8 bit
    54  * value. Thus the only valid values are 1, 2, 4, 8, 16, 32, 64 and 128.
    55  */
    56 #define ATA_MAX_MULT_SECTORS 128
    57 
    58 /**
    59  * Fastest PIO mode supported by the drive.
    60  */
    61 #define ATA_PIO_MODE_MAX 4
    62 /**
    63  * Fastest MDMA mode supported by the drive.
    64  */
    65 #define ATA_MDMA_MODE_MAX 2
    66 /**
    67  * Fastest UDMA mode supported by the drive.
    68  */
    69 #define ATA_UDMA_MODE_MAX 6
    70 
     47#include "ATAController.h"
     48#include "../Builtins.h"
    7149
    7250/**
    … …  
    7553#define ATA_SAVED_STATE_VERSION 16
    7654
    77 /** The maximum number of release log entries per device. */
    78 #define MAX_LOG_REL_ERRORS  1024
    79 
    8055/** Temporary instrumentation for tracking down potential virtual disk
    8156 * write performance issues. */
    8257#undef VBOX_INSTRUMENT_DMA_WRITES
    8358
    84 typedef struct ATADevState {
    85     /** Flag indicating whether the current command uses LBA48 mode. */
    86     bool fLBA48;
    87     /** Flag indicating whether this drive implements the ATAPI command set. */
    88     bool fATAPI;
    89     /** Set if this interface has asserted the IRQ. */
    90     bool fIrqPending;
    91     /** Currently configured number of sectors in a multi-sector transfer. */
    92     uint8_t cMultSectors;
    93     /** PCHS disk geometry. */
    94     PDMMEDIAGEOMETRY PCHSGeometry;
    95     /** Total number of sectors on this disk. */
    96     uint64_t cTotalSectors;
    97     /** Number of sectors to transfer per IRQ. */
    98     uint32_t cSectorsPerIRQ;
    99 
    100     /** ATA/ATAPI register 1: feature (write-only). */
    101     uint8_t uATARegFeature;
    102     /** ATA/ATAPI register 1: feature, high order byte. */
    103     uint8_t uATARegFeatureHOB;
    104     /** ATA/ATAPI register 1: error (read-only). */
    105     uint8_t uATARegError;
    106     /** ATA/ATAPI register 2: sector count (read/write). */
    107     uint8_t uATARegNSector;
    108     /** ATA/ATAPI register 2: sector count, high order byte. */
    109     uint8_t uATARegNSectorHOB;
    110     /** ATA/ATAPI register 3: sector (read/write). */
    111     uint8_t uATARegSector;
    112     /** ATA/ATAPI register 3: sector, high order byte. */
    113     uint8_t uATARegSectorHOB;
    114     /** ATA/ATAPI register 4: cylinder low (read/write). */
    115     uint8_t uATARegLCyl;
    116     /** ATA/ATAPI register 4: cylinder low, high order byte. */
    117     uint8_t uATARegLCylHOB;
    118     /** ATA/ATAPI register 5: cylinder high (read/write). */
    119     uint8_t uATARegHCyl;
    120     /** ATA/ATAPI register 5: cylinder high, high order byte. */
    121     uint8_t uATARegHCylHOB;
    122     /** ATA/ATAPI register 6: select drive/head (read/write). */
    123     uint8_t uATARegSelect;
    124     /** ATA/ATAPI register 7: status (read-only). */
    125     uint8_t uATARegStatus;
    126     /** ATA/ATAPI register 7: command (write-only). */
    127     uint8_t uATARegCommand;
    128     /** ATA/ATAPI drive control register (write-only). */
    129     uint8_t uATARegDevCtl;
    130 
    131     /** Currently active transfer mode (MDMA/UDMA) and speed. */
    132     uint8_t uATATransferMode;
    133     /** Current transfer direction. */
    134     uint8_t uTxDir;
    135     /** Index of callback for begin transfer. */
    136     uint8_t iBeginTransfer;
    137     /** Index of callback for source/sink of data. */
    138     uint8_t iSourceSink;
    139     /** Flag indicating whether the current command transfers data in DMA mode. */
    140     bool fDMA;
    141     /** Set to indicate that ATAPI transfer semantics must be used. */
    142     bool fATAPITransfer;
    143 
    144     /** Total ATA/ATAPI transfer size, shared PIO/DMA. */
    145     uint32_t cbTotalTransfer;
    146     /** Elementary ATA/ATAPI transfer size, shared PIO/DMA. */
    147     uint32_t cbElementaryTransfer;
    148     /** Current read/write buffer position, shared PIO/DMA. */
    149     uint32_t iIOBufferCur;
    150     /** First element beyond end of valid buffer content, shared PIO/DMA. */
    151     uint32_t iIOBufferEnd;
    152 
    153     /** ATA/ATAPI current PIO read/write transfer position. Not shared with DMA for safety reasons. */
    154     uint32_t iIOBufferPIODataStart;
    155     /** ATA/ATAPI current PIO read/write transfer end. Not shared with DMA for safety reasons. */
    156     uint32_t iIOBufferPIODataEnd;
    157 
    158     /** ATAPI current LBA position. */
    159     uint32_t iATAPILBA;
    160     /** ATAPI current sector size. */
    161     uint32_t cbATAPISector;
    162     /** ATAPI current command. */
    163     uint8_t aATAPICmd[ATAPI_PACKET_SIZE];
    164     /** ATAPI sense key. */
    165     uint8_t uATAPISenseKey;
    166     /** ATAPI additional sense code. */
    167     uint8_t uATAPIASC;
    168     /** HACK: Countdown till we report a newly unmounted drive as mounted. */
    169     uint8_t cNotifiedMediaChange;
    170 
    171     /** The status LED state for this drive. */
    172     PDMLED Led;
    173 
    174     /** Size of I/O buffer. */
    175     uint32_t cbIOBuffer;
    176     /** Pointer to the I/O buffer. */
    177     R3R0PTRTYPE(uint8_t *) pbIOBufferHC;
    178     /** Pointer to the I/O buffer. */
    179     RCPTRTYPE(uint8_t *) pbIOBufferGC;
    180 #if HC_ARCH_BITS == 64
    181     RTRCPTR Aligmnent0; /**< Align the statistics at an 8-byte boundrary. */
    182 #endif
    183 
    184     /*
    185      * No data that is part of the saved state after this point!!!!!
    186      */
    187 
    188     /* Release statistics: number of ATA DMA commands. */
    189     STAMCOUNTER StatATADMA;
    190     /* Release statistics: number of ATA PIO commands. */
    191     STAMCOUNTER StatATAPIO;
    192     /* Release statistics: number of ATAPI PIO commands. */
    193     STAMCOUNTER StatATAPIDMA;
    194     /* Release statistics: number of ATAPI PIO commands. */
    195     STAMCOUNTER StatATAPIPIO;
    196 #ifdef VBOX_INSTRUMENT_DMA_WRITES
    197     /* Release statistics: number of DMA sector writes and the time spent. */
    198     STAMPROFILEADV StatInstrVDWrites;
    199 #endif
    200 
    201     /** Statistics: number of read operations and the time spent reading. */
    202     STAMPROFILEADV  StatReads;
    203     /** Statistics: number of bytes read. */
    204     STAMCOUNTER     StatBytesRead;
    205     /** Statistics: number of write operations and the time spent writing. */
    206     STAMPROFILEADV  StatWrites;
    207     /** Statistics: number of bytes written. */
    208     STAMCOUNTER     StatBytesWritten;
    209     /** Statistics: number of flush operations and the time spend flushing. */
    210     STAMPROFILE     StatFlushes;
    211 
    212     /** Enable passing through commands directly to the ATAPI drive. */
    213     bool            fATAPIPassthrough;
    214     /** Number of errors we've reported to the release log.
    215      * This is to prevent flooding caused by something going horribly wrong.
    216      * this value against MAX_LOG_REL_ERRORS in places likely to cause floods
    217      * like the ones we currently seeing on the linux smoke tests (2006-11-10). */
    218     uint32_t        cErrors;
    219     /** Timestamp of last started command. 0 if no command pending. */
    220     uint64_t        u64CmdTS;
    221 
    222     /** Pointer to the attached driver's base interface. */
    223     R3PTRTYPE(PPDMIBASE)            pDrvBase;
    224     /** Pointer to the attached driver's block interface. */
    225     R3PTRTYPE(PPDMIBLOCK)           pDrvBlock;
    226     /** Pointer to the attached driver's block bios interface. */
    227     R3PTRTYPE(PPDMIBLOCKBIOS)       pDrvBlockBios;
    228     /** Pointer to the attached driver's mount interface.
    229      * This is NULL if the driver isn't a removable unit. */
    230     R3PTRTYPE(PPDMIMOUNT)           pDrvMount;
    231     /** The base interface. */
    232     PDMIBASE                        IBase;
    233     /** The block port interface. */
    234     PDMIBLOCKPORT                   IPort;
    235     /** The mount notify interface. */
    236     PDMIMOUNTNOTIFY                 IMountNotify;
    237     /** The LUN #. */
    238     RTUINT                          iLUN;
    239 #if HC_ARCH_BITS == 64
    240     RTUINT                          Alignment2; /**< Align pDevInsHC correctly. */
    241 #endif
    242     /** Pointer to device instance. */
    243     R3R0PTRTYPE(PPDMDEVINS)             pDevInsHC;
    244     /** Pointer to controller instance. */
    245     R3R0PTRTYPE(struct ATACONTROLLER *) pControllerHC;
    246     /** Pointer to device instance. */
    247     RCPTRTYPE(PPDMDEVINS)               pDevInsGC;
    248     /** Pointer to controller instance. */
    249     RCPTRTYPE(struct ATACONTROLLER *)   pControllerGC;
    250 } ATADevState;
    251 
    252 
    253 typedef struct ATATransferRequest
    254 {
    255     uint8_t iIf;
    256     uint8_t iBeginTransfer;
    257     uint8_t iSourceSink;
    258     uint32_t cbTotalTransfer;
    259     uint8_t uTxDir;
    260 } ATATransferRequest;
    261 
    262 
    263 typedef struct ATAAbortRequest
    264 {
    265     uint8_t iIf;
    266     bool fResetDrive;
    267 } ATAAbortRequest;
    268 
    269 
    270 typedef enum
    271 {
    272     /** Begin a new transfer. */
    273     ATA_AIO_NEW = 0,
    274     /** Continue a DMA transfer. */
    275     ATA_AIO_DMA,
    276     /** Continue a PIO transfer. */
    277     ATA_AIO_PIO,
    278     /** Reset the drives on current controller, stop all transfer activity. */
    279     ATA_AIO_RESET_ASSERTED,
    280     /** Reset the drives on current controller, resume operation. */
    281     ATA_AIO_RESET_CLEARED,
    282     /** Abort the current transfer of a particular drive. */
    283     ATA_AIO_ABORT
    284 } ATAAIO;
    285 
    286 
    287 typedef struct ATARequest
    288 {
    289     ATAAIO ReqType;
    290     union
    291     {
    292         ATATransferRequest t;
    293         ATAAbortRequest a;
    294     } u;
    295 } ATARequest;
    296 
    297 
    298 typedef struct ATACONTROLLER
    299 {
    300     /** The base of the first I/O Port range. */
    301     RTIOPORT    IOPortBase1;
    302     /** The base of the second I/O Port range. (0 if none) */
    303     RTIOPORT    IOPortBase2;
    304     /** The assigned IRQ. */
    305     RTUINT      irq;
    306     /** Access critical section */
    307     PDMCRITSECT lock;
    308 
    309     /** Selected drive. */
    310     uint8_t     iSelectedIf;
    311     /** The interface on which to handle async I/O. */
    312     uint8_t     iAIOIf;
    313     /** The state of the async I/O thread. */
    314     uint8_t     uAsyncIOState;
    315     /** Flag indicating whether the next transfer is part of the current command. */
    316     bool        fChainedTransfer;
    317     /** Set when the reset processing is currently active on this controller. */
    318     bool        fReset;
    319     /** Flag whether the current transfer needs to be redone. */
    320     bool        fRedo;
    321     /** Flag whether the redo suspend has been finished. */
    322     bool        fRedoIdle;
    323     /** Flag whether the DMA operation to be redone is the final transfer. */
    324     bool        fRedoDMALastDesc;
    325     /** The BusMaster DMA state. */
    326     BMDMAState  BmDma;
    327     /** Pointer to first DMA descriptor. */
    328     RTGCPHYS32  pFirstDMADesc;
    329     /** Pointer to last DMA descriptor. */
    330     RTGCPHYS32  pLastDMADesc;
    331     /** Pointer to current DMA buffer (for redo operations). */
    332     RTGCPHYS32  pRedoDMABuffer;
    333     /** Size of current DMA buffer (for redo operations). */
    334     uint32_t    cbRedoDMABuffer;
    335 
    336     /** The ATA/ATAPI interfaces of this controller. */
    337     ATADevState aIfs[2];
    338 
    339     /** Pointer to device instance. */
    340     R3R0PTRTYPE(PPDMDEVINS)         pDevInsHC;
    341     /** Pointer to device instance. */
    342     RCPTRTYPE(PPDMDEVINS)           pDevInsGC;
    343 
    344     /** Set when the destroying the device instance and the thread must exit. */
    345     uint32_t volatile   fShutdown;
    346     /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
    347     RTTHREAD            AsyncIOThread;
    348     /** The event semaphore the thread is waiting on for requests. */
    349     RTSEMEVENT          AsyncIOSem;
    350     /** The request queue for the AIO thread. One element is always unused. */
    351     ATARequest          aAsyncIORequests[4];
    352     /** The position at which to insert a new request for the AIO thread. */
    353     uint8_t             AsyncIOReqHead;
    354     /** The position at which to get a new request for the AIO thread. */
    355     uint8_t             AsyncIOReqTail;
    356     uint8_t             Alignment3[2]; /**< Explicit padding of the 2 byte gap. */
    357     /** Magic delay before triggering interrupts in DMA mode. */
    358     uint32_t            DelayIRQMillies;
    359     /** The mutex protecting the request queue. */
    360     RTSEMMUTEX          AsyncIORequestMutex;
    361     /** The event semaphore the thread is waiting on during suspended I/O. */
    362     RTSEMEVENT          SuspendIOSem;
    363 #if HC_ARCH_BITS == 32
    364     uint32_t            Alignment0;
    365 #endif
    366 
    367     /* Statistics */
    368     STAMCOUNTER StatAsyncOps;
    369     uint64_t    StatAsyncMinWait;
    370     uint64_t    StatAsyncMaxWait;
    371     STAMCOUNTER StatAsyncTimeUS;
    372     STAMPROFILEADV StatAsyncTime;
    373     STAMPROFILE StatLockWait;
    374 } ATACONTROLLER, *PATACONTROLLER;
    37559
    37660typedef struct PCIATAState {
    … …  
    39579} PCIATAState;
    39680
    397 #define ATADEVSTATE_2_CONTROLLER(pIf)          ( (pIf)->CTXSUFF(pController) )
    398 #define ATADEVSTATE_2_DEVINS(pIf)              ( (pIf)->CTXSUFF(pDevIns) )
    399 #define CONTROLLER_2_DEVINS(pController)    ( (pController)->CTXSUFF(pDevIns) )
    40081#define PDMIBASE_2_PCIATASTATE(pInterface)      ( (PCIATAState *)((uintptr_t)(pInterface) - RT_OFFSETOF(PCIATAState, IBase)) )
    40182#define PDMILEDPORTS_2_PCIATASTATE(pInterface)  ( (PCIATAState *)((uintptr_t)(pInterface) - RT_OFFSETOF(PCIATAState, ILeds)) )
    402 #define PDMIBASE_2_ATASTATE(pInterface)         ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IBase)) )
    40383#define PDMIBLOCKPORT_2_ATASTATE(pInterface)    ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IPort)) )
    40484#define PDMIMOUNT_2_ATASTATE(pInterface)        ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IMount)) )
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