- Timestamp:
- Aug 8, 2008 2:05:38 PM (16 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r11155 r11250 1 1 /** $Id$ */ 2 2 /** @file 3 * Intel 8254 Programmable Interval Timer (PIT) And Dummy Speaker Device.3 * DevPIT-i8254 - Intel 8254 Programmable Interval Timer (PIT) And Dummy Speaker Device. 4 4 */ 5 5 … … 44 44 * THE SOFTWARE. 45 45 */ 46 47 46 48 47 /******************************************************************************* … … 56 55 #include <iprt/asm.h> 57 56 58 #include "Builtins.h" 57 #include "../Builtins.h" 58 59 59 60 60 /******************************************************************************* … … 77 77 //#define FAKE_REFRESH_CLOCK 78 78 79 79 80 /******************************************************************************* 80 81 * Structures and Typedefs * … … 82 83 typedef struct PITChannelState 83 84 { 84 /** Pointer to the instance data - HCPtr. */ 85 R3R0PTRTYPE(struct PITState *) pPitHC; 86 /** The timer - HCPtr. */ 87 R3R0PTRTYPE(PTMTIMER) pTimerHC; 88 /** Pointer to the instance data - GCPtr. */ 89 RCPTRTYPE(struct PITState *) pPitGC; 90 /** The timer - HCPtr. */ 91 PTMTIMERRC pTimerGC; 85 /** Pointer to the instance data - R3 Ptr. */ 86 R3PTRTYPE(struct PITState *) pPitR3; 87 /** The timer - R3 Ptr. */ 88 PTMTIMERR3 pTimerR3; 89 /** Pointer to the instance data - R0 Ptr. */ 90 R0PTRTYPE(struct PITState *) pPitR0; 91 /** The timer - R0 Ptr. */ 92 PTMTIMERR0 pTimerR0; 93 /** Pointer to the instance data - RC Ptr. */ 94 RCPTRTYPE(struct PITState *) pPitRC; 95 /** The timer - RC Ptr. */ 96 PTMTIMERRC pTimerRC; 92 97 /** The virtual time stamp at the last reload. (only used in mode 2 for now) */ 93 98 uint64_t u64ReloadTS; … … 133 138 #endif 134 139 /** Pointer to the device instance. */ 135 R3PTRTYPE(PPDMDEVINS)pDevIns;140 PPDMDEVINSR3 pDevIns; 136 141 #if HC_ARCH_BITS == 32 137 142 uint32_t Alignment0; … … 165 170 uint64_t d; 166 171 int counter; 167 PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer); 168 169 if (s->mode == 2) /** @todo Implement proper virtual time and get rid of this hack.. */ 170 { 171 #if 0 172 d = TMTimerGet(pTimer); 173 d -= s->u64ReloadTS; 174 d = ASMMultU64ByU32DivByU32(d, PIT_FREQ, TMTimerGetFreq(pTimer)); 175 #else /* variable time because of catch up */ 172 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 173 174 if (s->mode == 2) 175 { 176 176 if (s->u64NextTS == UINT64_MAX) 177 177 return 1; /** @todo check this value. */ 178 178 d = TMTimerGet(pTimer); 179 179 d = ASMMultU64ByU32DivByU32(d - s->u64ReloadTS, s->count, s->u64NextTS - s->u64ReloadTS); 180 #endif181 180 if (d >= s->count) 182 181 return 1; … … 207 206 { 208 207 uint64_t d; 209 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);208 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 210 209 int out; 211 210 … … 269 268 { 270 269 PITChannelState *s = &pit->channels[channel]; 271 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);270 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 272 271 Assert((val & 1) == val); 273 272 … … 299 298 } 300 299 301 static inline voidpit_load_count(PITChannelState *s, int val)302 { 303 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);300 DECLINLINE(void) pit_load_count(PITChannelState *s, int val) 301 { 302 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 304 303 if (val == 0) 305 304 val = 0x10000; … … 309 308 310 309 /* log the new rate (ch 0 only). */ 311 if ( s->pTimer HC/* ch 0 */310 if ( s->pTimerR3 /* ch 0 */ 312 311 && s->cRelLogEntries++ < 32) 313 312 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n", … … 319 318 uint64_t current_time) 320 319 { 321 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);320 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 322 321 uint64_t d, next_time, base; 323 322 uint32_t period2; … … 388 387 int irq_level; 389 388 PPDMDEVINS pDevIns; 390 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);391 392 if (!s->CTX SUFF(pTimer))389 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 390 391 if (!s->CTX_SUFF(pTimer)) 393 392 return; 394 393 expire_time = pit_get_next_transition_time(s, current_time); … … 396 395 397 396 /* We just flip-flop the irq level to save that extra timer call, which isn't generally required (we haven't served it for months). */ 398 pDevIns = s->CTX SUFF(pPit)->pDevIns;397 pDevIns = s->CTX_SUFF(pPit)->pDevIns; 399 398 PDMDevHlpISASetIrq(pDevIns, s->irq, irq_level); 400 399 if (irq_level) … … 405 404 { 406 405 s->u64ReloadTS = now; 407 STAM_COUNTER_INC(&s->CTX SUFF(pPit)->StatPITIrq);406 STAM_COUNTER_INC(&s->CTX_SUFF(pPit)->StatPITIrq); 408 407 } 409 408 … … 411 410 { 412 411 s->u64NextTS = expire_time; 413 TMTimerSet(s->CTX SUFF(pTimer), s->u64NextTS);412 TMTimerSet(s->CTX_SUFF(pTimer), s->u64NextTS); 414 413 } 415 414 else 416 415 { 417 416 LogFlow(("PIT: m=%d count=%#4x irq_level=%#x stopped\n", s->mode, s->count, irq_level)); 418 TMTimerStop(s->CTX SUFF(pTimer));417 TMTimerStop(s->CTX_SUFF(pTimer)); 419 418 s->u64NextTS = UINT64_MAX; 420 419 } … … 562 561 /* status latch */ 563 562 /* XXX: add BCD and null count */ 564 PTMTIMER pTimer = s->CTX SUFF(pPit)->channels[0].CTXSUFF(pTimer);563 PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer); 565 564 s->status = (pit_get_out1(s, TMTimerGet(pTimer)) << 7) 566 565 | (s->rw_mode << 4) … … 640 639 { 641 640 PITState *pData = PDMINS2DATA(pDevIns, PITState *); 642 const uint64_t u64Now = TMTimerGet(pData->channels[0].CTX SUFF(pTimer));643 Assert(TMTimerGetFreq(pData->channels[0].CTX SUFF(pTimer)) == 1000000000); /* lazy bird. */641 const uint64_t u64Now = TMTimerGet(pData->channels[0].CTX_SUFF(pTimer)); 642 Assert(TMTimerGetFreq(pData->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */ 644 643 645 644 /* bit 6,7 Parity error stuff. */ … … 728 727 SSMR3PutU64(pSSMHandle, s->u64ReloadTS); 729 728 SSMR3PutS64(pSSMHandle, s->next_transition_time); 730 if (s->CTX SUFF(pTimer))731 TMR3TimerSave(s->CTX SUFF(pTimer), pSSMHandle);729 if (s->CTX_SUFF(pTimer)) 730 TMR3TimerSave(s->CTX_SUFF(pTimer), pSSMHandle); 732 731 } 733 732 … … 776 775 SSMR3GetU64(pSSMHandle, &s->u64ReloadTS); 777 776 SSMR3GetS64(pSSMHandle, &s->next_transition_time); 778 if (s->CTX SUFF(pTimer))777 if (s->CTX_SUFF(pTimer)) 779 778 { 780 TMR3TimerLoad(s->CTX SUFF(pTimer), pSSMHandle);779 TMR3TimerLoad(s->CTX_SUFF(pTimer), pSSMHandle); 781 780 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n", 782 781 s->mode, s->count, s->count, PIT_FREQ / s->count, (PIT_FREQ * 100 / s->count) % 100, i)); … … 805 804 PITState *pData = PDMINS2DATA(pDevIns, PITState *); 806 805 PITChannelState *s = &pData->channels[0]; 807 STAM_PROFILE_ADV_START(&s->CTX SUFF(pPit)->StatPITHandler, a);806 STAM_PROFILE_ADV_START(&s->CTX_SUFF(pPit)->StatPITHandler, a); 808 807 pit_irq_timer_update(s, s->next_transition_time); 809 STAM_PROFILE_ADV_STOP(&s->CTX SUFF(pPit)->StatPITHandler, a);808 STAM_PROFILE_ADV_STOP(&s->CTX_SUFF(pPit)->StatPITHandler, a); 810 809 } 811 810 … … 824 823 LogFlow(("pitRelocate: \n")); 825 824 826 for (i = 0; i < ELEMENTS(pData->channels); i++)825 for (i = 0; i < RT_ELEMENTS(pData->channels); i++) 827 826 { 828 827 PITChannelState *pCh = &pData->channels[i]; 829 if (pCh->pTimer HC)830 pCh->pTimer GC = TMTimerGCPtr(pCh->pTimerHC);831 pData->channels[i].pPit GC = PDMINS2DATA_GCPTR(pDevIns);828 if (pCh->pTimerR3) 829 pCh->pTimerRC = TMTimerRCPtr(pCh->pTimerR3); 830 pData->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns); 832 831 } 833 832 } … … 983 982 pData->pDevIns = pDevIns; 984 983 pData->channels[0].irq = u8Irq; 985 for (i = 0; i < ELEMENTS(pData->channels); i++) 986 { 987 pData->channels[i].pPitHC = pData; 988 pData->channels[i].pPitGC = PDMINS2DATA_GCPTR(pDevIns); 984 for (i = 0; i < RT_ELEMENTS(pData->channels); i++) 985 { 986 pData->channels[i].pPitR3 = pData; 987 pData->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns); 988 pData->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns); 989 989 } 990 990 … … 993 993 */ 994 994 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, "i8254 Programmable Interval Timer", 995 &pData->channels[0]. CTXSUFF(pTimer));995 &pData->channels[0].pTimerR3); 996 996 if (VBOX_FAILURE(rc)) 997 997 { … … 999 999 return rc; 1000 1000 } 1001 pData->channels[0].pTimerRC = TMTimerRCPtr(pData->channels[0].pTimerR3); 1002 pData->channels[0].pTimerR0 = TMTimerR0Ptr(pData->channels[0].pTimerR3); 1001 1003 1002 1004 rc = PDMDevHlpIOPortRegister(pDevIns, u16Base, 4, NULL, pitIOPortWrite, pitIOPortRead, NULL, NULL, "i8254 Programmable Interval Timer"); -
trunk/src/VBox/Devices/testcase/tstDeviceStructSizeGC.cpp
r11219 r11250 465 465 /* PC/DevPit-i8254.cpp */ 466 466 GEN_CHECK_SIZE(PITChannelState); 467 GEN_CHECK_OFF(PITChannelState, pPitHC); 468 GEN_CHECK_OFF(PITChannelState, pTimerHC); 469 GEN_CHECK_OFF(PITChannelState, pPitGC); 470 GEN_CHECK_OFF(PITChannelState, pTimerGC); 467 GEN_CHECK_OFF(PITChannelState, pPitR3); 468 GEN_CHECK_OFF(PITChannelState, pTimerR3); 469 GEN_CHECK_OFF(PITChannelState, pPitR0); 470 GEN_CHECK_OFF(PITChannelState, pTimerR0); 471 GEN_CHECK_OFF(PITChannelState, pPitRC); 472 GEN_CHECK_OFF(PITChannelState, pTimerRC); 471 473 GEN_CHECK_OFF(PITChannelState, u64ReloadTS); 472 474 GEN_CHECK_OFF(PITChannelState, u64NextTS);
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