VirtualBox

Changeset 11250 in vbox for trunk/src


Ignore:
Timestamp:
Aug 8, 2008 2:05:38 PM (16 years ago)
Author:
vboxsync
Message:

#1865: DevPit-i8254.

Location:
trunk/src/VBox/Devices
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/PC/DevPit-i8254.cpp

    r11155 r11250  
    11/** $Id$ */
    22/** @file
    3  * Intel 8254 Programmable Interval Timer (PIT) And Dummy Speaker Device.
     3 * DevPIT-i8254 - Intel 8254 Programmable Interval Timer (PIT) And Dummy Speaker Device.
    44 */
    55
     
    4444 * THE SOFTWARE.
    4545 */
    46 
    4746
    4847/*******************************************************************************
     
    5655#include <iprt/asm.h>
    5756
    58 #include "Builtins.h"
     57#include "../Builtins.h"
     58
    5959
    6060/*******************************************************************************
     
    7777//#define FAKE_REFRESH_CLOCK
    7878
     79
    7980/*******************************************************************************
    8081*   Structures and Typedefs                                                    *
     
    8283typedef struct PITChannelState
    8384{
    84     /** Pointer to the instance data - HCPtr. */
    85     R3R0PTRTYPE(struct PITState *)  pPitHC;
    86     /** The timer - HCPtr. */
    87     R3R0PTRTYPE(PTMTIMER)           pTimerHC;
    88     /** Pointer to the instance data - GCPtr. */
    89     RCPTRTYPE(struct PITState *)    pPitGC;
    90     /** The timer - HCPtr. */
    91     PTMTIMERRC                      pTimerGC;
     85    /** Pointer to the instance data - R3 Ptr. */
     86    R3PTRTYPE(struct PITState *)    pPitR3;
     87    /** The timer - R3 Ptr. */
     88    PTMTIMERR3                      pTimerR3;
     89    /** Pointer to the instance data - R0 Ptr. */
     90    R0PTRTYPE(struct PITState *)    pPitR0;
     91    /** The timer - R0 Ptr. */
     92    PTMTIMERR0                      pTimerR0;
     93    /** Pointer to the instance data - RC Ptr. */
     94    RCPTRTYPE(struct PITState *)    pPitRC;
     95    /** The timer - RC Ptr. */
     96    PTMTIMERRC                      pTimerRC;
    9297    /** The virtual time stamp at the last reload. (only used in mode 2 for now) */
    9398    uint64_t                        u64ReloadTS;
     
    133138#endif
    134139    /** Pointer to the device instance. */
    135     R3PTRTYPE(PPDMDEVINS)   pDevIns;
     140    PPDMDEVINSR3            pDevIns;
    136141#if HC_ARCH_BITS == 32
    137142    uint32_t                Alignment0;
     
    165170    uint64_t d;
    166171    int counter;
    167     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
    168 
    169     if (s->mode == 2) /** @todo Implement proper virtual time and get rid of this hack.. */
    170     {
    171 #if 0
    172         d = TMTimerGet(pTimer);
    173         d -= s->u64ReloadTS;
    174         d = ASMMultU64ByU32DivByU32(d, PIT_FREQ, TMTimerGetFreq(pTimer));
    175 #else /* variable time because of catch up */
     172    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
     173
     174    if (s->mode == 2)
     175    {
    176176        if (s->u64NextTS == UINT64_MAX)
    177177            return 1; /** @todo check this value. */
    178178        d = TMTimerGet(pTimer);
    179179        d = ASMMultU64ByU32DivByU32(d - s->u64ReloadTS, s->count, s->u64NextTS - s->u64ReloadTS);
    180 #endif
    181180        if (d >= s->count)
    182181            return 1;
     
    207206{
    208207    uint64_t d;
    209     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
     208    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    210209    int out;
    211210
     
    269268{
    270269    PITChannelState *s = &pit->channels[channel];
    271     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
     270    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    272271    Assert((val & 1) == val);
    273272
     
    299298}
    300299
    301 static inline void pit_load_count(PITChannelState *s, int val)
    302 {
    303     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
     300DECLINLINE(void) pit_load_count(PITChannelState *s, int val)
     301{
     302    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    304303    if (val == 0)
    305304        val = 0x10000;
     
    309308
    310309    /* log the new rate (ch 0 only). */
    311     if (    s->pTimerHC /* ch 0 */
     310    if (    s->pTimerR3 /* ch 0 */
    312311        &&  s->cRelLogEntries++ < 32)
    313312        LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=0)\n",
     
    319318                                            uint64_t current_time)
    320319{
    321     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
     320    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    322321    uint64_t d, next_time, base;
    323322    uint32_t period2;
     
    388387    int irq_level;
    389388    PPDMDEVINS pDevIns;
    390     PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
    391 
    392     if (!s->CTXSUFF(pTimer))
     389    PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
     390
     391    if (!s->CTX_SUFF(pTimer))
    393392        return;
    394393    expire_time = pit_get_next_transition_time(s, current_time);
     
    396395
    397396    /* We just flip-flop the irq level to save that extra timer call, which isn't generally required (we haven't served it for months). */
    398     pDevIns = s->CTXSUFF(pPit)->pDevIns;
     397    pDevIns = s->CTX_SUFF(pPit)->pDevIns;
    399398    PDMDevHlpISASetIrq(pDevIns, s->irq, irq_level);
    400399    if (irq_level)
     
    405404    {
    406405        s->u64ReloadTS = now;
    407         STAM_COUNTER_INC(&s->CTXSUFF(pPit)->StatPITIrq);
     406        STAM_COUNTER_INC(&s->CTX_SUFF(pPit)->StatPITIrq);
    408407    }
    409408
     
    411410    {
    412411        s->u64NextTS = expire_time;
    413         TMTimerSet(s->CTXSUFF(pTimer), s->u64NextTS);
     412        TMTimerSet(s->CTX_SUFF(pTimer), s->u64NextTS);
    414413    }
    415414    else
    416415    {
    417416        LogFlow(("PIT: m=%d count=%#4x irq_level=%#x stopped\n", s->mode, s->count, irq_level));
    418         TMTimerStop(s->CTXSUFF(pTimer));
     417        TMTimerStop(s->CTX_SUFF(pTimer));
    419418        s->u64NextTS = UINT64_MAX;
    420419    }
     
    562561                        /* status latch */
    563562                        /* XXX: add BCD and null count */
    564                         PTMTIMER pTimer = s->CTXSUFF(pPit)->channels[0].CTXSUFF(pTimer);
     563                        PTMTIMER pTimer = s->CTX_SUFF(pPit)->channels[0].CTX_SUFF(pTimer);
    565564                        s->status = (pit_get_out1(s, TMTimerGet(pTimer)) << 7)
    566565                            | (s->rw_mode << 4)
     
    640639    {
    641640        PITState *pData = PDMINS2DATA(pDevIns, PITState *);
    642         const uint64_t u64Now = TMTimerGet(pData->channels[0].CTXSUFF(pTimer));
    643         Assert(TMTimerGetFreq(pData->channels[0].CTXSUFF(pTimer)) == 1000000000); /* lazy bird. */
     641        const uint64_t u64Now = TMTimerGet(pData->channels[0].CTX_SUFF(pTimer));
     642        Assert(TMTimerGetFreq(pData->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */
    644643
    645644        /* bit 6,7 Parity error stuff. */
     
    728727        SSMR3PutU64(pSSMHandle, s->u64ReloadTS);
    729728        SSMR3PutS64(pSSMHandle, s->next_transition_time);
    730         if (s->CTXSUFF(pTimer))
    731             TMR3TimerSave(s->CTXSUFF(pTimer), pSSMHandle);
     729        if (s->CTX_SUFF(pTimer))
     730            TMR3TimerSave(s->CTX_SUFF(pTimer), pSSMHandle);
    732731    }
    733732
     
    776775        SSMR3GetU64(pSSMHandle, &s->u64ReloadTS);
    777776        SSMR3GetS64(pSSMHandle, &s->next_transition_time);
    778         if (s->CTXSUFF(pTimer))
     777        if (s->CTX_SUFF(pTimer))
    779778        {
    780             TMR3TimerLoad(s->CTXSUFF(pTimer), pSSMHandle);
     779            TMR3TimerLoad(s->CTX_SUFF(pTimer), pSSMHandle);
    781780            LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n",
    782781                    s->mode, s->count, s->count, PIT_FREQ / s->count, (PIT_FREQ * 100 / s->count) % 100, i));
     
    805804    PITState *pData = PDMINS2DATA(pDevIns, PITState *);
    806805    PITChannelState *s = &pData->channels[0];
    807     STAM_PROFILE_ADV_START(&s->CTXSUFF(pPit)->StatPITHandler, a);
     806    STAM_PROFILE_ADV_START(&s->CTX_SUFF(pPit)->StatPITHandler, a);
    808807    pit_irq_timer_update(s, s->next_transition_time);
    809     STAM_PROFILE_ADV_STOP(&s->CTXSUFF(pPit)->StatPITHandler, a);
     808    STAM_PROFILE_ADV_STOP(&s->CTX_SUFF(pPit)->StatPITHandler, a);
    810809}
    811810
     
    824823    LogFlow(("pitRelocate: \n"));
    825824
    826     for (i = 0; i < ELEMENTS(pData->channels); i++)
     825    for (i = 0; i < RT_ELEMENTS(pData->channels); i++)
    827826    {
    828827        PITChannelState *pCh = &pData->channels[i];
    829         if (pCh->pTimerHC)
    830             pCh->pTimerGC = TMTimerGCPtr(pCh->pTimerHC);
    831         pData->channels[i].pPitGC = PDMINS2DATA_GCPTR(pDevIns);
     828        if (pCh->pTimerR3)
     829            pCh->pTimerRC = TMTimerRCPtr(pCh->pTimerR3);
     830        pData->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);
    832831    }
    833832}
     
    983982    pData->pDevIns = pDevIns;
    984983    pData->channels[0].irq = u8Irq;
    985     for (i = 0; i < ELEMENTS(pData->channels); i++)
    986     {
    987         pData->channels[i].pPitHC = pData;
    988         pData->channels[i].pPitGC = PDMINS2DATA_GCPTR(pDevIns);
     984    for (i = 0; i < RT_ELEMENTS(pData->channels); i++)
     985    {
     986        pData->channels[i].pPitR3 = pData;
     987        pData->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns);
     988        pData->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);
    989989    }
    990990
     
    993993     */
    994994    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, "i8254 Programmable Interval Timer",
    995                                 &pData->channels[0].CTXSUFF(pTimer));
     995                                &pData->channels[0].pTimerR3);
    996996    if (VBOX_FAILURE(rc))
    997997    {
     
    999999        return rc;
    10001000    }
     1001    pData->channels[0].pTimerRC = TMTimerRCPtr(pData->channels[0].pTimerR3);
     1002    pData->channels[0].pTimerR0 = TMTimerR0Ptr(pData->channels[0].pTimerR3);
    10011003
    10021004    rc = PDMDevHlpIOPortRegister(pDevIns, u16Base, 4, NULL, pitIOPortWrite, pitIOPortRead, NULL, NULL, "i8254 Programmable Interval Timer");
  • trunk/src/VBox/Devices/testcase/tstDeviceStructSizeGC.cpp

    r11219 r11250  
    465465    /* PC/DevPit-i8254.cpp */
    466466    GEN_CHECK_SIZE(PITChannelState);
    467     GEN_CHECK_OFF(PITChannelState, pPitHC);
    468     GEN_CHECK_OFF(PITChannelState, pTimerHC);
    469     GEN_CHECK_OFF(PITChannelState, pPitGC);
    470     GEN_CHECK_OFF(PITChannelState, pTimerGC);
     467    GEN_CHECK_OFF(PITChannelState, pPitR3);
     468    GEN_CHECK_OFF(PITChannelState, pTimerR3);
     469    GEN_CHECK_OFF(PITChannelState, pPitR0);
     470    GEN_CHECK_OFF(PITChannelState, pTimerR0);
     471    GEN_CHECK_OFF(PITChannelState, pPitRC);
     472    GEN_CHECK_OFF(PITChannelState, pTimerRC);
    471473    GEN_CHECK_OFF(PITChannelState, u64ReloadTS);
    472474    GEN_CHECK_OFF(PITChannelState, u64NextTS);
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