Changeset 11269 in vbox for trunk/src/VBox
- Timestamp:
- Aug 8, 2008 4:24:48 PM (17 years ago)
- svn:sync-xref-src-repo-rev:
- 34351
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 31 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r11266 r11269 1390 1390 PPDMDEVINS pDevIns = pPciDev->pDevIns; 1391 1391 RTIOPORT Port = (RTIOPORT)GCPhysAddress; 1392 PCIAC97LinkState *p Data= PCIDEV_2_ICHAC97STATE(pPciDev);1392 PCIAC97LinkState *pThis = PCIDEV_2_ICHAC97STATE(pPciDev); 1393 1393 1394 1394 Assert(enmType == PCI_ADDRESS_SPACE_IO); … … 1396 1396 1397 1397 if (iRegion == 0) 1398 rc = PDMDevHlpIOPortRegister (pDevIns, Port, 256, p Data,1398 rc = PDMDevHlpIOPortRegister (pDevIns, Port, 256, pThis, 1399 1399 ichac97IOPortNAMWrite, ichac97IOPortNAMRead, 1400 1400 NULL, NULL, "ICHAC97 NAM"); 1401 1401 else 1402 rc = PDMDevHlpIOPortRegister (pDevIns, Port, 64, p Data,1402 rc = PDMDevHlpIOPortRegister (pDevIns, Port, 64, pThis, 1403 1403 ichac97IOPortNABMWrite, ichac97IOPortNABMRead, 1404 1404 NULL, NULL, "ICHAC97 NABM"); … … 1406 1406 return rc; 1407 1407 1408 p Data->ac97.IOPortBase[iRegion] = Port;1408 pThis->ac97.IOPortBase[iRegion] = Port; 1409 1409 return VINF_SUCCESS; 1410 1410 } … … 1419 1419 static DECLCALLBACK(int) ichac97SaveExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 1420 1420 { 1421 PCIAC97LinkState *p Data= PDMINS_2_DATA(pDevIns, PCIAC97LinkState *);1421 PCIAC97LinkState *pThis = PDMINS_2_DATA(pDevIns, PCIAC97LinkState *); 1422 1422 size_t i; 1423 1423 uint8_t active[LAST_INDEX]; 1424 AC97LinkState *s = &p Data->ac97;1424 AC97LinkState *s = &pThis->ac97; 1425 1425 1426 1426 SSMR3PutU32 (pSSMHandle, s->glob_cnt); … … 1463 1463 uint32_t u32Version) 1464 1464 { 1465 PCIAC97LinkState *p Data= PDMINS_2_DATA(pDevIns, PCIAC97LinkState *);1465 PCIAC97LinkState *pThis = PDMINS_2_DATA(pDevIns, PCIAC97LinkState *); 1466 1466 size_t i; 1467 1467 uint8_t active[LAST_INDEX]; 1468 AC97LinkState *s = &p Data->ac97;1468 AC97LinkState *s = &pThis->ac97; 1469 1469 1470 1470 if (u32Version != AC97_SSM_VERSION) … … 1522 1522 static DECLCALLBACK(void) ac97Reset (PPDMDEVINS pDevIns) 1523 1523 { 1524 PCIAC97LinkState *p Data= PDMINS_2_DATA(pDevIns, PCIAC97LinkState *);1524 PCIAC97LinkState *pThis = PDMINS_2_DATA(pDevIns, PCIAC97LinkState *); 1525 1525 1526 1526 /* 1527 1527 * Reset the device state (will need pDrv later). 1528 1528 */ 1529 reset_bm_regs (&p Data->ac97, &pData->ac97.bm_regs[0]);1530 reset_bm_regs (&p Data->ac97, &pData->ac97.bm_regs[1]);1531 reset_bm_regs (&p Data->ac97, &pData->ac97.bm_regs[2]);1529 reset_bm_regs (&pThis->ac97, &pThis->ac97.bm_regs[0]); 1530 reset_bm_regs (&pThis->ac97, &pThis->ac97.bm_regs[1]); 1531 reset_bm_regs (&pThis->ac97, &pThis->ac97.bm_regs[2]); 1532 1532 1533 1533 /* … … 1536 1536 * the codec manually. 1537 1537 */ 1538 mixer_reset (&p Data->ac97);1538 mixer_reset (&pThis->ac97); 1539 1539 } 1540 1540 … … 1551 1551 PDMINTERFACE enmInterface) 1552 1552 { 1553 PCIAC97LinkState *p Data=1553 PCIAC97LinkState *pThis = 1554 1554 (PCIAC97LinkState *)((uintptr_t)pInterface 1555 1555 - RT_OFFSETOF(PCIAC97LinkState, ac97.IBase)); 1556 Assert(&p Data->ac97.IBase == pInterface);1556 Assert(&pThis->ac97.IBase == pInterface); 1557 1557 switch (enmInterface) 1558 1558 { 1559 1559 case PDMINTERFACE_BASE: 1560 return &p Data->ac97.IBase;1560 return &pThis->ac97.IBase; 1561 1561 default: 1562 1562 return NULL; … … 1585 1585 PCFGMNODE pCfgHandle) 1586 1586 { 1587 PCIAC97LinkState *p Data= PDMINS_2_DATA(pDevIns, PCIAC97LinkState *);1588 AC97LinkState *s = &p Data->ac97;1587 PCIAC97LinkState *pThis = PDMINS_2_DATA(pDevIns, PCIAC97LinkState *); 1588 AC97LinkState *s = &pThis->ac97; 1589 1589 int rc; 1590 1590 … … 1599 1599 1600 1600 /* PCI Device (the assertions will be removed later) */ 1601 PCIDevSetVendorId (&p Data->dev, 0x8086); /* 00 ro - intel. */ Assert (pData->dev.config[0x00] == 0x86); Assert (pData->dev.config[0x01] == 0x80);1602 PCIDevSetDeviceId (&p Data->dev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */Assert (pData->dev.config[0x02] == 0x15); Assert (pData->dev.config[0x03] == 0x24);1603 PCIDevSetCommand (&p Data->dev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert (pData->dev.config[0x04] == 0x00); Assert (pData->dev.config[0x05] == 0x00);1604 PCIDevSetStatus (&p Data->dev, 0x0280); /* 06 rwc?,ro? - pcists. */ Assert (pData->dev.config[0x06] == 0x80); Assert (pData->dev.config[0x07] == 0x02);1605 PCIDevSetRevisionId (&p Data->dev, 0x01); /* 08 ro - rid. */ Assert (pData->dev.config[0x08] == 0x01);1606 PCIDevSetClassProg (&p Data->dev, 0x00); /* 09 ro - pi. */ Assert (pData->dev.config[0x09] == 0x00);1607 PCIDevSetClassSub (&p Data->dev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert (pData->dev.config[0x0a] == 0x01);1608 PCIDevSetClassBase (&p Data->dev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert (pData->dev.config[0x0b] == 0x04);1609 PCIDevSetHeaderType (&p Data->dev, 0x00); /* 0e ro - headtyp. */ Assert (pData->dev.config[0x0e] == 0x00);1610 PCIDevSetBaseAddress (&p Data->dev, 0, /* 10 rw - nambar - native audio mixer base. */1611 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert (p Data->dev.config[0x10] == 0x01); Assert (pData->dev.config[0x11] == 0x00); Assert (pData->dev.config[0x12] == 0x00); Assert (pData->dev.config[0x13] == 0x00);1612 PCIDevSetBaseAddress (&p Data->dev, 1, /* 14 rw - nabmbar - native audio bus mastering. */1613 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert (p Data->dev.config[0x14] == 0x01); Assert (pData->dev.config[0x15] == 0x00); Assert (pData->dev.config[0x16] == 0x00); Assert (pData->dev.config[0x17] == 0x00);1614 PCIDevSetSubSystemVendorId (&p Data->dev, 0x8086); /* 2c ro - intel.) */ Assert (pData->dev.config[0x2c] == 0x86); Assert (pData->dev.config[0x2d] == 0x80);1615 PCIDevSetSubSystemId (&p Data->dev, 0x0000); /* 2e ro. */ Assert (pData->dev.config[0x2e] == 0x00); Assert (pData->dev.config[0x2f] == 0x00);1616 PCIDevSetInterruptLine (&p Data->dev, 0x00); /* 3c rw. */ Assert (pData->dev.config[0x3c] == 0x00);1617 PCIDevSetInterruptPin (&p Data->dev, 0x01); /* 3d ro - INTA#. */ Assert (pData->dev.config[0x3d] == 0x01);1601 PCIDevSetVendorId (&pThis->dev, 0x8086); /* 00 ro - intel. */ Assert (pThis->dev.config[0x00] == 0x86); Assert (pThis->dev.config[0x01] == 0x80); 1602 PCIDevSetDeviceId (&pThis->dev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */Assert (pThis->dev.config[0x02] == 0x15); Assert (pThis->dev.config[0x03] == 0x24); 1603 PCIDevSetCommand (&pThis->dev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert (pThis->dev.config[0x04] == 0x00); Assert (pThis->dev.config[0x05] == 0x00); 1604 PCIDevSetStatus (&pThis->dev, 0x0280); /* 06 rwc?,ro? - pcists. */ Assert (pThis->dev.config[0x06] == 0x80); Assert (pThis->dev.config[0x07] == 0x02); 1605 PCIDevSetRevisionId (&pThis->dev, 0x01); /* 08 ro - rid. */ Assert (pThis->dev.config[0x08] == 0x01); 1606 PCIDevSetClassProg (&pThis->dev, 0x00); /* 09 ro - pi. */ Assert (pThis->dev.config[0x09] == 0x00); 1607 PCIDevSetClassSub (&pThis->dev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert (pThis->dev.config[0x0a] == 0x01); 1608 PCIDevSetClassBase (&pThis->dev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert (pThis->dev.config[0x0b] == 0x04); 1609 PCIDevSetHeaderType (&pThis->dev, 0x00); /* 0e ro - headtyp. */ Assert (pThis->dev.config[0x0e] == 0x00); 1610 PCIDevSetBaseAddress (&pThis->dev, 0, /* 10 rw - nambar - native audio mixer base. */ 1611 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert (pThis->dev.config[0x10] == 0x01); Assert (pThis->dev.config[0x11] == 0x00); Assert (pThis->dev.config[0x12] == 0x00); Assert (pThis->dev.config[0x13] == 0x00); 1612 PCIDevSetBaseAddress (&pThis->dev, 1, /* 14 rw - nabmbar - native audio bus mastering. */ 1613 true /* fIoSpace */, false /* fPrefetchable */, false /* f64Bit */, 0x00000000); Assert (pThis->dev.config[0x14] == 0x01); Assert (pThis->dev.config[0x15] == 0x00); Assert (pThis->dev.config[0x16] == 0x00); Assert (pThis->dev.config[0x17] == 0x00); 1614 PCIDevSetSubSystemVendorId (&pThis->dev, 0x8086); /* 2c ro - intel.) */ Assert (pThis->dev.config[0x2c] == 0x86); Assert (pThis->dev.config[0x2d] == 0x80); 1615 PCIDevSetSubSystemId (&pThis->dev, 0x0000); /* 2e ro. */ Assert (pThis->dev.config[0x2e] == 0x00); Assert (pThis->dev.config[0x2f] == 0x00); 1616 PCIDevSetInterruptLine (&pThis->dev, 0x00); /* 3c rw. */ Assert (pThis->dev.config[0x3c] == 0x00); 1617 PCIDevSetInterruptPin (&pThis->dev, 0x01); /* 3d ro - INTA#. */ Assert (pThis->dev.config[0x3d] == 0x01); 1618 1618 1619 1619 /* … … 1621 1621 * saved state item. 1622 1622 */ 1623 rc = PDMDevHlpPCIRegister (pDevIns, &p Data->dev);1623 rc = PDMDevHlpPCIRegister (pDevIns, &pThis->dev); 1624 1624 if (RT_FAILURE (rc)) 1625 1625 return rc; … … 1636 1636 1637 1637 rc = PDMDevHlpSSMRegister (pDevIns, pDevIns->pDevReg->szDeviceName, 1638 iInstance, AC97_SSM_VERSION, sizeof(*p Data),1638 iInstance, AC97_SSM_VERSION, sizeof(*pThis), 1639 1639 NULL, ichac97SaveExec, NULL, 1640 1640 NULL, ichac97LoadExec, NULL); -
trunk/src/VBox/Devices/Audio/DevSB16.cpp
r11266 r11269 1713 1713 PDMINTERFACE enmInterface) 1714 1714 { 1715 SB16State *p Data= (SB16State *)((uintptr_t)pInterface1715 SB16State *pThis = (SB16State *)((uintptr_t)pInterface 1716 1716 - RT_OFFSETOF(SB16State, IBase)); 1717 Assert(&p Data->IBase == pInterface);1717 Assert(&pThis->IBase == pInterface); 1718 1718 switch (enmInterface) 1719 1719 { 1720 1720 case PDMINTERFACE_BASE: 1721 return &p Data->IBase;1721 return &pThis->IBase; 1722 1722 default: 1723 1723 return NULL; -
trunk/src/VBox/Devices/Audio/audio.c
r11267 r11269 1929 1929 { 1930 1930 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 1931 PDRVAUDIO p Data= PDMINS_2_DATA(pDrvIns, PDRVAUDIO);1931 PDRVAUDIO pThis = PDMINS_2_DATA(pDrvIns, PDRVAUDIO); 1932 1932 switch (enmInterface) 1933 1933 { … … 1935 1935 return &pDrvIns->IBase; 1936 1936 case PDMINTERFACE_AUDIO_CONNECTOR: 1937 return &p Data->IAudioConnector;1937 return &pThis->IAudioConnector; 1938 1938 default: 1939 1939 return NULL; … … 1980 1980 { 1981 1981 int rc; 1982 PDRVAUDIO p Data= PDMINS_2_DATA(pDrvIns, PDRVAUDIO);1982 PDRVAUDIO pThis = PDMINS_2_DATA(pDrvIns, PDRVAUDIO); 1983 1983 char *drvname; 1984 1984 … … 1993 1993 * Init the static parts. 1994 1994 */ 1995 p Data->pDrvIns = pDrvIns;1995 pThis->pDrvIns = pDrvIns; 1996 1996 /* IBase */ 1997 1997 pDrvIns->IBase.pfnQueryInterface = drvAudioQueryInterface; 1998 1998 /* IAudio */ 1999 /* p Data->IAudioConnector.pfn; */1999 /* pThis->IAudioConnector.pfn; */ 2000 2000 2001 2001 glob_audio_state.pDrvIns = pDrvIns; -
trunk/src/VBox/Devices/Audio/audiosniffer.c
r11267 r11269 113 113 static DECLCALLBACK(int) iface_Setup (PPDMIAUDIOSNIFFERPORT pInterface, bool fEnable, bool fKeepHostAudio) 114 114 { 115 AUDIOSNIFFERSTATE *p Data= IAUDIOSNIFFERPORT_2_AUDIOSNIFFERSTATE(pInterface);116 117 Assert(g_pData == p Data);118 119 p Data->fEnabled = fEnable;120 p Data->fKeepHostAudio = fKeepHostAudio;115 AUDIOSNIFFERSTATE *pThis = IAUDIOSNIFFERPORT_2_AUDIOSNIFFERSTATE(pInterface); 116 117 Assert(g_pData == pThis); 118 119 pThis->fEnabled = fEnable; 120 pThis->fKeepHostAudio = fKeepHostAudio; 121 121 122 122 return VINF_SUCCESS; … … 133 133 static DECLCALLBACK(void *) iface_QueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 134 134 { 135 AUDIOSNIFFERSTATE *p Data= (AUDIOSNIFFERSTATE *)((uintptr_t)pInterface - RT_OFFSETOF(AUDIOSNIFFERSTATE, Base));135 AUDIOSNIFFERSTATE *pThis = (AUDIOSNIFFERSTATE *)((uintptr_t)pInterface - RT_OFFSETOF(AUDIOSNIFFERSTATE, Base)); 136 136 137 137 switch (enmInterface) 138 138 { 139 139 case PDMINTERFACE_BASE: 140 return &p Data->Base;140 return &pThis->Base; 141 141 case PDMINTERFACE_AUDIO_SNIFFER_PORT: 142 return &p Data->Port;142 return &pThis->Port; 143 143 default: 144 144 return NULL; … … 163 163 int rc = VINF_SUCCESS; 164 164 165 AUDIOSNIFFERSTATE *p Data= PDMINS_2_DATA(pDevIns, AUDIOSNIFFERSTATE *);165 AUDIOSNIFFERSTATE *pThis = PDMINS_2_DATA(pDevIns, AUDIOSNIFFERSTATE *); 166 166 167 167 Assert(iInstance == 0); … … 178 178 * Initialize data. 179 179 */ 180 p Data->fEnabled = false;181 p Data->fKeepHostAudio = true;182 p Data->pDrv = NULL;180 pThis->fEnabled = false; 181 pThis->fKeepHostAudio = true; 182 pThis->pDrv = NULL; 183 183 184 184 /* … … 186 186 */ 187 187 /* Base */ 188 p Data->Base.pfnQueryInterface = iface_QueryInterface;188 pThis->Base.pfnQueryInterface = iface_QueryInterface; 189 189 190 190 /* Audio Sniffer port */ 191 p Data->Port.pfnSetup = iface_Setup;191 pThis->Port.pfnSetup = iface_Setup; 192 192 193 193 /* 194 194 * Get the corresponding connector interface 195 195 */ 196 rc = PDMDevHlpDriverAttach(pDevIns, 0, &p Data->Base, &pData->pDrvBase, "Audio Sniffer Port");196 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->Base, &pThis->pDrvBase, "Audio Sniffer Port"); 197 197 198 198 if (RT_SUCCESS(rc)) 199 199 { 200 p Data->pDrv = (PPDMIAUDIOSNIFFERCONNECTOR)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_AUDIO_SNIFFER_CONNECTOR);201 202 if (!p Data->pDrv)200 pThis->pDrv = (PPDMIAUDIOSNIFFERCONNECTOR)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_AUDIO_SNIFFER_CONNECTOR); 201 202 if (!pThis->pDrv) 203 203 { 204 204 AssertMsgFailed(("LUN #0 doesn't have a Audio Sniffer connector interface rc=%Vrc\n", rc)); … … 219 219 { 220 220 /* Save PDM device instance data for future reference. */ 221 p Data->pDevIns = pDevIns;221 pThis->pDevIns = pDevIns; 222 222 223 223 /* Save the pointer to created instance in the global variable, so other 224 224 * functions could reach it. 225 225 */ 226 g_pData = p Data;226 g_pData = pThis; 227 227 } 228 228 -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r11268 r11269 996 996 { 997 997 uint32_t i; 998 PPCIBUS p Data= PDMINS_2_DATA(pDevIns, PPCIBUS);999 PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(p Data);998 PPCIBUS pThis = PDMINS_2_DATA(pDevIns, PPCIBUS); 999 PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pThis); 1000 1000 1001 1001 /* 1002 1002 * Bus state data. 1003 1003 */ 1004 SSMR3PutU32(pSSMHandle, p Data->uConfigReg);1004 SSMR3PutU32(pSSMHandle, pThis->uConfigReg); 1005 1005 SSMR3PutBool(pSSMHandle, pGlobals->fUseIoApic); 1006 1006 SSMR3PutU32(pSSMHandle, ~0); /* separator */ … … 1009 1009 * Iterate all the devices. 1010 1010 */ 1011 for (i = 0; i < RT_ELEMENTS(p Data->devices); i++)1012 { 1013 PPCIDEVICE pDev = p Data->devices[i];1011 for (i = 0; i < RT_ELEMENTS(pThis->devices); i++) 1012 { 1013 PPCIDEVICE pDev = pThis->devices[i]; 1014 1014 if (pDev) 1015 1015 { … … 1035 1035 static DECLCALLBACK(int) pciLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 1036 1036 { 1037 PPCIBUS p Data= PDMINS_2_DATA(pDevIns, PPCIBUS);1038 PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(p Data);1037 PPCIBUS pThis = PDMINS_2_DATA(pDevIns, PPCIBUS); 1038 PPCIGLOBALS pGlobals = PCIBUS_2_PCIGLOBALS(pThis); 1039 1039 uint32_t u32; 1040 1040 uint32_t i; … … 1053 1053 * Bus state data. 1054 1054 */ 1055 SSMR3GetU32(pSSMHandle, &p Data->uConfigReg);1055 SSMR3GetU32(pSSMHandle, &pThis->uConfigReg); 1056 1056 if (u32Version > 1) 1057 1057 SSMR3GetBool(pSSMHandle, &pGlobals->fUseIoApic); … … 1078 1078 if (u32 == (uint32_t)~0) 1079 1079 break; 1080 if ( u32 >= RT_ELEMENTS(p Data->devices)1080 if ( u32 >= RT_ELEMENTS(pThis->devices) 1081 1081 || u32 < i) 1082 1082 { … … 1088 1088 for (; i < u32; i++) 1089 1089 { 1090 if (p Data->devices[i])1090 if (pThis->devices[i]) 1091 1091 { 1092 LogRel(("New device in slot %#x, %s (vendor=%#06x device=%#06x)\n", i, p Data->devices[i]->name,1093 PCIDevGetVendorId(p Data->devices[i]), PCIDevGetDeviceId(pData->devices[i])));1092 LogRel(("New device in slot %#x, %s (vendor=%#06x device=%#06x)\n", i, pThis->devices[i]->name, 1093 PCIDevGetVendorId(pThis->devices[i]), PCIDevGetDeviceId(pThis->devices[i]))); 1094 1094 if (SSMR3HandleGetAfter(pSSMHandle) != SSMAFTER_DEBUG_IT) 1095 1095 AssertFailedReturn(VERR_SSM_LOAD_CONFIG_MISMATCH); … … 1104 1104 1105 1105 /* check that it's still around. */ 1106 pDev = p Data->devices[i];1106 pDev = pThis->devices[i]; 1107 1107 if (!pDev) 1108 1108 { -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r11193 r11269 340 340 * Set a VRAM page dirty. 341 341 * 342 * @param p DataVGA instance data.342 * @param pThis VGA instance data. 343 343 * @param offVRAM The VRAM offset of the page to set. 344 344 */ 345 DECLINLINE(void) vga_set_dirty(VGAState *p Data, RTGCPHYS offVRAM)346 { 347 AssertMsg(offVRAM < p Data->vram_size, ("offVRAM = %p, pData->vram_size = %p\n", offVRAM, pData->vram_size));348 ASMBitSet(&p Data->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT);349 p Data->fHaveDirtyBits = true;345 DECLINLINE(void) vga_set_dirty(VGAState *pThis, RTGCPHYS offVRAM) 346 { 347 AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size)); 348 ASMBitSet(&pThis->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT); 349 pThis->fHaveDirtyBits = true; 350 350 } 351 351 … … 355 355 * @returns true if dirty. 356 356 * @returns false if clean. 357 * @param p DataVGA instance data.357 * @param pThis VGA instance data. 358 358 * @param offVRAM The VRAM offset of the page to check. 359 359 */ 360 DECLINLINE(bool) vga_is_dirty(VGAState *p Data, RTGCPHYS offVRAM)361 { 362 AssertMsg(offVRAM < p Data->vram_size, ("offVRAM = %p, pData->vram_size = %p\n", offVRAM, pData->vram_size));363 return ASMBitTest(&p Data->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT);360 DECLINLINE(bool) vga_is_dirty(VGAState *pThis, RTGCPHYS offVRAM) 361 { 362 AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size)); 363 return ASMBitTest(&pThis->au32DirtyBitmap[0], offVRAM >> PAGE_SHIFT); 364 364 } 365 365 … … 367 367 * Reset dirty flags in a give range. 368 368 * 369 * @param p DataVGA instance data.369 * @param pThis VGA instance data. 370 370 * @param offVRAMStart Offset into the VRAM buffer of the first page. 371 371 * @param offVRAMEnd Offset into the VRAM buffer of the last page - exclusive. 372 372 */ 373 DECLINLINE(void) vga_reset_dirty(VGAState *p Data, RTGCPHYS offVRAMStart, RTGCPHYS offVRAMEnd)374 { 375 Assert(offVRAMStart < p Data->vram_size);376 Assert(offVRAMEnd <= p Data->vram_size);373 DECLINLINE(void) vga_reset_dirty(VGAState *pThis, RTGCPHYS offVRAMStart, RTGCPHYS offVRAMEnd) 374 { 375 Assert(offVRAMStart < pThis->vram_size); 376 Assert(offVRAMEnd <= pThis->vram_size); 377 377 Assert(offVRAMStart < offVRAMEnd); 378 ASMBitClearRange(&p Data->au32DirtyBitmap[0], offVRAMStart >> PAGE_SHIFT, offVRAMEnd >> PAGE_SHIFT);378 ASMBitClearRange(&pThis->au32DirtyBitmap[0], offVRAMStart >> PAGE_SHIFT, offVRAMEnd >> PAGE_SHIFT); 379 379 } 380 380 … … 3211 3211 PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems) 3212 3212 { 3213 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);3213 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 3214 3214 uint32_t b; 3215 3215 uint32_t write_mask, bit_mask, set_mask; … … 3226 3226 /// @todo add check for the end of region 3227 3227 GCPhysAddr &= 0x1ffff; 3228 switch((p Data->gr[6] >> 2) & 3) {3228 switch((pThis->gr[6] >> 2) & 3) { 3229 3229 case 0: 3230 3230 break; … … 3232 3232 if (GCPhysAddr >= 0x10000) 3233 3233 return VINF_SUCCESS; 3234 GCPhysAddr += p Data->bank_offset;3234 GCPhysAddr += pThis->bank_offset; 3235 3235 break; 3236 3236 case 2: … … 3247 3247 } 3248 3248 3249 if (p Data->sr[4] & 0x08) {3249 if (pThis->sr[4] & 0x08) { 3250 3250 /* chain 4 mode : simplest access */ 3251 3251 #ifdef IN_GC … … 3253 3253 return VINF_IOM_HC_MMIO_WRITE; 3254 3254 #else 3255 if (GCPhysAddr + cItems * cbItem >= p Data->vram_size)3255 if (GCPhysAddr + cItems * cbItem >= pThis->vram_size) 3256 3256 { 3257 3257 AssertMsgFailed(("GCPhysAddr=%VGp cItems=%#x cbItem=%d\n", GCPhysAddr, cItems, cbItem)); … … 3263 3263 for (i = 0; i < cbItem; i++) 3264 3264 { 3265 if (p Data->sr[2] & (1 << (GCPhysAddr & 3)))3265 if (pThis->sr[2] & (1 << (GCPhysAddr & 3))) 3266 3266 { 3267 p Data->CTX_SUFF(vram_ptr)[GCPhysAddr] = aVal[i];3268 vga_set_dirty(p Data, GCPhysAddr);3267 pThis->CTX_SUFF(vram_ptr)[GCPhysAddr] = aVal[i]; 3268 vga_set_dirty(pThis, GCPhysAddr); 3269 3269 } 3270 3270 GCPhysAddr++; 3271 3271 } 3272 } else if (p Data->gr[5] & 0x10) {3272 } else if (pThis->gr[5] & 0x10) { 3273 3273 /* odd/even mode (aka text mode mapping) */ 3274 3274 #ifdef IN_GC … … 3276 3276 return VINF_IOM_HC_MMIO_WRITE; 3277 3277 #else 3278 if (GCPhysAddr * 2 + cItems * cbItem >= p Data->vram_size)3278 if (GCPhysAddr * 2 + cItems * cbItem >= pThis->vram_size) 3279 3279 { 3280 3280 AssertMsgFailed(("GCPhysAddr=%VGp cItems=%#x cbItem=%d\n", GCPhysAddr, cItems, cbItem)); … … 3285 3285 for (i = 0; i < cbItem; i++) 3286 3286 { 3287 unsigned plane = (p Data->gr[4] & 2) | (GCPhysAddr & 1);3288 if (p Data->sr[2] & (1 << plane)) {3287 unsigned plane = (pThis->gr[4] & 2) | (GCPhysAddr & 1); 3288 if (pThis->sr[2] & (1 << plane)) { 3289 3289 RTGCPHYS PhysAddr2 = ((GCPhysAddr & ~1) << 2) | plane; 3290 p Data->CTX_SUFF(vram_ptr)[PhysAddr2] = aVal[i];3291 vga_set_dirty(p Data, PhysAddr2);3290 pThis->CTX_SUFF(vram_ptr)[PhysAddr2] = aVal[i]; 3291 vga_set_dirty(pThis, PhysAddr2); 3292 3292 } 3293 3293 GCPhysAddr++; … … 3298 3298 return VINF_IOM_HC_MMIO_WRITE; 3299 3299 #else 3300 if (GCPhysAddr + cItems * cbItem >= p Data->vram_size)3300 if (GCPhysAddr + cItems * cbItem >= pThis->vram_size) 3301 3301 { 3302 3302 AssertMsgFailed(("GCPhysAddr=%VGp cItems=%#x cbItem=%d\n", GCPhysAddr, cItems, cbItem)); … … 3306 3306 3307 3307 /* standard VGA latched access */ 3308 switch(p Data->gr[5] & 3) {3308 switch(pThis->gr[5] & 3) { 3309 3309 default: 3310 3310 case 0: 3311 3311 /* rotate */ 3312 b = p Data->gr[3] & 7;3313 bit_mask = p Data->gr[8];3312 b = pThis->gr[3] & 7; 3313 bit_mask = pThis->gr[8]; 3314 3314 bit_mask |= bit_mask << 8; 3315 3315 bit_mask |= bit_mask << 16; 3316 set_mask = mask16[p Data->gr[1]];3316 set_mask = mask16[pThis->gr[1]]; 3317 3317 3318 3318 for (i = 0; i < cbItem; i++) … … 3323 3323 3324 3324 /* apply set/reset mask */ 3325 aVal[i] = (aVal[i] & ~set_mask) | (mask16[p Data->gr[0]] & set_mask);3326 3327 APPLY_LOGICAL_AND_MASK(p Data, aVal[i], bit_mask);3325 aVal[i] = (aVal[i] & ~set_mask) | (mask16[pThis->gr[0]] & set_mask); 3326 3327 APPLY_LOGICAL_AND_MASK(pThis, aVal[i], bit_mask); 3328 3328 } 3329 3329 break; 3330 3330 case 1: 3331 3331 for (i = 0; i < cbItem; i++) 3332 aVal[i] = p Data->latch;3332 aVal[i] = pThis->latch; 3333 3333 break; 3334 3334 case 2: 3335 bit_mask = p Data->gr[8];3335 bit_mask = pThis->gr[8]; 3336 3336 bit_mask |= bit_mask << 8; 3337 3337 bit_mask |= bit_mask << 16; … … 3340 3340 aVal[i] = mask16[aVal[i] & 0x0f]; 3341 3341 3342 APPLY_LOGICAL_AND_MASK(p Data, aVal[i], bit_mask);3342 APPLY_LOGICAL_AND_MASK(pThis, aVal[i], bit_mask); 3343 3343 } 3344 3344 break; 3345 3345 case 3: 3346 3346 /* rotate */ 3347 b = p Data->gr[3] & 7;3347 b = pThis->gr[3] & 7; 3348 3348 3349 3349 for (i = 0; i < cbItem; i++) 3350 3350 { 3351 3351 aVal[i] = (aVal[i] >> b) | (aVal[i] << (8 - b)); 3352 bit_mask = p Data->gr[8] & aVal[i];3352 bit_mask = pThis->gr[8] & aVal[i]; 3353 3353 bit_mask |= bit_mask << 8; 3354 3354 bit_mask |= bit_mask << 16; 3355 aVal[i] = mask16[p Data->gr[0]];3356 3357 APPLY_LOGICAL_AND_MASK(p Data, aVal[i], bit_mask);3355 aVal[i] = mask16[pThis->gr[0]]; 3356 3357 APPLY_LOGICAL_AND_MASK(pThis, aVal[i], bit_mask); 3358 3358 } 3359 3359 break; … … 3361 3361 3362 3362 /* mask data according to sr[2] */ 3363 write_mask = mask16[p Data->sr[2]];3363 write_mask = mask16[pThis->sr[2]]; 3364 3364 3365 3365 /* actually write data */ … … 3369 3369 while (cItems-- > 0) 3370 3370 { 3371 ((uint32_t *)p Data->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask);3372 vga_set_dirty(p Data, GCPhysAddr << 2);3371 ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask); 3372 vga_set_dirty(pThis, GCPhysAddr << 2); 3373 3373 GCPhysAddr++; 3374 3374 } … … 3379 3379 while (cItems-- > 0) 3380 3380 { 3381 ((uint32_t *)p Data->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask);3382 vga_set_dirty(p Data, GCPhysAddr << 2);3381 ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask); 3382 vga_set_dirty(pThis, GCPhysAddr << 2); 3383 3383 GCPhysAddr++; 3384 3384 3385 ((uint32_t *)p Data->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[1] & write_mask);3386 vga_set_dirty(p Data, GCPhysAddr << 2);3385 ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[1] & write_mask); 3386 vga_set_dirty(pThis, GCPhysAddr << 2); 3387 3387 GCPhysAddr++; 3388 3388 } … … 3395 3395 for (i = 0; i < cbItem; i++) 3396 3396 { 3397 ((uint32_t *)p Data->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[i] & write_mask);3398 vga_set_dirty(p Data, GCPhysAddr << 2);3397 ((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pThis->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[i] & write_mask); 3398 vga_set_dirty(pThis, GCPhysAddr << 2); 3399 3399 GCPhysAddr++; 3400 3400 } … … 3418 3418 PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3419 3419 { 3420 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);3421 STAM_PROFILE_START(&p Data->StatGCMemoryRead, a);3420 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 3421 STAM_PROFILE_START(&pThis->StatGCMemoryRead, a); 3422 3422 NOREF(pvUser); 3423 3423 switch (cb) 3424 3424 { 3425 3425 case 1: 3426 *(uint8_t *)pv = vga_mem_readb(p Data, GCPhysAddr); break;3426 *(uint8_t *)pv = vga_mem_readb(pThis, GCPhysAddr); break; 3427 3427 case 2: 3428 *(uint16_t *)pv = vga_mem_readb(p Data, GCPhysAddr)3429 | (vga_mem_readb(p Data, GCPhysAddr + 1) << 8);3428 *(uint16_t *)pv = vga_mem_readb(pThis, GCPhysAddr) 3429 | (vga_mem_readb(pThis, GCPhysAddr + 1) << 8); 3430 3430 break; 3431 3431 case 4: 3432 *(uint32_t *)pv = vga_mem_readb(p Data, GCPhysAddr)3433 | (vga_mem_readb(p Data, GCPhysAddr + 1) << 8)3434 | (vga_mem_readb(p Data, GCPhysAddr + 2) << 16)3435 | (vga_mem_readb(p Data, GCPhysAddr + 3) << 24);3432 *(uint32_t *)pv = vga_mem_readb(pThis, GCPhysAddr) 3433 | (vga_mem_readb(pThis, GCPhysAddr + 1) << 8) 3434 | (vga_mem_readb(pThis, GCPhysAddr + 2) << 16) 3435 | (vga_mem_readb(pThis, GCPhysAddr + 3) << 24); 3436 3436 break; 3437 3437 3438 3438 case 8: 3439 *(uint64_t *)pv = (uint64_t)vga_mem_readb(p Data, GCPhysAddr)3440 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 1) << 8)3441 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 2) << 16)3442 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 3) << 24)3443 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 4) << 32)3444 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 5) << 40)3445 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 6) << 48)3446 | ((uint64_t)vga_mem_readb(p Data, GCPhysAddr + 7) << 56);3439 *(uint64_t *)pv = (uint64_t)vga_mem_readb(pThis, GCPhysAddr) 3440 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 1) << 8) 3441 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 2) << 16) 3442 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 3) << 24) 3443 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 4) << 32) 3444 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 5) << 40) 3445 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 6) << 48) 3446 | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 7) << 56); 3447 3447 break; 3448 3448 … … 3451 3451 uint8_t *pu8Data = (uint8_t *)pv; 3452 3452 while (cb-- > 0) 3453 *pu8Data++ = vga_mem_readb(p Data, GCPhysAddr++);3454 } 3455 } 3456 STAM_PROFILE_STOP(&p Data->StatGCMemoryRead, a);3453 *pu8Data++ = vga_mem_readb(pThis, GCPhysAddr++); 3454 } 3455 } 3456 STAM_PROFILE_STOP(&pThis->StatGCMemoryRead, a); 3457 3457 return VINF_SUCCESS; 3458 3458 } … … 3470 3470 PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3471 3471 { 3472 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);3472 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 3473 3473 uint8_t *pu8 = (uint8_t *)pv; 3474 3474 int rc = VINF_SUCCESS; 3475 STAM_PROFILE_START(&p Data->StatGCMemoryWrite, a);3475 STAM_PROFILE_START(&pThis->StatGCMemoryWrite, a); 3476 3476 3477 3477 switch (cb) 3478 3478 { 3479 3479 case 1: 3480 rc = vga_mem_writeb(p Data, GCPhysAddr, *pu8);3480 rc = vga_mem_writeb(pThis, GCPhysAddr, *pu8); 3481 3481 break; 3482 3482 #if 1 3483 3483 case 2: 3484 rc = vga_mem_writeb(p Data, GCPhysAddr + 0, pu8[0]);3484 rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pu8[0]); 3485 3485 if (RT_LIKELY(rc == VINF_SUCCESS)) 3486 rc = vga_mem_writeb(p Data, GCPhysAddr + 1, pu8[1]);3486 rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pu8[1]); 3487 3487 break; 3488 3488 case 4: 3489 rc = vga_mem_writeb(p Data, GCPhysAddr + 0, pu8[0]);3489 rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pu8[0]); 3490 3490 if (RT_LIKELY(rc == VINF_SUCCESS)) 3491 rc = vga_mem_writeb(p Data, GCPhysAddr + 1, pu8[1]);3491 rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pu8[1]); 3492 3492 if (RT_LIKELY(rc == VINF_SUCCESS)) 3493 rc = vga_mem_writeb(p Data, GCPhysAddr + 2, pu8[2]);3493 rc = vga_mem_writeb(pThis, GCPhysAddr + 2, pu8[2]); 3494 3494 if (RT_LIKELY(rc == VINF_SUCCESS)) 3495 rc = vga_mem_writeb(p Data, GCPhysAddr + 3, pu8[3]);3495 rc = vga_mem_writeb(pThis, GCPhysAddr + 3, pu8[3]); 3496 3496 break; 3497 3497 case 8: 3498 rc = vga_mem_writeb(p Data, GCPhysAddr + 0, pu8[0]);3498 rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pu8[0]); 3499 3499 if (RT_LIKELY(rc == VINF_SUCCESS)) 3500 rc = vga_mem_writeb(p Data, GCPhysAddr + 1, pu8[1]);3500 rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pu8[1]); 3501 3501 if (RT_LIKELY(rc == VINF_SUCCESS)) 3502 rc = vga_mem_writeb(p Data, GCPhysAddr + 2, pu8[2]);3502 rc = vga_mem_writeb(pThis, GCPhysAddr + 2, pu8[2]); 3503 3503 if (RT_LIKELY(rc == VINF_SUCCESS)) 3504 rc = vga_mem_writeb(p Data, GCPhysAddr + 3, pu8[3]);3504 rc = vga_mem_writeb(pThis, GCPhysAddr + 3, pu8[3]); 3505 3505 if (RT_LIKELY(rc == VINF_SUCCESS)) 3506 rc = vga_mem_writeb(p Data, GCPhysAddr + 4, pu8[4]);3506 rc = vga_mem_writeb(pThis, GCPhysAddr + 4, pu8[4]); 3507 3507 if (RT_LIKELY(rc == VINF_SUCCESS)) 3508 rc = vga_mem_writeb(p Data, GCPhysAddr + 5, pu8[5]);3508 rc = vga_mem_writeb(pThis, GCPhysAddr + 5, pu8[5]); 3509 3509 if (RT_LIKELY(rc == VINF_SUCCESS)) 3510 rc = vga_mem_writeb(p Data, GCPhysAddr + 6, pu8[6]);3510 rc = vga_mem_writeb(pThis, GCPhysAddr + 6, pu8[6]); 3511 3511 if (RT_LIKELY(rc == VINF_SUCCESS)) 3512 rc = vga_mem_writeb(p Data, GCPhysAddr + 7, pu8[7]);3512 rc = vga_mem_writeb(pThis, GCPhysAddr + 7, pu8[7]); 3513 3513 break; 3514 3514 #else … … 3525 3525 default: 3526 3526 while (cb-- > 0 && rc == VINF_SUCCESS) 3527 rc = vga_mem_writeb(p Data, GCPhysAddr++, *pu8++);3528 break; 3529 3530 } 3531 STAM_PROFILE_STOP(&p Data->StatGCMemoryWrite, a);3527 rc = vga_mem_writeb(pThis, GCPhysAddr++, *pu8++); 3528 break; 3529 3530 } 3531 STAM_PROFILE_STOP(&pThis->StatGCMemoryWrite, a); 3532 3532 return rc; 3533 3533 } … … 3538 3538 * @returns VBox status code. 3539 3539 * @param pVM VM handle. 3540 * @param p DataVGA device instance data.3540 * @param pThis VGA device instance data. 3541 3541 * @param GCPhys The access physical address. 3542 3542 * @param GCPtr The access virtual address (only GC). 3543 3543 */ 3544 static int vgaLFBAccess(PVM pVM, PVGASTATE p Data, RTGCPHYS GCPhys, RTGCPTR GCPtr)3544 static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr) 3545 3545 { 3546 3546 int rc; … … 3549 3549 * Set page dirty bit. 3550 3550 */ 3551 vga_set_dirty(p Data, GCPhys - pData->GCPhysVRAM);3552 p Data->fLFBUpdated = true;3551 vga_set_dirty(pThis, GCPhys - pThis->GCPhysVRAM); 3552 pThis->fLFBUpdated = true; 3553 3553 3554 3554 /* … … 3557 3557 * ASSUME: the guest always maps video memory RW. 3558 3558 */ 3559 rc = PGMHandlerPhysicalPageTempOff(pVM, p Data->GCPhysVRAM, GCPhys);3559 rc = PGMHandlerPhysicalPageTempOff(pVM, pThis->GCPhysVRAM, GCPhys); 3560 3560 if (RT_SUCCESS(rc)) 3561 3561 { … … 3592 3592 PDMBOTHCBDECL(int) vgaGCLFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 3593 3593 { 3594 PVGASTATE p Data= (PVGASTATE)pvUser;3595 Assert(p Data);3596 Assert(GCPhysFault >= p Data->GCPhysVRAM);3594 PVGASTATE pThis = (PVGASTATE)pvUser; 3595 Assert(pThis); 3596 Assert(GCPhysFault >= pThis->GCPhysVRAM); 3597 3597 AssertMsg(uErrorCode & X86_TRAP_PF_RW, ("uErrorCode=%#x\n", uErrorCode)); 3598 3598 3599 return vgaLFBAccess(pVM, p Data, GCPhysFault, pvFault);3599 return vgaLFBAccess(pVM, pThis, GCPhysFault, pvFault); 3600 3600 } 3601 3601 … … 3615 3615 PDMBOTHCBDECL(int) vgaR0LFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 3616 3616 { 3617 PVGASTATE p Data= (PVGASTATE)pvUser;3618 Assert(p Data);3619 Assert(GCPhysFault >= p Data->GCPhysVRAM);3617 PVGASTATE pThis = (PVGASTATE)pvUser; 3618 Assert(pThis); 3619 Assert(GCPhysFault >= pThis->GCPhysVRAM); 3620 3620 AssertMsg(uErrorCode & X86_TRAP_PF_RW, ("uErrorCode=%#x\n", uErrorCode)); 3621 3621 3622 return vgaLFBAccess(pVM, p Data, GCPhysFault, pvFault);3622 return vgaLFBAccess(pVM, pThis, GCPhysFault, pvFault); 3623 3623 } 3624 3624 … … 3640 3640 static DECLCALLBACK(int) vgaR3LFBAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) 3641 3641 { 3642 PVGASTATE p Data= (PVGASTATE)pvUser;3642 PVGASTATE pThis = (PVGASTATE)pvUser; 3643 3643 int rc; 3644 Assert(p Data);3645 Assert(GCPhys >= p Data->GCPhysVRAM);3646 rc = vgaLFBAccess(pVM, p Data, GCPhys, 0);3644 Assert(pThis); 3645 Assert(GCPhys >= pThis->GCPhysVRAM); 3646 rc = vgaLFBAccess(pVM, pThis, GCPhys, 0); 3647 3647 if (RT_SUCCESS(rc)) 3648 3648 return VINF_PGM_HANDLER_DO_DEFAULT; … … 3671 3671 PDMBOTHCBDECL(int) vbeIOPortWriteVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 3672 3672 { 3673 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);3673 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 3674 3674 NOREF(pvUser); 3675 3675 NOREF(Port); … … 3678 3678 { 3679 3679 Log(("vbeIOPortWriteVBEExtra: addr=%#RX32\n", u32)); 3680 p Data->u16VBEExtraAddress = u32;3680 pThis->u16VBEExtraAddress = u32; 3681 3681 return VINF_SUCCESS; 3682 3682 } … … 3700 3700 PDMBOTHCBDECL(int) vbeIOPortReadVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 3701 3701 { 3702 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);3702 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 3703 3703 NOREF(pvUser); 3704 3704 NOREF(Port); 3705 3705 3706 if (p Data->u16VBEExtraAddress == 0xffff)3706 if (pThis->u16VBEExtraAddress == 0xffff) 3707 3707 { 3708 3708 Log(("vbeIOPortReadVBEExtra: Requested number of 64k video banks\n")); 3709 *pu32 = p Data->vram_size / _64K;3709 *pu32 = pThis->vram_size / _64K; 3710 3710 return VINF_SUCCESS; 3711 3711 } 3712 3712 3713 if ( p Data->u16VBEExtraAddress >= pData->cbVBEExtraData3714 || p Data->u16VBEExtraAddress + cb > pData->cbVBEExtraData)3713 if ( pThis->u16VBEExtraAddress >= pThis->cbVBEExtraData 3714 || pThis->u16VBEExtraAddress + cb > pThis->cbVBEExtraData) 3715 3715 { 3716 3716 *pu32 = 0; 3717 3717 Log(("vbeIOPortReadVBEExtra: Requested address is out of VBE data!!! Address=%#x(%d) cbVBEExtraData=%#x(%d)\n", 3718 p Data->u16VBEExtraAddress, pData->u16VBEExtraAddress, pData->cbVBEExtraData, pData->cbVBEExtraData));3718 pThis->u16VBEExtraAddress, pThis->u16VBEExtraAddress, pThis->cbVBEExtraData, pThis->cbVBEExtraData)); 3719 3719 return VINF_SUCCESS; 3720 3720 } … … 3722 3722 if (cb == 1) 3723 3723 { 3724 *pu32 = p Data->pu8VBEExtraData[pData->u16VBEExtraAddress] & 0xFF;3724 *pu32 = pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress] & 0xFF; 3725 3725 3726 3726 Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Vhxs\n", cb, cb, pu32)); … … 3730 3730 if (cb == 2) 3731 3731 { 3732 *pu32 = p Data->pu8VBEExtraData[pData->u16VBEExtraAddress]3733 | p Data->pu8VBEExtraData[pData->u16VBEExtraAddress + 1] << 8;3732 *pu32 = pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress] 3733 | pThis->pu8VBEExtraData[pThis->u16VBEExtraAddress + 1] << 8; 3734 3734 3735 3735 Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Vhxs\n", cb, cb, pu32)); … … 3747 3747 * @returns VBox status code. 3748 3748 * 3749 * @param p DataThe VGA instance data.3749 * @param pThis The VGA instance data. 3750 3750 */ 3751 static int vbeParseBitmap(PVGASTATE p Data)3751 static int vbeParseBitmap(PVGASTATE pThis) 3752 3752 { 3753 3753 uint16_t i; … … 3760 3760 * Get bitmap header data 3761 3761 */ 3762 bmpInfo = (PBMPINFO)(p Data->pu8Logo + sizeof(LOGOHDR));3763 pWinHdr = (PWINHDR)(p Data->pu8Logo + sizeof(LOGOHDR) + sizeof(BMPINFO));3762 bmpInfo = (PBMPINFO)(pThis->pu8Logo + sizeof(LOGOHDR)); 3763 pWinHdr = (PWINHDR)(pThis->pu8Logo + sizeof(LOGOHDR) + sizeof(BMPINFO)); 3764 3764 3765 3765 if (bmpInfo->Type == BMP_ID) … … 3769 3769 case BMP_HEADER_OS21: 3770 3770 pOs2Hdr = (POS2HDR)pWinHdr; 3771 p Data->cxLogo = pOs2Hdr->Width;3772 p Data->cyLogo = pOs2Hdr->Height;3773 p Data->cLogoPlanes = pOs2Hdr->Planes;3774 p Data->cLogoBits = pOs2Hdr->BitCount;3775 p Data->LogoCompression = BMP_COMPRESS_NONE;3776 p Data->cLogoUsedColors = 0;3771 pThis->cxLogo = pOs2Hdr->Width; 3772 pThis->cyLogo = pOs2Hdr->Height; 3773 pThis->cLogoPlanes = pOs2Hdr->Planes; 3774 pThis->cLogoBits = pOs2Hdr->BitCount; 3775 pThis->LogoCompression = BMP_COMPRESS_NONE; 3776 pThis->cLogoUsedColors = 0; 3777 3777 break; 3778 3778 3779 3779 case BMP_HEADER_OS22: 3780 3780 pOs22Hdr = (POS22HDR)pWinHdr; 3781 p Data->cxLogo = pOs22Hdr->Width;3782 p Data->cyLogo = pOs22Hdr->Height;3783 p Data->cLogoPlanes = pOs22Hdr->Planes;3784 p Data->cLogoBits = pOs22Hdr->BitCount;3785 p Data->LogoCompression = pOs22Hdr->Compression;3786 p Data->cLogoUsedColors = pOs22Hdr->ClrUsed;3781 pThis->cxLogo = pOs22Hdr->Width; 3782 pThis->cyLogo = pOs22Hdr->Height; 3783 pThis->cLogoPlanes = pOs22Hdr->Planes; 3784 pThis->cLogoBits = pOs22Hdr->BitCount; 3785 pThis->LogoCompression = pOs22Hdr->Compression; 3786 pThis->cLogoUsedColors = pOs22Hdr->ClrUsed; 3787 3787 break; 3788 3788 3789 3789 case BMP_HEADER_WIN3: 3790 p Data->cxLogo = pWinHdr->Width;3791 p Data->cyLogo = pWinHdr->Height;3792 p Data->cLogoPlanes = pWinHdr->Planes;3793 p Data->cLogoBits = pWinHdr->BitCount;3794 p Data->LogoCompression = pWinHdr->Compression;3795 p Data->cLogoUsedColors = pWinHdr->ClrUsed;3790 pThis->cxLogo = pWinHdr->Width; 3791 pThis->cyLogo = pWinHdr->Height; 3792 pThis->cLogoPlanes = pWinHdr->Planes; 3793 pThis->cLogoBits = pWinHdr->BitCount; 3794 pThis->LogoCompression = pWinHdr->Compression; 3795 pThis->cLogoUsedColors = pWinHdr->ClrUsed; 3796 3796 break; 3797 3797 … … 3801 3801 } 3802 3802 3803 if (p Data->cxLogo > LOGO_MAX_WIDTH || pData->cyLogo > LOGO_MAX_HEIGHT)3803 if (pThis->cxLogo > LOGO_MAX_WIDTH || pThis->cyLogo > LOGO_MAX_HEIGHT) 3804 3804 { 3805 AssertMsgFailed(("Bitmap %ux%u is too big.\n", p Data->cxLogo, pData->cyLogo));3805 AssertMsgFailed(("Bitmap %ux%u is too big.\n", pThis->cxLogo, pThis->cyLogo)); 3806 3806 return VERR_INVALID_PARAMETER; 3807 3807 } 3808 3808 3809 if (p Data->cLogoPlanes != 1)3809 if (pThis->cLogoPlanes != 1) 3810 3810 { 3811 AssertMsgFailed(("Bitmap planes %u != 1.\n", p Data->cLogoPlanes));3811 AssertMsgFailed(("Bitmap planes %u != 1.\n", pThis->cLogoPlanes)); 3812 3812 return VERR_INVALID_PARAMETER; 3813 3813 } 3814 3814 3815 if (p Data->cLogoBits != 4 && pData->cLogoBits != 8 && pData->cLogoBits != 24)3815 if (pThis->cLogoBits != 4 && pThis->cLogoBits != 8 && pThis->cLogoBits != 24) 3816 3816 { 3817 AssertMsgFailed(("Unsupported %u depth.\n", p Data->cLogoBits));3817 AssertMsgFailed(("Unsupported %u depth.\n", pThis->cLogoBits)); 3818 3818 return VERR_INVALID_PARAMETER; 3819 3819 } 3820 3820 3821 if (p Data->cLogoUsedColors > 256)3821 if (pThis->cLogoUsedColors > 256) 3822 3822 { 3823 AssertMsgFailed(("Unsupported %u colors.\n", p Data->cLogoUsedColors));3823 AssertMsgFailed(("Unsupported %u colors.\n", pThis->cLogoUsedColors)); 3824 3824 return VERR_INVALID_PARAMETER; 3825 3825 } 3826 3826 3827 if (p Data->LogoCompression != BMP_COMPRESS_NONE)3827 if (pThis->LogoCompression != BMP_COMPRESS_NONE) 3828 3828 { 3829 AssertMsgFailed(("Unsupported %u compression.\n", p Data->LogoCompression));3829 AssertMsgFailed(("Unsupported %u compression.\n", pThis->LogoCompression)); 3830 3830 return VERR_INVALID_PARAMETER; 3831 3831 } … … 3834 3834 * Read bitmap palette 3835 3835 */ 3836 if (!p Data->cLogoUsedColors)3837 p Data->cLogoPalEntries = 1 << (pData->cLogoPlanes * pData->cLogoBits);3836 if (!pThis->cLogoUsedColors) 3837 pThis->cLogoPalEntries = 1 << (pThis->cLogoPlanes * pThis->cLogoBits); 3838 3838 else 3839 p Data->cLogoPalEntries = pData->cLogoUsedColors;3840 3841 if (p Data->cLogoPalEntries)3839 pThis->cLogoPalEntries = pThis->cLogoUsedColors; 3840 3841 if (pThis->cLogoPalEntries) 3842 3842 { 3843 const uint8_t *pu8Pal = p Data->pu8Logo + sizeof(LOGOHDR) + sizeof(BMPINFO) + pWinHdr->Size; /* ASSUMES Size location (safe) */3844 3845 for (i = 0; i < p Data->cLogoPalEntries; i++)3843 const uint8_t *pu8Pal = pThis->pu8Logo + sizeof(LOGOHDR) + sizeof(BMPINFO) + pWinHdr->Size; /* ASSUMES Size location (safe) */ 3844 3845 for (i = 0; i < pThis->cLogoPalEntries; i++) 3846 3846 { 3847 3847 uint16_t j; … … 3856 3856 3857 3857 pu8Pal++; /* skip unused byte */ 3858 p Data->au32LogoPalette[i] = u32Pal;3858 pThis->au32LogoPalette[i] = u32Pal; 3859 3859 } 3860 3860 } … … 3863 3863 * Bitmap data offset 3864 3864 */ 3865 p Data->pu8LogoBitmap = pData->pu8Logo + sizeof(LOGOHDR) + bmpInfo->Offset;3865 pThis->pu8LogoBitmap = pThis->pu8Logo + sizeof(LOGOHDR) + bmpInfo->Offset; 3866 3866 } 3867 3867 … … 4020 4020 PDMBOTHCBDECL(int) vbeIOPortWriteCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 4021 4021 { 4022 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);4022 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 4023 4023 NOREF(pvUser); 4024 4024 NOREF(Port); … … 4032 4032 { 4033 4033 case LOGO_CMD_SET_OFFSET: 4034 p Data->offLogoData = u32 & 0xFF;4034 pThis->offLogoData = u32 & 0xFF; 4035 4035 break; 4036 4036 … … 4038 4038 { 4039 4039 uint8_t iStep = u32 & 0xFF; 4040 const uint8_t *pu8Src = p Data->pu8LogoBitmap;4040 const uint8_t *pu8Src = pThis->pu8LogoBitmap; 4041 4041 uint8_t *pu8Dst; 4042 PLOGOHDR pLogoHdr = (PLOGOHDR)p Data->pu8Logo;4042 PLOGOHDR pLogoHdr = (PLOGOHDR)pThis->pu8Logo; 4043 4043 uint32_t offDirty = 0; 4044 uint16_t xLogo = (LOGO_MAX_WIDTH - p Data->cxLogo) / 2;4045 uint16_t yLogo = LOGO_MAX_HEIGHT - (LOGO_MAX_HEIGHT - p Data->cyLogo) / 2;4044 uint16_t xLogo = (LOGO_MAX_WIDTH - pThis->cxLogo) / 2; 4045 uint16_t yLogo = LOGO_MAX_HEIGHT - (LOGO_MAX_HEIGHT - pThis->cyLogo) / 2; 4046 4046 4047 4047 /* Check VRAM size */ 4048 if (p Data->vram_size < LOGO_MAX_SIZE)4048 if (pThis->vram_size < LOGO_MAX_SIZE) 4049 4049 break; 4050 4050 4051 if (p Data->vram_size >= LOGO_MAX_SIZE * 2)4052 pu8Dst = p Data->vram_ptrR3 + LOGO_MAX_SIZE;4051 if (pThis->vram_size >= LOGO_MAX_SIZE * 2) 4052 pu8Dst = pThis->vram_ptrR3 + LOGO_MAX_SIZE; 4053 4053 else 4054 pu8Dst = p Data->vram_ptrR3;4054 pu8Dst = pThis->vram_ptrR3; 4055 4055 4056 4056 /* Clear screen - except on power on... */ 4057 if (!p Data->fLogoClearScreen)4057 if (!pThis->fLogoClearScreen) 4058 4058 { 4059 4059 uint32_t *pu32TmpPtr = (uint32_t *)pu8Dst; … … 4065 4065 *pu32TmpPtr++ = 0; 4066 4066 } 4067 p Data->fLogoClearScreen = true;4067 pThis->fLogoClearScreen = true; 4068 4068 } 4069 4069 4070 4070 /* Show the bitmap. */ 4071 vbeShowBitmap(p Data->cLogoBits, xLogo, yLogo,4072 p Data->cxLogo, pData->cyLogo,4073 iStep, &p Data->au32LogoPalette[0],4071 vbeShowBitmap(pThis->cLogoBits, xLogo, yLogo, 4072 pThis->cxLogo, pThis->cyLogo, 4073 iStep, &pThis->au32LogoPalette[0], 4074 4074 pu8Src, pu8Dst); 4075 4075 … … 4078 4078 vbeShowBitmap(1, LOGO_F12TEXT_X, LOGO_F12TEXT_Y, 4079 4079 LOGO_F12TEXT_WIDTH, LOGO_F12TEXT_HEIGHT, 4080 iStep, &p Data->au32LogoPalette[0],4080 iStep, &pThis->au32LogoPalette[0], 4081 4081 &g_abLogoF12BootText[0], pu8Dst); 4082 4082 4083 4083 /* Blit the offscreen buffer. */ 4084 if (p Data->vram_size >= LOGO_MAX_SIZE * 2)4084 if (pThis->vram_size >= LOGO_MAX_SIZE * 2) 4085 4085 { 4086 uint32_t *pu32TmpDst = (uint32_t *)p Data->vram_ptrR3;4087 uint32_t *pu32TmpSrc = (uint32_t *)(p Data->vram_ptrR3 + LOGO_MAX_SIZE);4086 uint32_t *pu32TmpDst = (uint32_t *)pThis->vram_ptrR3; 4087 uint32_t *pu32TmpSrc = (uint32_t *)(pThis->vram_ptrR3 + LOGO_MAX_SIZE); 4088 4088 for (int i = 0; i < LOGO_MAX_WIDTH; i++) 4089 4089 { … … 4096 4096 while (offDirty <= LOGO_MAX_SIZE) 4097 4097 { 4098 vga_set_dirty(p Data, offDirty);4098 vga_set_dirty(pThis, offDirty); 4099 4099 offDirty += PAGE_SIZE; 4100 4100 } … … 4104 4104 default: 4105 4105 Log(("vbeIOPortWriteCMDLogo: invalid command %d\n", u32)); 4106 p Data->LogoCommand = LOGO_CMD_NOP;4106 pThis->LogoCommand = LOGO_CMD_NOP; 4107 4107 break; 4108 4108 } … … 4129 4129 PDMBOTHCBDECL(int) vbeIOPortReadCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 4130 4130 { 4131 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);4131 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 4132 4132 NOREF(pvUser); 4133 4133 NOREF(Port); … … 4135 4135 PRTUINT64U p; 4136 4136 4137 if (p Data->offLogoData + cb > pData->cbLogo)4137 if (pThis->offLogoData + cb > pThis->cbLogo) 4138 4138 { 4139 4139 Log(("vbeIOPortReadCMDLogo: Requested address is out of Logo data!!! offLogoData=%#x(%d) cbLogo=%#x(%d)\n", 4140 p Data->offLogoData, pData->offLogoData, pData->cbLogo, pData->cbLogo));4140 pThis->offLogoData, pThis->offLogoData, pThis->cbLogo, pThis->cbLogo)); 4141 4141 return VINF_SUCCESS; 4142 4142 } 4143 p = (PRTUINT64U)&p Data->pu8Logo[pData->offLogoData];4143 p = (PRTUINT64U)&pThis->pu8Logo[pThis->offLogoData]; 4144 4144 4145 4145 switch (cb) … … 4151 4151 default: AssertFailed(); break; 4152 4152 } 4153 Log(("vbeIOPortReadCMDLogo: LogoOffset=%#x(%d) cb=%#x %.*Vhxs\n", p Data->offLogoData, pData->offLogoData, cb, cb, pu32));4154 4155 p Data->LogoCommand = LOGO_CMD_NOP;4156 p Data->offLogoData += cb;4153 Log(("vbeIOPortReadCMDLogo: LogoOffset=%#x(%d) cb=%#x %.*Vhxs\n", pThis->offLogoData, pThis->offLogoData, cb, cb, pu32)); 4154 4155 pThis->LogoCommand = LOGO_CMD_NOP; 4156 pThis->offLogoData += cb; 4157 4157 4158 4158 return VINF_SUCCESS; … … 4245 4245 static DECLCALLBACK(void *) vgaPortQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 4246 4246 { 4247 PVGASTATE p Data= (PVGASTATE)((uintptr_t)pInterface - RT_OFFSETOF(VGASTATE, Base));4247 PVGASTATE pThis = (PVGASTATE)((uintptr_t)pInterface - RT_OFFSETOF(VGASTATE, Base)); 4248 4248 switch (enmInterface) 4249 4249 { 4250 4250 case PDMINTERFACE_BASE: 4251 return &p Data->Base;4251 return &pThis->Base; 4252 4252 case PDMINTERFACE_DISPLAY_PORT: 4253 return &p Data->Port;4253 return &pThis->Port; 4254 4254 default: 4255 4255 return NULL; … … 4323 4323 static DECLCALLBACK(int) vgaPortUpdateDisplay(PPDMIDISPLAYPORT pInterface) 4324 4324 { 4325 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4326 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(p Data));4325 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4326 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); 4327 4327 4328 4328 #ifdef DEBUG_sunlover … … 4332 4332 /* This should be called only in non VBVA mode. */ 4333 4333 4334 int rc = vga_update_display(p Data);4334 int rc = vga_update_display(pThis); 4335 4335 if (rc != VINF_SUCCESS) 4336 4336 return rc; 4337 4337 4338 if (p Data->fHaveDirtyBits && pData->GCPhysVRAM && pData->GCPhysVRAM != NIL_RTGCPHYS32)4339 { 4340 PPDMDEVINS pDevIns = p Data->CTX_SUFF(pDevIns);4341 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), p Data->GCPhysVRAM);4342 p Data->fHaveDirtyBits = false;4338 if (pThis->fHaveDirtyBits && pThis->GCPhysVRAM && pThis->GCPhysVRAM != NIL_RTGCPHYS32) 4339 { 4340 PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns); 4341 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); 4342 pThis->fHaveDirtyBits = false; 4343 4343 } 4344 4344 … … 4355 4355 static DECLCALLBACK(int) vgaPortUpdateDisplayAll(PPDMIDISPLAYPORT pInterface) 4356 4356 { 4357 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4358 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(p Data));4357 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4358 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); 4359 4359 4360 4360 /* This is called both in VBVA mode and normal modes. */ … … 4364 4364 #endif /* DEBUG_sunlover */ 4365 4365 4366 p Data->graphic_mode = -1; /* force full update */4367 4368 int rc = vga_update_display(p Data);4366 pThis->graphic_mode = -1; /* force full update */ 4367 4368 int rc = vga_update_display(pThis); 4369 4369 4370 4370 /* The dirty bits array has been just cleared, reset handlers as well. */ 4371 if (p Data->GCPhysVRAM && pData->GCPhysVRAM != NIL_RTGCPHYS32)4372 { 4373 PPDMDEVINS pDevIns = p Data->CTX_SUFF(pDevIns);4374 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), p Data->GCPhysVRAM);4371 if (pThis->GCPhysVRAM && pThis->GCPhysVRAM != NIL_RTGCPHYS32) 4372 { 4373 PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns); 4374 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); 4375 4375 } 4376 4376 … … 4389 4389 static DECLCALLBACK(int) vgaPortSetRefreshRate(PPDMIDISPLAYPORT pInterface, uint32_t cMilliesInterval) 4390 4390 { 4391 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4392 4393 p Data->cMilliesRefreshInterval = cMilliesInterval;4391 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4392 4393 pThis->cMilliesRefreshInterval = cMilliesInterval; 4394 4394 if (cMilliesInterval) 4395 return TMTimerSetMillies(p Data->RefreshTimer, cMilliesInterval);4396 return TMTimerStop(p Data->RefreshTimer);4395 return TMTimerSetMillies(pThis->RefreshTimer, cMilliesInterval); 4396 return TMTimerStop(pThis->RefreshTimer); 4397 4397 } 4398 4398 … … 4401 4401 static DECLCALLBACK(int) vgaPortQueryColorDepth(PPDMIDISPLAYPORT pInterface, uint32_t *pcBits) 4402 4402 { 4403 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4403 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4404 4404 4405 4405 if (!pcBits) 4406 4406 return VERR_INVALID_PARAMETER; 4407 *pcBits = vga_get_bpp(p Data);4407 *pcBits = vga_get_bpp(pThis); 4408 4408 return VINF_SUCCESS; 4409 4409 } … … 4428 4428 uint32_t fRenderVRAM; 4429 4429 size_t cbRequired; 4430 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4431 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(p Data));4430 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4431 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); 4432 4432 LogFlow(("vgaPortSnapshot: pvData=%p cbData=%d pcx=%p pcy=%p pcbData=%p\n", pvData, cbData, pcx, pcy, pcbData)); 4433 4433 … … 4451 4451 * Validate the buffer size. 4452 4452 */ 4453 cbRequired = RT_ALIGN_Z(p Data->last_scr_width, 4) * pData->last_scr_height * 4;4453 cbRequired = RT_ALIGN_Z(pThis->last_scr_width, 4) * pThis->last_scr_height * 4; 4454 4454 if (cbRequired > cbData) 4455 4455 { … … 4463 4463 Connector.pu8Data = (uint8_t*)pvData; 4464 4464 Connector.cBits = 32; 4465 Connector.cx = p Data->pDrv->cx;4466 Connector.cy = p Data->pDrv->cy;4465 Connector.cx = pThis->pDrv->cx; 4466 Connector.cy = pThis->pDrv->cy; 4467 4467 Connector.cbScanline = RT_ALIGN_32(Connector.cx, 4) * 4; 4468 4468 Connector.pfnRefresh = vgaDummyRefresh; … … 4471 4471 4472 4472 /* save & replace state data. */ 4473 pConnector = p Data->pDrv;4474 p Data->pDrv = &Connector;4475 graphic_mode = p Data->graphic_mode;4476 p Data->graphic_mode = -1; /* force a full refresh. */4477 fRenderVRAM = p Data->fRenderVRAM;4478 p Data->fRenderVRAM = 1; /* force the guest VRAM rendering to the given buffer. */4473 pConnector = pThis->pDrv; 4474 pThis->pDrv = &Connector; 4475 graphic_mode = pThis->graphic_mode; 4476 pThis->graphic_mode = -1; /* force a full refresh. */ 4477 fRenderVRAM = pThis->fRenderVRAM; 4478 pThis->fRenderVRAM = 1; /* force the guest VRAM rendering to the given buffer. */ 4479 4479 4480 4480 /* make the snapshot. */ 4481 int rc = vga_update_display(p Data);4481 int rc = vga_update_display(pThis); 4482 4482 4483 4483 /* restore */ 4484 p Data->pDrv = pConnector;4485 p Data->graphic_mode = graphic_mode;4486 p Data->fRenderVRAM = fRenderVRAM;4484 pThis->pDrv = pConnector; 4485 pThis->graphic_mode = graphic_mode; 4486 pThis->fRenderVRAM = fRenderVRAM; 4487 4487 4488 4488 if (rc != VINF_SUCCESS) … … 4516 4516 static DECLCALLBACK(int) vgaPortDisplayBlt(PPDMIDISPLAYPORT pInterface, const void *pvData, uint32_t x, uint32_t y, uint32_t cx, uint32_t cy) 4517 4517 { 4518 PVGASTATE p Data= IDISPLAYPORT_2_VGASTATE(pInterface);4518 PVGASTATE pThis = IDISPLAYPORT_2_VGASTATE(pInterface); 4519 4519 int rc = VINF_SUCCESS; 4520 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(p Data));4520 PDMDEV_ASSERT_EMT(VGASTATE2DEVINS(pThis)); 4521 4521 LogFlow(("vgaPortDisplayBlt: pvData=%p x=%d y=%d cx=%d cy=%d\n", pvData, x, y, cx, cy)); 4522 4522 … … 4525 4525 */ 4526 4526 if ( pvData 4527 && x < p Data->pDrv->cx4528 && cx <= p Data->pDrv->cx4529 && cx + x <= p Data->pDrv->cx4530 && y < p Data->pDrv->cy4531 && cy <= p Data->pDrv->cy4532 && cy + y <= p Data->pDrv->cy)4527 && x < pThis->pDrv->cx 4528 && cx <= pThis->pDrv->cx 4529 && cx + x <= pThis->pDrv->cx 4530 && y < pThis->pDrv->cy 4531 && cy <= pThis->pDrv->cy 4532 && cy + y <= pThis->pDrv->cy) 4533 4533 { 4534 4534 /* … … 4536 4536 */ 4537 4537 size_t cbPixelDst = 0; 4538 switch (p Data->pDrv->cBits)4538 switch (pThis->pDrv->cBits) 4539 4539 { 4540 4540 case 8: … … 4562 4562 size_t cbLineSrc = RT_ALIGN_Z(cx, 4) * 4; 4563 4563 uint8_t *pu8Src = (uint8_t *)pvData; 4564 size_t cbLineDst = p Data->pDrv->cbScanline;4565 uint8_t *pu8Dst = p Data->pDrv->pu8Data + y * cbLineDst + x * cbPixelDst;4564 size_t cbLineDst = pThis->pDrv->cbScanline; 4565 uint8_t *pu8Dst = pThis->pDrv->pu8Data + y * cbLineDst + x * cbPixelDst; 4566 4566 uint32_t cyLeft = cy; 4567 vga_draw_line_func *pfnVgaDrawLine = vga_draw_line_table[VGA_DRAW_LINE32 * 4 + get_depth_index(p Data->pDrv->cBits)];4567 vga_draw_line_func *pfnVgaDrawLine = vga_draw_line_table[VGA_DRAW_LINE32 * 4 + get_depth_index(pThis->pDrv->cBits)]; 4568 4568 Assert(pfnVgaDrawLine); 4569 4569 while (cyLeft-- > 0) 4570 4570 { 4571 pfnVgaDrawLine(p Data, pu8Dst, pu8Src, cx);4571 pfnVgaDrawLine(pThis, pu8Dst, pu8Src, cx); 4572 4572 pu8Dst += cbLineDst; 4573 4573 pu8Src += cbLineSrc; … … 4577 4577 * Invalidate the area. 4578 4578 */ 4579 p Data->pDrv->pfnUpdateRect(pData->pDrv, x, y, cx, cy);4579 pThis->pDrv->pfnUpdateRect(pThis->pDrv, x, y, cx, cy); 4580 4580 } 4581 4581 } … … 4750 4750 static DECLCALLBACK(void) vgaTimerRefresh(PPDMDEVINS pDevIns, PTMTIMER pTimer) 4751 4751 { 4752 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);4753 if (p Data->pDrv)4754 p Data->pDrv->pfnRefresh(pData->pDrv);4755 if (p Data->cMilliesRefreshInterval)4756 TMTimerSetMillies(pTimer, p Data->cMilliesRefreshInterval);4752 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 4753 if (pThis->pDrv) 4754 pThis->pDrv->pfnRefresh(pThis->pDrv); 4755 if (pThis->cMilliesRefreshInterval) 4756 TMTimerSetMillies(pTimer, pThis->cMilliesRefreshInterval); 4757 4757 } 4758 4758 … … 4775 4775 int rc; 4776 4776 PPDMDEVINS pDevIns = pPciDev->pDevIns; 4777 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);4777 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 4778 4778 LogFlow(("vgaR3IORegionMap: iRegion=%d GCPhysAddress=%VGp cb=%#x enmType=%d\n", iRegion, GCPhysAddress, cb, enmType)); 4779 4779 AssertReturn(iRegion == 0 && enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH, VERR_INTERNAL_ERROR); … … 4790 4790 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 4791 4791 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 4792 GCPhysAddress, GCPhysAddress + (p Data->vram_size - 1),4793 vgaR3LFBAccessHandler, p Data,4792 GCPhysAddress, GCPhysAddress + (pThis->vram_size - 1), 4793 vgaR3LFBAccessHandler, pThis, 4794 4794 g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", pDevIns->pvInstanceDataR0, 4795 4795 g_DeviceVga.szGCMod, "vgaGCLFBAccessHandler", pDevIns->pvInstanceDataGC, … … 4797 4797 AssertRC(rc); 4798 4798 if (RT_SUCCESS(rc)) 4799 p Data->GCPhysVRAM = GCPhysAddress;4799 pThis->GCPhysVRAM = GCPhysAddress; 4800 4800 } 4801 4801 } … … 4806 4806 * Deregister the access handler so PGM doesn't get upset. 4807 4807 */ 4808 Assert(p Data->GCPhysVRAM);4809 rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), p Data->GCPhysVRAM);4808 Assert(pThis->GCPhysVRAM); 4809 rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); 4810 4810 AssertRC(rc); 4811 p Data->GCPhysVRAM = 0;4811 pThis->GCPhysVRAM = 0; 4812 4812 } 4813 4813 return rc; … … 4857 4857 static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) 4858 4858 { 4859 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);4859 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 4860 4860 char *pchStart; 4861 4861 char *pchEnd; … … 4863 4863 4864 4864 /* Clear the VRAM ourselves. */ 4865 if (p Data->vram_ptrR3 && pData->vram_size)4865 if (pThis->vram_ptrR3 && pThis->vram_size) 4866 4866 { 4867 4867 #ifdef LOG_ENABLED /** @todo separate function. */ 4868 4868 /* First dump the textmode contents to the log; handy for capturing Windows blue screens. */ 4869 4869 uint8_t graphic_mode; 4870 VGAState *s = p Data;4870 VGAState *s = pThis; 4871 4871 4872 4872 if (!(s->ar_index & 0x20)) { … … 4940 4940 4941 4941 #endif /* LOG_ENABLED */ 4942 memset(p Data->vram_ptrR3, 0, pData->vram_size);4942 memset(pThis->vram_ptrR3, 0, pThis->vram_size); 4943 4943 } 4944 4944 … … 4950 4950 */ 4951 4951 /* 1st part. */ 4952 pchStart = (char *)&p Data->latch;4953 pchEnd = (char *)&p Data->invalidated_y_table;4952 pchStart = (char *)&pThis->latch; 4953 pchEnd = (char *)&pThis->invalidated_y_table; 4954 4954 memset(pchStart, 0, pchEnd - pchStart); 4955 4955 4956 4956 /* 2nd part. */ 4957 pchStart = (char *)&p Data->last_palette;4958 pchEnd = (char *)&p Data->u32Marker;4957 pchStart = (char *)&pThis->last_palette; 4958 pchEnd = (char *)&pThis->u32Marker; 4959 4959 memset(pchStart, 0, pchEnd - pchStart); 4960 4960 … … 4963 4963 * Restore and re-init some bits. 4964 4964 */ 4965 p Data->get_bpp = vga_get_bpp;4966 p Data->get_offsets = vga_get_offsets;4967 p Data->get_resolution = vga_get_resolution;4968 p Data->graphic_mode = -1; /* Force full update. */4965 pThis->get_bpp = vga_get_bpp; 4966 pThis->get_offsets = vga_get_offsets; 4967 pThis->get_resolution = vga_get_resolution; 4968 pThis->graphic_mode = -1; /* Force full update. */ 4969 4969 #ifdef CONFIG_BOCHS_VBE 4970 p Data->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0;4971 p Data->vbe_regs[VBE_DISPI_INDEX_VBOX_VIDEO] = 0;4972 p Data->vbe_bank_mask = ((pData->vram_size >> 16) - 1);4970 pThis->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0; 4971 pThis->vbe_regs[VBE_DISPI_INDEX_VBOX_VIDEO] = 0; 4972 pThis->vbe_bank_mask = ((pThis->vram_size >> 16) - 1); 4973 4973 #endif /* CONFIG_BOCHS_VBE */ 4974 4974 … … 4976 4976 * Reset the LBF mapping. 4977 4977 */ 4978 p Data->fLFBUpdated = false;4979 if ( ( p Data->fGCEnabled4980 || p Data->fR0Enabled)4981 && p Data->GCPhysVRAM4982 && p Data->GCPhysVRAM != NIL_RTGCPHYS32)4983 { 4984 int rc = PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), p Data->GCPhysVRAM);4978 pThis->fLFBUpdated = false; 4979 if ( ( pThis->fGCEnabled 4980 || pThis->fR0Enabled) 4981 && pThis->GCPhysVRAM 4982 && pThis->GCPhysVRAM != NIL_RTGCPHYS32) 4983 { 4984 int rc = PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pThis->GCPhysVRAM); 4985 4985 AssertRC(rc); 4986 4986 } … … 4989 4989 * Reset the logo data. 4990 4990 */ 4991 p Data->LogoCommand = LOGO_CMD_NOP;4992 p Data->offLogoData = 0;4991 pThis->LogoCommand = LOGO_CMD_NOP; 4992 pThis->offLogoData = 0; 4993 4993 4994 4994 /* notify port handler */ 4995 if (p Data->pDrv)4996 p Data->pDrv->pfnReset(pData->pDrv);4995 if (pThis->pDrv) 4996 pThis->pDrv->pfnReset(pThis->pDrv); 4997 4997 } 4998 4998 … … 5010 5010 if (offDelta) 5011 5011 { 5012 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);5012 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 5013 5013 LogFlow(("vgaRelocate: offDelta = %08X\n", offDelta)); 5014 5014 5015 p Data->RCPtrLFBHandler += offDelta;5016 p Data->vram_ptrRC += offDelta;5017 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);5015 pThis->RCPtrLFBHandler += offDelta; 5016 pThis->vram_ptrRC += offDelta; 5017 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5018 5018 } 5019 5019 } … … 5035 5035 static DECLCALLBACK(int) vgaAttach(PPDMDEVINS pDevIns, unsigned iLUN) 5036 5036 { 5037 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);5037 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 5038 5038 switch (iLUN) 5039 5039 { … … 5041 5041 case 0: 5042 5042 { 5043 int rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &p Data->Base, &pData->pDrvBase, "Display Port");5043 int rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &pThis->Base, &pThis->pDrvBase, "Display Port"); 5044 5044 if (RT_SUCCESS(rc)) 5045 5045 { 5046 p Data->pDrv = (PDMIDISPLAYCONNECTOR*)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_DISPLAY_CONNECTOR);5047 if (p Data->pDrv)5046 pThis->pDrv = (PDMIDISPLAYCONNECTOR*)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_DISPLAY_CONNECTOR); 5047 if (pThis->pDrv) 5048 5048 { 5049 /* p Data->pDrv->pu8Data can be NULL when there is no framebuffer. */5050 if ( p Data->pDrv->pfnRefresh5051 && p Data->pDrv->pfnResize5052 && p Data->pDrv->pfnUpdateRect)5049 /* pThis->pDrv->pu8Data can be NULL when there is no framebuffer. */ 5050 if ( pThis->pDrv->pfnRefresh 5051 && pThis->pDrv->pfnResize 5052 && pThis->pDrv->pfnUpdateRect) 5053 5053 rc = VINF_SUCCESS; 5054 5054 else 5055 5055 { 5056 Assert(p Data->pDrv->pfnRefresh);5057 Assert(p Data->pDrv->pfnResize);5058 Assert(p Data->pDrv->pfnUpdateRect);5059 p Data->pDrv = NULL;5060 p Data->pDrvBase = NULL;5056 Assert(pThis->pDrv->pfnRefresh); 5057 Assert(pThis->pDrv->pfnResize); 5058 Assert(pThis->pDrv->pfnUpdateRect); 5059 pThis->pDrv = NULL; 5060 pThis->pDrvBase = NULL; 5061 5061 rc = VERR_INTERNAL_ERROR; 5062 5062 } … … 5065 5065 { 5066 5066 AssertMsgFailed(("LUN #0 doesn't have a display connector interface! rc=%Vrc\n", rc)); 5067 p Data->pDrvBase = NULL;5067 pThis->pDrvBase = NULL; 5068 5068 rc = VERR_PDM_MISSING_INTERFACE; 5069 5069 } … … 5102 5102 * Reset the interfaces and update the controller state. 5103 5103 */ 5104 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);5104 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 5105 5105 switch (iLUN) 5106 5106 { 5107 5107 /* LUN #0: Display port. */ 5108 5108 case 0: 5109 p Data->pDrv = NULL;5110 p Data->pDrvBase = NULL;5109 pThis->pDrv = NULL; 5110 pThis->pDrvBase = NULL; 5111 5111 break; 5112 5112 … … 5138 5138 int rc; 5139 5139 unsigned i; 5140 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);5140 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 5141 5141 PVM pVM = PDMDevHlpGetVM(pDevIns); 5142 5142 #ifdef VBE_NEW_DYN_LIST … … 5194 5194 * Init state data. 5195 5195 */ 5196 rc = CFGMR3QueryU32Def(pCfgHandle, "VRamSize", &p Data->vram_size, VGA_VRAM_DEFAULT);5196 rc = CFGMR3QueryU32Def(pCfgHandle, "VRamSize", &pThis->vram_size, VGA_VRAM_DEFAULT); 5197 5197 AssertLogRelRCReturn(rc, rc); 5198 if (p Data->vram_size > VGA_VRAM_MAX)5198 if (pThis->vram_size > VGA_VRAM_MAX) 5199 5199 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS, 5200 "VRamSize is too large, %#x, max %#x", p Data->vram_size, VGA_VRAM_MAX);5201 if (p Data->vram_size < VGA_VRAM_MIN)5200 "VRamSize is too large, %#x, max %#x", pThis->vram_size, VGA_VRAM_MAX); 5201 if (pThis->vram_size < VGA_VRAM_MIN) 5202 5202 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS, 5203 "VRamSize is too small, %#x, max %#x", p Data->vram_size, VGA_VRAM_MIN);5203 "VRamSize is too small, %#x, max %#x", pThis->vram_size, VGA_VRAM_MIN); 5204 5204 5205 5205 rc = CFGMR3QueryBoolDef(pCfgHandle, "GCEnabled", &f, true); 5206 5206 AssertLogRelRCReturn(rc, rc); 5207 Log(("VGA: fGCEnabled=%d\n", p Data->fGCEnabled));5207 Log(("VGA: fGCEnabled=%d\n", pThis->fGCEnabled)); 5208 5208 5209 5209 rc = CFGMR3QueryBoolDef(pCfgHandle, "R0Enabled", &f, true); 5210 5210 AssertLogRelRCReturn(rc, rc); 5211 Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", p Data->vram_size, pData->fGCEnabled, pData->fR0Enabled));5212 5213 p Data->pDevInsR3 = pDevIns;5214 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);5215 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);5211 Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", pThis->vram_size, pThis->fGCEnabled, pThis->fR0Enabled)); 5212 5213 pThis->pDevInsR3 = pDevIns; 5214 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 5215 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5216 5216 5217 5217 vgaR3Reset(pDevIns); 5218 5218 5219 5219 /* The PCI devices configuration. */ 5220 PCIDevSetVendorId( &p Data->Dev, 0x80ee); /* PCI vendor, just a free bogus value */5221 PCIDevSetDeviceId( &p Data->Dev, 0xbeef);5222 PCIDevSetClassSub( &p Data->Dev, 0x00); /* VGA controller */5223 PCIDevSetClassBase( &p Data->Dev, 0x03);5224 PCIDevSetHeaderType(&p Data->Dev, 0x00);5220 PCIDevSetVendorId( &pThis->Dev, 0x80ee); /* PCI vendor, just a free bogus value */ 5221 PCIDevSetDeviceId( &pThis->Dev, 0xbeef); 5222 PCIDevSetClassSub( &pThis->Dev, 0x00); /* VGA controller */ 5223 PCIDevSetClassBase( &pThis->Dev, 0x03); 5224 PCIDevSetHeaderType(&pThis->Dev, 0x00); 5225 5225 5226 5226 /* The LBF access handler - error handling is better here than in the map function. */ 5227 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, "vgaGCLFBAccessHandler", &p Data->RCPtrLFBHandler);5227 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, "vgaGCLFBAccessHandler", &pThis->RCPtrLFBHandler); 5228 5228 if (RT_FAILURE(rc)) 5229 5229 { … … 5233 5233 5234 5234 /* the interfaces. */ 5235 p Data->Base.pfnQueryInterface = vgaPortQueryInterface;5236 5237 p Data->Port.pfnUpdateDisplay = vgaPortUpdateDisplay;5238 p Data->Port.pfnUpdateDisplayAll = vgaPortUpdateDisplayAll;5239 p Data->Port.pfnQueryColorDepth = vgaPortQueryColorDepth;5240 p Data->Port.pfnSetRefreshRate = vgaPortSetRefreshRate;5241 p Data->Port.pfnSnapshot = vgaPortSnapshot;5242 p Data->Port.pfnDisplayBlt = vgaPortDisplayBlt;5243 p Data->Port.pfnUpdateDisplayRect = vgaPortUpdateDisplayRect;5244 p Data->Port.pfnSetRenderVRAM = vgaPortSetRenderVRAM;5235 pThis->Base.pfnQueryInterface = vgaPortQueryInterface; 5236 5237 pThis->Port.pfnUpdateDisplay = vgaPortUpdateDisplay; 5238 pThis->Port.pfnUpdateDisplayAll = vgaPortUpdateDisplayAll; 5239 pThis->Port.pfnQueryColorDepth = vgaPortQueryColorDepth; 5240 pThis->Port.pfnSetRefreshRate = vgaPortSetRefreshRate; 5241 pThis->Port.pfnSnapshot = vgaPortSnapshot; 5242 pThis->Port.pfnDisplayBlt = vgaPortDisplayBlt; 5243 pThis->Port.pfnUpdateDisplayRect = vgaPortUpdateDisplayRect; 5244 pThis->Port.pfnSetRenderVRAM = vgaPortSetRenderVRAM; 5245 5245 5246 5246 … … 5248 5248 * Allocate the VRAM and map the first 256KB of it into GC so we can speed up VGA support. 5249 5249 */ 5250 rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, p Data->vram_size, 0, (void **)&pData->vram_ptrR3, "VRam");5251 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", p Data->vram_size, rc), rc);5252 p Data->vram_ptrR0 = (RTR0PTR)pData->vram_ptrR3; /** @todo #1865 Map parts into R0 or just use PGM access (Mac only). */5250 rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, pThis->vram_size, 0, (void **)&pThis->vram_ptrR3, "VRam"); 5251 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pThis->vram_size, rc), rc); 5252 pThis->vram_ptrR0 = (RTR0PTR)pThis->vram_ptrR3; /** @todo #1865 Map parts into R0 or just use PGM access (Mac only). */ 5253 5253 5254 5254 RTRCPTR pRCMapping = 0; 5255 5255 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pRCMapping); 5256 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMHyperMapMMIO2(%#x,) -> %Rrc\n", p Data->vram_size, rc), rc);5257 p Data->vram_ptrRC = pRCMapping;5256 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMHyperMapMMIO2(%#x,) -> %Rrc\n", pThis->vram_size, rc), rc); 5257 pThis->vram_ptrRC = pRCMapping; 5258 5258 5259 5259 /* … … 5297 5297 5298 5298 /* guest context extension */ 5299 if (p Data->fGCEnabled)5299 if (pThis->fGCEnabled) 5300 5300 { 5301 5301 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3c0, 16, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3c0 (GC)"); … … 5338 5338 5339 5339 /* R0 context extension */ 5340 if (p Data->fR0Enabled)5340 if (pThis->fR0Enabled) 5341 5341 { 5342 5342 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3c0, 16, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3c0 (GC)"); … … 5382 5382 if (RT_FAILURE(rc)) 5383 5383 return rc; 5384 if (p Data->fGCEnabled)5384 if (pThis->fGCEnabled) 5385 5385 { 5386 5386 rc = PDMDevHlpMMIORegisterGC(pDevIns, 0x000a0000, 0x00020000, 0, "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill"); … … 5388 5388 return rc; 5389 5389 } 5390 if (p Data->fR0Enabled)5390 if (pThis->fR0Enabled) 5391 5391 { 5392 5392 rc = PDMDevHlpMMIORegisterR0(pDevIns, 0x000a0000, 0x00020000, 0, "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill"); … … 5407 5407 5408 5408 /* save */ 5409 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*p Data),5409 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*pThis), 5410 5410 NULL, vgaR3SaveExec, NULL, 5411 5411 NULL, vgaR3LoadExec, NULL); … … 5414 5414 5415 5415 /* PCI */ 5416 rc = PDMDevHlpPCIRegister(pDevIns, &p Data->Dev);5416 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->Dev); 5417 5417 if (RT_FAILURE(rc)) 5418 5418 return rc; 5419 /*AssertMsg(p Data->Dev.devfn == 16 || iInstance != 0, ("pData->Dev.devfn=%d\n", pData->Dev.devfn));*/5420 if (p Data->Dev.devfn != 16 && iInstance == 0)5421 Log(("!!WARNING!!: p Data->dev.devfn=%d (ignore if testcase or not started by Main)\n", pData->Dev.devfn));5422 5423 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0 /* iRegion */, p Data->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap);5419 /*AssertMsg(pThis->Dev.devfn == 16 || iInstance != 0, ("pThis->Dev.devfn=%d\n", pThis->Dev.devfn));*/ 5420 if (pThis->Dev.devfn != 16 && iInstance == 0) 5421 Log(("!!WARNING!!: pThis->dev.devfn=%d (ignore if testcase or not started by Main)\n", pThis->Dev.devfn)); 5422 5423 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0 /* iRegion */, pThis->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap); 5424 5424 if (RT_FAILURE(rc)) 5425 5425 return rc; … … 5428 5428 * Create the refresh timer. 5429 5429 */ 5430 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_REAL, vgaTimerRefresh, "VGA Refresh Timer", &p Data->RefreshTimer);5430 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_REAL, vgaTimerRefresh, "VGA Refresh Timer", &pThis->RefreshTimer); 5431 5431 if (RT_FAILURE(rc)) 5432 5432 return rc; … … 5460 5460 * Allocate and initialize buffer for the VBE BIOS Extra Data. 5461 5461 */ 5462 p Data->cbVBEExtraData = sizeof(VBEHEADER) + cb;5463 p Data->pu8VBEExtraData = (uint8_t *)PDMDevHlpMMHeapAllocZ(pDevIns, pData->cbVBEExtraData);5464 if (!p Data->pu8VBEExtraData)5462 pThis->cbVBEExtraData = sizeof(VBEHEADER) + cb; 5463 pThis->pu8VBEExtraData = (uint8_t *)PDMDevHlpMMHeapAllocZ(pDevIns, pThis->cbVBEExtraData); 5464 if (!pThis->pu8VBEExtraData) 5465 5465 return VERR_NO_MEMORY; 5466 5466 5467 pVBEDataHdr = (PVBEHEADER)p Data->pu8VBEExtraData;5467 pVBEDataHdr = (PVBEHEADER)pThis->pu8VBEExtraData; 5468 5468 pVBEDataHdr->u16Signature = VBEHEADER_MAGIC; 5469 5469 pVBEDataHdr->cbData = cb; … … 5484 5484 * mode_info_list[i].info.YResolution 5485 5485 * pixelWidth; 5486 if (reqSize >= p Data->vram_size)5486 if (reqSize >= pThis->vram_size) 5487 5487 continue; 5488 5488 *pCurMode = mode_info_list[i]; … … 5514 5514 pixelWidth = (pDefMode->info.BitsPerPixel + 7) / 8; 5515 5515 reqSize = pDefMode->info.XResolution * pDefMode->info.YResolution * pixelWidth; 5516 if (reqSize >= p Data->vram_size)5516 if (reqSize >= pThis->vram_size) 5517 5517 continue; 5518 5518 *pCurMode = *pDefMode; … … 5553 5553 } 5554 5554 #ifdef VRAM_SIZE_FIX 5555 if (cx * cy * cBits / 8 >= p Data->vram_size)5555 if (cx * cy * cBits / 8 >= pThis->vram_size) 5556 5556 { 5557 5557 AssertMsgFailed(("Configuration error: custom video mode %dx%dx%dbits is too large for the virtual video memory of %dMb. Please increase the video memory size.\n", 5558 cx, cy, cBits, p Data->vram_size / _1M));5558 cx, cy, cBits, pThis->vram_size / _1M)); 5559 5559 return VERR_VGA_INVALID_CUSTOM_MODE; 5560 5560 } … … 5684 5684 * Get the Logo file name. 5685 5685 */ 5686 rc = CFGMR3QueryStringAlloc(pCfgHandle, "LogoFile", &p Data->pszLogoFile);5686 rc = CFGMR3QueryStringAlloc(pCfgHandle, "LogoFile", &pThis->pszLogoFile); 5687 5687 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5688 p Data->pszLogoFile = NULL;5688 pThis->pszLogoFile = NULL; 5689 5689 else if (RT_FAILURE(rc)) 5690 5690 return PDMDEV_SET_ERROR(pDevIns, rc, 5691 5691 N_("Configuration error: Querying \"LogoFile\" as a string failed")); 5692 else if (!*p Data->pszLogoFile)5693 { 5694 MMR3HeapFree(p Data->pszLogoFile);5695 p Data->pszLogoFile = NULL;5692 else if (!*pThis->pszLogoFile) 5693 { 5694 MMR3HeapFree(pThis->pszLogoFile); 5695 pThis->pszLogoFile = NULL; 5696 5696 } 5697 5697 … … 5701 5701 LogoHdr.cbLogo = g_cbVgaDefBiosLogo; 5702 5702 RTFILE FileLogo = NIL_RTFILE; 5703 if (p Data->pszLogoFile)5704 { 5705 rc = RTFileOpen(&FileLogo, p Data->pszLogoFile,5703 if (pThis->pszLogoFile) 5704 { 5705 rc = RTFileOpen(&FileLogo, pThis->pszLogoFile, 5706 5706 RTFILE_O_READ | RTFILE_O_OPEN | RTFILE_O_DENY_WRITE); 5707 5707 if (RT_SUCCESS(rc)) … … 5722 5722 * Ignore failure and fall back to the default logo. 5723 5723 */ 5724 LogRel(("vgaR3Construct: Failed to open logo file '%s', rc=%Vrc!\n", p Data->pszLogoFile, rc));5724 LogRel(("vgaR3Construct: Failed to open logo file '%s', rc=%Vrc!\n", pThis->pszLogoFile, rc)); 5725 5725 if (FileLogo != NIL_RTFILE) 5726 5726 RTFileClose(FileLogo); 5727 5727 FileLogo = NIL_RTFILE; 5728 MMR3HeapFree(p Data->pszLogoFile);5729 p Data->pszLogoFile = NULL;5728 MMR3HeapFree(pThis->pszLogoFile); 5729 pThis->pszLogoFile = NULL; 5730 5730 } 5731 5731 } … … 5734 5734 * Disable graphic splash screen if it doesn't fit into VRAM. 5735 5735 */ 5736 if (p Data->vram_size < LOGO_MAX_SIZE)5736 if (pThis->vram_size < LOGO_MAX_SIZE) 5737 5737 LogoHdr.fu8FadeIn = LogoHdr.fu8FadeOut = LogoHdr.u16LogoMillies = 0; 5738 5738 … … 5741 5741 * RT_MAX() is applied to let us fall back to default logo on read failure. 5742 5742 */ 5743 p Data->cbLogo = sizeof(LogoHdr) + LogoHdr.cbLogo;5744 p Data->pu8Logo = (uint8_t *)PDMDevHlpMMHeapAlloc(pDevIns, RT_MAX(pData->cbLogo, g_cbVgaDefBiosLogo + sizeof(LogoHdr)));5745 if (p Data->pu8Logo)5743 pThis->cbLogo = sizeof(LogoHdr) + LogoHdr.cbLogo; 5744 pThis->pu8Logo = (uint8_t *)PDMDevHlpMMHeapAlloc(pDevIns, RT_MAX(pThis->cbLogo, g_cbVgaDefBiosLogo + sizeof(LogoHdr))); 5745 if (pThis->pu8Logo) 5746 5746 { 5747 5747 /* 5748 5748 * Write the logo header. 5749 5749 */ 5750 PLOGOHDR pLogoHdr = (PLOGOHDR)p Data->pu8Logo;5750 PLOGOHDR pLogoHdr = (PLOGOHDR)pThis->pu8Logo; 5751 5751 *pLogoHdr = LogoHdr; 5752 5752 … … 5754 5754 * Write the logo bitmap. 5755 5755 */ 5756 if (p Data->pszLogoFile)5756 if (pThis->pszLogoFile) 5757 5757 { 5758 5758 rc = RTFileRead(FileLogo, pLogoHdr + 1, LogoHdr.cbLogo, NULL); … … 5767 5767 memcpy(pLogoHdr + 1, g_abVgaDefBiosLogo, LogoHdr.cbLogo); 5768 5768 5769 rc = vbeParseBitmap(p Data);5769 rc = vbeParseBitmap(pThis); 5770 5770 if (RT_FAILURE(rc)) 5771 5771 { … … 5775 5775 } 5776 5776 5777 rc = vbeParseBitmap(p Data);5777 rc = vbeParseBitmap(pThis); 5778 5778 if (RT_FAILURE(rc)) 5779 5779 AssertReleaseMsgFailed(("Internal bitmap failed! vbeParseBitmap() -> %Vrc\n", rc)); … … 5793 5793 * Statistics. 5794 5794 */ 5795 STAM_REG(pVM, &p Data->StatGCMemoryRead, STAMTYPE_PROFILE, "/Devices/VGA/GC/Memory/Read", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryRead() body.");5796 STAM_REG(pVM, &p Data->StatGCMemoryWrite, STAMTYPE_PROFILE, "/Devices/VGA/GC/Memory/Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryWrite() body.");5797 STAM_REG(pVM, &p Data->StatGCIOPortRead, STAMTYPE_PROFILE, "/Devices/VGA/GC/IOPort/Read", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCIOPortRead() body.");5798 STAM_REG(pVM, &p Data->StatGCIOPortWrite, STAMTYPE_PROFILE, "/Devices/VGA/GC/IOPort/Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCIOPortWrite() body.");5795 STAM_REG(pVM, &pThis->StatGCMemoryRead, STAMTYPE_PROFILE, "/Devices/VGA/GC/Memory/Read", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryRead() body."); 5796 STAM_REG(pVM, &pThis->StatGCMemoryWrite, STAMTYPE_PROFILE, "/Devices/VGA/GC/Memory/Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryWrite() body."); 5797 STAM_REG(pVM, &pThis->StatGCIOPortRead, STAMTYPE_PROFILE, "/Devices/VGA/GC/IOPort/Read", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCIOPortRead() body."); 5798 STAM_REG(pVM, &pThis->StatGCIOPortWrite, STAMTYPE_PROFILE, "/Devices/VGA/GC/IOPort/Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCIOPortWrite() body."); 5799 5799 5800 5800 return rc; … … 5813 5813 { 5814 5814 #ifdef VBE_NEW_DYN_LIST 5815 PVGASTATE p Data= PDMINS_2_DATA(pDevIns, PVGASTATE);5815 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); 5816 5816 LogFlow(("vgaR3Destruct:\n")); 5817 5817 … … 5819 5819 * Free MM heap pointers. 5820 5820 */ 5821 if (p Data->pu8VBEExtraData)5822 { 5823 MMR3HeapFree(p Data->pu8VBEExtraData);5824 p Data->pu8VBEExtraData = NULL;5821 if (pThis->pu8VBEExtraData) 5822 { 5823 MMR3HeapFree(pThis->pu8VBEExtraData); 5824 pThis->pu8VBEExtraData = NULL; 5825 5825 } 5826 5826 #endif -
trunk/src/VBox/Devices/Input/DevPS2.cpp
r11268 r11269 1427 1427 static DECLCALLBACK(void *) kbdKeyboardQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 1428 1428 { 1429 KBDState *p Data= (KBDState *)((uintptr_t)pInterface - RT_OFFSETOF(KBDState, Keyboard.Base));1429 KBDState *pThis = (KBDState *)((uintptr_t)pInterface - RT_OFFSETOF(KBDState, Keyboard.Base)); 1430 1430 switch (enmInterface) 1431 1431 { 1432 1432 case PDMINTERFACE_BASE: 1433 return &p Data->Keyboard.Base;1433 return &pThis->Keyboard.Base; 1434 1434 case PDMINTERFACE_KEYBOARD_PORT: 1435 return &p Data->Keyboard.Port;1435 return &pThis->Keyboard.Port; 1436 1436 default: 1437 1437 return NULL; … … 1454 1454 static DECLCALLBACK(int) kbdKeyboardPutEvent(PPDMIKEYBOARDPORT pInterface, uint8_t u8KeyCode) 1455 1455 { 1456 KBDState *p Data= IKEYBOARDPORT_2_KBDSTATE(pInterface);1457 pc_kbd_put_keycode(p Data, u8KeyCode);1456 KBDState *pThis = IKEYBOARDPORT_2_KBDSTATE(pInterface); 1457 pc_kbd_put_keycode(pThis, u8KeyCode); 1458 1458 return VINF_SUCCESS; 1459 1459 } … … 1472 1472 static DECLCALLBACK(void *) kbdMouseQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 1473 1473 { 1474 KBDState *p Data= (KBDState *)((uintptr_t)pInterface - RT_OFFSETOF(KBDState, Mouse.Base));1474 KBDState *pThis = (KBDState *)((uintptr_t)pInterface - RT_OFFSETOF(KBDState, Mouse.Base)); 1475 1475 switch (enmInterface) 1476 1476 { 1477 1477 case PDMINTERFACE_BASE: 1478 return &p Data->Mouse.Base;1478 return &pThis->Mouse.Base; 1479 1479 case PDMINTERFACE_MOUSE_PORT: 1480 return &p Data->Mouse.Port;1480 return &pThis->Mouse.Port; 1481 1481 default: 1482 1482 return NULL; … … 1502 1502 static DECLCALLBACK(int) kbdMousePutEvent(PPDMIMOUSEPORT pInterface, int32_t i32DeltaX, int32_t i32DeltaY, int32_t i32DeltaZ, uint32_t fButtonStates) 1503 1503 { 1504 KBDState *p Data= IMOUSEPORT_2_KBDSTATE(pInterface);1505 pc_kbd_mouse_event(p Data, i32DeltaX, i32DeltaY, i32DeltaZ, fButtonStates);1504 KBDState *pThis = IMOUSEPORT_2_KBDSTATE(pInterface); 1505 pc_kbd_mouse_event(pThis, i32DeltaX, i32DeltaY, i32DeltaZ, fButtonStates); 1506 1506 return VINF_SUCCESS; 1507 1507 } … … 1529 1529 { 1530 1530 int rc; 1531 KBDState *p Data= PDMINS_2_DATA(pDevIns, KBDState *);1531 KBDState *pThis = PDMINS_2_DATA(pDevIns, KBDState *); 1532 1532 switch (iLUN) 1533 1533 { 1534 1534 /* LUN #0: keyboard */ 1535 1535 case 0: 1536 rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &p Data->Keyboard.Base, &pData->Keyboard.pDrvBase, "Keyboard Port");1536 rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &pThis->Keyboard.Base, &pThis->Keyboard.pDrvBase, "Keyboard Port"); 1537 1537 if (RT_SUCCESS(rc)) 1538 1538 { 1539 p Data->Keyboard.pDrv = (PDMIKEYBOARDCONNECTOR*)(pData->Keyboard.pDrvBase->pfnQueryInterface(pData->Keyboard.pDrvBase, PDMINTERFACE_KEYBOARD_CONNECTOR));1540 if (!p Data->Keyboard.pDrv)1539 pThis->Keyboard.pDrv = (PDMIKEYBOARDCONNECTOR*)(pThis->Keyboard.pDrvBase->pfnQueryInterface(pThis->Keyboard.pDrvBase, PDMINTERFACE_KEYBOARD_CONNECTOR)); 1540 if (!pThis->Keyboard.pDrv) 1541 1541 { 1542 1542 AssertLogRelMsgFailed(("LUN #0 doesn't have a keyboard interface! rc=%Vrc\n", rc)); … … 1555 1555 /* LUN #1: aux/mouse */ 1556 1556 case 1: 1557 rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &p Data->Mouse.Base, &pData->Mouse.pDrvBase, "Aux (Mouse) Port");1557 rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &pThis->Mouse.Base, &pThis->Mouse.pDrvBase, "Aux (Mouse) Port"); 1558 1558 if (RT_SUCCESS(rc)) 1559 1559 { 1560 p Data->Mouse.pDrv = (PDMIMOUSECONNECTOR*)(pData->Mouse.pDrvBase->pfnQueryInterface(pData->Mouse.pDrvBase, PDMINTERFACE_MOUSE_CONNECTOR));1561 if (!p Data->Mouse.pDrv)1560 pThis->Mouse.pDrv = (PDMIMOUSECONNECTOR*)(pThis->Mouse.pDrvBase->pfnQueryInterface(pThis->Mouse.pDrvBase, PDMINTERFACE_MOUSE_CONNECTOR)); 1561 if (!pThis->Mouse.pDrv) 1562 1562 { 1563 1563 AssertLogRelMsgFailed(("LUN #1 doesn't have a mouse interface! rc=%Vrc\n", rc)); … … 1603 1603 * Reset the interfaces and update the controller state. 1604 1604 */ 1605 KBDState *p Data= PDMINS_2_DATA(pDevIns, KBDState *);1605 KBDState *pThis = PDMINS_2_DATA(pDevIns, KBDState *); 1606 1606 switch (iLUN) 1607 1607 { 1608 1608 /* LUN #0: keyboard */ 1609 1609 case 0: 1610 p Data->Keyboard.pDrv = NULL;1611 p Data->Keyboard.pDrvBase = NULL;1610 pThis->Keyboard.pDrv = NULL; 1611 pThis->Keyboard.pDrvBase = NULL; 1612 1612 break; 1613 1613 1614 1614 /* LUN #1: aux/mouse */ 1615 1615 case 1: 1616 p Data->Mouse.pDrv = NULL;1617 p Data->Mouse.pDrvBase = NULL;1616 pThis->Mouse.pDrv = NULL; 1617 pThis->Mouse.pDrvBase = NULL; 1618 1618 break; 1619 1619 … … 1630 1630 static DECLCALLBACK(void) kdbRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 1631 1631 { 1632 KBDState *p Data= PDMINS_2_DATA(pDevIns, KBDState *);1633 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);1632 KBDState *pThis = PDMINS_2_DATA(pDevIns, KBDState *); 1633 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1634 1634 } 1635 1635 … … 1650 1650 static DECLCALLBACK(int) kbdConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 1651 1651 { 1652 KBDState *p Data= PDMINS_2_DATA(pDevIns, KBDState *);1652 KBDState *pThis = PDMINS_2_DATA(pDevIns, KBDState *); 1653 1653 int rc; 1654 1654 bool fGCEnabled; … … 1673 1673 * Initialize the interfaces. 1674 1674 */ 1675 p Data->pDevInsR3 = pDevIns;1676 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);1677 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);1678 p Data->Keyboard.Base.pfnQueryInterface = kbdKeyboardQueryInterface;1679 p Data->Keyboard.Port.pfnPutEvent = kbdKeyboardPutEvent;1680 1681 p Data->Mouse.Base.pfnQueryInterface = kbdMouseQueryInterface;1682 p Data->Mouse.Port.pfnPutEvent = kbdMousePutEvent;1675 pThis->pDevInsR3 = pDevIns; 1676 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 1677 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1678 pThis->Keyboard.Base.pfnQueryInterface = kbdKeyboardQueryInterface; 1679 pThis->Keyboard.Port.pfnPutEvent = kbdKeyboardPutEvent; 1680 1681 pThis->Mouse.Base.pfnQueryInterface = kbdMouseQueryInterface; 1682 pThis->Mouse.Port.pfnPutEvent = kbdMousePutEvent; 1683 1683 1684 1684 /* … … 1709 1709 return rc; 1710 1710 } 1711 rc = PDMDevHlpSSMRegister(pDevIns, g_DevicePS2KeyboardMouse.szDeviceName, iInstance, PCKBD_SAVED_STATE_VERSION, sizeof(*p Data),1711 rc = PDMDevHlpSSMRegister(pDevIns, g_DevicePS2KeyboardMouse.szDeviceName, iInstance, PCKBD_SAVED_STATE_VERSION, sizeof(*pThis), 1712 1712 NULL, kbdSaveExec, NULL, 1713 1713 NULL, kbdLoadExec, NULL); -
trunk/src/VBox/Devices/Input/DrvKeyboardQueue.cpp
r11267 r11269 164 164 static DECLCALLBACK(bool) drvKbdQueueConsumer(PPDMDRVINS pDrvIns, PPDMQUEUEITEMCORE pItemCore) 165 165 { 166 PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);166 PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 167 167 PDRVKBDQUEUEITEM pItem = (PDRVKBDQUEUEITEM)pItemCore; 168 int rc = p Data->pUpPort->pfnPutEvent(pData->pUpPort, pItem->u8KeyCode);168 int rc = pThis->pUpPort->pfnPutEvent(pThis->pUpPort, pItem->u8KeyCode); 169 169 return RT_SUCCESS(rc); 170 170 } … … 181 181 static DECLCALLBACK(void) drvKbdQueuePowerOn(PPDMDRVINS pDrvIns) 182 182 { 183 PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);184 p Data->fInactive = false;183 PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 184 pThis->fInactive = false; 185 185 } 186 186 … … 194 194 static DECLCALLBACK(void) drvKbdQueueReset(PPDMDRVINS pDrvIns) 195 195 { 196 //PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);196 //PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 197 197 /** @todo purge the queue on reset. */ 198 198 } … … 207 207 static DECLCALLBACK(void) drvKbdQueueSuspend(PPDMDRVINS pDrvIns) 208 208 { 209 PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);210 p Data->fInactive = true;209 PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 210 pThis->fInactive = true; 211 211 } 212 212 … … 220 220 static DECLCALLBACK(void) drvKbdQueueResume(PPDMDRVINS pDrvIns) 221 221 { 222 PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);223 p Data->fInactive = false;222 PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 223 pThis->fInactive = false; 224 224 } 225 225 … … 232 232 static DECLCALLBACK(void) drvKbdQueuePowerOff(PPDMDRVINS pDrvIns) 233 233 { 234 PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);235 p Data->fInactive = true;234 PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 235 pThis->fInactive = true; 236 236 } 237 237 -
trunk/src/VBox/Devices/Input/DrvMouseQueue.cpp
r11267 r11269 152 152 static DECLCALLBACK(bool) drvMouseQueueConsumer(PPDMDRVINS pDrvIns, PPDMQUEUEITEMCORE pItemCore) 153 153 { 154 PDRVMOUSEQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE);154 PDRVMOUSEQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE); 155 155 PDRVMOUSEQUEUEITEM pItem = (PDRVMOUSEQUEUEITEM)pItemCore; 156 int rc = p Data->pUpPort->pfnPutEvent(pData->pUpPort, pItem->i32DeltaX, pItem->i32DeltaY, pItem->i32DeltaZ, pItem->fButtonStates);156 int rc = pThis->pUpPort->pfnPutEvent(pThis->pUpPort, pItem->i32DeltaX, pItem->i32DeltaY, pItem->i32DeltaZ, pItem->fButtonStates); 157 157 return RT_SUCCESS(rc); 158 158 } … … 169 169 static DECLCALLBACK(void) drvMouseQueuePowerOn(PPDMDRVINS pDrvIns) 170 170 { 171 PDRVMOUSEQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE);172 p Data->fInactive = false;171 PDRVMOUSEQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE); 172 pThis->fInactive = false; 173 173 } 174 174 … … 182 182 static DECLCALLBACK(void) drvMouseQueueReset(PPDMDRVINS pDrvIns) 183 183 { 184 //PDRVKBDQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE);184 //PDRVKBDQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVKBDQUEUE); 185 185 /** @todo purge the queue on reset. */ 186 186 } … … 195 195 static DECLCALLBACK(void) drvMouseQueueSuspend(PPDMDRVINS pDrvIns) 196 196 { 197 PDRVMOUSEQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE);198 p Data->fInactive = true;197 PDRVMOUSEQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE); 198 pThis->fInactive = true; 199 199 } 200 200 … … 208 208 static DECLCALLBACK(void) drvMouseQueueResume(PPDMDRVINS pDrvIns) 209 209 { 210 PDRVMOUSEQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE);211 p Data->fInactive = false;210 PDRVMOUSEQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE); 211 pThis->fInactive = false; 212 212 } 213 213 … … 220 220 static DECLCALLBACK(void) drvMouseQueuePowerOff(PPDMDRVINS pDrvIns) 221 221 { 222 PDRVMOUSEQUEUE p Data= PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE);223 p Data->fInactive = true;222 PDRVMOUSEQUEUE pThis = PDMINS_2_DATA(pDrvIns, PDRVMOUSEQUEUE); 223 pThis->fInactive = true; 224 224 } 225 225 -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r11201 r11269 332 332 #define PCNETSTATE_2_DEVINS(pPCNet) ((pPCNet)->CTX_SUFF(pDevIns)) 333 333 #define PCIDEV_2_PCNETSTATE(pPciDev) ((PCNetState *)(pPciDev)) 334 #define PCNET_INST_NR (PCNETSTATE_2_DEVINS(p Data)->iInstance)334 #define PCNET_INST_NR (PCNETSTATE_2_DEVINS(pThis)->iInstance) 335 335 336 336 /* BUS CONFIGURATION REGISTERS */ … … 613 613 614 614 #if defined(PCNET_QUEUE_SEND_PACKETS) && defined(IN_RING3) 615 static int pcnetSyncTransmit(PCNetState *p Data);616 #endif 617 static void pcnetPollTimerStart(PCNetState *p Data);615 static int pcnetSyncTransmit(PCNetState *pThis); 616 #endif 617 static void pcnetPollTimerStart(PCNetState *pThis); 618 618 619 619 /** … … 621 621 * Make sure we read the own flag first. 622 622 * 623 * @param p Dataadapter private data623 * @param pThis adapter private data 624 624 * @param addr physical address of the descriptor 625 625 * @param fRetIfNotOwn return immediately after reading the own flag if we don't own the descriptor 626 626 * @return true if we own the descriptor, false otherwise 627 627 */ 628 DECLINLINE(bool) pcnetTmdLoad(PCNetState *p Data, TMD *tmd, RTGCPHYS32 addr, bool fRetIfNotOwn)629 { 630 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);628 DECLINLINE(bool) pcnetTmdLoad(PCNetState *pThis, TMD *tmd, RTGCPHYS32 addr, bool fRetIfNotOwn) 629 { 630 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 631 631 uint8_t ownbyte; 632 632 633 if (p Data->fPrivIfEnabled)633 if (pThis->fPrivIfEnabled) 634 634 { 635 635 /* RX/TX descriptors shared between host and guest => direct copy */ 636 uint8_t *pv = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)637 + (addr - p Data->GCTDRA)638 + p Data->CTX_SUFF(pSharedMMIO)->V.V1.offTxDescriptors;636 uint8_t *pv = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 637 + (addr - pThis->GCTDRA) 638 + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offTxDescriptors; 639 639 if (!(pv[7] & 0x80) && fRetIfNotOwn) 640 640 return false; … … 642 642 return true; 643 643 } 644 else if (RT_UNLIKELY(BCR_SWSTYLE(p Data) == 0))644 else if (RT_UNLIKELY(BCR_SWSTYLE(pThis) == 0)) 645 645 { 646 646 uint16_t xda[4]; … … 655 655 ((uint32_t *)tmd)[3] = 0; 656 656 } 657 else if (RT_LIKELY(BCR_SWSTYLE(p Data) != 3))657 else if (RT_LIKELY(BCR_SWSTYLE(pThis) != 3)) 658 658 { 659 659 PDMDevHlpPhysRead(pDevIns, addr+7, &ownbyte, 1); … … 689 689 * Make sure that all data are transmitted before we clear the own flag. 690 690 */ 691 DECLINLINE(void) pcnetTmdStorePassHost(PCNetState *p Data, TMD *tmd, RTGCPHYS32 addr)692 { 693 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatTmdStore), a);694 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);695 if (p Data->fPrivIfEnabled)691 DECLINLINE(void) pcnetTmdStorePassHost(PCNetState *pThis, TMD *tmd, RTGCPHYS32 addr) 692 { 693 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatTmdStore), a); 694 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 695 if (pThis->fPrivIfEnabled) 696 696 { 697 697 /* RX/TX descriptors shared between host and guest => direct copy */ 698 uint8_t *pv = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)699 + (addr - p Data->GCTDRA)700 + p Data->CTX_SUFF(pSharedMMIO)->V.V1.offTxDescriptors;698 uint8_t *pv = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 699 + (addr - pThis->GCTDRA) 700 + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offTxDescriptors; 701 701 memcpy(pv, tmd, 16); 702 702 pv[7] &= ~0x80; 703 703 } 704 else if (RT_UNLIKELY(BCR_SWSTYLE(p Data) == 0))704 else if (RT_UNLIKELY(BCR_SWSTYLE(pThis) == 0)) 705 705 { 706 706 uint16_t xda[4]; … … 714 714 PDMDevHlpPhysWrite(pDevIns, addr+3, (uint8_t*)xda + 3, 1); 715 715 } 716 else if (RT_LIKELY(BCR_SWSTYLE(p Data) != 3))716 else if (RT_LIKELY(BCR_SWSTYLE(pThis) != 3)) 717 717 { 718 718 ((uint32_t*)tmd)[1] |= 0x80000000; … … 733 733 PDMDevHlpPhysWrite(pDevIns, addr+7, (uint8_t*)xda + 7, 1); 734 734 } 735 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatTmdStore), a);735 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatTmdStore), a); 736 736 } 737 737 … … 740 740 * Make sure we read the own flag first. 741 741 * 742 * @param p Dataadapter private data742 * @param pThis adapter private data 743 743 * @param addr physical address of the descriptor 744 744 * @param fRetIfNotOwn return immediately after reading the own flag if we don't own the descriptor 745 745 * @return true if we own the descriptor, false otherwise 746 746 */ 747 DECLINLINE(int) pcnetRmdLoad(PCNetState *p Data, RMD *rmd, RTGCPHYS32 addr, bool fRetIfNotOwn)748 { 749 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);747 DECLINLINE(int) pcnetRmdLoad(PCNetState *pThis, RMD *rmd, RTGCPHYS32 addr, bool fRetIfNotOwn) 748 { 749 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 750 750 uint8_t ownbyte; 751 751 752 if (p Data->fPrivIfEnabled)752 if (pThis->fPrivIfEnabled) 753 753 { 754 754 /* RX/TX descriptors shared between host and guest => direct copy */ 755 uint8_t *pb = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)756 + (addr - p Data->GCRDRA)757 + p Data->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors;755 uint8_t *pb = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 756 + (addr - pThis->GCRDRA) 757 + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors; 758 758 if (!(pb[7] & 0x80) && fRetIfNotOwn) 759 759 return false; … … 761 761 return true; 762 762 } 763 else if (RT_UNLIKELY(BCR_SWSTYLE(p Data) == 0))763 else if (RT_UNLIKELY(BCR_SWSTYLE(pThis) == 0)) 764 764 { 765 765 uint16_t rda[4]; … … 773 773 ((uint32_t *)rmd)[3] = 0; 774 774 } 775 else if (RT_LIKELY(BCR_SWSTYLE(p Data) != 3))775 else if (RT_LIKELY(BCR_SWSTYLE(pThis) != 3)) 776 776 { 777 777 PDMDevHlpPhysRead(pDevIns, addr+7, &ownbyte, 1); … … 807 807 * Make sure that all data are transmitted before we clear the own flag. 808 808 */ 809 DECLINLINE(void) pcnetRmdStorePassHost(PCNetState *p Data, RMD *rmd, RTGCPHYS32 addr)810 { 811 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);812 if (p Data->fPrivIfEnabled)809 DECLINLINE(void) pcnetRmdStorePassHost(PCNetState *pThis, RMD *rmd, RTGCPHYS32 addr) 810 { 811 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 812 if (pThis->fPrivIfEnabled) 813 813 { 814 814 /* RX/TX descriptors shared between host and guest => direct copy */ 815 uint8_t *pv = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)816 + (addr - p Data->GCRDRA)817 + p Data->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors;815 uint8_t *pv = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 816 + (addr - pThis->GCRDRA) 817 + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors; 818 818 memcpy(pv, rmd, 16); 819 819 pv[7] &= ~0x80; 820 820 } 821 else if (RT_UNLIKELY(BCR_SWSTYLE(p Data) == 0))821 else if (RT_UNLIKELY(BCR_SWSTYLE(pThis) == 0)) 822 822 { 823 823 uint16_t rda[4]; … … 831 831 PDMDevHlpPhysWrite(pDevIns, addr+3, (uint8_t*)rda + 3, 1); 832 832 } 833 else if (RT_LIKELY(BCR_SWSTYLE(p Data) != 3))833 else if (RT_LIKELY(BCR_SWSTYLE(pThis) != 3)) 834 834 { 835 835 ((uint32_t*)rmd)[1] |= 0x80000000; … … 897 897 * @note Changing this layout will break SSM for guests using the private guest interface! 898 898 */ 899 static void pcnetInitSharedMemory(PCNetState *p Data)899 static void pcnetInitSharedMemory(PCNetState *pThis) 900 900 { 901 901 /* Clear the entire block for pcnetReset usage. */ 902 memset(p Data->pSharedMMIOR3, 0, PCNET_GUEST_SHARED_MEMORY_SIZE);903 904 p Data->pSharedMMIOR3->u32Version = PCNET_GUEST_INTERFACE_VERSION;902 memset(pThis->pSharedMMIOR3, 0, PCNET_GUEST_SHARED_MEMORY_SIZE); 903 904 pThis->pSharedMMIOR3->u32Version = PCNET_GUEST_INTERFACE_VERSION; 905 905 uint32_t off = 2048; /* Leave some space for more fields within the header */ 906 906 … … 908 908 * The Descriptor arrays. 909 909 */ 910 p Data->pSharedMMIOR3->V.V1.offTxDescriptors = off;910 pThis->pSharedMMIOR3->V.V1.offTxDescriptors = off; 911 911 off = RT_ALIGN(off + PCNET_GUEST_TX_DESCRIPTOR_SIZE * PCNET_GUEST_MAX_TX_DESCRIPTORS, 32); 912 912 913 p Data->pSharedMMIOR3->V.V1.offRxDescriptors = off;913 pThis->pSharedMMIOR3->V.V1.offRxDescriptors = off; 914 914 off = RT_ALIGN(off + PCNET_GUEST_RX_DESCRIPTOR_SIZE * PCNET_GUEST_MAX_RX_DESCRIPTORS, 32); 915 915 … … 923 923 #if 0 924 924 /* Don't allocate TX buffers since Windows guests cannot use it */ 925 p Data->pSharedMMIOR3->V.V1.offTxBuffers = off;925 pThis->pSharedMMIOR3->V.V1.offTxBuffers = off; 926 926 off = RT_ALIGN(off + PCNET_GUEST_NIC_BUFFER_SIZE * PCNET_GUEST_MAX_TX_DESCRIPTORS, 32); 927 927 #endif 928 928 929 p Data->pSharedMMIOR3->V.V1.offRxBuffers = off;930 p Data->pSharedMMIOR3->fFlags = PCNET_GUEST_FLAGS_ADMIT_HOST;929 pThis->pSharedMMIOR3->V.V1.offRxBuffers = off; 930 pThis->pSharedMMIOR3->fFlags = PCNET_GUEST_FLAGS_ADMIT_HOST; 931 931 off = RT_ALIGN(off + PCNET_GUEST_NIC_BUFFER_SIZE * PCNET_GUEST_MAX_RX_DESCRIPTORS, 32); 932 932 AssertRelease(off <= PCNET_GUEST_SHARED_MEMORY_SIZE); 933 933 934 934 /* Update the header with the final size. */ 935 p Data->pSharedMMIOR3->cbUsed = off;935 pThis->pSharedMMIOR3->cbUsed = off; 936 936 } 937 937 … … 1031 1031 }; 1032 1032 1033 DECLINLINE(int) padr_match(PCNetState *p Data, const uint8_t *buf, size_t size)1033 DECLINLINE(int) padr_match(PCNetState *pThis, const uint8_t *buf, size_t size) 1034 1034 { 1035 1035 struct ether_header *hdr = (struct ether_header *)buf; 1036 1036 int result; 1037 1037 #if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(PCNET_DEBUG_MATCH) 1038 result = !CSR_DRCVPA(p Data) && !memcmp(hdr->ether_dhost, pData->aCSR + 12, 6);1038 result = !CSR_DRCVPA(pThis) && !memcmp(hdr->ether_dhost, pThis->aCSR + 12, 6); 1039 1039 #else 1040 1040 uint8_t padr[6]; 1041 padr[0] = p Data->aCSR[12] & 0xff;1042 padr[1] = p Data->aCSR[12] >> 8;1043 padr[2] = p Data->aCSR[13] & 0xff;1044 padr[3] = p Data->aCSR[13] >> 8;1045 padr[4] = p Data->aCSR[14] & 0xff;1046 padr[5] = p Data->aCSR[14] >> 8;1047 result = !CSR_DRCVPA(p Data) && !memcmp(hdr->ether_dhost, padr, 6);1041 padr[0] = pThis->aCSR[12] & 0xff; 1042 padr[1] = pThis->aCSR[12] >> 8; 1043 padr[2] = pThis->aCSR[13] & 0xff; 1044 padr[3] = pThis->aCSR[13] >> 8; 1045 padr[4] = pThis->aCSR[14] & 0xff; 1046 padr[5] = pThis->aCSR[14] >> 8; 1047 result = !CSR_DRCVPA(pThis) && !memcmp(hdr->ether_dhost, padr, 6); 1048 1048 #endif 1049 1049 … … 1058 1058 } 1059 1059 1060 DECLINLINE(int) padr_bcast(PCNetState *p Data, const uint8_t *buf, size_t size)1060 DECLINLINE(int) padr_bcast(PCNetState *pThis, const uint8_t *buf, size_t size) 1061 1061 { 1062 1062 static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 1063 1063 struct ether_header *hdr = (struct ether_header *)buf; 1064 int result = !CSR_DRCVBC(p Data) && !memcmp(hdr->ether_dhost, aBCAST, 6);1064 int result = !CSR_DRCVBC(pThis) && !memcmp(hdr->ether_dhost, aBCAST, 6); 1065 1065 #ifdef PCNET_DEBUG_MATCH 1066 1066 Log(("#%d padr_bcast result=%d\n", PCNET_INST_NR, result)); … … 1069 1069 } 1070 1070 1071 static int ladr_match(PCNetState *p Data, const uint8_t *buf, size_t size)1071 static int ladr_match(PCNetState *pThis, const uint8_t *buf, size_t size) 1072 1072 { 1073 1073 struct ether_header *hdr = (struct ether_header *)buf; 1074 if (RT_UNLIKELY(hdr->ether_dhost[0] & 0x01) && ((uint64_t *)&p Data->aCSR[8])[0] != 0LL)1074 if (RT_UNLIKELY(hdr->ether_dhost[0] & 0x01) && ((uint64_t *)&pThis->aCSR[8])[0] != 0LL) 1075 1075 { 1076 1076 int index; 1077 1077 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 1078 1078 index = lnc_mchash(hdr->ether_dhost) >> 26; 1079 return ((uint8_t*)(p Data->aCSR + 8))[index >> 3] & (1 << (index & 7));1079 return ((uint8_t*)(pThis->aCSR + 8))[index >> 3] & (1 << (index & 7)); 1080 1080 #else 1081 1081 uint8_t ladr[8]; 1082 ladr[0] = p Data->aCSR[8] & 0xff;1083 ladr[1] = p Data->aCSR[8] >> 8;1084 ladr[2] = p Data->aCSR[9] & 0xff;1085 ladr[3] = p Data->aCSR[9] >> 8;1086 ladr[4] = p Data->aCSR[10] & 0xff;1087 ladr[5] = p Data->aCSR[10] >> 8;1088 ladr[6] = p Data->aCSR[11] & 0xff;1089 ladr[7] = p Data->aCSR[11] >> 8;1082 ladr[0] = pThis->aCSR[8] & 0xff; 1083 ladr[1] = pThis->aCSR[8] >> 8; 1084 ladr[2] = pThis->aCSR[9] & 0xff; 1085 ladr[3] = pThis->aCSR[9] >> 8; 1086 ladr[4] = pThis->aCSR[10] & 0xff; 1087 ladr[5] = pThis->aCSR[10] >> 8; 1088 ladr[6] = pThis->aCSR[11] & 0xff; 1089 ladr[7] = pThis->aCSR[11] >> 8; 1090 1090 index = lnc_mchash(hdr->ether_dhost) >> 26; 1091 1091 return (ladr[index >> 3] & (1 << (index & 7))); … … 1100 1100 * Get the receive descriptor ring address with a given index. 1101 1101 */ 1102 DECLINLINE(RTGCPHYS32) pcnetRdraAddr(PCNetState *p Data, int idx)1103 { 1104 return p Data->GCRDRA + ((CSR_RCVRL(pData) - idx) << pData->iLog2DescSize);1102 DECLINLINE(RTGCPHYS32) pcnetRdraAddr(PCNetState *pThis, int idx) 1103 { 1104 return pThis->GCRDRA + ((CSR_RCVRL(pThis) - idx) << pThis->iLog2DescSize); 1105 1105 } 1106 1106 … … 1108 1108 * Get the transmit descriptor ring address with a given index. 1109 1109 */ 1110 DECLINLINE(RTGCPHYS32) pcnetTdraAddr(PCNetState *p Data, int idx)1111 { 1112 return p Data->GCTDRA + ((CSR_XMTRL(pData) - idx) << pData->iLog2DescSize);1110 DECLINLINE(RTGCPHYS32) pcnetTdraAddr(PCNetState *pThis, int idx) 1111 { 1112 return pThis->GCTDRA + ((CSR_XMTRL(pThis) - idx) << pThis->iLog2DescSize); 1113 1113 } 1114 1114 … … 1137 1137 #define htons(x) ( (((x) & 0xff00) >> 8) | (((x) & 0x00ff) << 8) ) 1138 1138 1139 static void pcnetPollRxTx(PCNetState *p Data);1140 static void pcnetPollTimer(PCNetState *p Data);1141 static void pcnetUpdateIrq(PCNetState *p Data);1142 static uint32_t pcnetBCRReadU16(PCNetState *p Data, uint32_t u32RAP);1143 static int pcnetBCRWriteU16(PCNetState *p Data, uint32_t u32RAP, uint32_t val);1139 static void pcnetPollRxTx(PCNetState *pThis); 1140 static void pcnetPollTimer(PCNetState *pThis); 1141 static void pcnetUpdateIrq(PCNetState *pThis); 1142 static uint32_t pcnetBCRReadU16(PCNetState *pThis, uint32_t u32RAP); 1143 static int pcnetBCRWriteU16(PCNetState *pThis, uint32_t u32RAP, uint32_t val); 1144 1144 1145 1145 … … 1148 1148 1149 1149 /** 1150 * #PF Virtual Handler callback for Guest write access to the ring descriptor page(p Data)1150 * #PF Virtual Handler callback for Guest write access to the ring descriptor page(pThis) 1151 1151 * 1152 1152 * @return VBox status code (appropriate for trap handling and GC return). … … 1161 1161 RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 1162 1162 { 1163 PCNetState *p Data= (PCNetState *)pvUser;1163 PCNetState *pThis = (PCNetState *)pvUser; 1164 1164 1165 1165 Log(("#%d pcnetHandleRingWriteGC: write to %#010x\n", PCNET_INST_NR, GCPhysFault)); 1166 1166 1167 1167 uint32_t cb; 1168 int rc = CTXALLSUFF(p Data->pfnEMInterpretInstruction)(pVM, pRegFrame, pvFault, &cb);1168 int rc = CTXALLSUFF(pThis->pfnEMInterpretInstruction)(pVM, pRegFrame, pvFault, &cb); 1169 1169 if (RT_SUCCESS(rc) && cb) 1170 1170 { 1171 if ( (GCPhysFault >= p Data->GCTDRA && GCPhysFault + cb < pcnetTdraAddr(pData, 0))1171 if ( (GCPhysFault >= pThis->GCTDRA && GCPhysFault + cb < pcnetTdraAddr(pThis, 0)) 1172 1172 #ifdef PCNET_MONITOR_RECEIVE_RING 1173 || (GCPhysFault >= p Data->GCRDRA && GCPhysFault + cb < pcnetRdraAddr(pData, 0))1173 || (GCPhysFault >= pThis->GCRDRA && GCPhysFault + cb < pcnetRdraAddr(pThis, 0)) 1174 1174 #endif 1175 1175 ) 1176 1176 { 1177 uint32_t offsetTDRA = (GCPhysFault - p Data->GCTDRA);1178 1179 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);1177 uint32_t offsetTDRA = (GCPhysFault - pThis->GCTDRA); 1178 1179 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 1180 1180 if (RT_SUCCESS(rc)) 1181 1181 { 1182 STAM_COUNTER_INC(&CTXALLSUFF(p Data->StatRingWrite)); ;1182 STAM_COUNTER_INC(&CTXALLSUFF(pThis->StatRingWrite)); ; 1183 1183 1184 1184 /* Check if we can do something now */ 1185 pcnetPollRxTx(p Data);1186 pcnetUpdateIrq(p Data);1187 1188 PDMCritSectLeave(&p Data->CritSect);1185 pcnetPollRxTx(pThis); 1186 pcnetUpdateIrq(pThis); 1187 1188 PDMCritSectLeave(&pThis->CritSect); 1189 1189 return VINF_SUCCESS; 1190 1190 } … … 1192 1192 else 1193 1193 { 1194 STAM_COUNTER_INC(&CTXALLSUFF(p Data->StatRingWriteOutside)); ;1194 STAM_COUNTER_INC(&CTXALLSUFF(pThis->StatRingWriteOutside)); ; 1195 1195 return VINF_SUCCESS; /* outside of the ring range */ 1196 1196 } 1197 1197 } 1198 STAM_COUNTER_INC(&CTXALLSUFF(p Data->StatRingWriteFailed)); ;1198 STAM_COUNTER_INC(&CTXALLSUFF(pThis->StatRingWriteFailed)); ; 1199 1199 return VINF_IOM_HC_MMIO_WRITE; /* handle in ring3 */ 1200 1200 } … … 1222 1222 { 1223 1223 PPDMDEVINS pDevIns = (PPDMDEVINS)pvUser; 1224 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);1224 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 1225 1225 1226 1226 Log(("#%d pcnetHandleRingWrite: write to %#010x\n", PCNET_INST_NR, GCPhys)); 1227 1227 #ifdef VBOX_WITH_STATISTICS 1228 STAM_COUNTER_INC(&CTXSUFF(p Data->StatRingWrite));1229 if (GCPhys >= p Data->GCRDRA && GCPhys < pcnetRdraAddr(pData, 0))1230 STAM_COUNTER_INC(&p Data->StatRCVRingWrite);1231 else if (GCPhys >= p Data->GCTDRA && GCPhys < pcnetTdraAddr(pData, 0))1232 STAM_COUNTER_INC(&p Data->StatTXRingWrite);1228 STAM_COUNTER_INC(&CTXSUFF(pThis->StatRingWrite)); 1229 if (GCPhys >= pThis->GCRDRA && GCPhys < pcnetRdraAddr(pThis, 0)) 1230 STAM_COUNTER_INC(&pThis->StatRCVRingWrite); 1231 else if (GCPhys >= pThis->GCTDRA && GCPhys < pcnetTdraAddr(pThis, 0)) 1232 STAM_COUNTER_INC(&pThis->StatTXRingWrite); 1233 1233 #endif 1234 1234 /* Perform the actual write */ … … 1236 1236 1237 1237 /* Writes done by our code don't require polling of course */ 1238 if (PDMCritSectIsOwner(&p Data->CritSect) == false)1239 { 1240 if ( (GCPhys >= p Data->GCTDRA && GCPhys + cbBuf < pcnetTdraAddr(pData, 0))1238 if (PDMCritSectIsOwner(&pThis->CritSect) == false) 1239 { 1240 if ( (GCPhys >= pThis->GCTDRA && GCPhys + cbBuf < pcnetTdraAddr(pThis, 0)) 1241 1241 #ifdef PCNET_MONITOR_RECEIVE_RING 1242 || (GCPhys >= p Data->GCRDRA && GCPhys + cbBuf < pcnetRdraAddr(pData, 0))1242 || (GCPhys >= pThis->GCRDRA && GCPhys + cbBuf < pcnetRdraAddr(pThis, 0)) 1243 1243 #endif 1244 1244 ) 1245 1245 { 1246 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);1246 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 1247 1247 AssertReleaseRC(rc); 1248 1248 /* Check if we can do something now */ 1249 pcnetPollRxTx(p Data);1250 pcnetUpdateIrq(p Data);1251 PDMCritSectLeave(&p Data->CritSect);1249 pcnetPollRxTx(pThis); 1250 pcnetUpdateIrq(pThis); 1251 PDMCritSectLeave(&pThis->CritSect); 1252 1252 } 1253 1253 } … … 1257 1257 #endif /* PCNET_NO_POLLING */ 1258 1258 1259 static void pcnetSoftReset(PCNetState *p Data)1259 static void pcnetSoftReset(PCNetState *pThis) 1260 1260 { 1261 1261 Log(("#%d pcnetSoftReset:\n", PCNET_INST_NR)); 1262 1262 1263 p Data->u32Lnkst = 0x40;1264 p Data->GCRDRA = 0;1265 p Data->GCTDRA = 0;1266 p Data->u32RAP = 0;1267 1268 p Data->aBCR[BCR_BSBC] &= ~0x0080;1269 1270 p Data->aCSR[0] = 0x0004;1271 p Data->aCSR[3] = 0x0000;1272 p Data->aCSR[4] = 0x0115;1273 p Data->aCSR[5] = 0x0000;1274 p Data->aCSR[6] = 0x0000;1275 p Data->aCSR[8] = 0;1276 p Data->aCSR[9] = 0;1277 p Data->aCSR[10] = 0;1278 p Data->aCSR[11] = 0;1279 p Data->aCSR[12] = RT_LE2H_U16(((uint16_t *)&pData->aPROM[0])[0]);1280 p Data->aCSR[13] = RT_LE2H_U16(((uint16_t *)&pData->aPROM[0])[1]);1281 p Data->aCSR[14] = RT_LE2H_U16(((uint16_t *)&pData->aPROM[0])[2]);1282 p Data->aCSR[15] &= 0x21c4;1283 CSR_RCVRC(p Data) = 1;1284 CSR_XMTRC(p Data) = 1;1285 CSR_RCVRL(p Data) = 1;1286 CSR_XMTRL(p Data) = 1;1287 p Data->aCSR[80] = 0x1410;1288 p Data->aCSR[88] = pData->fAm79C973 ? CSR_VERSION_LOW_79C973 : CSR_VERSION_LOW_79C970A;1289 p Data->aCSR[89] = CSR_VERSION_HIGH;1290 p Data->aCSR[94] = 0x0000;1291 p Data->aCSR[100] = 0x0200;1292 p Data->aCSR[103] = 0x0105;1293 p Data->aCSR[103] = 0x0105;1294 CSR_MISSC(p Data) = 0;1295 p Data->aCSR[114] = 0x0000;1296 p Data->aCSR[122] = 0x0000;1297 p Data->aCSR[124] = 0x0000;1263 pThis->u32Lnkst = 0x40; 1264 pThis->GCRDRA = 0; 1265 pThis->GCTDRA = 0; 1266 pThis->u32RAP = 0; 1267 1268 pThis->aBCR[BCR_BSBC] &= ~0x0080; 1269 1270 pThis->aCSR[0] = 0x0004; 1271 pThis->aCSR[3] = 0x0000; 1272 pThis->aCSR[4] = 0x0115; 1273 pThis->aCSR[5] = 0x0000; 1274 pThis->aCSR[6] = 0x0000; 1275 pThis->aCSR[8] = 0; 1276 pThis->aCSR[9] = 0; 1277 pThis->aCSR[10] = 0; 1278 pThis->aCSR[11] = 0; 1279 pThis->aCSR[12] = RT_LE2H_U16(((uint16_t *)&pThis->aPROM[0])[0]); 1280 pThis->aCSR[13] = RT_LE2H_U16(((uint16_t *)&pThis->aPROM[0])[1]); 1281 pThis->aCSR[14] = RT_LE2H_U16(((uint16_t *)&pThis->aPROM[0])[2]); 1282 pThis->aCSR[15] &= 0x21c4; 1283 CSR_RCVRC(pThis) = 1; 1284 CSR_XMTRC(pThis) = 1; 1285 CSR_RCVRL(pThis) = 1; 1286 CSR_XMTRL(pThis) = 1; 1287 pThis->aCSR[80] = 0x1410; 1288 pThis->aCSR[88] = pThis->fAm79C973 ? CSR_VERSION_LOW_79C973 : CSR_VERSION_LOW_79C970A; 1289 pThis->aCSR[89] = CSR_VERSION_HIGH; 1290 pThis->aCSR[94] = 0x0000; 1291 pThis->aCSR[100] = 0x0200; 1292 pThis->aCSR[103] = 0x0105; 1293 pThis->aCSR[103] = 0x0105; 1294 CSR_MISSC(pThis) = 0; 1295 pThis->aCSR[114] = 0x0000; 1296 pThis->aCSR[122] = 0x0000; 1297 pThis->aCSR[124] = 0x0000; 1298 1298 } 1299 1299 … … 1304 1304 * - csr5 (only written by pcnetSoftReset(), pcnetStop or by the driver guest) 1305 1305 */ 1306 static void pcnetUpdateIrq(PCNetState *p Data)1306 static void pcnetUpdateIrq(PCNetState *pThis) 1307 1307 { 1308 1308 register int iISR = 0; 1309 register uint16_t csr0 = p Data->aCSR[0];1309 register uint16_t csr0 = pThis->aCSR[0]; 1310 1310 1311 1311 csr0 &= ~0x0080; /* clear INTR */ 1312 1312 1313 STAM_PROFILE_ADV_START(&p Data->StatInterrupt, a);1313 STAM_PROFILE_ADV_START(&pThis->StatInterrupt, a); 1314 1314 1315 1315 /* Linux guests set csr4=0x0915 … … 1317 1317 1318 1318 #if 1 1319 if ( ( (csr0 & ~p Data->aCSR[3]) & 0x5f00)1320 || (((p Data->aCSR[4]>>1) & ~pData->aCSR[4]) & 0x0115)1321 || (((p Data->aCSR[5]>>1) & pData->aCSR[5]) & 0x0048))1319 if ( ( (csr0 & ~pThis->aCSR[3]) & 0x5f00) 1320 || (((pThis->aCSR[4]>>1) & ~pThis->aCSR[4]) & 0x0115) 1321 || (((pThis->aCSR[5]>>1) & pThis->aCSR[5]) & 0x0048)) 1322 1322 #else 1323 if ( ( !(p Data->aCSR[3] & 0x4000) && !!(csr0 & 0x4000)) /* BABL */1324 ||( !(p Data->aCSR[3] & 0x1000) && !!(csr0 & 0x1000)) /* MISS */1325 ||( !(p Data->aCSR[3] & 0x0100) && !!(csr0 & 0x0100)) /* IDON */1326 ||( !(p Data->aCSR[3] & 0x0200) && !!(csr0 & 0x0200)) /* TINT */1327 ||( !(p Data->aCSR[3] & 0x0400) && !!(csr0 & 0x0400)) /* RINT */1328 ||( !(p Data->aCSR[3] & 0x0800) && !!(csr0 & 0x0800)) /* MERR */1329 ||( !(p Data->aCSR[4] & 0x0001) && !!(pData->aCSR[4] & 0x0002)) /* JAB */1330 ||( !(p Data->aCSR[4] & 0x0004) && !!(pData->aCSR[4] & 0x0008)) /* TXSTRT */1331 ||( !(p Data->aCSR[4] & 0x0010) && !!(pData->aCSR[4] & 0x0020)) /* RCVO */1332 ||( !(p Data->aCSR[4] & 0x0100) && !!(pData->aCSR[4] & 0x0200)) /* MFCO */1333 ||(!!(p Data->aCSR[5] & 0x0040) && !!(pData->aCSR[5] & 0x0080)) /* EXDINT */1334 ||(!!(p Data->aCSR[5] & 0x0008) && !!(pData->aCSR[5] & 0x0010)) /* MPINT */)1323 if ( ( !(pThis->aCSR[3] & 0x4000) && !!(csr0 & 0x4000)) /* BABL */ 1324 ||( !(pThis->aCSR[3] & 0x1000) && !!(csr0 & 0x1000)) /* MISS */ 1325 ||( !(pThis->aCSR[3] & 0x0100) && !!(csr0 & 0x0100)) /* IDON */ 1326 ||( !(pThis->aCSR[3] & 0x0200) && !!(csr0 & 0x0200)) /* TINT */ 1327 ||( !(pThis->aCSR[3] & 0x0400) && !!(csr0 & 0x0400)) /* RINT */ 1328 ||( !(pThis->aCSR[3] & 0x0800) && !!(csr0 & 0x0800)) /* MERR */ 1329 ||( !(pThis->aCSR[4] & 0x0001) && !!(pThis->aCSR[4] & 0x0002)) /* JAB */ 1330 ||( !(pThis->aCSR[4] & 0x0004) && !!(pThis->aCSR[4] & 0x0008)) /* TXSTRT */ 1331 ||( !(pThis->aCSR[4] & 0x0010) && !!(pThis->aCSR[4] & 0x0020)) /* RCVO */ 1332 ||( !(pThis->aCSR[4] & 0x0100) && !!(pThis->aCSR[4] & 0x0200)) /* MFCO */ 1333 ||(!!(pThis->aCSR[5] & 0x0040) && !!(pThis->aCSR[5] & 0x0080)) /* EXDINT */ 1334 ||(!!(pThis->aCSR[5] & 0x0008) && !!(pThis->aCSR[5] & 0x0010)) /* MPINT */) 1335 1335 #endif 1336 1336 { … … 1340 1340 1341 1341 #ifdef VBOX 1342 if (p Data->aCSR[4] & 0x0080) /* UINTCMD */1343 { 1344 p Data->aCSR[4] &= ~0x0080; /* clear UINTCMD */1345 p Data->aCSR[4] |= 0x0040; /* set UINT */1342 if (pThis->aCSR[4] & 0x0080) /* UINTCMD */ 1343 { 1344 pThis->aCSR[4] &= ~0x0080; /* clear UINTCMD */ 1345 pThis->aCSR[4] |= 0x0040; /* set UINT */ 1346 1346 Log(("#%d user int\n", PCNET_INST_NR)); 1347 1347 } 1348 if (p Data->aCSR[4] & csr0 & 0x0040 /* CSR_INEA */)1348 if (pThis->aCSR[4] & csr0 & 0x0040 /* CSR_INEA */) 1349 1349 { 1350 1350 csr0 |= 0x0080; /* set INTR */ … … 1352 1352 } 1353 1353 #else /* !VBOX */ 1354 if (!!(p Data->aCSR[4] & 0x0080) && CSR_INEA(pData)) /* UINTCMD */1355 { 1356 p Data->aCSR[4] &= ~0x0080;1357 p Data->aCSR[4] |= 0x0040; /* set UINT */1354 if (!!(pThis->aCSR[4] & 0x0080) && CSR_INEA(pThis)) /* UINTCMD */ 1355 { 1356 pThis->aCSR[4] &= ~0x0080; 1357 pThis->aCSR[4] |= 0x0040; /* set UINT */ 1358 1358 csr0 |= 0x0080; /* set INTR */ 1359 1359 iISR = 1; … … 1363 1363 1364 1364 #if 1 1365 if (((p Data->aCSR[5]>>1) & pData->aCSR[5]) & 0x0500)1365 if (((pThis->aCSR[5]>>1) & pThis->aCSR[5]) & 0x0500) 1366 1366 #else 1367 if ( (!!(p Data->aCSR[5] & 0x0400) && !!(pData->aCSR[5] & 0x0800)) /* SINT */1368 ||(!!(p Data->aCSR[5] & 0x0100) && !!(pData->aCSR[5] & 0x0200)) /* SLPINT */)1367 if ( (!!(pThis->aCSR[5] & 0x0400) && !!(pThis->aCSR[5] & 0x0800)) /* SINT */ 1368 ||(!!(pThis->aCSR[5] & 0x0100) && !!(pThis->aCSR[5] & 0x0200)) /* SLPINT */) 1369 1369 #endif 1370 1370 { … … 1373 1373 } 1374 1374 1375 if ((p Data->aCSR[7] & 0x0C00) == 0x0C00) /* STINT + STINTE */1375 if ((pThis->aCSR[7] & 0x0C00) == 0x0C00) /* STINT + STINTE */ 1376 1376 iISR = 1; 1377 1377 1378 p Data->aCSR[0] = csr0;1378 pThis->aCSR[0] = csr0; 1379 1379 1380 1380 Log2(("#%d set irq iISR=%d\n", PCNET_INST_NR, iISR)); 1381 1381 1382 1382 /* normal path is to _not_ change the IRQ status */ 1383 if (RT_UNLIKELY(iISR != p Data->iISR))1383 if (RT_UNLIKELY(iISR != pThis->iISR)) 1384 1384 { 1385 1385 Log(("#%d INTA=%d\n", PCNET_INST_NR, iISR)); 1386 PDMDevHlpPCISetIrqNoWait(PCNETSTATE_2_DEVINS(p Data), 0, iISR);1387 p Data->iISR = iISR;1388 } 1389 STAM_PROFILE_ADV_STOP(&p Data->StatInterrupt, a);1386 PDMDevHlpPCISetIrqNoWait(PCNETSTATE_2_DEVINS(pThis), 0, iISR); 1387 pThis->iISR = iISR; 1388 } 1389 STAM_PROFILE_ADV_STOP(&pThis->StatInterrupt, a); 1390 1390 } 1391 1391 … … 1393 1393 * Enable/disable the private guest interface. 1394 1394 */ 1395 static void pcnetEnablePrivateIf(PCNetState *p Data)1396 { 1397 bool fPrivIfEnabled = p Data->pSharedMMIOR31398 && !!(p Data->CTX_SUFF(pSharedMMIO)->fFlags & PCNET_GUEST_FLAGS_ADMIT_GUEST);1399 if (fPrivIfEnabled != p Data->fPrivIfEnabled)1400 { 1401 p Data->fPrivIfEnabled = fPrivIfEnabled;1395 static void pcnetEnablePrivateIf(PCNetState *pThis) 1396 { 1397 bool fPrivIfEnabled = pThis->pSharedMMIOR3 1398 && !!(pThis->CTX_SUFF(pSharedMMIO)->fFlags & PCNET_GUEST_FLAGS_ADMIT_GUEST); 1399 if (fPrivIfEnabled != pThis->fPrivIfEnabled) 1400 { 1401 pThis->fPrivIfEnabled = fPrivIfEnabled; 1402 1402 LogRel(("PCNet#%d: %s private interface\n", PCNET_INST_NR, fPrivIfEnabled ? "Enabling" : "Disabling")); 1403 1403 } … … 1406 1406 #ifdef IN_RING3 1407 1407 #ifdef PCNET_NO_POLLING 1408 static void pcnetUpdateRingHandlers(PCNetState *p Data)1409 { 1410 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);1408 static void pcnetUpdateRingHandlers(PCNetState *pThis) 1409 { 1410 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 1411 1411 int rc; 1412 1412 1413 Log(("pcnetUpdateRingHandlers TD %VGp size %#x -> %VGp size %#x\n", p Data->TDRAPhysOld, pData->cbTDRAOld, pData->GCTDRA, pcnetTdraAddr(pData, 0)));1414 Log(("pcnetUpdateRingHandlers RX %VGp size %#x -> %VGp size %#x\n", p Data->RDRAPhysOld, pData->cbRDRAOld, pData->GCRDRA, pcnetRdraAddr(pData, 0)));1413 Log(("pcnetUpdateRingHandlers TD %VGp size %#x -> %VGp size %#x\n", pThis->TDRAPhysOld, pThis->cbTDRAOld, pThis->GCTDRA, pcnetTdraAddr(pThis, 0))); 1414 Log(("pcnetUpdateRingHandlers RX %VGp size %#x -> %VGp size %#x\n", pThis->RDRAPhysOld, pThis->cbRDRAOld, pThis->GCRDRA, pcnetRdraAddr(pThis, 0))); 1415 1415 1416 1416 /** @todo unregister order not correct! */ 1417 1417 1418 1418 #ifdef PCNET_MONITOR_RECEIVE_RING 1419 if (p Data->GCRDRA != pData->RDRAPhysOld || CSR_RCVRL(pData) != pData->cbRDRAOld)1420 { 1421 if (p Data->RDRAPhysOld != 0)1419 if (pThis->GCRDRA != pThis->RDRAPhysOld || CSR_RCVRL(pThis) != pThis->cbRDRAOld) 1420 { 1421 if (pThis->RDRAPhysOld != 0) 1422 1422 PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), 1423 p Data->RDRAPhysOld & ~PAGE_OFFSET_MASK);1423 pThis->RDRAPhysOld & ~PAGE_OFFSET_MASK); 1424 1424 1425 1425 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1426 1426 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1427 p Data->GCRDRA & ~PAGE_OFFSET_MASK,1428 RT_ALIGN(pcnetRdraAddr(p Data, 0), PAGE_SIZE) - 1,1427 pThis->GCRDRA & ~PAGE_OFFSET_MASK, 1428 RT_ALIGN(pcnetRdraAddr(pThis, 0), PAGE_SIZE) - 1, 1429 1429 pcnetHandleRingWrite, pDevIns, 1430 1430 g_DevicePCNet.szR0Mod, "pcnetHandleRingWrite", 1431 p Data->pDevInsHC->pvInstanceDataHC,1431 pThis->pDevInsHC->pvInstanceDataHC, 1432 1432 g_DevicePCNet.szGCMod, "pcnetHandleRingWrite", 1433 p Data->pDevInsHC->pvInstanceDataGC,1433 pThis->pDevInsHC->pvInstanceDataGC, 1434 1434 "PCNet receive ring write access handler"); 1435 1435 AssertRC(rc); 1436 1436 1437 p Data->RDRAPhysOld = pData->GCRDRA;1438 p Data->cbRDRAOld = pcnetRdraAddr(pData, 0);1437 pThis->RDRAPhysOld = pThis->GCRDRA; 1438 pThis->cbRDRAOld = pcnetRdraAddr(pThis, 0); 1439 1439 } 1440 1440 #endif /* PCNET_MONITOR_RECEIVE_RING */ … … 1446 1446 * 3) TDRA & RDRA overlap partly with different physical pages 1447 1447 */ 1448 RTGCPHYS32 RDRAPageStart = p Data->GCRDRA & ~PAGE_OFFSET_MASK;1449 RTGCPHYS32 RDRAPageEnd = (pcnetRdraAddr(p Data, 0) - 1) & ~PAGE_OFFSET_MASK;1450 RTGCPHYS32 TDRAPageStart = p Data->GCTDRA & ~PAGE_OFFSET_MASK;1451 RTGCPHYS32 TDRAPageEnd = (pcnetTdraAddr(p Data, 0) - 1) & ~PAGE_OFFSET_MASK;1448 RTGCPHYS32 RDRAPageStart = pThis->GCRDRA & ~PAGE_OFFSET_MASK; 1449 RTGCPHYS32 RDRAPageEnd = (pcnetRdraAddr(pThis, 0) - 1) & ~PAGE_OFFSET_MASK; 1450 RTGCPHYS32 TDRAPageStart = pThis->GCTDRA & ~PAGE_OFFSET_MASK; 1451 RTGCPHYS32 TDRAPageEnd = (pcnetTdraAddr(pThis, 0) - 1) & ~PAGE_OFFSET_MASK; 1452 1452 1453 1453 if ( RDRAPageStart > TDRAPageEnd … … 1456 1456 #endif /* PCNET_MONITOR_RECEIVE_RING */ 1457 1457 /* 1) */ 1458 if (p Data->GCTDRA != pData->TDRAPhysOld || CSR_XMTRL(pData) != pData->cbTDRAOld)1458 if (pThis->GCTDRA != pThis->TDRAPhysOld || CSR_XMTRL(pThis) != pThis->cbTDRAOld) 1459 1459 { 1460 if (p Data->TDRAPhysOld != 0)1460 if (pThis->TDRAPhysOld != 0) 1461 1461 PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), 1462 p Data->TDRAPhysOld & ~PAGE_OFFSET_MASK);1462 pThis->TDRAPhysOld & ~PAGE_OFFSET_MASK); 1463 1463 1464 1464 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1465 1465 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1466 p Data->GCTDRA & ~PAGE_OFFSET_MASK,1467 RT_ALIGN(pcnetTdraAddr(p Data, 0), PAGE_SIZE) - 1,1466 pThis->GCTDRA & ~PAGE_OFFSET_MASK, 1467 RT_ALIGN(pcnetTdraAddr(pThis, 0), PAGE_SIZE) - 1, 1468 1468 pcnetHandleRingWrite, pDevIns, 1469 1469 g_DevicePCNet.szR0Mod, "pcnetHandleRingWrite", 1470 p Data->pDevInsHC->pvInstanceDataHC,1470 pThis->pDevInsHC->pvInstanceDataHC, 1471 1471 g_DevicePCNet.szGCMod, "pcnetHandleRingWrite", 1472 p Data->pDevInsHC->pvInstanceDataGC,1472 pThis->pDevInsHC->pvInstanceDataGC, 1473 1473 "PCNet transmit ring write access handler"); 1474 1474 AssertRC(rc); 1475 1475 1476 p Data->TDRAPhysOld = pData->GCTDRA;1477 p Data->cbTDRAOld = pcnetTdraAddr(pData, 0);1476 pThis->TDRAPhysOld = pThis->GCTDRA; 1477 pThis->cbTDRAOld = pcnetTdraAddr(pThis, 0); 1478 1478 } 1479 1479 #ifdef PCNET_MONITOR_RECEIVE_RING … … 1494 1494 #endif /* PCNET_NO_POLLING */ 1495 1495 1496 static void pcnetInit(PCNetState *p Data)1497 { 1498 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);1499 Log(("#%d pcnetInit: init_addr=%#010x\n", PCNET_INST_NR, PHYSADDR(p Data, CSR_IADR(pData))));1496 static void pcnetInit(PCNetState *pThis) 1497 { 1498 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 1499 Log(("#%d pcnetInit: init_addr=%#010x\n", PCNET_INST_NR, PHYSADDR(pThis, CSR_IADR(pThis)))); 1500 1500 1501 1501 /** @todo Documentation says that RCVRL and XMTRL are stored as two's complement! 1502 1502 * Software is allowed to write these registers directly. */ 1503 1503 #define PCNET_INIT() do { \ 1504 PDMDevHlpPhysRead(pDevIns, PHYSADDR(p Data, CSR_IADR(pData)), \1504 PDMDevHlpPhysRead(pDevIns, PHYSADDR(pThis, CSR_IADR(pThis)), \ 1505 1505 (uint8_t *)&initblk, sizeof(initblk)); \ 1506 p Data->aCSR[15] = RT_LE2H_U16(initblk.mode); \1507 CSR_RCVRL(p Data) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512; \1508 CSR_XMTRL(p Data) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512; \1509 p Data->aCSR[ 6] = (initblk.tlen << 12) | (initblk.rlen << 8); \1510 p Data->aCSR[ 8] = RT_LE2H_U16(initblk.ladrf1); \1511 p Data->aCSR[ 9] = RT_LE2H_U16(initblk.ladrf2); \1512 p Data->aCSR[10] = RT_LE2H_U16(initblk.ladrf3); \1513 p Data->aCSR[11] = RT_LE2H_U16(initblk.ladrf4); \1514 p Data->aCSR[12] = RT_LE2H_U16(initblk.padr1); \1515 p Data->aCSR[13] = RT_LE2H_U16(initblk.padr2); \1516 p Data->aCSR[14] = RT_LE2H_U16(initblk.padr3); \1517 p Data->GCRDRA = PHYSADDR(pData, initblk.rdra); \1518 p Data->GCTDRA = PHYSADDR(pData, initblk.tdra); \1506 pThis->aCSR[15] = RT_LE2H_U16(initblk.mode); \ 1507 CSR_RCVRL(pThis) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512; \ 1508 CSR_XMTRL(pThis) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512; \ 1509 pThis->aCSR[ 6] = (initblk.tlen << 12) | (initblk.rlen << 8); \ 1510 pThis->aCSR[ 8] = RT_LE2H_U16(initblk.ladrf1); \ 1511 pThis->aCSR[ 9] = RT_LE2H_U16(initblk.ladrf2); \ 1512 pThis->aCSR[10] = RT_LE2H_U16(initblk.ladrf3); \ 1513 pThis->aCSR[11] = RT_LE2H_U16(initblk.ladrf4); \ 1514 pThis->aCSR[12] = RT_LE2H_U16(initblk.padr1); \ 1515 pThis->aCSR[13] = RT_LE2H_U16(initblk.padr2); \ 1516 pThis->aCSR[14] = RT_LE2H_U16(initblk.padr3); \ 1517 pThis->GCRDRA = PHYSADDR(pThis, initblk.rdra); \ 1518 pThis->GCTDRA = PHYSADDR(pThis, initblk.tdra); \ 1519 1519 } while (0) 1520 1520 1521 pcnetEnablePrivateIf(p Data);1522 1523 if (BCR_SSIZE32(p Data))1521 pcnetEnablePrivateIf(pThis); 1522 1523 if (BCR_SSIZE32(pThis)) 1524 1524 { 1525 1525 struct INITBLK32 initblk; 1526 p Data->GCUpperPhys = 0;1526 pThis->GCUpperPhys = 0; 1527 1527 PCNET_INIT(); 1528 1528 Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n", … … 1532 1532 { 1533 1533 struct INITBLK16 initblk; 1534 p Data->GCUpperPhys = (0xff00 & (uint32_t)pData->aCSR[2]) << 16;1534 pThis->GCUpperPhys = (0xff00 & (uint32_t)pThis->aCSR[2]) << 16; 1535 1535 PCNET_INIT(); 1536 1536 Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n", … … 1541 1541 1542 1542 size_t cbRxBuffers = 0; 1543 for (int i = CSR_RCVRL(p Data); i >= 1; i--)1543 for (int i = CSR_RCVRL(pThis); i >= 1; i--) 1544 1544 { 1545 1545 RMD rmd; 1546 RTGCPHYS32 addr = pcnetRdraAddr(p Data, i);1546 RTGCPHYS32 addr = pcnetRdraAddr(pThis, i); 1547 1547 /* At this time it is not guaranteed that the buffers are already initialized. */ 1548 if (pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, addr), false))1548 if (pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, addr), false)) 1549 1549 cbRxBuffers += 4096-rmd.rmd1.bcnt; 1550 1550 } … … 1558 1558 * short in RX buffers we notify this condition. 1559 1559 */ 1560 p Data->fSignalRxMiss = (cbRxBuffers == 0 || cbRxBuffers >= 32*_1K);1561 1562 if (p Data->pDrv)1563 p Data->pDrv->pfnSetPromiscuousMode(pData->pDrv, CSR_PROM(pData));1564 1565 CSR_RCVRC(p Data) = CSR_RCVRL(pData);1566 CSR_XMTRC(p Data) = CSR_XMTRL(pData);1560 pThis->fSignalRxMiss = (cbRxBuffers == 0 || cbRxBuffers >= 32*_1K); 1561 1562 if (pThis->pDrv) 1563 pThis->pDrv->pfnSetPromiscuousMode(pThis->pDrv, CSR_PROM(pThis)); 1564 1565 CSR_RCVRC(pThis) = CSR_RCVRL(pThis); 1566 CSR_XMTRC(pThis) = CSR_XMTRL(pThis); 1567 1567 1568 1568 #ifdef PCNET_NO_POLLING 1569 pcnetUpdateRingHandlers(p Data);1569 pcnetUpdateRingHandlers(pThis); 1570 1570 #endif 1571 1571 1572 1572 /* Reset cached RX and TX states */ 1573 CSR_CRST(p Data) = CSR_CRBC(pData) = CSR_NRST(pData) = CSR_NRBC(pData) = 0;1574 CSR_CXST(p Data) = CSR_CXBC(pData) = CSR_NXST(pData) = CSR_NXBC(pData) = 0;1573 CSR_CRST(pThis) = CSR_CRBC(pThis) = CSR_NRST(pThis) = CSR_NRBC(pThis) = 0; 1574 CSR_CXST(pThis) = CSR_CXBC(pThis) = CSR_NXST(pThis) = CSR_NXBC(pThis) = 0; 1575 1575 1576 1576 LogRel(("PCNet#%d: Init: ss32=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]%s\n", 1577 PCNET_INST_NR, BCR_SSIZE32(p Data),1578 p Data->GCRDRA, CSR_RCVRL(pData), pData->GCTDRA, CSR_XMTRL(pData),1579 !p Data->fSignalRxMiss ? " (CSR0_MISS disabled)" : ""));1580 1581 p Data->aCSR[0] |= 0x0101; /* Initialization done */1582 p Data->aCSR[0] &= ~0x0004; /* clear STOP bit */1577 PCNET_INST_NR, BCR_SSIZE32(pThis), 1578 pThis->GCRDRA, CSR_RCVRL(pThis), pThis->GCTDRA, CSR_XMTRL(pThis), 1579 !pThis->fSignalRxMiss ? " (CSR0_MISS disabled)" : "")); 1580 1581 pThis->aCSR[0] |= 0x0101; /* Initialization done */ 1582 pThis->aCSR[0] &= ~0x0004; /* clear STOP bit */ 1583 1583 } 1584 1584 #endif /* IN_RING3 */ … … 1587 1587 * Start RX/TX operation. 1588 1588 */ 1589 static void pcnetStart(PCNetState *p Data)1589 static void pcnetStart(PCNetState *pThis) 1590 1590 { 1591 1591 Log(("#%d pcnetStart:\n", PCNET_INST_NR)); 1592 if (!CSR_DTX(p Data))1593 p Data->aCSR[0] |= 0x0010; /* set TXON */1594 if (!CSR_DRX(p Data))1595 p Data->aCSR[0] |= 0x0020; /* set RXON */1596 pcnetEnablePrivateIf(p Data);1597 p Data->aCSR[0] &= ~0x0004; /* clear STOP bit */1598 p Data->aCSR[0] |= 0x0002; /* STRT */1599 pcnetPollTimerStart(p Data); /* start timer if it was stopped */1592 if (!CSR_DTX(pThis)) 1593 pThis->aCSR[0] |= 0x0010; /* set TXON */ 1594 if (!CSR_DRX(pThis)) 1595 pThis->aCSR[0] |= 0x0020; /* set RXON */ 1596 pcnetEnablePrivateIf(pThis); 1597 pThis->aCSR[0] &= ~0x0004; /* clear STOP bit */ 1598 pThis->aCSR[0] |= 0x0002; /* STRT */ 1599 pcnetPollTimerStart(pThis); /* start timer if it was stopped */ 1600 1600 } 1601 1601 … … 1603 1603 * Stop RX/TX operation. 1604 1604 */ 1605 static void pcnetStop(PCNetState *p Data)1605 static void pcnetStop(PCNetState *pThis) 1606 1606 { 1607 1607 Log(("#%d pcnetStop:\n", PCNET_INST_NR)); 1608 p Data->aCSR[0] &= ~0x7feb;1609 p Data->aCSR[0] |= 0x0014;1610 p Data->aCSR[4] &= ~0x02c2;1611 p Data->aCSR[5] &= ~0x0011;1612 pcnetEnablePrivateIf(p Data);1613 pcnetPollTimer(p Data);1608 pThis->aCSR[0] &= ~0x7feb; 1609 pThis->aCSR[0] |= 0x0014; 1610 pThis->aCSR[4] &= ~0x02c2; 1611 pThis->aCSR[5] &= ~0x0011; 1612 pcnetEnablePrivateIf(pThis); 1613 pcnetPollTimer(pThis); 1614 1614 } 1615 1615 … … 1617 1617 static DECLCALLBACK(void) pcnetWakeupReceive(PPDMDEVINS pDevIns) 1618 1618 { 1619 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);1620 STAM_COUNTER_INC(&p Data->StatRxOverflowWakeup);1621 if (p Data->hEventOutOfRxSpace != NIL_RTSEMEVENT)1622 RTSemEventSignal(p Data->hEventOutOfRxSpace);1619 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 1620 STAM_COUNTER_INC(&pThis->StatRxOverflowWakeup); 1621 if (pThis->hEventOutOfRxSpace != NIL_RTSEMEVENT) 1622 RTSemEventSignal(pThis->hEventOutOfRxSpace); 1623 1623 } 1624 1624 … … 1638 1638 * @param fSkipCurrent if true, don't scan the current RDTE. 1639 1639 */ 1640 static void pcnetRdtePoll(PCNetState *p Data, bool fSkipCurrent=false)1641 { 1642 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatRdtePoll), a);1640 static void pcnetRdtePoll(PCNetState *pThis, bool fSkipCurrent=false) 1641 { 1642 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatRdtePoll), a); 1643 1643 /* assume lack of a next receive descriptor */ 1644 CSR_NRST(p Data) = 0;1645 1646 if (RT_LIKELY(p Data->GCRDRA))1644 CSR_NRST(pThis) = 0; 1645 1646 if (RT_LIKELY(pThis->GCRDRA)) 1647 1647 { 1648 1648 /* … … 1650 1650 */ 1651 1651 RMD rmd; 1652 int i = CSR_RCVRC(p Data);1652 int i = CSR_RCVRC(pThis); 1653 1653 RTGCPHYS32 addr; 1654 1654 1655 1655 if (i < 1) 1656 i = CSR_RCVRL(p Data);1656 i = CSR_RCVRL(pThis); 1657 1657 1658 1658 if (!fSkipCurrent) 1659 1659 { 1660 addr = pcnetRdraAddr(p Data, i);1661 CSR_CRDA(p Data) = CSR_CRBA(pData) = 0;1662 CSR_CRBC(p Data) = CSR_CRST(pData) = 0;1663 if (!pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, addr), true))1660 addr = pcnetRdraAddr(pThis, i); 1661 CSR_CRDA(pThis) = CSR_CRBA(pThis) = 0; 1662 CSR_CRBC(pThis) = CSR_CRST(pThis) = 0; 1663 if (!pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, addr), true)) 1664 1664 { 1665 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatRdtePoll), a);1665 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatRdtePoll), a); 1666 1666 return; 1667 1667 } 1668 1668 if (RT_LIKELY(!IS_RMD_BAD(rmd))) 1669 1669 { 1670 CSR_CRDA(p Data) = addr; /* Receive Descriptor Address */1671 CSR_CRBA(p Data) = rmd.rmd0.rbadr; /* Receive Buffer Address */1672 CSR_CRBC(p Data) = rmd.rmd1.bcnt; /* Receive Byte Count */1673 CSR_CRST(p Data) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */1674 if (p Data->fMaybeOutOfSpace)1670 CSR_CRDA(pThis) = addr; /* Receive Descriptor Address */ 1671 CSR_CRBA(pThis) = rmd.rmd0.rbadr; /* Receive Buffer Address */ 1672 CSR_CRBC(pThis) = rmd.rmd1.bcnt; /* Receive Byte Count */ 1673 CSR_CRST(pThis) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */ 1674 if (pThis->fMaybeOutOfSpace) 1675 1675 { 1676 1676 #ifdef IN_RING3 1677 pcnetWakeupReceive(PCNETSTATE_2_DEVINS(p Data));1677 pcnetWakeupReceive(PCNETSTATE_2_DEVINS(pThis)); 1678 1678 #else 1679 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(p Data->CTX_SUFF(pCanRxQueue));1679 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pCanRxQueue)); 1680 1680 if (pItem) 1681 PDMQueueInsert(p Data->CTX_SUFF(pCanRxQueue), pItem);1681 PDMQueueInsert(pThis->CTX_SUFF(pCanRxQueue), pItem); 1682 1682 #endif 1683 1683 } … … 1685 1685 else 1686 1686 { 1687 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatRdtePoll), a);1687 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatRdtePoll), a); 1688 1688 /* This is not problematic since we don't own the descriptor */ 1689 1689 LogRel(("PCNet#%d: BAD RMD ENTRIES AT %#010x (i=%d)\n", … … 1697 1697 */ 1698 1698 if (--i < 1) 1699 i = CSR_RCVRL(p Data);1700 addr = pcnetRdraAddr(p Data, i);1701 CSR_NRDA(p Data) = CSR_NRBA(pData) = 0;1702 CSR_NRBC(p Data) = 0;1703 if (!pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, addr), true))1699 i = CSR_RCVRL(pThis); 1700 addr = pcnetRdraAddr(pThis, i); 1701 CSR_NRDA(pThis) = CSR_NRBA(pThis) = 0; 1702 CSR_NRBC(pThis) = 0; 1703 if (!pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, addr), true)) 1704 1704 { 1705 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatRdtePoll), a);1705 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatRdtePoll), a); 1706 1706 return; 1707 1707 } 1708 1708 if (RT_LIKELY(!IS_RMD_BAD(rmd))) 1709 1709 { 1710 CSR_NRDA(p Data) = addr; /* Receive Descriptor Address */1711 CSR_NRBA(p Data) = rmd.rmd0.rbadr; /* Receive Buffer Address */1712 CSR_NRBC(p Data) = rmd.rmd1.bcnt; /* Receive Byte Count */1713 CSR_NRST(p Data) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */1710 CSR_NRDA(pThis) = addr; /* Receive Descriptor Address */ 1711 CSR_NRBA(pThis) = rmd.rmd0.rbadr; /* Receive Buffer Address */ 1712 CSR_NRBC(pThis) = rmd.rmd1.bcnt; /* Receive Byte Count */ 1713 CSR_NRST(pThis) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */ 1714 1714 } 1715 1715 else 1716 1716 { 1717 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatRdtePoll), a);1717 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatRdtePoll), a); 1718 1718 /* This is not problematic since we don't own the descriptor */ 1719 1719 LogRel(("PCNet#%d: BAD RMD ENTRIES + AT %#010x (i=%d)\n", … … 1728 1728 else 1729 1729 { 1730 CSR_CRDA(p Data) = CSR_CRBA(pData) = CSR_NRDA(pData) = CSR_NRBA(pData) = 0;1731 CSR_CRBC(p Data) = CSR_NRBC(pData) = CSR_CRST(pData) = 0;1732 } 1733 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatRdtePoll), a);1730 CSR_CRDA(pThis) = CSR_CRBA(pThis) = CSR_NRDA(pThis) = CSR_NRBA(pThis) = 0; 1731 CSR_CRBC(pThis) = CSR_NRBC(pThis) = CSR_CRST(pThis) = 0; 1732 } 1733 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatRdtePoll), a); 1734 1734 } 1735 1735 … … 1738 1738 * @return true if transmit descriptors available 1739 1739 */ 1740 static int pcnetTdtePoll(PCNetState *p Data, TMD *tmd)1741 { 1742 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatTdtePoll), a);1743 if (RT_LIKELY(p Data->GCTDRA))1744 { 1745 RTGCPHYS32 cxda = pcnetTdraAddr(p Data, CSR_XMTRC(pData));1746 1747 if (!pcnetTmdLoad(p Data, tmd, PHYSADDR(pData, cxda), true))1740 static int pcnetTdtePoll(PCNetState *pThis, TMD *tmd) 1741 { 1742 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatTdtePoll), a); 1743 if (RT_LIKELY(pThis->GCTDRA)) 1744 { 1745 RTGCPHYS32 cxda = pcnetTdraAddr(pThis, CSR_XMTRC(pThis)); 1746 1747 if (!pcnetTmdLoad(pThis, tmd, PHYSADDR(pThis, cxda), true)) 1748 1748 { 1749 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatTdtePoll), a);1749 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatTdtePoll), a); 1750 1750 return 0; 1751 1751 } … … 1753 1753 if (RT_UNLIKELY(tmd->tmd1.ones != 15)) 1754 1754 { 1755 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatTdtePoll), a);1755 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatTdtePoll), a); 1756 1756 LogRel(("PCNet#%d: BAD TMD XDA=%#010x\n", 1757 PCNET_INST_NR, PHYSADDR(p Data, cxda)));1757 PCNET_INST_NR, PHYSADDR(pThis, cxda))); 1758 1758 return 0; 1759 1759 } 1760 1760 1761 1761 /* previous xmit descriptor */ 1762 CSR_PXDA(p Data) = CSR_CXDA(pData);1763 CSR_PXBC(p Data) = CSR_CXBC(pData);1764 CSR_PXST(p Data) = CSR_CXST(pData);1762 CSR_PXDA(pThis) = CSR_CXDA(pThis); 1763 CSR_PXBC(pThis) = CSR_CXBC(pThis); 1764 CSR_PXST(pThis) = CSR_CXST(pThis); 1765 1765 1766 1766 /* set current trasmit decriptor. */ 1767 CSR_CXDA(p Data) = cxda;1768 CSR_CXBC(p Data) = tmd->tmd1.bcnt;1769 CSR_CXST(p Data) = ((uint32_t *)tmd)[1] >> 16;1770 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatTdtePoll), a);1771 return CARD_IS_OWNER(CSR_CXST(p Data));1767 CSR_CXDA(pThis) = cxda; 1768 CSR_CXBC(pThis) = tmd->tmd1.bcnt; 1769 CSR_CXST(pThis) = ((uint32_t *)tmd)[1] >> 16; 1770 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatTdtePoll), a); 1771 return CARD_IS_OWNER(CSR_CXST(pThis)); 1772 1772 } 1773 1773 else 1774 1774 { 1775 1775 /** @todo consistency with previous receive descriptor */ 1776 CSR_CXDA(p Data) = 0;1777 CSR_CXBC(p Data) = CSR_CXST(pData) = 0;1778 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatTdtePoll), a);1776 CSR_CXDA(pThis) = 0; 1777 CSR_CXBC(pThis) = CSR_CXST(pThis) = 0; 1778 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatTdtePoll), a); 1779 1779 return 0; 1780 1780 } … … 1787 1787 * Write data into guest receive buffers. 1788 1788 */ 1789 static void pcnetReceiveNoSync(PCNetState *p Data, const uint8_t *buf, size_t size)1790 { 1791 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(p Data);1789 static void pcnetReceiveNoSync(PCNetState *pThis, const uint8_t *buf, size_t size) 1790 { 1791 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pThis); 1792 1792 int is_padr = 0, is_bcast = 0, is_ladr = 0; 1793 1793 unsigned i; 1794 1794 int pkt_size; 1795 1795 1796 if (RT_UNLIKELY(CSR_DRX(p Data) || CSR_STOP(pData) || CSR_SPND(pData) || !size))1796 if (RT_UNLIKELY(CSR_DRX(pThis) || CSR_STOP(pThis) || CSR_SPND(pThis) || !size)) 1797 1797 return; 1798 1798 … … 1808 1808 * Perform address matching. 1809 1809 */ 1810 if ( CSR_PROM(p Data)1811 || (is_padr = padr_match(p Data, buf, size))1812 || (is_bcast = padr_bcast(p Data, buf, size))1813 || (is_ladr = ladr_match(p Data, buf, size)))1814 { 1815 if (HOST_IS_OWNER(CSR_CRST(p Data)))1816 pcnetRdtePoll(p Data);1817 if (RT_UNLIKELY(HOST_IS_OWNER(CSR_CRST(p Data))))1810 if ( CSR_PROM(pThis) 1811 || (is_padr = padr_match(pThis, buf, size)) 1812 || (is_bcast = padr_bcast(pThis, buf, size)) 1813 || (is_ladr = ladr_match(pThis, buf, size))) 1814 { 1815 if (HOST_IS_OWNER(CSR_CRST(pThis))) 1816 pcnetRdtePoll(pThis); 1817 if (RT_UNLIKELY(HOST_IS_OWNER(CSR_CRST(pThis)))) 1818 1818 { 1819 1819 /* Not owned by controller. This should not be possible as 1820 1820 * we already called pcnetCanReceive(). */ 1821 1821 LogRel(("PCNet#%d: no buffer: RCVRC=%d\n", 1822 PCNET_INST_NR, CSR_RCVRC(p Data)));1822 PCNET_INST_NR, CSR_RCVRC(pThis))); 1823 1823 /* Dump the status of all RX descriptors */ 1824 const unsigned cb = 1 << p Data->iLog2DescSize;1825 RTGCPHYS32 GCPhys = p Data->GCRDRA;1826 i = CSR_RCVRL(p Data);1824 const unsigned cb = 1 << pThis->iLog2DescSize; 1825 RTGCPHYS32 GCPhys = pThis->GCRDRA; 1826 i = CSR_RCVRL(pThis); 1827 1827 while (i-- > 0) 1828 1828 { 1829 1829 RMD rmd; 1830 pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, GCPhys), false);1830 pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, GCPhys), false); 1831 1831 LogRel((" %#010x\n", rmd.rmd1)); 1832 1832 GCPhys += cb; 1833 1833 } 1834 p Data->aCSR[0] |= 0x1000; /* Set MISS flag */1835 CSR_MISSC(p Data)++;1834 pThis->aCSR[0] |= 0x1000; /* Set MISS flag */ 1835 CSR_MISSC(pThis)++; 1836 1836 } 1837 1837 else 1838 1838 { 1839 uint8_t *src = &p Data->abRecvBuf[8];1840 RTGCPHYS32 crda = CSR_CRDA(p Data);1839 uint8_t *src = &pThis->abRecvBuf[8]; 1840 RTGCPHYS32 crda = CSR_CRDA(pThis); 1841 1841 RTGCPHYS32 next_crda; 1842 1842 RMD rmd, next_rmd; … … 1844 1844 1845 1845 memcpy(src, buf, size); 1846 if (!CSR_ASTRP_RCV(p Data))1846 if (!CSR_ASTRP_RCV(pThis)) 1847 1847 { 1848 1848 uint32_t fcs = ~0; … … 1863 1863 #endif 1864 1864 1865 pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, crda), false);1866 /*if (!CSR_LAPPEN(p Data))*/1865 pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, crda), false); 1866 /*if (!CSR_LAPPEN(pThis))*/ 1867 1867 rmd.rmd1.stp = 1; 1868 1868 1869 1869 size_t count = RT_MIN(4096 - (size_t)rmd.rmd1.bcnt, size); 1870 RTGCPHYS32 rbadr = PHYSADDR(p Data, rmd.rmd0.rbadr);1870 RTGCPHYS32 rbadr = PHYSADDR(pThis, rmd.rmd0.rbadr); 1871 1871 #if 0 1872 if (p Data->fPrivIfEnabled)1872 if (pThis->fPrivIfEnabled) 1873 1873 { 1874 uint8_t *pb = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)1875 + rbadr - p Data->GCRDRA + pData->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors;1874 uint8_t *pb = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 1875 + rbadr - pThis->GCRDRA + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors; 1876 1876 memcpy(pb, src, count); 1877 1877 } … … 1884 1884 1885 1885 /* Read current receive descriptor index */ 1886 i = CSR_RCVRC(p Data);1886 i = CSR_RCVRC(pThis); 1887 1887 1888 1888 while (size > 0) … … 1890 1890 /* Read the entire next descriptor as we're likely to need it. */ 1891 1891 if (--i < 1) 1892 i = CSR_RCVRL(p Data);1893 next_crda = pcnetRdraAddr(p Data, i);1892 i = CSR_RCVRL(pThis); 1893 next_crda = pcnetRdraAddr(pThis, i); 1894 1894 1895 1895 /* Check next descriptor's own bit. If we don't own it, we have 1896 1896 * to quit and write error status into the last descriptor we own. 1897 1897 */ 1898 if (!pcnetRmdLoad(p Data, &next_rmd, PHYSADDR(pData, next_crda), true))1898 if (!pcnetRmdLoad(pThis, &next_rmd, PHYSADDR(pThis, next_crda), true)) 1899 1899 break; 1900 1900 1901 1901 /* Write back current descriptor, clear the own bit. */ 1902 pcnetRmdStorePassHost(p Data, &rmd, PHYSADDR(pData, crda));1902 pcnetRmdStorePassHost(pThis, &rmd, PHYSADDR(pThis, crda)); 1903 1903 1904 1904 /* Switch to the next descriptor */ … … 1907 1907 1908 1908 count = RT_MIN(4096 - (size_t)rmd.rmd1.bcnt, size); 1909 RTGCPHYS32 rbadr = PHYSADDR(p Data, rmd.rmd0.rbadr);1909 RTGCPHYS32 rbadr = PHYSADDR(pThis, rmd.rmd0.rbadr); 1910 1910 #if 0 1911 if (p Data->fPrivIfEnabled)1911 if (pThis->fPrivIfEnabled) 1912 1912 { 1913 uint8_t *pb = (uint8_t*)p Data->CTX_SUFF(pSharedMMIO)1914 + rbadr - p Data->GCRDRA + pData->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors;1913 uint8_t *pb = (uint8_t*)pThis->CTX_SUFF(pSharedMMIO) 1914 + rbadr - pThis->GCRDRA + pThis->CTX_SUFF(pSharedMMIO)->V.V1.offRxDescriptors; 1915 1915 memcpy(pb, src, count); 1916 1916 } … … 1926 1926 { 1927 1927 rmd.rmd1.enp = 1; 1928 rmd.rmd1.pam = !CSR_PROM(p Data) && is_padr;1929 rmd.rmd1.lafm = !CSR_PROM(p Data) && is_ladr;1930 rmd.rmd1.bam = !CSR_PROM(p Data) && is_bcast;1928 rmd.rmd1.pam = !CSR_PROM(pThis) && is_padr; 1929 rmd.rmd1.lafm = !CSR_PROM(pThis) && is_ladr; 1930 rmd.rmd1.bam = !CSR_PROM(pThis) && is_bcast; 1931 1931 rmd.rmd2.mcnt = pkt_size; 1932 1932 1933 STAM_REL_COUNTER_ADD(&p Data->StatReceiveBytes, pkt_size);1933 STAM_REL_COUNTER_ADD(&pThis->StatReceiveBytes, pkt_size); 1934 1934 } 1935 1935 else … … 1942 1942 1943 1943 /* write back, clear the own bit */ 1944 pcnetRmdStorePassHost(p Data, &rmd, PHYSADDR(pData, crda));1945 1946 p Data->aCSR[0] |= 0x0400;1944 pcnetRmdStorePassHost(pThis, &rmd, PHYSADDR(pThis, crda)); 1945 1946 pThis->aCSR[0] |= 0x0400; 1947 1947 1948 1948 Log(("#%d RCVRC=%d CRDA=%#010x BLKS=%d\n", PCNET_INST_NR, 1949 CSR_RCVRC(p Data), PHYSADDR(pData, CSR_CRDA(pData)), pktcount));1949 CSR_RCVRC(pThis), PHYSADDR(pThis, CSR_CRDA(pThis)), pktcount)); 1950 1950 #ifdef PCNET_DEBUG_RMD 1951 1951 PRINT_RMD(&rmd); … … 1954 1954 while (pktcount--) 1955 1955 { 1956 if (CSR_RCVRC(p Data) < 2)1957 CSR_RCVRC(p Data) = CSR_RCVRL(pData);1956 if (CSR_RCVRC(pThis) < 2) 1957 CSR_RCVRC(pThis) = CSR_RCVRL(pThis); 1958 1958 else 1959 CSR_RCVRC(p Data)--;1959 CSR_RCVRC(pThis)--; 1960 1960 } 1961 1961 /* guest driver is owner: force repoll of current and next RDTEs */ 1962 CSR_CRST(p Data) = 0;1962 CSR_CRST(pThis) = 0; 1963 1963 } 1964 1964 } … … 1966 1966 /* see description of TXDPOLL: 1967 1967 * ``transmit polling will take place following receive activities'' */ 1968 pcnetPollRxTx(p Data);1969 pcnetUpdateIrq(p Data);1968 pcnetPollRxTx(pThis); 1969 pcnetUpdateIrq(pThis); 1970 1970 } 1971 1971 … … 1976 1976 * @returns false if the link is down. 1977 1977 */ 1978 DECLINLINE(bool) pcnetIsLinkUp(PCNetState *p Data)1979 { 1980 return p Data->pDrv && !pData->fLinkTempDown && pData->fLinkUp;1978 DECLINLINE(bool) pcnetIsLinkUp(PCNetState *pThis) 1979 { 1980 return pThis->pDrv && !pThis->fLinkTempDown && pThis->fLinkUp; 1981 1981 } 1982 1982 … … 1993 1993 static DECLCALLBACK(bool) pcnetXmitQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem) 1994 1994 { 1995 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);1995 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 1996 1996 NOREF(pItem); 1997 1997 1998 1998 /* Clear counter .*/ 1999 ASMAtomicAndU32(&p Data->cPendingSends, 0);1999 ASMAtomicAndU32(&pThis->cPendingSends, 0); 2000 2000 #ifdef PCNET_QUEUE_SEND_PACKETS 2001 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);2001 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 2002 2002 AssertReleaseRC(rc); 2003 pcnetSyncTransmit(p Data);2004 PDMCritSectLeave(&p Data->CritSect);2003 pcnetSyncTransmit(pThis); 2004 PDMCritSectLeave(&pThis->CritSect); 2005 2005 #else 2006 int rc = RTSemEventSignal(p Data->hSendEventSem);2006 int rc = RTSemEventSignal(pThis->hSendEventSem); 2007 2007 AssertRC(rc); 2008 2008 #endif … … 2015 2015 * This is done as a precaution against mess left over by on 2016 2016 */ 2017 DECLINLINE(void) pcnetXmitScrapFrame(PCNetState *p Data)2018 { 2019 p Data->pvSendFrame = NULL;2020 p Data->cbSendFrame = 0;2017 DECLINLINE(void) pcnetXmitScrapFrame(PCNetState *pThis) 2018 { 2019 pThis->pvSendFrame = NULL; 2020 pThis->cbSendFrame = 0; 2021 2021 } 2022 2022 … … 2025 2025 * Reads the first part of a frame 2026 2026 */ 2027 DECLINLINE(void) pcnetXmitRead1st(PCNetState *p Data, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame)2028 { 2029 Assert(PDMCritSectIsOwner(&p Data->CritSect));2030 Assert(cbFrame < sizeof(p Data->abSendBuf));2027 DECLINLINE(void) pcnetXmitRead1st(PCNetState *pThis, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame) 2028 { 2029 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 2030 Assert(cbFrame < sizeof(pThis->abSendBuf)); 2031 2031 2032 2032 #ifdef PCNET_QUEUE_SEND_PACKETS 2033 AssertRelease(p Data->cXmitRingBufPending < PCNET_MAX_XMIT_SLOTS-1);2034 p Data->pvSendFrame = pData->apXmitRingBuffer[pData->iXmitRingBufProd];2033 AssertRelease(pThis->cXmitRingBufPending < PCNET_MAX_XMIT_SLOTS-1); 2034 pThis->pvSendFrame = pThis->apXmitRingBuffer[pThis->iXmitRingBufProd]; 2035 2035 #else 2036 p Data->pvSendFrame = pData->abSendBuf;2037 #endif 2038 PDMDevHlpPhysRead(p Data->CTX_SUFF(pDevIns), GCPhysFrame, pData->pvSendFrame, cbFrame);2039 p Data->cbSendFrame = cbFrame;2036 pThis->pvSendFrame = pThis->abSendBuf; 2037 #endif 2038 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhysFrame, pThis->pvSendFrame, cbFrame); 2039 pThis->cbSendFrame = cbFrame; 2040 2040 } 2041 2041 … … 2044 2044 * Reads more into the current frame. 2045 2045 */ 2046 DECLINLINE(void) pcnetXmitReadMore(PCNetState *p Data, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame)2047 { 2048 Assert(p Data->cbSendFrame + cbFrame <= MAX_FRAME);2049 PDMDevHlpPhysRead(p Data->CTX_SUFF(pDevIns), GCPhysFrame, pData->pvSendFrame + pData->cbSendFrame, cbFrame);2050 p Data->cbSendFrame += cbFrame;2046 DECLINLINE(void) pcnetXmitReadMore(PCNetState *pThis, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame) 2047 { 2048 Assert(pThis->cbSendFrame + cbFrame <= MAX_FRAME); 2049 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhysFrame, pThis->pvSendFrame + pThis->cbSendFrame, cbFrame); 2050 pThis->cbSendFrame += cbFrame; 2051 2051 } 2052 2052 … … 2056 2056 * If we've reached the maxium number of frames, they will be flushed. 2057 2057 */ 2058 DECLINLINE(int) pcnetXmitCompleteFrame(PCNetState *p Data)2058 DECLINLINE(int) pcnetXmitCompleteFrame(PCNetState *pThis) 2059 2059 { 2060 2060 #ifdef PCNET_QUEUE_SEND_PACKETS 2061 Assert(PDMCritSectIsOwner(&p Data->CritSect));2062 AssertRelease(p Data->cXmitRingBufPending < PCNET_MAX_XMIT_SLOTS-1);2063 Assert(!p Data->cbXmitRingBuffer[pData->iXmitRingBufProd]);2064 2065 p Data->cbXmitRingBuffer[pData->iXmitRingBufProd] = (uint16_t)pData->cbSendFrame;2066 p Data->iXmitRingBufProd = (pData->iXmitRingBufProd+1) & PCNET_MAX_XMIT_SLOTS_MASK;2067 ASMAtomicIncS32(&p Data->cXmitRingBufPending);2068 2069 int rc = RTSemEventSignal(p Data->hSendEventSem);2061 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 2062 AssertRelease(pThis->cXmitRingBufPending < PCNET_MAX_XMIT_SLOTS-1); 2063 Assert(!pThis->cbXmitRingBuffer[pThis->iXmitRingBufProd]); 2064 2065 pThis->cbXmitRingBuffer[pThis->iXmitRingBufProd] = (uint16_t)pThis->cbSendFrame; 2066 pThis->iXmitRingBufProd = (pThis->iXmitRingBufProd+1) & PCNET_MAX_XMIT_SLOTS_MASK; 2067 ASMAtomicIncS32(&pThis->cXmitRingBufPending); 2068 2069 int rc = RTSemEventSignal(pThis->hSendEventSem); 2070 2070 AssertRC(rc); 2071 2071 … … 2074 2074 /* Don't hold the critical section while transmitting data. */ 2075 2075 /** @note also avoids deadlocks with NAT as it can call us right back. */ 2076 PDMCritSectLeave(&p Data->CritSect);2077 2078 STAM_PROFILE_ADV_START(&p Data->StatTransmitSend, a);2079 if (p Data->cbSendFrame > 70) /* unqualified guess */2080 p Data->Led.Asserted.s.fWriting = pData->Led.Actual.s.fWriting = 1;2081 2082 p Data->pDrv->pfnSend(pData->pDrv, pData->pvSendFrame, pData->cbSendFrame);2083 STAM_REL_COUNTER_ADD(&p Data->StatTransmitBytes, pData->cbSendFrame);2084 p Data->Led.Actual.s.fWriting = 0;2085 STAM_PROFILE_ADV_STOP(&p Data->StatTransmitSend, a);2086 2087 return PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);2076 PDMCritSectLeave(&pThis->CritSect); 2077 2078 STAM_PROFILE_ADV_START(&pThis->StatTransmitSend, a); 2079 if (pThis->cbSendFrame > 70) /* unqualified guess */ 2080 pThis->Led.Asserted.s.fWriting = pThis->Led.Actual.s.fWriting = 1; 2081 2082 pThis->pDrv->pfnSend(pThis->pDrv, pThis->pvSendFrame, pThis->cbSendFrame); 2083 STAM_REL_COUNTER_ADD(&pThis->StatTransmitBytes, pThis->cbSendFrame); 2084 pThis->Led.Actual.s.fWriting = 0; 2085 STAM_PROFILE_ADV_STOP(&pThis->StatTransmitSend, a); 2086 2087 return PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 2088 2088 #endif 2089 2089 } … … 2093 2093 * Fails a TMD with a link down error. 2094 2094 */ 2095 static void pcnetXmitFailTMDLinkDown(PCNetState *p Data, TMD *pTmd)2095 static void pcnetXmitFailTMDLinkDown(PCNetState *pThis, TMD *pTmd) 2096 2096 { 2097 2097 /* make carrier error - hope this is correct. */ 2098 p Data->cLinkDownReported++;2098 pThis->cLinkDownReported++; 2099 2099 pTmd->tmd2.lcar = pTmd->tmd1.err = 1; 2100 p Data->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */2101 p Data->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;2100 pThis->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */ 2101 pThis->Led.Asserted.s.fError = pThis->Led.Actual.s.fError = 1; 2102 2102 Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n", 2103 PCNET_INST_NR, p Data->aBCR[BCR_SWS]));2103 PCNET_INST_NR, pThis->aBCR[BCR_SWS])); 2104 2104 } 2105 2105 … … 2107 2107 * Fails a TMD with a generic error. 2108 2108 */ 2109 static void pcnetXmitFailTMDGeneric(PCNetState *p Data, TMD *pTmd)2109 static void pcnetXmitFailTMDGeneric(PCNetState *pThis, TMD *pTmd) 2110 2110 { 2111 2111 /* make carrier error - hope this is correct. */ 2112 2112 pTmd->tmd2.lcar = pTmd->tmd1.err = 1; 2113 p Data->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */2114 p Data->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;2113 pThis->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */ 2114 pThis->Led.Asserted.s.fError = pThis->Led.Actual.s.fError = 1; 2115 2115 Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n", 2116 PCNET_INST_NR, p Data->aBCR[BCR_SWS]));2116 PCNET_INST_NR, pThis->aBCR[BCR_SWS])); 2117 2117 } 2118 2118 … … 2121 2121 * Transmit a loopback frame. 2122 2122 */ 2123 DECLINLINE(void) pcnetXmitLoopbackFrame(PCNetState *p Data)2124 { 2125 p Data->Led.Asserted.s.fReading = pData->Led.Actual.s.fReading = 1;2126 if (HOST_IS_OWNER(CSR_CRST(p Data)))2127 pcnetRdtePoll(p Data);2128 2129 Assert(p Data->pvSendFrame);2130 pcnetReceiveNoSync(p Data, (const uint8_t *)pData->pvSendFrame, pData->cbSendFrame);2131 pcnetXmitScrapFrame(p Data);2132 p Data->Led.Actual.s.fReading = 0;2123 DECLINLINE(void) pcnetXmitLoopbackFrame(PCNetState *pThis) 2124 { 2125 pThis->Led.Asserted.s.fReading = pThis->Led.Actual.s.fReading = 1; 2126 if (HOST_IS_OWNER(CSR_CRST(pThis))) 2127 pcnetRdtePoll(pThis); 2128 2129 Assert(pThis->pvSendFrame); 2130 pcnetReceiveNoSync(pThis, (const uint8_t *)pThis->pvSendFrame, pThis->cbSendFrame); 2131 pcnetXmitScrapFrame(pThis); 2132 pThis->Led.Actual.s.fReading = 0; 2133 2133 } 2134 2134 … … 2136 2136 * Flushes queued frames. 2137 2137 */ 2138 DECLINLINE(void) pcnetXmitFlushFrames(PCNetState *p Data)2139 { 2140 pcnetXmitQueueConsumer(p Data->CTX_SUFF(pDevIns), NULL);2138 DECLINLINE(void) pcnetXmitFlushFrames(PCNetState *pThis) 2139 { 2140 pcnetXmitQueueConsumer(pThis->CTX_SUFF(pDevIns), NULL); 2141 2141 } 2142 2142 … … 2148 2148 * Try to transmit frames 2149 2149 */ 2150 static void pcnetTransmit(PCNetState *p Data)2151 { 2152 if (RT_UNLIKELY(!CSR_TXON(p Data)))2153 { 2154 p Data->aCSR[0] &= ~0x0008; /* Clear TDMD */2150 static void pcnetTransmit(PCNetState *pThis) 2151 { 2152 if (RT_UNLIKELY(!CSR_TXON(pThis))) 2153 { 2154 pThis->aCSR[0] &= ~0x0008; /* Clear TDMD */ 2155 2155 return; 2156 2156 } … … 2160 2160 */ 2161 2161 TMD tmd; 2162 if (!pcnetTdtePoll(p Data, &tmd))2162 if (!pcnetTdtePoll(pThis, &tmd)) 2163 2163 return; 2164 2164 … … 2166 2166 * Clear TDMD. 2167 2167 */ 2168 p Data->aCSR[0] &= ~0x0008;2168 pThis->aCSR[0] &= ~0x0008; 2169 2169 2170 2170 /* … … 2172 2172 */ 2173 2173 #ifdef IN_RING3 2174 pcnetXmitFlushFrames(p Data);2174 pcnetXmitFlushFrames(pThis); 2175 2175 #else 2176 2176 # if 1 2177 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(p Data->CTX_SUFF(pXmitQueue));2177 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pXmitQueue)); 2178 2178 if (RT_UNLIKELY(pItem)) 2179 PDMQueueInsert(p Data->CTX_SUFF(pXmitQueue), pItem);2179 PDMQueueInsert(pThis->CTX_SUFF(pXmitQueue), pItem); 2180 2180 # else 2181 if (ASMAtomicIncU32(&p Data->cPendingSends) < 16)2182 { 2183 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(p Data->CTX_SUFF(pXmitQueue));2181 if (ASMAtomicIncU32(&pThis->cPendingSends) < 16) 2182 { 2183 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pXmitQueue)); 2184 2184 if (RT_UNLIKELY(pItem)) 2185 PDMQueueInsert(p Data->CTX_SUFF(pXmitQueue), pItem);2185 PDMQueueInsert(pThis->CTX_SUFF(pXmitQueue), pItem); 2186 2186 } 2187 2187 else 2188 PDMQueueFlush(p Data->CTX_SUFF(pXmitQueue));2188 PDMQueueFlush(pThis->CTX_SUFF(pXmitQueue)); 2189 2189 # endif 2190 2190 #endif … … 2197 2197 */ 2198 2198 #ifdef PCNET_QUEUE_SEND_PACKETS 2199 static int pcnetAsyncTransmit(PCNetState *p Data)2200 { 2201 Assert(PDMCritSectIsOwner(&p Data->CritSect));2199 static int pcnetAsyncTransmit(PCNetState *pThis) 2200 { 2201 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 2202 2202 size_t cb; 2203 2203 2204 while ((p Data->cXmitRingBufPending > 0))2205 { 2206 cb = p Data->cbXmitRingBuffer[pData->iXmitRingBufCons];2204 while ((pThis->cXmitRingBufPending > 0)) 2205 { 2206 cb = pThis->cbXmitRingBuffer[pThis->iXmitRingBufCons]; 2207 2207 2208 2208 /* Don't hold the critical section while transmitting data. */ 2209 2209 /** @note also avoids deadlocks with NAT as it can call us right back. */ 2210 PDMCritSectLeave(&p Data->CritSect);2211 2212 STAM_PROFILE_ADV_START(&p Data->StatTransmitSend, a);2210 PDMCritSectLeave(&pThis->CritSect); 2211 2212 STAM_PROFILE_ADV_START(&pThis->StatTransmitSend, a); 2213 2213 if (cb > 70) /* unqualified guess */ 2214 p Data->Led.Asserted.s.fWriting = pData->Led.Actual.s.fWriting = 1;2215 2216 p Data->pDrv->pfnSend(pData->pDrv, pData->apXmitRingBuffer[pData->iXmitRingBufCons], cb);2217 STAM_REL_COUNTER_ADD(&p Data->StatTransmitBytes, cb);2218 p Data->Led.Actual.s.fWriting = 0;2219 STAM_PROFILE_ADV_STOP(&p Data->StatTransmitSend, a);2220 2221 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);2214 pThis->Led.Asserted.s.fWriting = pThis->Led.Actual.s.fWriting = 1; 2215 2216 pThis->pDrv->pfnSend(pThis->pDrv, pThis->apXmitRingBuffer[pThis->iXmitRingBufCons], cb); 2217 STAM_REL_COUNTER_ADD(&pThis->StatTransmitBytes, cb); 2218 pThis->Led.Actual.s.fWriting = 0; 2219 STAM_PROFILE_ADV_STOP(&pThis->StatTransmitSend, a); 2220 2221 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 2222 2222 AssertReleaseRC(rc); 2223 2223 2224 p Data->cbXmitRingBuffer[pData->iXmitRingBufCons] = 0;2225 p Data->iXmitRingBufCons = (pData->iXmitRingBufCons+1) & PCNET_MAX_XMIT_SLOTS_MASK;2226 ASMAtomicDecS32(&p Data->cXmitRingBufPending);2224 pThis->cbXmitRingBuffer[pThis->iXmitRingBufCons] = 0; 2225 pThis->iXmitRingBufCons = (pThis->iXmitRingBufCons+1) & PCNET_MAX_XMIT_SLOTS_MASK; 2226 ASMAtomicDecS32(&pThis->cXmitRingBufPending); 2227 2227 } 2228 2228 return VINF_SUCCESS; 2229 2229 } 2230 2230 2231 static int pcnetSyncTransmit(PCNetState *p Data)2231 static int pcnetSyncTransmit(PCNetState *pThis) 2232 2232 #else 2233 static int pcnetAsyncTransmit(PCNetState *p Data)2233 static int pcnetAsyncTransmit(PCNetState *pThis) 2234 2234 #endif 2235 2235 { 2236 2236 unsigned cFlushIrq = 0; 2237 2237 2238 Assert(PDMCritSectIsOwner(&p Data->CritSect));2239 2240 if (RT_UNLIKELY(!CSR_TXON(p Data)))2241 { 2242 p Data->aCSR[0] &= ~0x0008; /* Clear TDMD */2238 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 2239 2240 if (RT_UNLIKELY(!CSR_TXON(pThis))) 2241 { 2242 pThis->aCSR[0] &= ~0x0008; /* Clear TDMD */ 2243 2243 return VINF_SUCCESS; 2244 2244 } … … 2247 2247 * Iterate the transmit descriptors. 2248 2248 */ 2249 STAM_PROFILE_ADV_START(&p Data->StatTransmit, a);2249 STAM_PROFILE_ADV_START(&pThis->StatTransmit, a); 2250 2250 do 2251 2251 { … … 2254 2254 #endif 2255 2255 TMD tmd; 2256 if (!pcnetTdtePoll(p Data, &tmd))2256 if (!pcnetTdtePoll(pThis, &tmd)) 2257 2257 break; 2258 2258 2259 2259 /* Don't continue sending packets when the link is down. */ 2260 if (RT_UNLIKELY( !pcnetIsLinkUp(p Data)2261 && p Data->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED)2260 if (RT_UNLIKELY( !pcnetIsLinkUp(pThis) 2261 && pThis->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED) 2262 2262 ) 2263 2263 break; 2264 2264 2265 2265 #ifdef PCNET_DEBUG_TMD 2266 Log2(("#%d TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(p Data, CSR_CXDA(pData))));2266 Log2(("#%d TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(pThis, CSR_CXDA(pThis)))); 2267 2267 PRINT_TMD(&tmd); 2268 2268 #endif 2269 pcnetXmitScrapFrame(p Data);2269 pcnetXmitScrapFrame(pThis); 2270 2270 2271 2271 /* … … 2275 2275 { 2276 2276 const unsigned cb = 4096 - tmd.tmd1.bcnt; 2277 Log(("#%d pcnetTransmit: stp&enp: cb=%d xmtrc=%#x\n", PCNET_INST_NR, cb, CSR_XMTRC(p Data)));2278 2279 if (RT_LIKELY(pcnetIsLinkUp(p Data) || CSR_LOOP(pData)))2277 Log(("#%d pcnetTransmit: stp&enp: cb=%d xmtrc=%#x\n", PCNET_INST_NR, cb, CSR_XMTRC(pThis))); 2278 2279 if (RT_LIKELY(pcnetIsLinkUp(pThis) || CSR_LOOP(pThis))) 2280 2280 { 2281 2281 /* From the manual: ``A zero length buffer is acceptable as … … 2285 2285 if (RT_LIKELY(cb <= MAX_FRAME)) 2286 2286 { 2287 pcnetXmitRead1st(p Data, PHYSADDR(pData, tmd.tmd0.tbadr), cb);2288 if (CSR_LOOP(p Data))2289 pcnetXmitLoopbackFrame(p Data);2287 pcnetXmitRead1st(pThis, PHYSADDR(pThis, tmd.tmd0.tbadr), cb); 2288 if (CSR_LOOP(pThis)) 2289 pcnetXmitLoopbackFrame(pThis); 2290 2290 else 2291 2291 { 2292 int rc = pcnetXmitCompleteFrame(p Data);2292 int rc = pcnetXmitCompleteFrame(pThis); 2293 2293 AssertRCReturn(rc, rc); 2294 2294 } … … 2308 2308 * buffer.'' */ 2309 2309 LogRel(("PCNet#%d: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", PCNET_INST_NR)); 2310 pcnetTmdStorePassHost(p Data, &tmd, PHYSADDR(pData, CSR_CXDA(pData)));2310 pcnetTmdStorePassHost(pThis, &tmd, PHYSADDR(pThis, CSR_CXDA(pThis))); 2311 2311 break; 2312 2312 } … … 2317 2317 LogRel(("PCNet#%d: pcnetAsyncTransmit: illegal 4kb frame -> signalling error\n", PCNET_INST_NR)); 2318 2318 2319 pcnetXmitFailTMDGeneric(p Data, &tmd);2319 pcnetXmitFailTMDGeneric(pThis, &tmd); 2320 2320 } 2321 2321 } 2322 2322 else 2323 pcnetXmitFailTMDLinkDown(p Data, &tmd);2323 pcnetXmitFailTMDLinkDown(pThis, &tmd); 2324 2324 2325 2325 /* Write back the TMD and pass it to the host (clear own bit). */ 2326 pcnetTmdStorePassHost(p Data, &tmd, PHYSADDR(pData, CSR_CXDA(pData)));2326 pcnetTmdStorePassHost(pThis, &tmd, PHYSADDR(pThis, CSR_CXDA(pThis))); 2327 2327 2328 2328 /* advance the ring counter register */ 2329 if (CSR_XMTRC(p Data) < 2)2330 CSR_XMTRC(p Data) = CSR_XMTRL(pData);2329 if (CSR_XMTRC(pThis) < 2) 2330 CSR_XMTRC(pThis) = CSR_XMTRL(pThis); 2331 2331 else 2332 CSR_XMTRC(p Data)--;2332 CSR_XMTRC(pThis)--; 2333 2333 } 2334 2334 else if (tmd.tmd1.stp) … … 2339 2339 bool fDropFrame = false; 2340 2340 unsigned cb = 4096 - tmd.tmd1.bcnt; 2341 pcnetXmitRead1st(p Data, PHYSADDR(pData, tmd.tmd0.tbadr), cb);2341 pcnetXmitRead1st(pThis, PHYSADDR(pThis, tmd.tmd0.tbadr), cb); 2342 2342 for (;;) 2343 2343 { … … 2346 2346 */ 2347 2347 #ifdef LOG_ENABLED 2348 const uint32_t iStart = CSR_XMTRC(p Data);2349 #endif 2350 const uint32_t GCPhysPrevTmd = PHYSADDR(p Data, CSR_CXDA(pData));2351 if (CSR_XMTRC(p Data) < 2)2352 CSR_XMTRC(p Data) = CSR_XMTRL(pData);2348 const uint32_t iStart = CSR_XMTRC(pThis); 2349 #endif 2350 const uint32_t GCPhysPrevTmd = PHYSADDR(pThis, CSR_CXDA(pThis)); 2351 if (CSR_XMTRC(pThis) < 2) 2352 CSR_XMTRC(pThis) = CSR_XMTRL(pThis); 2353 2353 else 2354 CSR_XMTRC(p Data)--;2354 CSR_XMTRC(pThis)--; 2355 2355 2356 2356 TMD dummy; 2357 if (!pcnetTdtePoll(p Data, &dummy))2357 if (!pcnetTdtePoll(pThis, &dummy)) 2358 2358 { 2359 2359 /* … … 2361 2361 */ 2362 2362 tmd.tmd2.buff = tmd.tmd2.uflo = tmd.tmd1.err = 1; 2363 p Data->aCSR[0] |= 0x0200; /* set TINT */2364 if (!CSR_DXSUFLO(p Data)) /* stop on xmit underflow */2365 p Data->aCSR[0] &= ~0x0010; /* clear TXON */2366 pcnetTmdStorePassHost(p Data, &tmd, GCPhysPrevTmd);2363 pThis->aCSR[0] |= 0x0200; /* set TINT */ 2364 if (!CSR_DXSUFLO(pThis)) /* stop on xmit underflow */ 2365 pThis->aCSR[0] &= ~0x0010; /* clear TXON */ 2366 pcnetTmdStorePassHost(pThis, &tmd, GCPhysPrevTmd); 2367 2367 AssertMsgFailed(("pcnetTransmit: Underflow!!!\n")); 2368 2368 break; … … 2370 2370 2371 2371 /* release & save the previous tmd, pass it to the host */ 2372 pcnetTmdStorePassHost(p Data, &tmd, GCPhysPrevTmd);2372 pcnetTmdStorePassHost(pThis, &tmd, GCPhysPrevTmd); 2373 2373 2374 2374 /* … … 2378 2378 cBuffers++; 2379 2379 #endif 2380 pcnetTmdLoad(p Data, &tmd, PHYSADDR(pData, CSR_CXDA(pData)), false);2380 pcnetTmdLoad(pThis, &tmd, PHYSADDR(pThis, CSR_CXDA(pThis)), false); 2381 2381 cb = 4096 - tmd.tmd1.bcnt; 2382 if ( p Data->cbSendFrame + cb < MAX_FRAME2382 if ( pThis->cbSendFrame + cb < MAX_FRAME 2383 2383 && !fDropFrame) 2384 pcnetXmitReadMore(p Data, PHYSADDR(pData, tmd.tmd0.tbadr), cb);2384 pcnetXmitReadMore(pThis, PHYSADDR(pThis, tmd.tmd0.tbadr), cb); 2385 2385 else 2386 2386 { 2387 2387 AssertMsg(fDropFrame, ("pcnetTransmit: Frame is too big!!! %d bytes\n", 2388 p Data->cbSendFrame + cb));2388 pThis->cbSendFrame + cb)); 2389 2389 fDropFrame = true; 2390 2390 } … … 2392 2392 { 2393 2393 Log(("#%d pcnetTransmit: stp: cb=%d xmtrc=%#x-%#x\n", PCNET_INST_NR, 2394 p Data->cbSendFrame, iStart, CSR_XMTRC(pData)));2395 if (pcnetIsLinkUp(p Data) && !fDropFrame)2394 pThis->cbSendFrame, iStart, CSR_XMTRC(pThis))); 2395 if (pcnetIsLinkUp(pThis) && !fDropFrame) 2396 2396 { 2397 int rc = pcnetXmitCompleteFrame(p Data);2397 int rc = pcnetXmitCompleteFrame(pThis); 2398 2398 AssertRCReturn(rc, rc); 2399 2399 } 2400 else if (CSR_LOOP(p Data) && !fDropFrame)2401 pcnetXmitLoopbackFrame(p Data);2400 else if (CSR_LOOP(pThis) && !fDropFrame) 2401 pcnetXmitLoopbackFrame(pThis); 2402 2402 else 2403 2403 { 2404 2404 if (!fDropFrame) 2405 pcnetXmitFailTMDLinkDown(p Data, &tmd);2406 pcnetXmitScrapFrame(p Data);2405 pcnetXmitFailTMDLinkDown(pThis, &tmd); 2406 pcnetXmitScrapFrame(pThis); 2407 2407 } 2408 2408 2409 2409 /* Write back the TMD, pass it to the host */ 2410 pcnetTmdStorePassHost(p Data, &tmd, PHYSADDR(pData, CSR_CXDA(pData)));2410 pcnetTmdStorePassHost(pThis, &tmd, PHYSADDR(pThis, CSR_CXDA(pThis))); 2411 2411 2412 2412 /* advance the ring counter register */ 2413 if (CSR_XMTRC(p Data) < 2)2414 CSR_XMTRC(p Data) = CSR_XMTRL(pData);2413 if (CSR_XMTRC(pThis) < 2) 2414 CSR_XMTRC(pThis) = CSR_XMTRL(pThis); 2415 2415 else 2416 CSR_XMTRC(p Data)--;2416 CSR_XMTRC(pThis)--; 2417 2417 break; 2418 2418 } … … 2430 2430 } 2431 2431 /* Update TDMD, TXSTRT and TINT. */ 2432 p Data->aCSR[0] &= ~0x0008; /* clear TDMD */2433 2434 p Data->aCSR[4] |= 0x0008; /* set TXSTRT */2435 if ( !CSR_TOKINTD(p Data) /* Transmit OK Interrupt Disable, no infl. on errors. */2436 || (CSR_LTINTEN(p Data) && tmd.tmd1.ltint)2432 pThis->aCSR[0] &= ~0x0008; /* clear TDMD */ 2433 2434 pThis->aCSR[4] |= 0x0008; /* set TXSTRT */ 2435 if ( !CSR_TOKINTD(pThis) /* Transmit OK Interrupt Disable, no infl. on errors. */ 2436 || (CSR_LTINTEN(pThis) && tmd.tmd1.ltint) 2437 2437 || tmd.tmd1.err) 2438 2438 { … … 2442 2442 /** @todo should we continue after an error (tmd.tmd1.err) or not? */ 2443 2443 2444 STAM_COUNTER_INC(&p Data->aStatXmitChainCounts[RT_MIN(cBuffers,2445 RT_ELEMENTS(p Data->aStatXmitChainCounts)) - 1]);2446 } while (CSR_TXON(p Data)); /* transfer on */2444 STAM_COUNTER_INC(&pThis->aStatXmitChainCounts[RT_MIN(cBuffers, 2445 RT_ELEMENTS(pThis->aStatXmitChainCounts)) - 1]); 2446 } while (CSR_TXON(pThis)); /* transfer on */ 2447 2447 2448 2448 if (cFlushIrq) 2449 2449 { 2450 STAM_COUNTER_INC(&p Data->aStatXmitFlush[RT_MIN(cFlushIrq, RT_ELEMENTS(pData->aStatXmitFlush)) - 1]);2451 p Data->aCSR[0] |= 0x0200; /* set TINT */2452 pcnetUpdateIrq(p Data);2453 } 2454 2455 STAM_PROFILE_ADV_STOP(&p Data->StatTransmit, a);2450 STAM_COUNTER_INC(&pThis->aStatXmitFlush[RT_MIN(cFlushIrq, RT_ELEMENTS(pThis->aStatXmitFlush)) - 1]); 2451 pThis->aCSR[0] |= 0x0200; /* set TINT */ 2452 pcnetUpdateIrq(pThis); 2453 } 2454 2455 STAM_PROFILE_ADV_STOP(&pThis->StatTransmit, a); 2456 2456 2457 2457 return VINF_SUCCESS; … … 2468 2468 static DECLCALLBACK(int) pcnetAsyncSendThread(PPDMDEVINS pDevIns, PPDMTHREAD pThread) 2469 2469 { 2470 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);2470 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 2471 2471 2472 2472 /* … … 2493 2493 * to leave the running state. 2494 2494 */ 2495 int rc = RTSemEventWait(p Data->hSendEventSem, RT_INDEFINITE_WAIT);2495 int rc = RTSemEventWait(pThis->hSendEventSem, RT_INDEFINITE_WAIT); 2496 2496 AssertRCReturn(rc, rc); 2497 2497 if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING)) … … 2502 2502 * suspended while waiting for the critical section. 2503 2503 */ 2504 rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);2504 rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 2505 2505 AssertReleaseRCReturn(rc, rc); 2506 2506 2507 2507 if (pThread->enmState == PDMTHREADSTATE_RUNNING) 2508 2508 { 2509 rc = pcnetAsyncTransmit(p Data);2509 rc = pcnetAsyncTransmit(pThis); 2510 2510 AssertReleaseRC(rc); 2511 2511 } 2512 2512 2513 PDMCritSectLeave(&p Data->CritSect);2513 PDMCritSectLeave(&pThis->CritSect); 2514 2514 } 2515 2515 … … 2528 2528 static DECLCALLBACK(int) pcnetAsyncSendThreadWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread) 2529 2529 { 2530 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);2531 return RTSemEventSignal(p Data->hSendEventSem);2530 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 2531 return RTSemEventSignal(pThis->hSendEventSem); 2532 2532 } 2533 2533 … … 2537 2537 * Poll for changes in RX and TX descriptor rings. 2538 2538 */ 2539 static void pcnetPollRxTx(PCNetState *p Data)2540 { 2541 if (CSR_RXON(p Data))2542 if (HOST_IS_OWNER(CSR_CRST(p Data))) /* Only poll RDTEs if none available */2543 pcnetRdtePoll(p Data);2544 2545 if (CSR_TDMD(p Data) || (CSR_TXON(pData) && !CSR_DPOLL(pData)))2546 pcnetTransmit(p Data);2539 static void pcnetPollRxTx(PCNetState *pThis) 2540 { 2541 if (CSR_RXON(pThis)) 2542 if (HOST_IS_OWNER(CSR_CRST(pThis))) /* Only poll RDTEs if none available */ 2543 pcnetRdtePoll(pThis); 2544 2545 if (CSR_TDMD(pThis) || (CSR_TXON(pThis) && !CSR_DPOLL(pThis))) 2546 pcnetTransmit(pThis); 2547 2547 } 2548 2548 … … 2553 2553 * @thread EMT, TAP. 2554 2554 */ 2555 static void pcnetPollTimerStart(PCNetState *p Data)2556 { 2557 TMTimerSetMillies(p Data->CTX_SUFF(pTimerPoll), 2);2555 static void pcnetPollTimerStart(PCNetState *pThis) 2556 { 2557 TMTimerSetMillies(pThis->CTX_SUFF(pTimerPoll), 2); 2558 2558 } 2559 2559 … … 2563 2563 * @thread EMT. 2564 2564 */ 2565 static void pcnetPollTimer(PCNetState *p Data)2566 { 2567 STAM_PROFILE_ADV_START(&p Data->StatPollTimer, a);2565 static void pcnetPollTimer(PCNetState *pThis) 2566 { 2567 STAM_PROFILE_ADV_START(&pThis->StatPollTimer, a); 2568 2568 2569 2569 #ifdef LOG_ENABLED 2570 2570 TMD dummy; 2571 if (CSR_STOP(p Data) || CSR_SPND(pData))2571 if (CSR_STOP(pThis) || CSR_SPND(pThis)) 2572 2572 Log2(("#%d pcnetPollTimer time=%#010llx CSR_STOP=%d CSR_SPND=%d\n", 2573 PCNET_INST_NR, RTTimeMilliTS(), CSR_STOP(p Data), CSR_SPND(pData)));2573 PCNET_INST_NR, RTTimeMilliTS(), CSR_STOP(pThis), CSR_SPND(pThis))); 2574 2574 else 2575 2575 Log2(("#%d pcnetPollTimer time=%#010llx TDMD=%d TXON=%d POLL=%d TDTE=%d TDRA=%#x\n", 2576 PCNET_INST_NR, RTTimeMilliTS(), CSR_TDMD(p Data), CSR_TXON(pData),2577 !CSR_DPOLL(p Data), pcnetTdtePoll(pData, &dummy), pData->GCTDRA));2576 PCNET_INST_NR, RTTimeMilliTS(), CSR_TDMD(pThis), CSR_TXON(pThis), 2577 !CSR_DPOLL(pThis), pcnetTdtePoll(pThis, &dummy), pThis->GCTDRA)); 2578 2578 Log2(("#%d pcnetPollTimer: CSR_CXDA=%#x CSR_XMTRL=%d CSR_XMTRC=%d\n", 2579 PCNET_INST_NR, CSR_CXDA(p Data), CSR_XMTRL(pData), CSR_XMTRC(pData)));2579 PCNET_INST_NR, CSR_CXDA(pThis), CSR_XMTRL(pThis), CSR_XMTRC(pThis))); 2580 2580 #endif 2581 2581 #ifdef PCNET_DEBUG_TMD 2582 if (CSR_CXDA(p Data))2582 if (CSR_CXDA(pThis)) 2583 2583 { 2584 2584 TMD tmd; 2585 pcnetTmdLoad(p Data, &tmd, PHYSADDR(pData, CSR_CXDA(pData)), false);2586 Log2(("#%d pcnetPollTimer: TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(p Data, CSR_CXDA(pData))));2585 pcnetTmdLoad(pThis, &tmd, PHYSADDR(pThis, CSR_CXDA(pThis)), false); 2586 Log2(("#%d pcnetPollTimer: TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(pThis, CSR_CXDA(pThis)))); 2587 2587 PRINT_TMD(&tmd); 2588 2588 } 2589 2589 #endif 2590 if (CSR_TDMD(p Data))2591 pcnetTransmit(p Data);2592 2593 pcnetUpdateIrq(p Data);2590 if (CSR_TDMD(pThis)) 2591 pcnetTransmit(pThis); 2592 2593 pcnetUpdateIrq(pThis); 2594 2594 2595 2595 /* If the receive thread is waiting for new descriptors, poll TX/RX even if polling 2596 2596 * disabled. We wouldn't need to poll for new TX descriptors in that case but it will 2597 2597 * not hurt as waiting for RX descriptors should occur very seldom */ 2598 if (RT_LIKELY( !CSR_STOP(p Data)2599 && !CSR_SPND(p Data)2600 && ( !CSR_DPOLL(p Data)2601 || p Data->fMaybeOutOfSpace)))2598 if (RT_LIKELY( !CSR_STOP(pThis) 2599 && !CSR_SPND(pThis) 2600 && ( !CSR_DPOLL(pThis) 2601 || pThis->fMaybeOutOfSpace))) 2602 2602 { 2603 2603 /* We ensure that we poll at least every 2ms (500Hz) but not more often than … … 2608 2608 * interval is the default polling interval of the PCNet card (65536/33MHz). */ 2609 2609 #ifdef PCNET_NO_POLLING 2610 pcnetPollRxTx(p Data);2610 pcnetPollRxTx(pThis); 2611 2611 #else 2612 uint64_t u64Now = TMTimerGet(p Data->CTX_SUFF(pTimerPoll));2613 if (RT_UNLIKELY(u64Now - p Data->u64LastPoll > 200000))2612 uint64_t u64Now = TMTimerGet(pThis->CTX_SUFF(pTimerPoll)); 2613 if (RT_UNLIKELY(u64Now - pThis->u64LastPoll > 200000)) 2614 2614 { 2615 p Data->u64LastPoll = u64Now;2616 pcnetPollRxTx(p Data);2615 pThis->u64LastPoll = u64Now; 2616 pcnetPollRxTx(pThis); 2617 2617 } 2618 if (!TMTimerIsActive(p Data->CTX_SUFF(pTimerPoll)))2619 pcnetPollTimerStart(p Data);2620 #endif 2621 } 2622 STAM_PROFILE_ADV_STOP(&p Data->StatPollTimer, a);2623 } 2624 2625 2626 static int pcnetCSRWriteU16(PCNetState *p Data, uint32_t u32RAP, uint32_t val)2618 if (!TMTimerIsActive(pThis->CTX_SUFF(pTimerPoll))) 2619 pcnetPollTimerStart(pThis); 2620 #endif 2621 } 2622 STAM_PROFILE_ADV_STOP(&pThis->StatPollTimer, a); 2623 } 2624 2625 2626 static int pcnetCSRWriteU16(PCNetState *pThis, uint32_t u32RAP, uint32_t val) 2627 2627 { 2628 2628 int rc = VINF_SUCCESS; … … 2634 2634 case 0: 2635 2635 { 2636 uint16_t csr0 = p Data->aCSR[0];2636 uint16_t csr0 = pThis->aCSR[0]; 2637 2637 /* Clear any interrupt flags. 2638 2638 * Don't clear an interrupt flag which was not seen by the guest yet. */ 2639 csr0 &= ~(val & 0x7f00 & p Data->u16CSR0LastSeenByGuest);2639 csr0 &= ~(val & 0x7f00 & pThis->u16CSR0LastSeenByGuest); 2640 2640 csr0 = (csr0 & ~0x0040) | (val & 0x0048); 2641 2641 val = (val & 0x007f) | (csr0 & 0x7f00); … … 2645 2645 val &= ~3; 2646 2646 2647 Log(("#%d CSR0: old=%#06x new=%#06x\n", PCNET_INST_NR, p Data->aCSR[0], csr0));2647 Log(("#%d CSR0: old=%#06x new=%#06x\n", PCNET_INST_NR, pThis->aCSR[0], csr0)); 2648 2648 2649 2649 #ifndef IN_RING3 … … 2654 2654 } 2655 2655 #endif 2656 p Data->aCSR[0] = csr0;2657 2658 if (!CSR_STOP(p Data) && (val & 4))2659 pcnetStop(p Data);2656 pThis->aCSR[0] = csr0; 2657 2658 if (!CSR_STOP(pThis) && (val & 4)) 2659 pcnetStop(pThis); 2660 2660 2661 2661 #ifdef IN_RING3 2662 if (!CSR_INIT(p Data) && (val & 1))2663 pcnetInit(p Data);2664 #endif 2665 2666 if (!CSR_STRT(p Data) && (val & 2))2667 pcnetStart(p Data);2668 2669 if (CSR_TDMD(p Data))2670 pcnetTransmit(p Data);2662 if (!CSR_INIT(pThis) && (val & 1)) 2663 pcnetInit(pThis); 2664 #endif 2665 2666 if (!CSR_STRT(pThis) && (val & 2)) 2667 pcnetStart(pThis); 2668 2669 if (CSR_TDMD(pThis)) 2670 pcnetTransmit(pThis); 2671 2671 2672 2672 return rc; … … 2710 2710 case 74: /* XMTRC */ 2711 2711 case 112: /* MISSC */ 2712 if (CSR_STOP(p Data) || CSR_SPND(pData))2712 if (CSR_STOP(pThis) || CSR_SPND(pThis)) 2713 2713 break; 2714 2714 case 3: /* Interrupt Mask and Deferral Control */ 2715 2715 break; 2716 2716 case 4: /* Test and Features Control */ 2717 p Data->aCSR[4] &= ~(val & 0x026a);2717 pThis->aCSR[4] &= ~(val & 0x026a); 2718 2718 val &= ~0x026a; 2719 val |= p Data->aCSR[4] & 0x026a;2719 val |= pThis->aCSR[4] & 0x026a; 2720 2720 break; 2721 2721 case 5: /* Extended Control and Interrupt 1 */ 2722 p Data->aCSR[5] &= ~(val & 0x0a90);2722 pThis->aCSR[5] &= ~(val & 0x0a90); 2723 2723 val &= ~0x0a90; 2724 val |= p Data->aCSR[5] & 0x0a90;2724 val |= pThis->aCSR[5] & 0x0a90; 2725 2725 break; 2726 2726 case 7: /* Extended Control and Interrupt 2 */ 2727 2727 { 2728 uint16_t csr7 = p Data->aCSR[7];2728 uint16_t csr7 = pThis->aCSR[7]; 2729 2729 csr7 &= ~0x0400 ; 2730 2730 csr7 &= ~(val & 0x0800); 2731 2731 csr7 |= (val & 0x0400); 2732 p Data->aCSR[7] = csr7;2732 pThis->aCSR[7] = csr7; 2733 2733 return rc; 2734 2734 } 2735 2735 case 15: /* Mode */ 2736 if ((p Data->aCSR[15] & 0x8000) != (val & 0x8000) && pData->pDrv)2736 if ((pThis->aCSR[15] & 0x8000) != (val & 0x8000) && pThis->pDrv) 2737 2737 { 2738 2738 Log(("#%d: promiscuous mode changed to %d\n", PCNET_INST_NR, !!(val & 0x8000))); … … 2741 2741 #else 2742 2742 /* check for promiscuous mode change */ 2743 if (p Data->pDrv)2744 p Data->pDrv->pfnSetPromiscuousMode(pData->pDrv, !!(val & 0x8000));2743 if (pThis->pDrv) 2744 pThis->pDrv->pfnSetPromiscuousMode(pThis->pDrv, !!(val & 0x8000)); 2745 2745 #endif 2746 2746 } 2747 2747 break; 2748 2748 case 16: /* IADRL */ 2749 return pcnetCSRWriteU16(p Data, 1, val);2749 return pcnetCSRWriteU16(pThis, 1, val); 2750 2750 case 17: /* IADRH */ 2751 return pcnetCSRWriteU16(p Data, 2, val);2751 return pcnetCSRWriteU16(pThis, 2, val); 2752 2752 2753 2753 /* … … 2757 2757 case 24: /* BADRL */ 2758 2758 case 25: /* BADRU */ 2759 if (!CSR_STOP(p Data) && !CSR_SPND(pData))2759 if (!CSR_STOP(pThis) && !CSR_SPND(pThis)) 2760 2760 { 2761 2761 Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val)); … … 2763 2763 } 2764 2764 if (u32RAP == 24) 2765 p Data->GCRDRA = (pData->GCRDRA & 0xffff0000) | (val & 0x0000ffff);2765 pThis->GCRDRA = (pThis->GCRDRA & 0xffff0000) | (val & 0x0000ffff); 2766 2766 else 2767 p Data->GCRDRA = (pData->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);2768 Log(("#%d: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", PCNET_INST_NR, u32RAP, val, p Data->GCRDRA));2767 pThis->GCRDRA = (pThis->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); 2768 Log(("#%d: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", PCNET_INST_NR, u32RAP, val, pThis->GCRDRA)); 2769 2769 break; 2770 2770 … … 2775 2775 case 30: /* BADXL */ 2776 2776 case 31: /* BADXU */ 2777 if (!CSR_STOP(p Data) && !CSR_SPND(pData))2777 if (!CSR_STOP(pThis) && !CSR_SPND(pThis)) 2778 2778 { 2779 2779 Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val)); … … 2781 2781 } 2782 2782 if (u32RAP == 30) 2783 p Data->GCTDRA = (pData->GCTDRA & 0xffff0000) | (val & 0x0000ffff);2783 pThis->GCTDRA = (pThis->GCTDRA & 0xffff0000) | (val & 0x0000ffff); 2784 2784 else 2785 p Data->GCTDRA = (pData->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);2786 Log(("#%d: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", PCNET_INST_NR, u32RAP, val, p Data->GCTDRA));2785 pThis->GCTDRA = (pThis->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); 2786 Log(("#%d: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", PCNET_INST_NR, u32RAP, val, pThis->GCTDRA)); 2787 2787 break; 2788 2788 2789 2789 case 58: /* Software Style */ 2790 rc = pcnetBCRWriteU16(p Data, BCR_SWS, val);2790 rc = pcnetBCRWriteU16(pThis, BCR_SWS, val); 2791 2791 break; 2792 2792 … … 2799 2799 case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */ 2800 2800 /** @todo transmit ring length is stored in two's complement! */ 2801 if (!CSR_STOP(p Data) && !CSR_SPND(pData))2801 if (!CSR_STOP(pThis) && !CSR_SPND(pThis)) 2802 2802 { 2803 2803 Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val)); … … 2811 2811 * HACK ALERT! Set the counter registers too. 2812 2812 */ 2813 p Data->aCSR[u32RAP - 4] = val;2813 pThis->aCSR[u32RAP - 4] = val; 2814 2814 break; 2815 2815 … … 2817 2817 return rc; 2818 2818 } 2819 p Data->aCSR[u32RAP] = val;2819 pThis->aCSR[u32RAP] = val; 2820 2820 return rc; 2821 2821 } … … 2836 2836 } 2837 2837 2838 static uint32_t pcnetCSRReadU16(PCNetState *p Data, uint32_t u32RAP)2838 static uint32_t pcnetCSRReadU16(PCNetState *pThis, uint32_t u32RAP) 2839 2839 { 2840 2840 uint32_t val; … … 2842 2842 { 2843 2843 case 0: 2844 pcnetUpdateIrq(p Data);2845 val = p Data->aCSR[0];2844 pcnetUpdateIrq(pThis); 2845 val = pThis->aCSR[0]; 2846 2846 val |= (val & 0x7800) ? 0x8000 : 0; 2847 p Data->u16CSR0LastSeenByGuest = val;2847 pThis->u16CSR0LastSeenByGuest = val; 2848 2848 break; 2849 2849 case 16: 2850 return pcnetCSRReadU16(p Data, 1);2850 return pcnetCSRReadU16(pThis, 1); 2851 2851 case 17: 2852 return pcnetCSRReadU16(p Data, 2);2852 return pcnetCSRReadU16(pThis, 2); 2853 2853 case 58: 2854 return pcnetBCRReadU16(p Data, BCR_SWS);2854 return pcnetBCRReadU16(pThis, BCR_SWS); 2855 2855 case 68: /* Custom register to pass link speed to driver */ 2856 return pcnetLinkSpd(p Data->u32LinkSpeed);2856 return pcnetLinkSpd(pThis->u32LinkSpeed); 2857 2857 case 88: 2858 val = p Data->aCSR[89];2858 val = pThis->aCSR[89]; 2859 2859 val <<= 16; 2860 val |= p Data->aCSR[88];2860 val |= pThis->aCSR[88]; 2861 2861 break; 2862 2862 default: 2863 val = p Data->aCSR[u32RAP];2863 val = pThis->aCSR[u32RAP]; 2864 2864 } 2865 2865 #ifdef PCNET_DEBUG_CSR … … 2869 2869 } 2870 2870 2871 static int pcnetBCRWriteU16(PCNetState *p Data, uint32_t u32RAP, uint32_t val)2871 static int pcnetBCRWriteU16(PCNetState *pThis, uint32_t u32RAP, uint32_t val) 2872 2872 { 2873 2873 int rc = VINF_SUCCESS; … … 2879 2879 { 2880 2880 case BCR_SWS: 2881 if (!(CSR_STOP(p Data) || CSR_SPND(pData)))2881 if (!(CSR_STOP(pThis) || CSR_SPND(pThis))) 2882 2882 return rc; 2883 2883 val &= ~0x0300; … … 2889 2889 case 0: 2890 2890 val |= 0x0200; /* 16 bit */ 2891 p Data->iLog2DescSize = 3;2892 p Data->GCUpperPhys = (0xff00 & (uint32_t)pData->aCSR[2]) << 16;2891 pThis->iLog2DescSize = 3; 2892 pThis->GCUpperPhys = (0xff00 & (uint32_t)pThis->aCSR[2]) << 16; 2893 2893 break; 2894 2894 case 1: 2895 2895 val |= 0x0100; /* 32 bit */ 2896 p Data->iLog2DescSize = 4;2897 p Data->GCUpperPhys = 0;2896 pThis->iLog2DescSize = 4; 2897 pThis->GCUpperPhys = 0; 2898 2898 break; 2899 2899 case 2: 2900 2900 case 3: 2901 2901 val |= 0x0300; /* 32 bit */ 2902 p Data->iLog2DescSize = 4;2903 p Data->GCUpperPhys = 0;2902 pThis->iLog2DescSize = 4; 2903 pThis->GCUpperPhys = 0; 2904 2904 break; 2905 2905 } 2906 2906 Log(("#%d BCR_SWS=%#06x\n", PCNET_INST_NR, val)); 2907 p Data->aCSR[58] = val;2907 pThis->aCSR[58] = val; 2908 2908 /* fall through */ 2909 2909 case BCR_LNKST: … … 2918 2918 case BCR_MIICAS: 2919 2919 case BCR_MIIADDR: 2920 p Data->aBCR[u32RAP] = val;2920 pThis->aBCR[u32RAP] = val; 2921 2921 break; 2922 2922 2923 2923 case BCR_STVAL: 2924 2924 val &= 0xffff; 2925 p Data->aBCR[BCR_STVAL] = val;2926 if (p Data->fAm79C973)2927 TMTimerSetNano(p Data->CTX_SUFF(pTimerSoftInt), 12800U * val);2925 pThis->aBCR[BCR_STVAL] = val; 2926 if (pThis->fAm79C973) 2927 TMTimerSetNano(pThis->CTX_SUFF(pTimerSoftInt), 12800U * val); 2928 2928 break; 2929 2929 2930 2930 case BCR_MIIMDR: 2931 p Data->aMII[pData->aBCR[BCR_MIIADDR] & 0x1f] = val;2931 pThis->aMII[pThis->aBCR[BCR_MIIADDR] & 0x1f] = val; 2932 2932 #ifdef PCNET_DEBUG_MII 2933 Log(("#%d pcnet: mii write %d <- %#x\n", PCNET_INST_NR, p Data->aBCR[BCR_MIIADDR] & 0x1f, val));2933 Log(("#%d pcnet: mii write %d <- %#x\n", PCNET_INST_NR, pThis->aBCR[BCR_MIIADDR] & 0x1f, val)); 2934 2934 #endif 2935 2935 break; … … 2941 2941 } 2942 2942 2943 static uint32_t pcnetMIIReadU16(PCNetState *p Data, uint32_t miiaddr)2943 static uint32_t pcnetMIIReadU16(PCNetState *pThis, uint32_t miiaddr) 2944 2944 { 2945 2945 uint32_t val; 2946 2946 bool autoneg, duplex, fast; 2947 STAM_COUNTER_INC(&p Data->StatMIIReads);2948 2949 autoneg = (p Data->aBCR[BCR_MIICAS] & 0x20) != 0;2950 duplex = (p Data->aBCR[BCR_MIICAS] & 0x10) != 0;2951 fast = (p Data->aBCR[BCR_MIICAS] & 0x08) != 0;2947 STAM_COUNTER_INC(&pThis->StatMIIReads); 2948 2949 autoneg = (pThis->aBCR[BCR_MIICAS] & 0x20) != 0; 2950 duplex = (pThis->aBCR[BCR_MIICAS] & 0x10) != 0; 2951 fast = (pThis->aBCR[BCR_MIICAS] & 0x08) != 0; 2952 2952 2953 2953 switch (miiaddr) … … 2972 2972 | 0x0004 /* Link up. */ 2973 2973 | 0x0001; /* Extended Capability, i.e. registers 4+ valid. */ 2974 if (!p Data->fLinkUp || pData->fLinkTempDown) {2974 if (!pThis->fLinkUp || pThis->fLinkTempDown) { 2975 2975 val &= ~(0x0020 | 0x0004); 2976 p Data->cLinkDownReported++;2976 pThis->cLinkDownReported++; 2977 2977 } 2978 2978 if (!autoneg) { … … 3018 3018 case 5: 3019 3019 /* Link partner ability register. */ 3020 if (p Data->fLinkUp && !pData->fLinkTempDown)3020 if (pThis->fLinkUp && !pThis->fLinkTempDown) 3021 3021 val = 0x8000 /* Next page bit. */ 3022 3022 | 0x4000 /* Link partner acked us. */ … … 3027 3027 { 3028 3028 val = 0; 3029 p Data->cLinkDownReported++;3029 pThis->cLinkDownReported++; 3030 3030 } 3031 3031 break; … … 3033 3033 case 6: 3034 3034 /* Auto negotiation expansion register. */ 3035 if (p Data->fLinkUp && !pData->fLinkTempDown)3035 if (pThis->fLinkUp && !pThis->fLinkTempDown) 3036 3036 val = 0x0008 /* Link partner supports npage. */ 3037 3037 | 0x0004 /* Enable npage words. */ … … 3040 3040 { 3041 3041 val = 0; 3042 p Data->cLinkDownReported++;3042 pThis->cLinkDownReported++; 3043 3043 } 3044 3044 break; … … 3055 3055 } 3056 3056 3057 static uint32_t pcnetBCRReadU16(PCNetState *p Data, uint32_t u32RAP)3057 static uint32_t pcnetBCRReadU16(PCNetState *pThis, uint32_t u32RAP) 3058 3058 { 3059 3059 uint32_t val; … … 3065 3065 case BCR_LED2: 3066 3066 case BCR_LED3: 3067 val = p Data->aBCR[u32RAP] & ~0x8000;3067 val = pThis->aBCR[u32RAP] & ~0x8000; 3068 3068 /* Clear LNKSTE if we're not connected or if we've just loaded a VM state. */ 3069 if (!p Data->pDrv || pData->fLinkTempDown || !pData->fLinkUp)3069 if (!pThis->pDrv || pThis->fLinkTempDown || !pThis->fLinkUp) 3070 3070 { 3071 3071 if (u32RAP == 4) 3072 p Data->cLinkDownReported++;3072 pThis->cLinkDownReported++; 3073 3073 val &= ~0x40; 3074 3074 } 3075 val |= (val & 0x017f & p Data->u32Lnkst) ? 0x8000 : 0;3075 val |= (val & 0x017f & pThis->u32Lnkst) ? 0x8000 : 0; 3076 3076 break; 3077 3077 3078 3078 case BCR_MIIMDR: 3079 if (p Data->fAm79C973 && (pData->aBCR[BCR_MIIADDR] >> 5 & 0x1f) == 0)3079 if (pThis->fAm79C973 && (pThis->aBCR[BCR_MIIADDR] >> 5 & 0x1f) == 0) 3080 3080 { 3081 uint32_t miiaddr = p Data->aBCR[BCR_MIIADDR] & 0x1f;3082 val = pcnetMIIReadU16(p Data, miiaddr);3081 uint32_t miiaddr = pThis->aBCR[BCR_MIIADDR] & 0x1f; 3082 val = pcnetMIIReadU16(pThis, miiaddr); 3083 3083 } 3084 3084 else … … 3087 3087 3088 3088 default: 3089 val = u32RAP < BCR_MAX_RAP ? p Data->aBCR[u32RAP] : 0;3089 val = u32RAP < BCR_MAX_RAP ? pThis->aBCR[u32RAP] : 0; 3090 3090 break; 3091 3091 } … … 3097 3097 3098 3098 #ifdef IN_RING3 /* move down */ 3099 static void pcnetHardReset(PCNetState *p Data)3099 static void pcnetHardReset(PCNetState *pThis) 3100 3100 { 3101 3101 int i; … … 3103 3103 3104 3104 /* Initialize the PROM */ 3105 Assert(sizeof(p Data->MacConfigured) == 6);3106 memcpy(p Data->aPROM, &pData->MacConfigured, sizeof(pData->MacConfigured));3107 p Data->aPROM[ 8] = 0x00;3108 p Data->aPROM[ 9] = 0x11;3109 p Data->aPROM[12] = pData->aPROM[13] = 0x00;3110 p Data->aPROM[14] = pData->aPROM[15] = 0x57;3105 Assert(sizeof(pThis->MacConfigured) == 6); 3106 memcpy(pThis->aPROM, &pThis->MacConfigured, sizeof(pThis->MacConfigured)); 3107 pThis->aPROM[ 8] = 0x00; 3108 pThis->aPROM[ 9] = 0x11; 3109 pThis->aPROM[12] = pThis->aPROM[13] = 0x00; 3110 pThis->aPROM[14] = pThis->aPROM[15] = 0x57; 3111 3111 3112 3112 for (i = 0, checksum = 0; i < 16; i++) 3113 checksum += p Data->aPROM[i];3114 *(uint16_t *)&p Data->aPROM[12] = RT_H2LE_U16(checksum);3115 3116 p Data->aBCR[BCR_MSRDA] = 0x0005;3117 p Data->aBCR[BCR_MSWRA] = 0x0005;3118 p Data->aBCR[BCR_MC ] = 0x0002;3119 p Data->aBCR[BCR_LNKST] = 0x00c0;3120 p Data->aBCR[BCR_LED1 ] = 0x0084;3121 p Data->aBCR[BCR_LED2 ] = 0x0088;3122 p Data->aBCR[BCR_LED3 ] = 0x0090;3123 p Data->aBCR[BCR_FDC ] = 0x0000;3124 p Data->aBCR[BCR_BSBC ] = 0x9001;3125 p Data->aBCR[BCR_EECAS] = 0x0002;3126 p Data->aBCR[BCR_STVAL] = 0xffff;3127 p Data->aCSR[58 ] = /* CSR58 is an alias for BCR20 */3128 p Data->aBCR[BCR_SWS ] = 0x0200;3129 p Data->iLog2DescSize = 3;3130 p Data->aBCR[BCR_PLAT ] = 0xff06;3131 p Data->aBCR[BCR_MIIADDR ] = 0; /* Internal PHY on Am79C973 would be (0x1e << 5) */3132 p Data->aBCR[BCR_PCIVID] = PCIDevGetVendorId(&pData->PciDev);3133 p Data->aBCR[BCR_PCISID] = PCIDevGetSubSystemId(&pData->PciDev);3134 p Data->aBCR[BCR_PCISVID] = PCIDevGetSubSystemVendorId(&pData->PciDev);3135 3136 pcnetSoftReset(p Data);3113 checksum += pThis->aPROM[i]; 3114 *(uint16_t *)&pThis->aPROM[12] = RT_H2LE_U16(checksum); 3115 3116 pThis->aBCR[BCR_MSRDA] = 0x0005; 3117 pThis->aBCR[BCR_MSWRA] = 0x0005; 3118 pThis->aBCR[BCR_MC ] = 0x0002; 3119 pThis->aBCR[BCR_LNKST] = 0x00c0; 3120 pThis->aBCR[BCR_LED1 ] = 0x0084; 3121 pThis->aBCR[BCR_LED2 ] = 0x0088; 3122 pThis->aBCR[BCR_LED3 ] = 0x0090; 3123 pThis->aBCR[BCR_FDC ] = 0x0000; 3124 pThis->aBCR[BCR_BSBC ] = 0x9001; 3125 pThis->aBCR[BCR_EECAS] = 0x0002; 3126 pThis->aBCR[BCR_STVAL] = 0xffff; 3127 pThis->aCSR[58 ] = /* CSR58 is an alias for BCR20 */ 3128 pThis->aBCR[BCR_SWS ] = 0x0200; 3129 pThis->iLog2DescSize = 3; 3130 pThis->aBCR[BCR_PLAT ] = 0xff06; 3131 pThis->aBCR[BCR_MIIADDR ] = 0; /* Internal PHY on Am79C973 would be (0x1e << 5) */ 3132 pThis->aBCR[BCR_PCIVID] = PCIDevGetVendorId(&pThis->PciDev); 3133 pThis->aBCR[BCR_PCISID] = PCIDevGetSubSystemId(&pThis->PciDev); 3134 pThis->aBCR[BCR_PCISVID] = PCIDevGetSubSystemVendorId(&pThis->PciDev); 3135 3136 pcnetSoftReset(pThis); 3137 3137 } 3138 3138 #endif /* IN_RING3 */ 3139 3139 3140 static void pcnetAPROMWriteU8(PCNetState *p Data, uint32_t addr, uint32_t val)3140 static void pcnetAPROMWriteU8(PCNetState *pThis, uint32_t addr, uint32_t val) 3141 3141 { 3142 3142 addr &= 0x0f; … … 3144 3144 Log(("#%d pcnetAPROMWriteU8: addr=%#010x val=%#04x\n", PCNET_INST_NR, addr, val)); 3145 3145 /* Check APROMWE bit to enable write access */ 3146 if (pcnetBCRReadU16(p Data, 2) & 0x80)3147 p Data->aPROM[addr] = val;3148 } 3149 3150 static uint32_t pcnetAPROMReadU8(PCNetState *p Data, uint32_t addr)3151 { 3152 uint32_t val = p Data->aPROM[addr &= 0x0f];3146 if (pcnetBCRReadU16(pThis, 2) & 0x80) 3147 pThis->aPROM[addr] = val; 3148 } 3149 3150 static uint32_t pcnetAPROMReadU8(PCNetState *pThis, uint32_t addr) 3151 { 3152 uint32_t val = pThis->aPROM[addr &= 0x0f]; 3153 3153 Log(("#%d pcnetAPROMReadU8: addr=%#010x val=%#04x\n", PCNET_INST_NR, addr, val)); 3154 3154 return val; 3155 3155 } 3156 3156 3157 static int pcnetIoportWriteU16(PCNetState *p Data, uint32_t addr, uint32_t val)3157 static int pcnetIoportWriteU16(PCNetState *pThis, uint32_t addr, uint32_t val) 3158 3158 { 3159 3159 int rc = VINF_SUCCESS; … … 3163 3163 addr, val)); 3164 3164 #endif 3165 if (RT_LIKELY(!BCR_DWIO(p Data)))3165 if (RT_LIKELY(!BCR_DWIO(pThis))) 3166 3166 { 3167 3167 switch (addr & 0x0f) 3168 3168 { 3169 3169 case 0x00: /* RDP */ 3170 pcnetPollTimer(p Data);3171 rc = pcnetCSRWriteU16(p Data, pData->u32RAP, val);3172 pcnetUpdateIrq(p Data);3170 pcnetPollTimer(pThis); 3171 rc = pcnetCSRWriteU16(pThis, pThis->u32RAP, val); 3172 pcnetUpdateIrq(pThis); 3173 3173 break; 3174 3174 case 0x02: /* RAP */ 3175 p Data->u32RAP = val & 0x7f;3175 pThis->u32RAP = val & 0x7f; 3176 3176 break; 3177 3177 case 0x06: /* BDP */ 3178 rc = pcnetBCRWriteU16(p Data, pData->u32RAP, val);3178 rc = pcnetBCRWriteU16(pThis, pThis->u32RAP, val); 3179 3179 break; 3180 3180 } … … 3186 3186 } 3187 3187 3188 static uint32_t pcnetIoportReadU16(PCNetState *p Data, uint32_t addr, int *pRC)3188 static uint32_t pcnetIoportReadU16(PCNetState *pThis, uint32_t addr, int *pRC) 3189 3189 { 3190 3190 uint32_t val = ~0U; … … 3192 3192 *pRC = VINF_SUCCESS; 3193 3193 3194 if (RT_LIKELY(!BCR_DWIO(p Data)))3194 if (RT_LIKELY(!BCR_DWIO(pThis))) 3195 3195 { 3196 3196 switch (addr & 0x0f) … … 3199 3199 /** @note if we're not polling, then the guest will tell us when to poll by setting TDMD in CSR0 */ 3200 3200 /** Polling is then useless here and possibly expensive. */ 3201 if (!CSR_DPOLL(p Data))3202 pcnetPollTimer(p Data);3203 3204 val = pcnetCSRReadU16(p Data, pData->u32RAP);3205 if (p Data->u32RAP == 0) // pcnetUpdateIrq() already called by pcnetCSRReadU16()3201 if (!CSR_DPOLL(pThis)) 3202 pcnetPollTimer(pThis); 3203 3204 val = pcnetCSRReadU16(pThis, pThis->u32RAP); 3205 if (pThis->u32RAP == 0) // pcnetUpdateIrq() already called by pcnetCSRReadU16() 3206 3206 goto skip_update_irq; 3207 3207 break; 3208 3208 case 0x02: /* RAP */ 3209 val = p Data->u32RAP;3209 val = pThis->u32RAP; 3210 3210 goto skip_update_irq; 3211 3211 case 0x04: /* RESET */ 3212 pcnetSoftReset(p Data);3212 pcnetSoftReset(pThis); 3213 3213 val = 0; 3214 3214 break; 3215 3215 case 0x06: /* BDP */ 3216 val = pcnetBCRReadU16(p Data, pData->u32RAP);3216 val = pcnetBCRReadU16(pThis, pThis->u32RAP); 3217 3217 break; 3218 3218 } … … 3221 3221 Log(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNET_INST_NR, addr, val & 0xffff)); 3222 3222 3223 pcnetUpdateIrq(p Data);3223 pcnetUpdateIrq(pThis); 3224 3224 3225 3225 skip_update_irq: … … 3230 3230 } 3231 3231 3232 static int pcnetIoportWriteU32(PCNetState *p Data, uint32_t addr, uint32_t val)3232 static int pcnetIoportWriteU32(PCNetState *pThis, uint32_t addr, uint32_t val) 3233 3233 { 3234 3234 int rc = VINF_SUCCESS; … … 3238 3238 addr, val)); 3239 3239 #endif 3240 if (RT_LIKELY(BCR_DWIO(p Data)))3240 if (RT_LIKELY(BCR_DWIO(pThis))) 3241 3241 { 3242 3242 switch (addr & 0x0f) 3243 3243 { 3244 3244 case 0x00: /* RDP */ 3245 pcnetPollTimer(p Data);3246 rc = pcnetCSRWriteU16(p Data, pData->u32RAP, val & 0xffff);3247 pcnetUpdateIrq(p Data);3245 pcnetPollTimer(pThis); 3246 rc = pcnetCSRWriteU16(pThis, pThis->u32RAP, val & 0xffff); 3247 pcnetUpdateIrq(pThis); 3248 3248 break; 3249 3249 case 0x04: /* RAP */ 3250 p Data->u32RAP = val & 0x7f;3250 pThis->u32RAP = val & 0x7f; 3251 3251 break; 3252 3252 case 0x0c: /* BDP */ 3253 rc = pcnetBCRWriteU16(p Data, pData->u32RAP, val & 0xffff);3253 rc = pcnetBCRWriteU16(pThis, pThis->u32RAP, val & 0xffff); 3254 3254 break; 3255 3255 } … … 3258 3258 { 3259 3259 /* switch device to dword I/O mode */ 3260 pcnetBCRWriteU16(p Data, BCR_BSBC, pcnetBCRReadU16(pData, BCR_BSBC) | 0x0080);3260 pcnetBCRWriteU16(pThis, BCR_BSBC, pcnetBCRReadU16(pThis, BCR_BSBC) | 0x0080); 3261 3261 #ifdef PCNET_DEBUG_IO 3262 3262 Log2(("device switched into dword i/o mode\n")); … … 3269 3269 } 3270 3270 3271 static uint32_t pcnetIoportReadU32(PCNetState *p Data, uint32_t addr, int *pRC)3271 static uint32_t pcnetIoportReadU32(PCNetState *pThis, uint32_t addr, int *pRC) 3272 3272 { 3273 3273 uint32_t val = ~0U; … … 3275 3275 *pRC = VINF_SUCCESS; 3276 3276 3277 if (RT_LIKELY(BCR_DWIO(p Data)))3277 if (RT_LIKELY(BCR_DWIO(pThis))) 3278 3278 { 3279 3279 switch (addr & 0x0f) … … 3282 3282 /** @note if we're not polling, then the guest will tell us when to poll by setting TDMD in CSR0 */ 3283 3283 /** Polling is then useless here and possibly expensive. */ 3284 if (!CSR_DPOLL(p Data))3285 pcnetPollTimer(p Data);3286 3287 val = pcnetCSRReadU16(p Data, pData->u32RAP);3288 if (p Data->u32RAP == 0) // pcnetUpdateIrq() already called by pcnetCSRReadU16()3284 if (!CSR_DPOLL(pThis)) 3285 pcnetPollTimer(pThis); 3286 3287 val = pcnetCSRReadU16(pThis, pThis->u32RAP); 3288 if (pThis->u32RAP == 0) // pcnetUpdateIrq() already called by pcnetCSRReadU16() 3289 3289 goto skip_update_irq; 3290 3290 break; 3291 3291 case 0x04: /* RAP */ 3292 val = p Data->u32RAP;3292 val = pThis->u32RAP; 3293 3293 goto skip_update_irq; 3294 3294 case 0x08: /* RESET */ 3295 pcnetSoftReset(p Data);3295 pcnetSoftReset(pThis); 3296 3296 val = 0; 3297 3297 break; 3298 3298 case 0x0c: /* BDP */ 3299 val = pcnetBCRReadU16(p Data, pData->u32RAP);3299 val = pcnetBCRReadU16(pThis, pThis->u32RAP); 3300 3300 break; 3301 3301 } … … 3303 3303 else 3304 3304 Log(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNET_INST_NR, addr, val)); 3305 pcnetUpdateIrq(p Data);3305 pcnetUpdateIrq(pThis); 3306 3306 3307 3307 skip_update_irq: … … 3312 3312 } 3313 3313 3314 static void pcnetMMIOWriteU8(PCNetState *p Data, RTGCPHYS addr, uint32_t val)3314 static void pcnetMMIOWriteU8(PCNetState *pThis, RTGCPHYS addr, uint32_t val) 3315 3315 { 3316 3316 #ifdef PCNET_DEBUG_IO … … 3318 3318 #endif 3319 3319 if (!(addr & 0x10)) 3320 pcnetAPROMWriteU8(p Data, addr, val);3321 } 3322 3323 static uint32_t pcnetMMIOReadU8(PCNetState *p Data, RTGCPHYS addr)3320 pcnetAPROMWriteU8(pThis, addr, val); 3321 } 3322 3323 static uint32_t pcnetMMIOReadU8(PCNetState *pThis, RTGCPHYS addr) 3324 3324 { 3325 3325 uint32_t val = ~0U; 3326 3326 if (!(addr & 0x10)) 3327 val = pcnetAPROMReadU8(p Data, addr);3327 val = pcnetAPROMReadU8(pThis, addr); 3328 3328 #ifdef PCNET_DEBUG_IO 3329 3329 Log2(("#%d pcnetMMIOReadU8: addr=%#010x val=%#04x\n", PCNET_INST_NR, addr, val & 0xff)); … … 3332 3332 } 3333 3333 3334 static void pcnetMMIOWriteU16(PCNetState *p Data, RTGCPHYS addr, uint32_t val)3334 static void pcnetMMIOWriteU16(PCNetState *pThis, RTGCPHYS addr, uint32_t val) 3335 3335 { 3336 3336 #ifdef PCNET_DEBUG_IO … … 3338 3338 #endif 3339 3339 if (addr & 0x10) 3340 pcnetIoportWriteU16(p Data, addr & 0x0f, val);3340 pcnetIoportWriteU16(pThis, addr & 0x0f, val); 3341 3341 else 3342 3342 { 3343 pcnetAPROMWriteU8(p Data, addr, val );3344 pcnetAPROMWriteU8(p Data, addr+1, val >> 8);3345 } 3346 } 3347 3348 static uint32_t pcnetMMIOReadU16(PCNetState *p Data, RTGCPHYS addr)3343 pcnetAPROMWriteU8(pThis, addr, val ); 3344 pcnetAPROMWriteU8(pThis, addr+1, val >> 8); 3345 } 3346 } 3347 3348 static uint32_t pcnetMMIOReadU16(PCNetState *pThis, RTGCPHYS addr) 3349 3349 { 3350 3350 uint32_t val = ~0U; … … 3352 3352 3353 3353 if (addr & 0x10) 3354 val = pcnetIoportReadU16(p Data, addr & 0x0f, &rc);3354 val = pcnetIoportReadU16(pThis, addr & 0x0f, &rc); 3355 3355 else 3356 3356 { 3357 val = pcnetAPROMReadU8(p Data, addr+1);3357 val = pcnetAPROMReadU8(pThis, addr+1); 3358 3358 val <<= 8; 3359 val |= pcnetAPROMReadU8(p Data, addr);3359 val |= pcnetAPROMReadU8(pThis, addr); 3360 3360 } 3361 3361 #ifdef PCNET_DEBUG_IO … … 3365 3365 } 3366 3366 3367 static void pcnetMMIOWriteU32(PCNetState *p Data, RTGCPHYS addr, uint32_t val)3367 static void pcnetMMIOWriteU32(PCNetState *pThis, RTGCPHYS addr, uint32_t val) 3368 3368 { 3369 3369 #ifdef PCNET_DEBUG_IO … … 3371 3371 #endif 3372 3372 if (addr & 0x10) 3373 pcnetIoportWriteU32(p Data, addr & 0x0f, val);3373 pcnetIoportWriteU32(pThis, addr & 0x0f, val); 3374 3374 else 3375 3375 { 3376 pcnetAPROMWriteU8(p Data, addr, val );3377 pcnetAPROMWriteU8(p Data, addr+1, val >> 8);3378 pcnetAPROMWriteU8(p Data, addr+2, val >> 16);3379 pcnetAPROMWriteU8(p Data, addr+3, val >> 24);3380 } 3381 } 3382 3383 static uint32_t pcnetMMIOReadU32(PCNetState *p Data, RTGCPHYS addr)3376 pcnetAPROMWriteU8(pThis, addr, val ); 3377 pcnetAPROMWriteU8(pThis, addr+1, val >> 8); 3378 pcnetAPROMWriteU8(pThis, addr+2, val >> 16); 3379 pcnetAPROMWriteU8(pThis, addr+3, val >> 24); 3380 } 3381 } 3382 3383 static uint32_t pcnetMMIOReadU32(PCNetState *pThis, RTGCPHYS addr) 3384 3384 { 3385 3385 uint32_t val; … … 3387 3387 3388 3388 if (addr & 0x10) 3389 val = pcnetIoportReadU32(p Data, addr & 0x0f, &rc);3389 val = pcnetIoportReadU32(pThis, addr & 0x0f, &rc); 3390 3390 else 3391 3391 { 3392 val = pcnetAPROMReadU8(p Data, addr+3);3392 val = pcnetAPROMReadU8(pThis, addr+3); 3393 3393 val <<= 8; 3394 val |= pcnetAPROMReadU8(p Data, addr+2);3394 val |= pcnetAPROMReadU8(pThis, addr+2); 3395 3395 val <<= 8; 3396 val |= pcnetAPROMReadU8(p Data, addr+1);3396 val |= pcnetAPROMReadU8(pThis, addr+1); 3397 3397 val <<= 8; 3398 val |= pcnetAPROMReadU8(p Data, addr );3398 val |= pcnetAPROMReadU8(pThis, addr ); 3399 3399 } 3400 3400 #ifdef PCNET_DEBUG_IO … … 3419 3419 RTIOPORT Port, uint32_t *pu32, unsigned cb) 3420 3420 { 3421 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3421 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3422 3422 int rc; 3423 3423 3424 STAM_PROFILE_ADV_START(&p Data->StatAPROMRead, a);3425 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);3424 STAM_PROFILE_ADV_START(&pThis->StatAPROMRead, a); 3425 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 3426 3426 if (rc == VINF_SUCCESS) 3427 3427 { … … 3429 3429 /* FreeBSD is accessing in dwords. */ 3430 3430 if (cb == 1) 3431 *pu32 = pcnetAPROMReadU8(p Data, Port);3432 else if (cb == 2 && !BCR_DWIO(p Data))3433 *pu32 = pcnetAPROMReadU8(p Data, Port)3434 | (pcnetAPROMReadU8(p Data, Port + 1) << 8);3435 else if (cb == 4 && BCR_DWIO(p Data))3436 *pu32 = pcnetAPROMReadU8(p Data, Port)3437 | (pcnetAPROMReadU8(p Data, Port + 1) << 8)3438 | (pcnetAPROMReadU8(p Data, Port + 2) << 16)3439 | (pcnetAPROMReadU8(p Data, Port + 3) << 24);3431 *pu32 = pcnetAPROMReadU8(pThis, Port); 3432 else if (cb == 2 && !BCR_DWIO(pThis)) 3433 *pu32 = pcnetAPROMReadU8(pThis, Port) 3434 | (pcnetAPROMReadU8(pThis, Port + 1) << 8); 3435 else if (cb == 4 && BCR_DWIO(pThis)) 3436 *pu32 = pcnetAPROMReadU8(pThis, Port) 3437 | (pcnetAPROMReadU8(pThis, Port + 1) << 8) 3438 | (pcnetAPROMReadU8(pThis, Port + 2) << 16) 3439 | (pcnetAPROMReadU8(pThis, Port + 3) << 24); 3440 3440 else 3441 3441 { … … 3443 3443 rc = VERR_IOM_IOPORT_UNUSED; 3444 3444 } 3445 PDMCritSectLeave(&p Data->CritSect);3446 } 3447 STAM_PROFILE_ADV_STOP(&p Data->StatAPROMRead, a);3445 PDMCritSectLeave(&pThis->CritSect); 3446 } 3447 STAM_PROFILE_ADV_STOP(&pThis->StatAPROMRead, a); 3448 3448 LogFlow(("#%d pcnetIOPortAPromRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Vrc\n", PCNET_INST_NR, Port, *pu32, cb, rc)); 3449 3449 return rc; … … 3465 3465 RTIOPORT Port, uint32_t u32, unsigned cb) 3466 3466 { 3467 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3467 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3468 3468 int rc; 3469 3469 3470 3470 if (cb == 1) 3471 3471 { 3472 STAM_PROFILE_ADV_START(&p Data->StatAPROMWrite, a);3473 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);3472 STAM_PROFILE_ADV_START(&pThis->StatAPROMWrite, a); 3473 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 3474 3474 if (RT_LIKELY(rc == VINF_SUCCESS)) 3475 3475 { 3476 pcnetAPROMWriteU8(p Data, Port, u32);3477 PDMCritSectLeave(&p Data->CritSect);3476 pcnetAPROMWriteU8(pThis, Port, u32); 3477 PDMCritSectLeave(&pThis->CritSect); 3478 3478 } 3479 STAM_PROFILE_ADV_STOP(&p Data->StatAPROMWrite, a);3479 STAM_PROFILE_ADV_STOP(&pThis->StatAPROMWrite, a); 3480 3480 } 3481 3481 else … … 3507 3507 RTIOPORT Port, uint32_t *pu32, unsigned cb) 3508 3508 { 3509 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3509 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3510 3510 int rc = VINF_SUCCESS; 3511 3511 3512 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatIORead), a);3513 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_READ);3512 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatIORead), a); 3513 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ); 3514 3514 if (RT_LIKELY(rc == VINF_SUCCESS)) 3515 3515 { 3516 3516 switch (cb) 3517 3517 { 3518 case 2: *pu32 = pcnetIoportReadU16(p Data, Port, &rc); break;3519 case 4: *pu32 = pcnetIoportReadU32(p Data, Port, &rc); break;3518 case 2: *pu32 = pcnetIoportReadU16(pThis, Port, &rc); break; 3519 case 4: *pu32 = pcnetIoportReadU32(pThis, Port, &rc); break; 3520 3520 default: 3521 3521 rc = VERR_IOM_IOPORT_UNUSED; 3522 3522 break; 3523 3523 } 3524 PDMCritSectLeave(&p Data->CritSect);3525 } 3526 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatIORead), a);3524 PDMCritSectLeave(&pThis->CritSect); 3525 } 3526 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatIORead), a); 3527 3527 Log2(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Vrc\n", PCNET_INST_NR, Port, *pu32, cb, rc)); 3528 3528 #ifdef LOG_ENABLED … … 3548 3548 RTIOPORT Port, uint32_t u32, unsigned cb) 3549 3549 { 3550 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3550 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3551 3551 int rc = VINF_SUCCESS; 3552 3552 3553 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatIOWrite), a);3554 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);3553 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatIOWrite), a); 3554 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 3555 3555 if (RT_LIKELY(rc == VINF_SUCCESS)) 3556 3556 { 3557 3557 switch (cb) 3558 3558 { 3559 case 2: rc = pcnetIoportWriteU16(p Data, Port, u32); break;3560 case 4: rc = pcnetIoportWriteU32(p Data, Port, u32); break;3559 case 2: rc = pcnetIoportWriteU16(pThis, Port, u32); break; 3560 case 4: rc = pcnetIoportWriteU32(pThis, Port, u32); break; 3561 3561 default: 3562 3562 AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); … … 3564 3564 break; 3565 3565 } 3566 PDMCritSectLeave(&p Data->CritSect);3567 } 3568 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatIOWrite), a);3566 PDMCritSectLeave(&pThis->CritSect); 3567 } 3568 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatIOWrite), a); 3569 3569 Log2(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Vrc\n", PCNET_INST_NR, Port, u32, cb, rc)); 3570 3570 #ifdef LOG_ENABLED … … 3590 3590 RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3591 3591 { 3592 PCNetState *p Data= (PCNetState *)pvUser;3592 PCNetState *pThis = (PCNetState *)pvUser; 3593 3593 int rc = VINF_SUCCESS; 3594 3594 … … 3596 3596 * We have to check the range, because we're page aligning the MMIO stuff presently. 3597 3597 */ 3598 if (GCPhysAddr - p Data->MMIOBase < PCNET_PNPMMIO_SIZE)3599 { 3600 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatMMIORead), a);3601 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_MMIO_READ);3598 if (GCPhysAddr - pThis->MMIOBase < PCNET_PNPMMIO_SIZE) 3599 { 3600 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatMMIORead), a); 3601 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_MMIO_READ); 3602 3602 if (RT_LIKELY(rc == VINF_SUCCESS)) 3603 3603 { 3604 3604 switch (cb) 3605 3605 { 3606 case 1: *(uint8_t *)pv = pcnetMMIOReadU8 (p Data, GCPhysAddr); break;3607 case 2: *(uint16_t *)pv = pcnetMMIOReadU16(p Data, GCPhysAddr); break;3608 case 4: *(uint32_t *)pv = pcnetMMIOReadU32(p Data, GCPhysAddr); break;3606 case 1: *(uint8_t *)pv = pcnetMMIOReadU8 (pThis, GCPhysAddr); break; 3607 case 2: *(uint16_t *)pv = pcnetMMIOReadU16(pThis, GCPhysAddr); break; 3608 case 4: *(uint32_t *)pv = pcnetMMIOReadU32(pThis, GCPhysAddr); break; 3609 3609 default: 3610 3610 AssertMsgFailed(("cb=%d\n", cb)); … … 3612 3612 break; 3613 3613 } 3614 PDMCritSectLeave(&p Data->CritSect);3614 PDMCritSectLeave(&pThis->CritSect); 3615 3615 } 3616 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatMMIORead), a);3616 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatMMIORead), a); 3617 3617 } 3618 3618 else … … 3643 3643 RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3644 3644 { 3645 PCNetState *p Data= (PCNetState *)pvUser;3645 PCNetState *pThis = (PCNetState *)pvUser; 3646 3646 int rc = VINF_SUCCESS; 3647 3647 … … 3649 3649 * We have to check the range, because we're page aligning the MMIO stuff presently. 3650 3650 */ 3651 if (GCPhysAddr - p Data->MMIOBase < PCNET_PNPMMIO_SIZE)3652 { 3653 STAM_PROFILE_ADV_START(&p Data->CTXSUFF(StatMMIOWrite), a);3654 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_MMIO_WRITE);3651 if (GCPhysAddr - pThis->MMIOBase < PCNET_PNPMMIO_SIZE) 3652 { 3653 STAM_PROFILE_ADV_START(&pThis->CTXSUFF(StatMMIOWrite), a); 3654 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_MMIO_WRITE); 3655 3655 if (RT_LIKELY(rc == VINF_SUCCESS)) 3656 3656 { 3657 3657 switch (cb) 3658 3658 { 3659 case 1: pcnetMMIOWriteU8 (p Data, GCPhysAddr, *(uint8_t *)pv); break;3660 case 2: pcnetMMIOWriteU16(p Data, GCPhysAddr, *(uint16_t *)pv); break;3661 case 4: pcnetMMIOWriteU32(p Data, GCPhysAddr, *(uint32_t *)pv); break;3659 case 1: pcnetMMIOWriteU8 (pThis, GCPhysAddr, *(uint8_t *)pv); break; 3660 case 2: pcnetMMIOWriteU16(pThis, GCPhysAddr, *(uint16_t *)pv); break; 3661 case 4: pcnetMMIOWriteU32(pThis, GCPhysAddr, *(uint32_t *)pv); break; 3662 3662 default: 3663 3663 AssertMsgFailed(("cb=%d\n", cb)); … … 3665 3665 break; 3666 3666 } 3667 PDMCritSectLeave(&p Data->CritSect);3667 PDMCritSectLeave(&pThis->CritSect); 3668 3668 } 3669 3669 // else rc == VINF_IOM_HC_MMIO_WRITE => handle in ring3 3670 3670 3671 STAM_PROFILE_ADV_STOP(&p Data->CTXSUFF(StatMMIOWrite), a);3671 STAM_PROFILE_ADV_STOP(&pThis->CTXSUFF(StatMMIOWrite), a); 3672 3672 } 3673 3673 LogFlow(("#%d pcnetMMIOWrite: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Vrc\n", … … 3691 3691 static DECLCALLBACK(void) pcnetTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer) 3692 3692 { 3693 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3693 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3694 3694 int rc; 3695 3695 3696 STAM_PROFILE_ADV_START(&p Data->StatTimer, a);3697 rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);3696 STAM_PROFILE_ADV_START(&pThis->StatTimer, a); 3697 rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 3698 3698 AssertReleaseRC(rc); 3699 3699 3700 pcnetPollTimer(p Data);3701 3702 PDMCritSectLeave(&p Data->CritSect);3703 STAM_PROFILE_ADV_STOP(&p Data->StatTimer, a);3700 pcnetPollTimer(pThis); 3701 3702 PDMCritSectLeave(&pThis->CritSect); 3703 STAM_PROFILE_ADV_STOP(&pThis->StatTimer, a); 3704 3704 } 3705 3705 … … 3714 3714 static DECLCALLBACK(void) pcnetTimerSoftInt(PPDMDEVINS pDevIns, PTMTIMER pTimer) 3715 3715 { 3716 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3717 3718 p Data->aCSR[7] |= 0x0800; /* STINT */3719 pcnetUpdateIrq(p Data);3720 TMTimerSetNano(p Data->CTX_SUFF(pTimerSoftInt), 12800U * (pData->aBCR[BCR_STVAL] & 0xffff));3716 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3717 3718 pThis->aCSR[7] |= 0x0800; /* STINT */ 3719 pcnetUpdateIrq(pThis); 3720 TMTimerSetNano(pThis->CTX_SUFF(pTimerSoftInt), 12800U * (pThis->aBCR[BCR_STVAL] & 0xffff)); 3721 3721 } 3722 3722 … … 3734 3734 static DECLCALLBACK(void) pcnetTimerRestore(PPDMDEVINS pDevIns, PTMTIMER pTimer) 3735 3735 { 3736 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3737 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);3736 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3737 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 3738 3738 AssertReleaseRC(rc); 3739 3739 3740 3740 rc = VERR_GENERAL_FAILURE; 3741 if (p Data->cLinkDownReported <= PCNET_MAX_LINKDOWN_REPORTED)3742 rc = TMTimerSetMillies(p Data->pTimerRestore, 1500);3741 if (pThis->cLinkDownReported <= PCNET_MAX_LINKDOWN_REPORTED) 3742 rc = TMTimerSetMillies(pThis->pTimerRestore, 1500); 3743 3743 if (RT_FAILURE(rc)) 3744 3744 { 3745 p Data->fLinkTempDown = false;3746 if (p Data->fLinkUp)3745 pThis->fLinkTempDown = false; 3746 if (pThis->fLinkUp) 3747 3747 { 3748 3748 LogRel(("PCNet#%d: The link is back up again after the restore.\n", 3749 3749 pDevIns->iInstance)); 3750 3750 Log(("#%d pcnetTimerRestore: Clearing ERR and CERR after load. cLinkDownReported=%d\n", 3751 pDevIns->iInstance, p Data->cLinkDownReported));3752 p Data->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */3753 p Data->Led.Actual.s.fError = 0;3751 pDevIns->iInstance, pThis->cLinkDownReported)); 3752 pThis->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */ 3753 pThis->Led.Actual.s.fError = 0; 3754 3754 } 3755 3755 } 3756 3756 else 3757 3757 Log(("#%d pcnetTimerRestore: cLinkDownReported=%d, wait another 1500ms...\n", 3758 pDevIns->iInstance, p Data->cLinkDownReported));3759 3760 PDMCritSectLeave(&p Data->CritSect);3758 pDevIns->iInstance, pThis->cLinkDownReported)); 3759 3760 PDMCritSectLeave(&pThis->CritSect); 3761 3761 } 3762 3762 … … 3780 3780 PPDMDEVINS pDevIns = pPciDev->pDevIns; 3781 3781 RTIOPORT Port = (RTIOPORT)GCPhysAddress; 3782 PCNetState *p Data= PCIDEV_2_PCNETSTATE(pPciDev);3782 PCNetState *pThis = PCIDEV_2_PCNETSTATE(pPciDev); 3783 3783 3784 3784 Assert(enmType == PCI_ADDRESS_SPACE_IO); … … 3794 3794 return rc; 3795 3795 3796 if (p Data->fGCEnabled)3796 if (pThis->fGCEnabled) 3797 3797 { 3798 3798 rc = PDMDevHlpIOPortRegisterGC(pDevIns, Port, 0x10, 0, "pcnetIOPortAPromWrite", … … 3805 3805 return rc; 3806 3806 } 3807 if (p Data->fR0Enabled)3807 if (pThis->fR0Enabled) 3808 3808 { 3809 3809 rc = PDMDevHlpIOPortRegisterR0(pDevIns, Port, 0x10, 0, "pcnetIOPortAPromWrite", … … 3817 3817 } 3818 3818 3819 p Data->IOPortBase = Port;3819 pThis->IOPortBase = Port; 3820 3820 return VINF_SUCCESS; 3821 3821 } … … 3837 3837 RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 3838 3838 { 3839 PCNetState *p Data= PCIDEV_2_PCNETSTATE(pPciDev);3839 PCNetState *pThis = PCIDEV_2_PCNETSTATE(pPciDev); 3840 3840 int rc; 3841 3841 … … 3844 3844 3845 3845 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 3846 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, p Data,3846 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, pThis, 3847 3847 pcnetMMIOWrite, pcnetMMIORead, NULL, "PCNet"); 3848 3848 if (RT_FAILURE(rc)) 3849 3849 return rc; 3850 p Data->MMIOBase = GCPhysAddress;3850 pThis->MMIOBase = GCPhysAddress; 3851 3851 return rc; 3852 3852 } … … 3885 3885 static DECLCALLBACK(void) pcnetInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 3886 3886 { 3887 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);3887 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 3888 3888 bool fRcvRing = false; 3889 3889 bool fXmtRing = false; … … 3904 3904 "pcnet #%d: port=%RTiop mmio=%RGp mac-cfg=%.*Rhxs %s\n", 3905 3905 pDevIns->iInstance, 3906 p Data->IOPortBase, pData->MMIOBase, sizeof(pData->MacConfigured), &pData->MacConfigured,3907 p Data->fAm79C973 ? "Am79C973" : "Am79C970A", pData->fGCEnabled ? " GC" : "", pData->fR0Enabled ? " R0" : "");3908 3909 PDMCritSectEnter(&p Data->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */3906 pThis->IOPortBase, pThis->MMIOBase, sizeof(pThis->MacConfigured), &pThis->MacConfigured, 3907 pThis->fAm79C973 ? "Am79C973" : "Am79C970A", pThis->fGCEnabled ? " GC" : "", pThis->fR0Enabled ? " R0" : ""); 3908 3909 PDMCritSectEnter(&pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */ 3910 3910 3911 3911 pHlp->pfnPrintf(pHlp, 3912 3912 "CSR0=%#06x:\n", 3913 p Data->aCSR[0]);3913 pThis->aCSR[0]); 3914 3914 3915 3915 pHlp->pfnPrintf(pHlp, 3916 3916 "CSR1=%#06x:\n", 3917 p Data->aCSR[1]);3917 pThis->aCSR[1]); 3918 3918 3919 3919 pHlp->pfnPrintf(pHlp, 3920 3920 "CSR2=%#06x:\n", 3921 p Data->aCSR[2]);3921 pThis->aCSR[2]); 3922 3922 3923 3923 pHlp->pfnPrintf(pHlp, 3924 3924 "CSR3=%#06x: BSWP=%d EMBA=%d DXMT2PD=%d LAPPEN=%d DXSUFLO=%d IDONM=%d TINTM=%d RINTM=%d MERRM=%d MISSM=%d BABLM=%d\n", 3925 p Data->aCSR[3],3926 !!(p Data->aCSR[3] & RT_BIT(2)), !!(pData->aCSR[3] & RT_BIT(3)), !!(pData->aCSR[3] & RT_BIT(4)), CSR_LAPPEN(pData),3927 CSR_DXSUFLO(p Data), !!(pData->aCSR[3] & RT_BIT(8)), !!(pData->aCSR[3] & RT_BIT(9)), !!(pData->aCSR[3] & RT_BIT(10)),3928 !!(p Data->aCSR[3] & RT_BIT(11)), !!(pData->aCSR[3] & RT_BIT(12)), !!(pData->aCSR[3] & RT_BIT(14)));3925 pThis->aCSR[3], 3926 !!(pThis->aCSR[3] & RT_BIT(2)), !!(pThis->aCSR[3] & RT_BIT(3)), !!(pThis->aCSR[3] & RT_BIT(4)), CSR_LAPPEN(pThis), 3927 CSR_DXSUFLO(pThis), !!(pThis->aCSR[3] & RT_BIT(8)), !!(pThis->aCSR[3] & RT_BIT(9)), !!(pThis->aCSR[3] & RT_BIT(10)), 3928 !!(pThis->aCSR[3] & RT_BIT(11)), !!(pThis->aCSR[3] & RT_BIT(12)), !!(pThis->aCSR[3] & RT_BIT(14))); 3929 3929 3930 3930 pHlp->pfnPrintf(pHlp, 3931 3931 "CSR4=%#06x: JABM=%d JAB=%d TXSTRM=%d TXSTRT=%d RCVCOOM=%d RCVCCO=%d UINT=%d UINTCMD=%d\n" 3932 3932 " MFCOM=%d MFCO=%d ASTRP_RCV=%d APAD_XMT=%d DPOLL=%d TIMER=%d EMAPLUS=%d EN124=%d\n", 3933 p Data->aCSR[4],3934 !!(p Data->aCSR[4] & RT_BIT( 0)), !!(pData->aCSR[4] & RT_BIT( 1)), !!(pData->aCSR[4] & RT_BIT( 2)), !!(pData->aCSR[4] & RT_BIT( 3)),3935 !!(p Data->aCSR[4] & RT_BIT( 4)), !!(pData->aCSR[4] & RT_BIT( 5)), !!(pData->aCSR[4] & RT_BIT( 6)), !!(pData->aCSR[4] & RT_BIT( 7)),3936 !!(p Data->aCSR[4] & RT_BIT( 8)), !!(pData->aCSR[4] & RT_BIT( 9)), !!(pData->aCSR[4] & RT_BIT(10)), !!(pData->aCSR[4] & RT_BIT(11)),3937 !!(p Data->aCSR[4] & RT_BIT(12)), !!(pData->aCSR[4] & RT_BIT(13)), !!(pData->aCSR[4] & RT_BIT(14)), !!(pData->aCSR[4] & RT_BIT(15)));3933 pThis->aCSR[4], 3934 !!(pThis->aCSR[4] & RT_BIT( 0)), !!(pThis->aCSR[4] & RT_BIT( 1)), !!(pThis->aCSR[4] & RT_BIT( 2)), !!(pThis->aCSR[4] & RT_BIT( 3)), 3935 !!(pThis->aCSR[4] & RT_BIT( 4)), !!(pThis->aCSR[4] & RT_BIT( 5)), !!(pThis->aCSR[4] & RT_BIT( 6)), !!(pThis->aCSR[4] & RT_BIT( 7)), 3936 !!(pThis->aCSR[4] & RT_BIT( 8)), !!(pThis->aCSR[4] & RT_BIT( 9)), !!(pThis->aCSR[4] & RT_BIT(10)), !!(pThis->aCSR[4] & RT_BIT(11)), 3937 !!(pThis->aCSR[4] & RT_BIT(12)), !!(pThis->aCSR[4] & RT_BIT(13)), !!(pThis->aCSR[4] & RT_BIT(14)), !!(pThis->aCSR[4] & RT_BIT(15))); 3938 3938 3939 3939 pHlp->pfnPrintf(pHlp, 3940 3940 "CSR5=%#06x:\n", 3941 p Data->aCSR[5]);3941 pThis->aCSR[5]); 3942 3942 3943 3943 pHlp->pfnPrintf(pHlp, 3944 3944 "CSR6=%#06x: RLEN=%#x* TLEN=%#x* [* encoded]\n", 3945 p Data->aCSR[6],3946 (p Data->aCSR[6] >> 8) & 0xf, (pData->aCSR[6] >> 12) & 0xf);3945 pThis->aCSR[6], 3946 (pThis->aCSR[6] >> 8) & 0xf, (pThis->aCSR[6] >> 12) & 0xf); 3947 3947 3948 3948 pHlp->pfnPrintf(pHlp, 3949 3949 "CSR8..11=%#06x,%#06x,%#06x,%#06x: LADRF=%#018llx\n", 3950 p Data->aCSR[8], pData->aCSR[9], pData->aCSR[10], pData->aCSR[11],3951 (uint64_t)(p Data->aCSR[ 8] & 0xffff)3952 | (uint64_t)(p Data->aCSR[ 9] & 0xffff) << 163953 | (uint64_t)(p Data->aCSR[10] & 0xffff) << 323954 | (uint64_t)(p Data->aCSR[11] & 0xffff) << 48);3950 pThis->aCSR[8], pThis->aCSR[9], pThis->aCSR[10], pThis->aCSR[11], 3951 (uint64_t)(pThis->aCSR[ 8] & 0xffff) 3952 | (uint64_t)(pThis->aCSR[ 9] & 0xffff) << 16 3953 | (uint64_t)(pThis->aCSR[10] & 0xffff) << 32 3954 | (uint64_t)(pThis->aCSR[11] & 0xffff) << 48); 3955 3955 3956 3956 pHlp->pfnPrintf(pHlp, 3957 3957 "CSR12..14=%#06x,%#06x,%#06x: PADR=%02x:%02x:%02x:%02x:%02x:%02x (Current MAC Address)\n", 3958 p Data->aCSR[12], pData->aCSR[13], pData->aCSR[14],3959 p Data->aCSR[12] & 0xff,3960 (p Data->aCSR[12] >> 8) & 0xff,3961 p Data->aCSR[13] & 0xff,3962 (p Data->aCSR[13] >> 8) & 0xff,3963 p Data->aCSR[14] & 0xff,3964 (p Data->aCSR[14] >> 8) & 0xff);3958 pThis->aCSR[12], pThis->aCSR[13], pThis->aCSR[14], 3959 pThis->aCSR[12] & 0xff, 3960 (pThis->aCSR[12] >> 8) & 0xff, 3961 pThis->aCSR[13] & 0xff, 3962 (pThis->aCSR[13] >> 8) & 0xff, 3963 pThis->aCSR[14] & 0xff, 3964 (pThis->aCSR[14] >> 8) & 0xff); 3965 3965 3966 3966 pHlp->pfnPrintf(pHlp, 3967 3967 "CSR15=%#06x: DXR=%d DTX=%d LOOP=%d DXMTFCS=%d FCOLL=%d DRTY=%d INTL=%d PORTSEL=%d LTR=%d\n" 3968 3968 " MENDECL=%d DAPC=%d DLNKTST=%d DRCVPV=%d DRCVBC=%d PROM=%d\n", 3969 p Data->aCSR[15],3970 !!(p Data->aCSR[15] & RT_BIT( 0)), !!(pData->aCSR[15] & RT_BIT( 1)), !!(pData->aCSR[15] & RT_BIT( 2)), !!(pData->aCSR[15] & RT_BIT( 3)),3971 !!(p Data->aCSR[15] & RT_BIT( 4)), !!(pData->aCSR[15] & RT_BIT( 5)), !!(pData->aCSR[15] & RT_BIT( 6)), (pData->aCSR[15] >> 7) & 3,3972 !!(p Data->aCSR[15] & RT_BIT( 9)), !!(pData->aCSR[15] & RT_BIT(10)), !!(pData->aCSR[15] & RT_BIT(11)),3973 !!(p Data->aCSR[15] & RT_BIT(12)), !!(pData->aCSR[15] & RT_BIT(13)), !!(pData->aCSR[15] & RT_BIT(14)), !!(pData->aCSR[15] & RT_BIT(15)));3969 pThis->aCSR[15], 3970 !!(pThis->aCSR[15] & RT_BIT( 0)), !!(pThis->aCSR[15] & RT_BIT( 1)), !!(pThis->aCSR[15] & RT_BIT( 2)), !!(pThis->aCSR[15] & RT_BIT( 3)), 3971 !!(pThis->aCSR[15] & RT_BIT( 4)), !!(pThis->aCSR[15] & RT_BIT( 5)), !!(pThis->aCSR[15] & RT_BIT( 6)), (pThis->aCSR[15] >> 7) & 3, 3972 !!(pThis->aCSR[15] & RT_BIT( 9)), !!(pThis->aCSR[15] & RT_BIT(10)), !!(pThis->aCSR[15] & RT_BIT(11)), 3973 !!(pThis->aCSR[15] & RT_BIT(12)), !!(pThis->aCSR[15] & RT_BIT(13)), !!(pThis->aCSR[15] & RT_BIT(14)), !!(pThis->aCSR[15] & RT_BIT(15))); 3974 3974 3975 3975 pHlp->pfnPrintf(pHlp, 3976 3976 "CSR46=%#06x: POLL=%#06x (Poll Time Counter)\n", 3977 p Data->aCSR[46], pData->aCSR[46] & 0xffff);3977 pThis->aCSR[46], pThis->aCSR[46] & 0xffff); 3978 3978 3979 3979 pHlp->pfnPrintf(pHlp, 3980 3980 "CSR47=%#06x: POLLINT=%#06x (Poll Time Interval)\n", 3981 p Data->aCSR[47], pData->aCSR[47] & 0xffff);3981 pThis->aCSR[47], pThis->aCSR[47] & 0xffff); 3982 3982 3983 3983 pHlp->pfnPrintf(pHlp, 3984 3984 "CSR58=%#06x: SWSTYLE=%d %s SSIZE32=%d CSRPCNET=%d APERRENT=%d\n", 3985 p Data->aCSR[58],3986 p Data->aCSR[58] & 0x7f,3987 (p Data->aCSR[58] & 0x7f) == 0 ? "C-LANCE / PCnet-ISA"3988 : (p Data->aCSR[58] & 0x7f) == 1 ? "ILACC"3989 : (p Data->aCSR[58] & 0x7f) == 2 ? "PCNet-PCI II"3990 : (p Data->aCSR[58] & 0x7f) == 3 ? "PCNet-PCI II controller"3985 pThis->aCSR[58], 3986 pThis->aCSR[58] & 0x7f, 3987 (pThis->aCSR[58] & 0x7f) == 0 ? "C-LANCE / PCnet-ISA" 3988 : (pThis->aCSR[58] & 0x7f) == 1 ? "ILACC" 3989 : (pThis->aCSR[58] & 0x7f) == 2 ? "PCNet-PCI II" 3990 : (pThis->aCSR[58] & 0x7f) == 3 ? "PCNet-PCI II controller" 3991 3991 : "!!reserved!!", 3992 !!(p Data->aCSR[58] & RT_BIT(8)), !!(pData->aCSR[58] & RT_BIT(9)), !!(pData->aCSR[58] & RT_BIT(10)));3992 !!(pThis->aCSR[58] & RT_BIT(8)), !!(pThis->aCSR[58] & RT_BIT(9)), !!(pThis->aCSR[58] & RT_BIT(10))); 3993 3993 3994 3994 pHlp->pfnPrintf(pHlp, 3995 3995 "CSR112=%04RX32: MFC=%04x (Missed receive Frame Count)\n", 3996 p Data->aCSR[112], pData->aCSR[112] & 0xffff);3996 pThis->aCSR[112], pThis->aCSR[112] & 0xffff); 3997 3997 3998 3998 pHlp->pfnPrintf(pHlp, 3999 3999 "CSR122=%04RX32: RCVALGN=%04x (Receive Frame Align)\n", 4000 p Data->aCSR[122], !!(pData->aCSR[122] & RT_BIT(0)));4000 pThis->aCSR[122], !!(pThis->aCSR[122] & RT_BIT(0))); 4001 4001 4002 4002 pHlp->pfnPrintf(pHlp, 4003 4003 "CSR124=%04RX32: RPA=%04x (Runt Packet Accept)\n", 4004 p Data->aCSR[122], !!(pData->aCSR[122] & RT_BIT(3)));4004 pThis->aCSR[122], !!(pThis->aCSR[122] & RT_BIT(3))); 4005 4005 4006 4006 … … 4014 4014 "NNRDA=%08RX32\n" 4015 4015 , 4016 CSR_RCVRL(p Data), CSR_RCVRC(pData), pData->GCRDRA,4017 CSR_CRDA(p Data), CSR_CRBA(pData), CSR_CRBC(pData), CSR_CRST(pData),4018 CSR_NRDA(p Data), CSR_NRBA(pData), CSR_NRBC(pData), CSR_NRST(pData),4019 CSR_NNRD(p Data));4016 CSR_RCVRL(pThis), CSR_RCVRC(pThis), pThis->GCRDRA, 4017 CSR_CRDA(pThis), CSR_CRBA(pThis), CSR_CRBC(pThis), CSR_CRST(pThis), 4018 CSR_NRDA(pThis), CSR_NRBA(pThis), CSR_NRBC(pThis), CSR_NRST(pThis), 4019 CSR_NNRD(pThis)); 4020 4020 if (fRcvRing) 4021 4021 { 4022 const unsigned cb = 1 << p Data->iLog2DescSize;4023 RTGCPHYS32 GCPhys = p Data->GCRDRA;4024 unsigned i = CSR_RCVRL(p Data);4022 const unsigned cb = 1 << pThis->iLog2DescSize; 4023 RTGCPHYS32 GCPhys = pThis->GCRDRA; 4024 unsigned i = CSR_RCVRL(pThis); 4025 4025 while (i-- > 0) 4026 4026 { 4027 4027 RMD rmd; 4028 pcnetRmdLoad(p Data, &rmd, PHYSADDR(pData, GCPhys), false);4028 pcnetRmdLoad(pThis, &rmd, PHYSADDR(pThis, GCPhys), false); 4029 4029 pHlp->pfnPrintf(pHlp, 4030 4030 "%04x %RGp:%c%c RBADR=%08RX32 BCNT=%03x MCNT=%03x " 4031 4031 "OWN=%d ERR=%d FRAM=%d OFLO=%d CRC=%d BUFF=%d STP=%d ENP=%d BPE=%d " 4032 4032 "PAM=%d LAFM=%d BAM=%d RCC=%02x RPC=%02x ONES=%#x ZEROS=%d\n", 4033 i, GCPhys, i + 1 == CSR_RCVRC(p Data) ? '*' : ' ', GCPhys == CSR_CRDA(pData) ? '*' : ' ',4033 i, GCPhys, i + 1 == CSR_RCVRC(pThis) ? '*' : ' ', GCPhys == CSR_CRDA(pThis) ? '*' : ' ', 4034 4034 rmd.rmd0.rbadr, 4096 - rmd.rmd1.bcnt, rmd.rmd2.mcnt, 4035 4035 rmd.rmd1.own, rmd.rmd1.err, rmd.rmd1.fram, rmd.rmd1.oflo, rmd.rmd1.crc, rmd.rmd1.buff, … … 4052 4052 "NNXDA=%08RX32\n" 4053 4053 , 4054 CSR_XMTRL(p Data), CSR_XMTRC(pData),4055 p Data->GCTDRA, CSR_BADX(pData),4056 CSR_PXDA(p Data), CSR_PXBC(pData), CSR_PXST(pData),4057 CSR_CXDA(p Data), CSR_CXBA(pData), CSR_CXBC(pData), CSR_CXST(pData),4058 CSR_NXDA(p Data), CSR_NXBA(pData), CSR_NXBC(pData), CSR_NXST(pData),4059 CSR_NNXD(p Data));4054 CSR_XMTRL(pThis), CSR_XMTRC(pThis), 4055 pThis->GCTDRA, CSR_BADX(pThis), 4056 CSR_PXDA(pThis), CSR_PXBC(pThis), CSR_PXST(pThis), 4057 CSR_CXDA(pThis), CSR_CXBA(pThis), CSR_CXBC(pThis), CSR_CXST(pThis), 4058 CSR_NXDA(pThis), CSR_NXBA(pThis), CSR_NXBC(pThis), CSR_NXST(pThis), 4059 CSR_NNXD(pThis)); 4060 4060 if (fXmtRing) 4061 4061 { 4062 const unsigned cb = 1 << p Data->iLog2DescSize;4063 RTGCPHYS32 GCPhys = p Data->GCTDRA;4064 unsigned i = CSR_XMTRL(p Data);4062 const unsigned cb = 1 << pThis->iLog2DescSize; 4063 RTGCPHYS32 GCPhys = pThis->GCTDRA; 4064 unsigned i = CSR_XMTRL(pThis); 4065 4065 while (i-- > 0) 4066 4066 { 4067 4067 TMD tmd; 4068 pcnetTmdLoad(p Data, &tmd, PHYSADDR(pData, GCPhys), false);4068 pcnetTmdLoad(pThis, &tmd, PHYSADDR(pThis, GCPhys), false); 4069 4069 pHlp->pfnPrintf(pHlp, 4070 4070 "%04x %RGp:%c%c TBADR=%08RX32 BCNT=%03x OWN=%d " … … 4072 4072 "BUFF=%d UFLO=%d EXDEF=%d LCOL=%d LCAR=%d RTRY=%d TDR=%03x TRC=%#x ONES=%#x\n" 4073 4073 , 4074 i, GCPhys, i + 1 == CSR_XMTRC(p Data) ? '*' : ' ', GCPhys == CSR_CXDA(pData) ? '*' : ' ',4074 i, GCPhys, i + 1 == CSR_XMTRC(pThis) ? '*' : ' ', GCPhys == CSR_CXDA(pThis) ? '*' : ' ', 4075 4075 tmd.tmd0.tbadr, 4096 - tmd.tmd1.bcnt, 4076 4076 tmd.tmd2.tdr, … … 4099 4099 } 4100 4100 4101 PDMCritSectLeave(&p Data->CritSect);4101 PDMCritSectLeave(&pThis->CritSect); 4102 4102 } 4103 4103 … … 4112 4112 static DECLCALLBACK(int) pcnetSavePrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 4113 4113 { 4114 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4115 4116 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);4114 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4115 4116 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 4117 4117 AssertRC(rc); 4118 PDMCritSectLeave(&p Data->CritSect);4118 PDMCritSectLeave(&pThis->CritSect); 4119 4119 4120 4120 return VINF_SUCCESS; … … 4131 4131 static DECLCALLBACK(int) pcnetSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 4132 4132 { 4133 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4133 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4134 4134 int rc = VINF_SUCCESS; 4135 4135 4136 SSMR3PutBool(pSSMHandle, p Data->fLinkUp);4137 SSMR3PutU32(pSSMHandle, p Data->u32RAP);4138 SSMR3PutS32(pSSMHandle, p Data->iISR);4139 SSMR3PutU32(pSSMHandle, p Data->u32Lnkst);4140 SSMR3PutBool(pSSMHandle, p Data->fPrivIfEnabled); /* >= If version 0.9 */4141 SSMR3PutBool(pSSMHandle, p Data->fSignalRxMiss); /* >= If version 0.10 */4142 SSMR3PutGCPhys32(pSSMHandle, p Data->GCRDRA);4143 SSMR3PutGCPhys32(pSSMHandle, p Data->GCTDRA);4144 SSMR3PutMem(pSSMHandle, p Data->aPROM, sizeof(pData->aPROM));4145 SSMR3PutMem(pSSMHandle, p Data->aCSR, sizeof(pData->aCSR));4146 SSMR3PutMem(pSSMHandle, p Data->aBCR, sizeof(pData->aBCR));4147 SSMR3PutMem(pSSMHandle, p Data->aMII, sizeof(pData->aMII));4148 SSMR3PutU16(pSSMHandle, p Data->u16CSR0LastSeenByGuest);4149 SSMR3PutU64(pSSMHandle, p Data->u64LastPoll);4150 SSMR3PutMem(pSSMHandle, &p Data->MacConfigured, sizeof(pData->MacConfigured));4151 SSMR3PutBool(pSSMHandle, p Data->fAm79C973); /* >= If version 0.8 */4152 SSMR3PutU32(pSSMHandle, p Data->u32LinkSpeed);4136 SSMR3PutBool(pSSMHandle, pThis->fLinkUp); 4137 SSMR3PutU32(pSSMHandle, pThis->u32RAP); 4138 SSMR3PutS32(pSSMHandle, pThis->iISR); 4139 SSMR3PutU32(pSSMHandle, pThis->u32Lnkst); 4140 SSMR3PutBool(pSSMHandle, pThis->fPrivIfEnabled); /* >= If version 0.9 */ 4141 SSMR3PutBool(pSSMHandle, pThis->fSignalRxMiss); /* >= If version 0.10 */ 4142 SSMR3PutGCPhys32(pSSMHandle, pThis->GCRDRA); 4143 SSMR3PutGCPhys32(pSSMHandle, pThis->GCTDRA); 4144 SSMR3PutMem(pSSMHandle, pThis->aPROM, sizeof(pThis->aPROM)); 4145 SSMR3PutMem(pSSMHandle, pThis->aCSR, sizeof(pThis->aCSR)); 4146 SSMR3PutMem(pSSMHandle, pThis->aBCR, sizeof(pThis->aBCR)); 4147 SSMR3PutMem(pSSMHandle, pThis->aMII, sizeof(pThis->aMII)); 4148 SSMR3PutU16(pSSMHandle, pThis->u16CSR0LastSeenByGuest); 4149 SSMR3PutU64(pSSMHandle, pThis->u64LastPoll); 4150 SSMR3PutMem(pSSMHandle, &pThis->MacConfigured, sizeof(pThis->MacConfigured)); 4151 SSMR3PutBool(pSSMHandle, pThis->fAm79C973); /* >= If version 0.8 */ 4152 SSMR3PutU32(pSSMHandle, pThis->u32LinkSpeed); 4153 4153 #ifdef PCNET_NO_POLLING 4154 4154 return VINF_SUCCESS; 4155 4155 #else 4156 rc = TMR3TimerSave(p Data->CTX_SUFF(pTimerPoll), pSSMHandle);4156 rc = TMR3TimerSave(pThis->CTX_SUFF(pTimerPoll), pSSMHandle); 4157 4157 if (RT_FAILURE(rc)) 4158 4158 return rc; 4159 4159 #endif 4160 if (p Data->fAm79C973)4161 rc = TMR3TimerSave(p Data->CTX_SUFF(pTimerSoftInt), pSSMHandle);4160 if (pThis->fAm79C973) 4161 rc = TMR3TimerSave(pThis->CTX_SUFF(pTimerSoftInt), pSSMHandle); 4162 4162 return rc; 4163 4163 } … … 4173 4173 static DECLCALLBACK(int) pcnetLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 4174 4174 { 4175 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4176 4177 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);4175 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4176 4177 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 4178 4178 AssertRC(rc); 4179 PDMCritSectLeave(&p Data->CritSect);4179 PDMCritSectLeave(&pThis->CritSect); 4180 4180 4181 4181 return VINF_SUCCESS; … … 4193 4193 static DECLCALLBACK(int) pcnetLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 4194 4194 { 4195 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4195 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4196 4196 RTMAC Mac; 4197 4197 if ( SSM_VERSION_MAJOR_CHANGED(u32Version, PCNET_SAVEDSTATE_VERSION) … … 4200 4200 4201 4201 /* restore data */ 4202 SSMR3GetBool(pSSMHandle, &p Data->fLinkUp);4203 SSMR3GetU32(pSSMHandle, &p Data->u32RAP);4204 SSMR3GetS32(pSSMHandle, &p Data->iISR);4205 SSMR3GetU32(pSSMHandle, &p Data->u32Lnkst);4202 SSMR3GetBool(pSSMHandle, &pThis->fLinkUp); 4203 SSMR3GetU32(pSSMHandle, &pThis->u32RAP); 4204 SSMR3GetS32(pSSMHandle, &pThis->iISR); 4205 SSMR3GetU32(pSSMHandle, &pThis->u32Lnkst); 4206 4206 if ( SSM_VERSION_MAJOR(u32Version) > 0 4207 4207 || SSM_VERSION_MINOR(u32Version) >= 9) 4208 4208 { 4209 SSMR3GetBool(pSSMHandle, &p Data->fPrivIfEnabled);4210 if (p Data->fPrivIfEnabled)4209 SSMR3GetBool(pSSMHandle, &pThis->fPrivIfEnabled); 4210 if (pThis->fPrivIfEnabled) 4211 4211 LogRel(("PCNet#%d: Enabling private interface\n", PCNET_INST_NR)); 4212 4212 } … … 4214 4214 || SSM_VERSION_MINOR(u32Version) >= 10) 4215 4215 { 4216 SSMR3GetBool(pSSMHandle, &p Data->fSignalRxMiss);4217 } 4218 SSMR3GetGCPhys32(pSSMHandle, &p Data->GCRDRA);4219 SSMR3GetGCPhys32(pSSMHandle, &p Data->GCTDRA);4220 SSMR3GetMem(pSSMHandle, &p Data->aPROM, sizeof(pData->aPROM));4221 SSMR3GetMem(pSSMHandle, &p Data->aCSR, sizeof(pData->aCSR));4222 SSMR3GetMem(pSSMHandle, &p Data->aBCR, sizeof(pData->aBCR));4223 SSMR3GetMem(pSSMHandle, &p Data->aMII, sizeof(pData->aMII));4224 SSMR3GetU16(pSSMHandle, &p Data->u16CSR0LastSeenByGuest);4225 SSMR3GetU64(pSSMHandle, &p Data->u64LastPoll);4216 SSMR3GetBool(pSSMHandle, &pThis->fSignalRxMiss); 4217 } 4218 SSMR3GetGCPhys32(pSSMHandle, &pThis->GCRDRA); 4219 SSMR3GetGCPhys32(pSSMHandle, &pThis->GCTDRA); 4220 SSMR3GetMem(pSSMHandle, &pThis->aPROM, sizeof(pThis->aPROM)); 4221 SSMR3GetMem(pSSMHandle, &pThis->aCSR, sizeof(pThis->aCSR)); 4222 SSMR3GetMem(pSSMHandle, &pThis->aBCR, sizeof(pThis->aBCR)); 4223 SSMR3GetMem(pSSMHandle, &pThis->aMII, sizeof(pThis->aMII)); 4224 SSMR3GetU16(pSSMHandle, &pThis->u16CSR0LastSeenByGuest); 4225 SSMR3GetU64(pSSMHandle, &pThis->u64LastPoll); 4226 4226 SSMR3GetMem(pSSMHandle, &Mac, sizeof(Mac)); 4227 Assert( !memcmp(&Mac, &p Data->MacConfigured, sizeof(Mac))4227 Assert( !memcmp(&Mac, &pThis->MacConfigured, sizeof(Mac)) 4228 4228 || SSMR3HandleGetAfter(pSSMHandle) == SSMAFTER_DEBUG_IT); 4229 SSMR3GetBool(pSSMHandle, &p Data->fAm79C973);4230 SSMR3GetU32(pSSMHandle, &p Data->u32LinkSpeed);4229 SSMR3GetBool(pSSMHandle, &pThis->fAm79C973); 4230 SSMR3GetU32(pSSMHandle, &pThis->u32LinkSpeed); 4231 4231 #ifndef PCNET_NO_POLLING 4232 TMR3TimerLoad(p Data->CTX_SUFF(pTimerPoll), pSSMHandle);4233 #endif 4234 if (p Data->fAm79C973)4232 TMR3TimerLoad(pThis->CTX_SUFF(pTimerPoll), pSSMHandle); 4233 #endif 4234 if (pThis->fAm79C973) 4235 4235 { 4236 4236 if ( SSM_VERSION_MAJOR(u32Version) > 0 4237 4237 || SSM_VERSION_MINOR(u32Version) >= 8) 4238 TMR3TimerLoad(p Data->CTX_SUFF(pTimerSoftInt), pSSMHandle);4239 } 4240 4241 p Data->iLog2DescSize = BCR_SWSTYLE(pData)4238 TMR3TimerLoad(pThis->CTX_SUFF(pTimerSoftInt), pSSMHandle); 4239 } 4240 4241 pThis->iLog2DescSize = BCR_SWSTYLE(pThis) 4242 4242 ? 4 4243 4243 : 3; 4244 p Data->GCUpperPhys = BCR_SSIZE32(pData)4244 pThis->GCUpperPhys = BCR_SSIZE32(pThis) 4245 4245 ? 0 4246 : (0xff00 & (uint32_t)p Data->aCSR[2]) << 16;4246 : (0xff00 & (uint32_t)pThis->aCSR[2]) << 16; 4247 4247 4248 4248 /* update promiscuous mode. */ 4249 if (p Data->pDrv)4250 p Data->pDrv->pfnSetPromiscuousMode(pData->pDrv, CSR_PROM(pData));4249 if (pThis->pDrv) 4250 pThis->pDrv->pfnSetPromiscuousMode(pThis->pDrv, CSR_PROM(pThis)); 4251 4251 4252 4252 #ifdef PCNET_NO_POLLING 4253 4253 /* Enable physical monitoring again (!) */ 4254 pcnetUpdateRingHandlers(p Data);4254 pcnetUpdateRingHandlers(pThis); 4255 4255 #endif 4256 4256 /* Indicate link down to the guest OS that all network connections have been lost. */ 4257 if (p Data->fLinkUp)4258 { 4259 p Data->fLinkTempDown = true;4260 p Data->cLinkDownReported = 0;4261 p Data->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */4262 p Data->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;4263 return TMTimerSetMillies(p Data->pTimerRestore, 5000);4257 if (pThis->fLinkUp) 4258 { 4259 pThis->fLinkTempDown = true; 4260 pThis->cLinkDownReported = 0; 4261 pThis->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */ 4262 pThis->Led.Asserted.s.fError = pThis->Led.Actual.s.fError = 1; 4263 return TMTimerSetMillies(pThis->pTimerRestore, 5000); 4264 4264 } 4265 4265 return VINF_SUCCESS; … … 4278 4278 static DECLCALLBACK(void *) pcnetQueryInterface(struct PDMIBASE *pInterface, PDMINTERFACE enmInterface) 4279 4279 { 4280 PCNetState *p Data= (PCNetState *)((uintptr_t)pInterface - RT_OFFSETOF(PCNetState, IBase));4281 Assert(&p Data->IBase == pInterface);4280 PCNetState *pThis = (PCNetState *)((uintptr_t)pInterface - RT_OFFSETOF(PCNetState, IBase)); 4281 Assert(&pThis->IBase == pInterface); 4282 4282 switch (enmInterface) 4283 4283 { 4284 4284 case PDMINTERFACE_BASE: 4285 return &p Data->IBase;4285 return &pThis->IBase; 4286 4286 case PDMINTERFACE_NETWORK_PORT: 4287 return &p Data->INetworkPort;4287 return &pThis->INetworkPort; 4288 4288 case PDMINTERFACE_NETWORK_CONFIG: 4289 return &p Data->INetworkConfig;4289 return &pThis->INetworkConfig; 4290 4290 case PDMINTERFACE_LED_PORTS: 4291 return &p Data->ILeds;4291 return &pThis->ILeds; 4292 4292 default: 4293 4293 return NULL; … … 4306 4306 * @param pInterface Pointer to the interface structure containing the called function pointer. 4307 4307 */ 4308 static int pcnetCanReceive(PCNetState *p Data)4309 { 4310 int rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);4308 static int pcnetCanReceive(PCNetState *pThis) 4309 { 4310 int rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 4311 4311 AssertReleaseRC(rc); 4312 4312 4313 4313 rc = VERR_NET_NO_BUFFER_SPACE; 4314 4314 4315 if (RT_LIKELY(!CSR_DRX(p Data) && !CSR_STOP(pData) && !CSR_SPND(pData)))4316 { 4317 if (HOST_IS_OWNER(CSR_CRST(p Data)) && pData->GCRDRA)4318 pcnetRdtePoll(p Data);4319 4320 if (RT_UNLIKELY(HOST_IS_OWNER(CSR_CRST(p Data))))4315 if (RT_LIKELY(!CSR_DRX(pThis) && !CSR_STOP(pThis) && !CSR_SPND(pThis))) 4316 { 4317 if (HOST_IS_OWNER(CSR_CRST(pThis)) && pThis->GCRDRA) 4318 pcnetRdtePoll(pThis); 4319 4320 if (RT_UNLIKELY(HOST_IS_OWNER(CSR_CRST(pThis)))) 4321 4321 { 4322 4322 /** @todo Notify the guest _now_. Will potentially increase the interrupt load */ 4323 if (p Data->fSignalRxMiss)4324 p Data->aCSR[0] |= 0x1000; /* Set MISS flag */4323 if (pThis->fSignalRxMiss) 4324 pThis->aCSR[0] |= 0x1000; /* Set MISS flag */ 4325 4325 } 4326 4326 else … … 4328 4328 } 4329 4329 4330 PDMCritSectLeave(&p Data->CritSect);4330 PDMCritSectLeave(&pThis->CritSect); 4331 4331 return rc; 4332 4332 } … … 4338 4338 static DECLCALLBACK(int) pcnetWaitReceiveAvail(PPDMINETWORKPORT pInterface, unsigned cMillies) 4339 4339 { 4340 PCNetState *p Data= INETWORKPORT_2_DATA(pInterface);4341 4342 int rc = pcnetCanReceive(p Data);4340 PCNetState *pThis = INETWORKPORT_2_DATA(pInterface); 4341 4342 int rc = pcnetCanReceive(pThis); 4343 4343 if (RT_SUCCESS(rc)) 4344 4344 return VINF_SUCCESS; … … 4347 4347 4348 4348 rc = VERR_INTERRUPTED; 4349 ASMAtomicXchgBool(&p Data->fMaybeOutOfSpace, true);4350 STAM_PROFILE_START(&p Data->StatRxOverflow, a);4351 while (RT_LIKELY(PDMDevHlpVMState(p Data->CTX_SUFF(pDevIns)) == VMSTATE_RUNNING))4352 { 4353 int rc2 = pcnetCanReceive(p Data);4349 ASMAtomicXchgBool(&pThis->fMaybeOutOfSpace, true); 4350 STAM_PROFILE_START(&pThis->StatRxOverflow, a); 4351 while (RT_LIKELY(PDMDevHlpVMState(pThis->CTX_SUFF(pDevIns)) == VMSTATE_RUNNING)) 4352 { 4353 int rc2 = pcnetCanReceive(pThis); 4354 4354 if (RT_SUCCESS(rc2)) 4355 4355 { … … 4360 4360 /* Start the poll timer once which will remain active as long fMaybeOutOfSpace 4361 4361 * is true -- even if (transmit) polling is disabled (CSR_DPOLL). */ 4362 rc2 = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);4362 rc2 = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 4363 4363 AssertReleaseRC(rc2); 4364 pcnetPollTimerStart(p Data);4365 PDMCritSectLeave(&p Data->CritSect);4366 RTSemEventWait(p Data->hEventOutOfRxSpace, cMillies);4367 } 4368 STAM_PROFILE_STOP(&p Data->StatRxOverflow, a);4369 ASMAtomicXchgBool(&p Data->fMaybeOutOfSpace, false);4364 pcnetPollTimerStart(pThis); 4365 PDMCritSectLeave(&pThis->CritSect); 4366 RTSemEventWait(pThis->hEventOutOfRxSpace, cMillies); 4367 } 4368 STAM_PROFILE_STOP(&pThis->StatRxOverflow, a); 4369 ASMAtomicXchgBool(&pThis->fMaybeOutOfSpace, false); 4370 4370 4371 4371 return rc; … … 4384 4384 static DECLCALLBACK(int) pcnetReceive(PPDMINETWORKPORT pInterface, const void *pvBuf, size_t cb) 4385 4385 { 4386 PCNetState *p Data= INETWORKPORT_2_DATA(pInterface);4386 PCNetState *pThis = INETWORKPORT_2_DATA(pInterface); 4387 4387 int rc; 4388 4388 4389 STAM_PROFILE_ADV_START(&p Data->StatReceive, a);4390 rc = PDMCritSectEnter(&p Data->CritSect, VERR_SEM_BUSY);4389 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 4390 rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY); 4391 4391 AssertReleaseRC(rc); 4392 4392 4393 4393 if (cb > 70) /* unqualified guess */ 4394 p Data->Led.Asserted.s.fReading = pData->Led.Actual.s.fReading = 1;4395 pcnetReceiveNoSync(p Data, (const uint8_t *)pvBuf, cb);4396 p Data->Led.Actual.s.fReading = 0;4397 4398 PDMCritSectLeave(&p Data->CritSect);4399 STAM_PROFILE_ADV_STOP(&p Data->StatReceive, a);4394 pThis->Led.Asserted.s.fReading = pThis->Led.Actual.s.fReading = 1; 4395 pcnetReceiveNoSync(pThis, (const uint8_t *)pvBuf, cb); 4396 pThis->Led.Actual.s.fReading = 0; 4397 4398 PDMCritSectLeave(&pThis->CritSect); 4399 STAM_PROFILE_ADV_STOP(&pThis->StatReceive, a); 4400 4400 4401 4401 return VINF_SUCCESS; … … 4416 4416 static DECLCALLBACK(int) pcnetGetMac(PPDMINETWORKCONFIG pInterface, PRTMAC pMac) 4417 4417 { 4418 PCNetState *p Data= INETWORKCONFIG_2_DATA(pInterface);4419 memcpy(pMac, p Data->aPROM, sizeof(*pMac));4418 PCNetState *pThis = INETWORKCONFIG_2_DATA(pInterface); 4419 memcpy(pMac, pThis->aPROM, sizeof(*pMac)); 4420 4420 return VINF_SUCCESS; 4421 4421 } … … 4431 4431 static DECLCALLBACK(PDMNETWORKLINKSTATE) pcnetGetLinkState(PPDMINETWORKCONFIG pInterface) 4432 4432 { 4433 PCNetState *p Data= INETWORKCONFIG_2_DATA(pInterface);4434 if (p Data->fLinkUp && !pData->fLinkTempDown)4433 PCNetState *pThis = INETWORKCONFIG_2_DATA(pInterface); 4434 if (pThis->fLinkUp && !pThis->fLinkTempDown) 4435 4435 return PDMNETWORKLINKSTATE_UP; 4436 if (!p Data->fLinkUp)4436 if (!pThis->fLinkUp) 4437 4437 return PDMNETWORKLINKSTATE_DOWN; 4438 if (p Data->fLinkTempDown)4438 if (pThis->fLinkTempDown) 4439 4439 return PDMNETWORKLINKSTATE_DOWN_RESUME; 4440 4440 AssertMsgFailed(("Invalid link state!\n")); … … 4453 4453 static DECLCALLBACK(int) pcnetSetLinkState(PPDMINETWORKCONFIG pInterface, PDMNETWORKLINKSTATE enmState) 4454 4454 { 4455 PCNetState *p Data= INETWORKCONFIG_2_DATA(pInterface);4455 PCNetState *pThis = INETWORKCONFIG_2_DATA(pInterface); 4456 4456 bool fLinkUp; 4457 4457 if ( enmState != PDMNETWORKLINKSTATE_DOWN … … 4464 4464 /* has the state changed? */ 4465 4465 fLinkUp = enmState == PDMNETWORKLINKSTATE_UP; 4466 if (p Data->fLinkUp != fLinkUp)4467 { 4468 p Data->fLinkUp = fLinkUp;4466 if (pThis->fLinkUp != fLinkUp) 4467 { 4468 pThis->fLinkUp = fLinkUp; 4469 4469 if (fLinkUp) 4470 4470 { 4471 4471 /* connect */ 4472 p Data->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */4473 p Data->Led.Actual.s.fError = 0;4472 pThis->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */ 4473 pThis->Led.Actual.s.fError = 0; 4474 4474 } 4475 4475 else 4476 4476 { 4477 4477 /* disconnect */ 4478 p Data->cLinkDownReported = 0;4479 p Data->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */4480 p Data->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;4478 pThis->cLinkDownReported = 0; 4479 pThis->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */ 4480 pThis->Led.Asserted.s.fError = pThis->Led.Actual.s.fError = 1; 4481 4481 } 4482 Assert(!PDMCritSectIsOwner(&p Data->CritSect));4483 p Data->pDrv->pfnNotifyLinkChanged(pData->pDrv, enmState);4482 Assert(!PDMCritSectIsOwner(&pThis->CritSect)); 4483 pThis->pDrv->pfnNotifyLinkChanged(pThis->pDrv, enmState); 4484 4484 } 4485 4485 return VINF_SUCCESS; … … 4497 4497 static DECLCALLBACK(int) pcnetQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 4498 4498 { 4499 PCNetState *p Data= (PCNetState *)( (uintptr_t)pInterface - RT_OFFSETOF(PCNetState, ILeds) );4499 PCNetState *pThis = (PCNetState *)( (uintptr_t)pInterface - RT_OFFSETOF(PCNetState, ILeds) ); 4500 4500 if (iLUN == 0) 4501 4501 { 4502 *ppLed = &p Data->Led;4502 *ppLed = &pThis->Led; 4503 4503 return VINF_SUCCESS; 4504 4504 } … … 4532 4532 static DECLCALLBACK(void) pcnetReset(PPDMDEVINS pDevIns) 4533 4533 { 4534 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4535 if (p Data->fLinkTempDown)4536 { 4537 p Data->cLinkDownReported = 0x10000;4538 TMTimerStop(p Data->pTimerRestore);4539 pcnetTimerRestore(pDevIns, p Data->pTimerRestore);4540 } 4541 if (p Data->pSharedMMIOR3)4542 pcnetInitSharedMemory(p Data);4534 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4535 if (pThis->fLinkTempDown) 4536 { 4537 pThis->cLinkDownReported = 0x10000; 4538 TMTimerStop(pThis->pTimerRestore); 4539 pcnetTimerRestore(pDevIns, pThis->pTimerRestore); 4540 } 4541 if (pThis->pSharedMMIOR3) 4542 pcnetInitSharedMemory(pThis); 4543 4543 4544 4544 /** @todo How to flush the queues? */ 4545 pcnetHardReset(p Data);4545 pcnetHardReset(pThis); 4546 4546 } 4547 4547 … … 4552 4552 static DECLCALLBACK(void) pcnetRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 4553 4553 { 4554 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4555 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);4556 p Data->pXmitQueueRC = PDMQueueRCPtr(pData->pXmitQueueR3);4557 p Data->pCanRxQueueRC = PDMQueueRCPtr(pData->pCanRxQueueR3);4558 if (p Data->pSharedMMIOR3)4559 p Data->pSharedMMIORC += offDelta;4554 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4555 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 4556 pThis->pXmitQueueRC = PDMQueueRCPtr(pThis->pXmitQueueR3); 4557 pThis->pCanRxQueueRC = PDMQueueRCPtr(pThis->pCanRxQueueR3); 4558 if (pThis->pSharedMMIOR3) 4559 pThis->pSharedMMIORC += offDelta; 4560 4560 #ifdef PCNET_NO_POLLING 4561 p Data->pfnEMInterpretInstructionRC += offDelta;4561 pThis->pfnEMInterpretInstructionRC += offDelta; 4562 4562 #else 4563 p Data->pTimerPollRC = TMTimerRCPtr(pData->pTimerPollR3);4564 #endif 4565 if (p Data->fAm79C973)4566 p Data->pTimerSoftIntRC = TMTimerRCPtr(pData->pTimerSoftIntR3);4563 pThis->pTimerPollRC = TMTimerRCPtr(pThis->pTimerPollR3); 4564 #endif 4565 if (pThis->fAm79C973) 4566 pThis->pTimerSoftIntRC = TMTimerRCPtr(pThis->pTimerSoftIntR3); 4567 4567 } 4568 4568 … … 4579 4579 static DECLCALLBACK(int) pcnetDestruct(PPDMDEVINS pDevIns) 4580 4580 { 4581 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4582 4583 if (PDMCritSectIsInitialized(&p Data->CritSect))4581 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4582 4583 if (PDMCritSectIsInitialized(&pThis->CritSect)) 4584 4584 { 4585 4585 /* … … 4588 4588 * will take care of terminating and cleaning up the thread. 4589 4589 */ 4590 RTSemEventDestroy(p Data->hSendEventSem);4591 p Data->hSendEventSem = NIL_RTSEMEVENT;4592 RTSemEventSignal(p Data->hEventOutOfRxSpace);4593 RTSemEventDestroy(p Data->hEventOutOfRxSpace);4594 p Data->hEventOutOfRxSpace = NIL_RTSEMEVENT;4595 PDMR3CritSectDelete(&p Data->CritSect);4590 RTSemEventDestroy(pThis->hSendEventSem); 4591 pThis->hSendEventSem = NIL_RTSEMEVENT; 4592 RTSemEventSignal(pThis->hEventOutOfRxSpace); 4593 RTSemEventDestroy(pThis->hEventOutOfRxSpace); 4594 pThis->hEventOutOfRxSpace = NIL_RTSEMEVENT; 4595 PDMR3CritSectDelete(&pThis->CritSect); 4596 4596 } 4597 4597 #ifdef PCNET_QUEUE_SEND_PACKETS 4598 if (p Data->apXmitRingBuffer)4599 RTMemFree(p Data->apXmitRingBuffer[0]);4598 if (pThis->apXmitRingBuffer) 4599 RTMemFree(pThis->apXmitRingBuffer[0]); 4600 4600 #endif 4601 4601 return VINF_SUCCESS; … … 4618 4618 static DECLCALLBACK(int) pcnetConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 4619 4619 { 4620 PCNetState *p Data= PDMINS_2_DATA(pDevIns, PCNetState *);4620 PCNetState *pThis = PDMINS_2_DATA(pDevIns, PCNetState *); 4621 4621 PPDMIBASE pBase; 4622 4622 char szTmp[128]; … … 4626 4626 Assert((iInstance >= 0) && (iInstance < 4)); 4627 4627 4628 Assert(RT_ELEMENTS(p Data->aBCR) == BCR_MAX_RAP);4629 Assert(RT_ELEMENTS(p Data->aMII) == MII_MAX_REG);4630 Assert(sizeof(p Data->abSendBuf) == RT_ALIGN_Z(sizeof(pData->abSendBuf), 16));4628 Assert(RT_ELEMENTS(pThis->aBCR) == BCR_MAX_RAP); 4629 Assert(RT_ELEMENTS(pThis->aMII) == MII_MAX_REG); 4630 Assert(sizeof(pThis->abSendBuf) == RT_ALIGN_Z(sizeof(pThis->abSendBuf), 16)); 4631 4631 4632 4632 /* 4633 4633 * Init what's required to make the destructor safe. 4634 4634 */ 4635 p Data->hEventOutOfRxSpace = NIL_RTSEMEVENT;4636 p Data->hSendEventSem = NIL_RTSEMEVENT;4635 pThis->hEventOutOfRxSpace = NIL_RTSEMEVENT; 4636 pThis->hSendEventSem = NIL_RTSEMEVENT; 4637 4637 4638 4638 /* … … 4646 4646 * Read the configuration. 4647 4647 */ 4648 rc = CFGMR3QueryBytes(pCfgHandle, "MAC", &p Data->MacConfigured, sizeof(pData->MacConfigured));4648 rc = CFGMR3QueryBytes(pCfgHandle, "MAC", &pThis->MacConfigured, sizeof(pThis->MacConfigured)); 4649 4649 if (RT_FAILURE(rc)) 4650 4650 return PDMDEV_SET_ERROR(pDevIns, rc, 4651 4651 N_("Configuration error: Failed to get the \"MAC\" value")); 4652 rc = CFGMR3QueryBoolDef(pCfgHandle, "CableConnected", &p Data->fLinkUp, true);4652 rc = CFGMR3QueryBoolDef(pCfgHandle, "CableConnected", &pThis->fLinkUp, true); 4653 4653 if (RT_FAILURE(rc)) 4654 4654 return PDMDEV_SET_ERROR(pDevIns, rc, 4655 4655 N_("Configuration error: Failed to get the \"CableConnected\" value")); 4656 4656 4657 rc = CFGMR3QueryBoolDef(pCfgHandle, "Am79C973", &p Data->fAm79C973, false);4657 rc = CFGMR3QueryBoolDef(pCfgHandle, "Am79C973", &pThis->fAm79C973, false); 4658 4658 if (RT_FAILURE(rc)) 4659 4659 return PDMDEV_SET_ERROR(pDevIns, rc, 4660 4660 N_("Configuration error: Failed to get the \"Am79C973\" value")); 4661 4661 4662 rc = CFGMR3QueryU32Def(pCfgHandle, "LineSpeed", &p Data->u32LinkSpeed, 1000000); /* 1GBit/s (in kbps units)*/4662 rc = CFGMR3QueryU32Def(pCfgHandle, "LineSpeed", &pThis->u32LinkSpeed, 1000000); /* 1GBit/s (in kbps units)*/ 4663 4663 if (RT_FAILURE(rc)) 4664 4664 return PDMDEV_SET_ERROR(pDevIns, rc, … … 4666 4666 4667 4667 #ifdef PCNET_GC_ENABLED 4668 rc = CFGMR3QueryBoolDef(pCfgHandle, "GCEnabled", &p Data->fGCEnabled, true);4668 rc = CFGMR3QueryBoolDef(pCfgHandle, "GCEnabled", &pThis->fGCEnabled, true); 4669 4669 if (RT_FAILURE(rc)) 4670 4670 return PDMDEV_SET_ERROR(pDevIns, rc, 4671 4671 N_("Configuration error: Failed to get the \"GCEnabled\" value")); 4672 4672 4673 rc = CFGMR3QueryBoolDef(pCfgHandle, "R0Enabled", &p Data->fR0Enabled, true);4673 rc = CFGMR3QueryBoolDef(pCfgHandle, "R0Enabled", &pThis->fR0Enabled, true); 4674 4674 if (RT_FAILURE(rc)) 4675 4675 return PDMDEV_SET_ERROR(pDevIns, rc, … … 4677 4677 4678 4678 #else /* !PCNET_GC_ENABLED */ 4679 p Data->fGCEnabled = false;4680 p Data->fR0Enabled = false;4679 pThis->fGCEnabled = false; 4680 pThis->fR0Enabled = false; 4681 4681 #endif /* !PCNET_GC_ENABLED */ 4682 4682 … … 4685 4685 * Initialize data (most of it anyway). 4686 4686 */ 4687 p Data->pDevInsR3 = pDevIns;4688 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);4689 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);4690 p Data->Led.u32Magic = PDMLED_MAGIC;4687 pThis->pDevInsR3 = pDevIns; 4688 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 4689 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 4690 pThis->Led.u32Magic = PDMLED_MAGIC; 4691 4691 /* IBase */ 4692 p Data->IBase.pfnQueryInterface = pcnetQueryInterface;4692 pThis->IBase.pfnQueryInterface = pcnetQueryInterface; 4693 4693 /* INeworkPort */ 4694 p Data->INetworkPort.pfnWaitReceiveAvail = pcnetWaitReceiveAvail;4695 p Data->INetworkPort.pfnReceive = pcnetReceive;4694 pThis->INetworkPort.pfnWaitReceiveAvail = pcnetWaitReceiveAvail; 4695 pThis->INetworkPort.pfnReceive = pcnetReceive; 4696 4696 /* INetworkConfig */ 4697 p Data->INetworkConfig.pfnGetMac = pcnetGetMac;4698 p Data->INetworkConfig.pfnGetLinkState = pcnetGetLinkState;4699 p Data->INetworkConfig.pfnSetLinkState = pcnetSetLinkState;4697 pThis->INetworkConfig.pfnGetMac = pcnetGetMac; 4698 pThis->INetworkConfig.pfnGetLinkState = pcnetGetLinkState; 4699 pThis->INetworkConfig.pfnSetLinkState = pcnetSetLinkState; 4700 4700 /* ILeds */ 4701 p Data->ILeds.pfnQueryStatusLed = pcnetQueryStatusLed;4701 pThis->ILeds.pfnQueryStatusLed = pcnetQueryStatusLed; 4702 4702 4703 4703 /* PCI Device */ 4704 PCIDevSetVendorId(&p Data->PciDev, 0x1022);4705 PCIDevSetDeviceId(&p Data->PciDev, 0x2000);4706 p Data->PciDev.config[0x04] = 0x07; /* command */4707 p Data->PciDev.config[0x05] = 0x00;4708 p Data->PciDev.config[0x06] = 0x80; /* status */4709 p Data->PciDev.config[0x07] = 0x02;4710 p Data->PciDev.config[0x08] = pData->fAm79C973 ? 0x40 : 0x10; /* revision */4711 p Data->PciDev.config[0x09] = 0x00;4712 p Data->PciDev.config[0x0a] = 0x00; /* ethernet network controller */4713 p Data->PciDev.config[0x0b] = 0x02;4714 p Data->PciDev.config[0x0e] = 0x00; /* header_type */4715 4716 p Data->PciDev.config[0x10] = 0x01; /* IO Base */4717 p Data->PciDev.config[0x11] = 0x00;4718 p Data->PciDev.config[0x12] = 0x00;4719 p Data->PciDev.config[0x13] = 0x00;4720 p Data->PciDev.config[0x14] = 0x00; /* MMIO Base */4721 p Data->PciDev.config[0x15] = 0x00;4722 p Data->PciDev.config[0x16] = 0x00;4723 p Data->PciDev.config[0x17] = 0x00;4704 PCIDevSetVendorId(&pThis->PciDev, 0x1022); 4705 PCIDevSetDeviceId(&pThis->PciDev, 0x2000); 4706 pThis->PciDev.config[0x04] = 0x07; /* command */ 4707 pThis->PciDev.config[0x05] = 0x00; 4708 pThis->PciDev.config[0x06] = 0x80; /* status */ 4709 pThis->PciDev.config[0x07] = 0x02; 4710 pThis->PciDev.config[0x08] = pThis->fAm79C973 ? 0x40 : 0x10; /* revision */ 4711 pThis->PciDev.config[0x09] = 0x00; 4712 pThis->PciDev.config[0x0a] = 0x00; /* ethernet network controller */ 4713 pThis->PciDev.config[0x0b] = 0x02; 4714 pThis->PciDev.config[0x0e] = 0x00; /* header_type */ 4715 4716 pThis->PciDev.config[0x10] = 0x01; /* IO Base */ 4717 pThis->PciDev.config[0x11] = 0x00; 4718 pThis->PciDev.config[0x12] = 0x00; 4719 pThis->PciDev.config[0x13] = 0x00; 4720 pThis->PciDev.config[0x14] = 0x00; /* MMIO Base */ 4721 pThis->PciDev.config[0x15] = 0x00; 4722 pThis->PciDev.config[0x16] = 0x00; 4723 pThis->PciDev.config[0x17] = 0x00; 4724 4724 4725 4725 /* subsystem and subvendor IDs */ 4726 p Data->PciDev.config[0x2c] = 0x22; /* subsystem vendor id */4727 p Data->PciDev.config[0x2d] = 0x10;4728 p Data->PciDev.config[0x2e] = 0x00; /* subsystem id */4729 p Data->PciDev.config[0x2f] = 0x20;4730 p Data->PciDev.config[0x3d] = 1; /* interrupt pin 0 */4731 p Data->PciDev.config[0x3e] = 0x06;4732 p Data->PciDev.config[0x3f] = 0xff;4726 pThis->PciDev.config[0x2c] = 0x22; /* subsystem vendor id */ 4727 pThis->PciDev.config[0x2d] = 0x10; 4728 pThis->PciDev.config[0x2e] = 0x00; /* subsystem id */ 4729 pThis->PciDev.config[0x2f] = 0x20; 4730 pThis->PciDev.config[0x3d] = 1; /* interrupt pin 0 */ 4731 pThis->PciDev.config[0x3e] = 0x06; 4732 pThis->PciDev.config[0x3f] = 0xff; 4733 4733 4734 4734 /* 4735 4735 * Register the PCI device, its I/O regions, the timer and the saved state item. 4736 4736 */ 4737 rc = PDMDevHlpPCIRegister(pDevIns, &p Data->PciDev);4737 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev); 4738 4738 if (RT_FAILURE(rc)) 4739 4739 return rc; … … 4761 4761 * should not care if there is an additional PCI ressource but just in case we made this configurable. 4762 4762 */ 4763 rc = PDMDevHlpMMIO2Register(pDevIns, 2, PCNET_GUEST_SHARED_MEMORY_SIZE, 0, (void **)&p Data->pSharedMMIOR3, "PCNetShMem");4763 rc = PDMDevHlpMMIO2Register(pDevIns, 2, PCNET_GUEST_SHARED_MEMORY_SIZE, 0, (void **)&pThis->pSharedMMIOR3, "PCNetShMem"); 4764 4764 if (RT_FAILURE(rc)) 4765 4765 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 4766 4766 N_("Failed to allocate %u bytes of memory for the PCNet device"), PCNET_GUEST_SHARED_MEMORY_SIZE); 4767 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 2, 0, 8192, "PCNetShMem", &p Data->pSharedMMIORC);4767 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 2, 0, 8192, "PCNetShMem", &pThis->pSharedMMIORC); 4768 4768 if (RT_FAILURE(rc)) 4769 4769 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 4770 4770 N_("Failed to map 8192 bytes of memory for the PCNet device into the hyper memory")); 4771 p Data->pSharedMMIOR0 = (uintptr_t)pData->pSharedMMIOR3; /** @todo #1865: Map MMIO2 into ring-0. */4772 4773 pcnetInitSharedMemory(p Data);4771 pThis->pSharedMMIOR0 = (uintptr_t)pThis->pSharedMMIOR3; /** @todo #1865: Map MMIO2 into ring-0. */ 4772 4773 pcnetInitSharedMemory(pThis); 4774 4774 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, PCNET_GUEST_SHARED_MEMORY_SIZE, 4775 4775 PCI_ADDRESS_SPACE_MEM, pcnetMMIOSharedMap); … … 4782 4782 * Resolve the R0 and RC handlers. 4783 4783 */ 4784 rc = PDMR3GetSymbolR0Lazy(PDMDevHlpGetVM(pDevIns), NULL, "EMInterpretInstruction", &p Data->pfnEMInterpretInstructionR0);4784 rc = PDMR3GetSymbolR0Lazy(PDMDevHlpGetVM(pDevIns), NULL, "EMInterpretInstruction", &pThis->pfnEMInterpretInstructionR0); 4785 4785 if (RT_SUCCESS(rc)) 4786 rc = PDMR3GetSymbolGCLazy(PDMDevHlpGetVM(pDevIns), NULL, "EMInterpretInstruction", (RTGCPTR *)&p Data->pfnEMInterpretInstructionRC);4786 rc = PDMR3GetSymbolGCLazy(PDMDevHlpGetVM(pDevIns), NULL, "EMInterpretInstruction", (RTGCPTR *)&pThis->pfnEMInterpretInstructionRC); 4787 4787 AssertLogRelMsgRCReturn(rc, ("PDMR3GetSymbolGCLazy(EMInterpretInstruction) -> %Vrc\n", rc), rc); 4788 4788 #else 4789 4789 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, pcnetTimer, 4790 "PCNet Poll Timer", &p Data->pTimerPollR3);4790 "PCNet Poll Timer", &pThis->pTimerPollR3); 4791 4791 if (RT_FAILURE(rc)) 4792 4792 return rc; 4793 p Data->pTimerPollR0 = TMTimerR0Ptr(pData->pTimerPollR3);4794 p Data->pTimerPollRC = TMTimerRCPtr(pData->pTimerPollR3);4795 #endif 4796 if (p Data->fAm79C973)4793 pThis->pTimerPollR0 = TMTimerR0Ptr(pThis->pTimerPollR3); 4794 pThis->pTimerPollRC = TMTimerRCPtr(pThis->pTimerPollR3); 4795 #endif 4796 if (pThis->fAm79C973) 4797 4797 { 4798 4798 /* Software Interrupt timer */ 4799 4799 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, pcnetTimerSoftInt, 4800 "PCNet SoftInt Timer", &p Data->pTimerSoftIntR3);4800 "PCNet SoftInt Timer", &pThis->pTimerSoftIntR3); 4801 4801 if (RT_FAILURE(rc)) 4802 4802 return rc; 4803 p Data->pTimerSoftIntR0 = TMTimerR0Ptr(pData->pTimerSoftIntR3);4804 p Data->pTimerSoftIntRC = TMTimerRCPtr(pData->pTimerSoftIntR3);4803 pThis->pTimerSoftIntR0 = TMTimerR0Ptr(pThis->pTimerSoftIntR3); 4804 pThis->pTimerSoftIntRC = TMTimerRCPtr(pThis->pTimerSoftIntR3); 4805 4805 } 4806 4806 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, pcnetTimerRestore, 4807 "PCNet Restore Timer", &p Data->pTimerRestore);4807 "PCNet Restore Timer", &pThis->pTimerRestore); 4808 4808 if (RT_FAILURE(rc)) 4809 4809 return rc; 4810 4810 4811 4811 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 4812 PCNET_SAVEDSTATE_VERSION, sizeof(*p Data),4812 PCNET_SAVEDSTATE_VERSION, sizeof(*pThis), 4813 4813 pcnetSavePrep, pcnetSaveExec, NULL, 4814 4814 pcnetLoadPrep, pcnetLoadExec, NULL); … … 4822 4822 char szName[24]; 4823 4823 RTStrPrintf(szName, sizeof(szName), "PCNet#%d", iInstance); 4824 rc = PDMDevHlpCritSectInit(pDevIns, &p Data->CritSect, szName);4824 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, szName); 4825 4825 if (RT_FAILURE(rc)) 4826 4826 return rc; 4827 4827 4828 rc = RTSemEventCreate(&p Data->hEventOutOfRxSpace);4828 rc = RTSemEventCreate(&pThis->hEventOutOfRxSpace); 4829 4829 AssertRC(rc); 4830 4830 … … 4833 4833 */ 4834 4834 rc = PDMDevHlpPDMQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 1, 0, 4835 pcnetXmitQueueConsumer, true, &p Data->pXmitQueueR3);4835 pcnetXmitQueueConsumer, true, &pThis->pXmitQueueR3); 4836 4836 if (RT_FAILURE(rc)) 4837 4837 return rc; 4838 p Data->pXmitQueueR0 = PDMQueueR0Ptr(pData->pXmitQueueR3);4839 p Data->pXmitQueueRC = PDMQueueRCPtr(pData->pXmitQueueR3);4838 pThis->pXmitQueueR0 = PDMQueueR0Ptr(pThis->pXmitQueueR3); 4839 pThis->pXmitQueueRC = PDMQueueRCPtr(pThis->pXmitQueueR3); 4840 4840 4841 4841 /* … … 4843 4843 */ 4844 4844 rc = PDMDevHlpPDMQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 1, 0, 4845 pcnetCanRxQueueConsumer, true, &p Data->pCanRxQueueR3);4845 pcnetCanRxQueueConsumer, true, &pThis->pCanRxQueueR3); 4846 4846 if (RT_FAILURE(rc)) 4847 4847 return rc; 4848 p Data->pCanRxQueueR0 = PDMQueueR0Ptr(pData->pCanRxQueueR3);4849 p Data->pCanRxQueueRC = PDMQueueRCPtr(pData->pCanRxQueueR3);4848 pThis->pCanRxQueueR0 = PDMQueueR0Ptr(pThis->pCanRxQueueR3); 4849 pThis->pCanRxQueueRC = PDMQueueRCPtr(pThis->pCanRxQueueR3); 4850 4850 4851 4851 /* … … 4858 4858 * Attach status driver (optional). 4859 4859 */ 4860 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &p Data->IBase, &pBase, "Status Port");4860 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port"); 4861 4861 if (RT_SUCCESS(rc)) 4862 p Data->pLedsConnector = (PPDMILEDCONNECTORS)4862 pThis->pLedsConnector = (PPDMILEDCONNECTORS) 4863 4863 pBase->pfnQueryInterface(pBase, PDMINTERFACE_LED_CONNECTORS); 4864 4864 else if (rc != VERR_PDM_NO_ATTACHED_DRIVER) … … 4871 4871 * Attach driver. 4872 4872 */ 4873 rc = PDMDevHlpDriverAttach(pDevIns, 0, &p Data->IBase, &pData->pDrvBase, "Network Port");4873 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Network Port"); 4874 4874 if (RT_SUCCESS(rc)) 4875 4875 { … … 4884 4884 #endif 4885 4885 } 4886 p Data->pDrv = (PPDMINETWORKCONNECTOR)4887 p Data->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_NETWORK_CONNECTOR);4888 if (!p Data->pDrv)4886 pThis->pDrv = (PPDMINETWORKCONNECTOR) 4887 pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_NETWORK_CONNECTOR); 4888 if (!pThis->pDrv) 4889 4889 { 4890 4890 AssertMsgFailed(("Failed to obtain the PDMINTERFACE_NETWORK_CONNECTOR interface!\n")); … … 4900 4900 * Reset the device state. (Do after attaching.) 4901 4901 */ 4902 pcnetHardReset(p Data);4902 pcnetHardReset(pThis); 4903 4903 4904 4904 /* Create send queue for the async send thread. */ 4905 rc = RTSemEventCreate(&p Data->hSendEventSem);4905 rc = RTSemEventCreate(&pThis->hSendEventSem); 4906 4906 AssertRC(rc); 4907 4907 4908 4908 /* Create asynchronous thread */ 4909 rc = PDMDevHlpPDMThreadCreate(pDevIns, &p Data->pSendThread, pData, pcnetAsyncSendThread, pcnetAsyncSendThreadWakeUp, 0, RTTHREADTYPE_IO, "PCNET_TX");4909 rc = PDMDevHlpPDMThreadCreate(pDevIns, &pThis->pSendThread, pThis, pcnetAsyncSendThread, pcnetAsyncSendThreadWakeUp, 0, RTTHREADTYPE_IO, "PCNET_TX"); 4910 4910 AssertRCReturn(rc, rc); 4911 4911 4912 4912 #ifdef PCNET_QUEUE_SEND_PACKETS 4913 p Data->apXmitRingBuffer[0] = (uint8_t *)RTMemAlloc(PCNET_MAX_XMIT_SLOTS * MAX_FRAME);4913 pThis->apXmitRingBuffer[0] = (uint8_t *)RTMemAlloc(PCNET_MAX_XMIT_SLOTS * MAX_FRAME); 4914 4914 for (unsigned i = 1; i < PCNET_MAX_XMIT_SLOTS; i++) 4915 p Data->apXmitRingBuffer[i] = pData->apXmitRingBuffer[0] + i*MAX_FRAME;4915 pThis->apXmitRingBuffer[i] = pThis->apXmitRingBuffer[0] + i*MAX_FRAME; 4916 4916 #endif 4917 4917 4918 4918 #ifdef VBOX_WITH_STATISTICS 4919 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatMMIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO reads in GC", "/Devices/PCNet%d/MMIO/ReadGC", iInstance);4920 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatMMIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO reads in HC", "/Devices/PCNet%d/MMIO/ReadHC", iInstance);4921 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatMMIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO writes in GC", "/Devices/PCNet%d/MMIO/WriteGC", iInstance);4922 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatMMIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO writes in HC", "/Devices/PCNet%d/MMIO/WriteHC", iInstance);4923 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatAPROMRead, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling APROM reads", "/Devices/PCNet%d/IO/APROMRead", iInstance);4924 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatAPROMWrite, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling APROM writes", "/Devices/PCNet%d/IO/APROMWrite", iInstance);4925 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in GC", "/Devices/PCNet%d/IO/ReadGC", iInstance);4926 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in HC", "/Devices/PCNet%d/IO/ReadHC", iInstance);4927 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in GC", "/Devices/PCNet%d/IO/WriteGC", iInstance);4928 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in HC", "/Devices/PCNet%d/IO/WriteHC", iInstance);4929 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTimer, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling Timer", "/Devices/PCNet%d/Timer", iInstance);4930 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling receive", "/Devices/PCNet%d/Receive", iInstance);4931 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRxOverflow, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Profiling RX overflows", "/Devices/PCNet%d/RxOverflow", iInstance);4932 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRxOverflowWakeup, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Nr of RX overflow wakeups", "/Devices/PCNet%d/RxOverflowWakeup", iInstance);4933 #endif 4934 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatReceiveBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Amount of data received", "/Devices/PCNet%d/ReceiveBytes", iInstance);4919 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatMMIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO reads in GC", "/Devices/PCNet%d/MMIO/ReadGC", iInstance); 4920 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatMMIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO reads in HC", "/Devices/PCNet%d/MMIO/ReadHC", iInstance); 4921 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatMMIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO writes in GC", "/Devices/PCNet%d/MMIO/WriteGC", iInstance); 4922 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatMMIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling MMIO writes in HC", "/Devices/PCNet%d/MMIO/WriteHC", iInstance); 4923 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatAPROMRead, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling APROM reads", "/Devices/PCNet%d/IO/APROMRead", iInstance); 4924 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatAPROMWrite, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling APROM writes", "/Devices/PCNet%d/IO/APROMWrite", iInstance); 4925 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in GC", "/Devices/PCNet%d/IO/ReadGC", iInstance); 4926 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in HC", "/Devices/PCNet%d/IO/ReadHC", iInstance); 4927 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in GC", "/Devices/PCNet%d/IO/WriteGC", iInstance); 4928 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in HC", "/Devices/PCNet%d/IO/WriteHC", iInstance); 4929 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling Timer", "/Devices/PCNet%d/Timer", iInstance); 4930 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling receive", "/Devices/PCNet%d/Receive", iInstance); 4931 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRxOverflow, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Profiling RX overflows", "/Devices/PCNet%d/RxOverflow", iInstance); 4932 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRxOverflowWakeup, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Nr of RX overflow wakeups", "/Devices/PCNet%d/RxOverflowWakeup", iInstance); 4933 #endif 4934 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatReceiveBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Amount of data received", "/Devices/PCNet%d/ReceiveBytes", iInstance); 4935 4935 #ifdef VBOX_WITH_STATISTICS 4936 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling transmits in HC", "/Devices/PCNet%d/Transmit/Total", iInstance);4937 #endif 4938 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTransmitBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Amount of data transmitted", "/Devices/PCNet%d/TransmitBytes", iInstance);4936 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling transmits in HC", "/Devices/PCNet%d/Transmit/Total", iInstance); 4937 #endif 4938 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTransmitBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Amount of data transmitted", "/Devices/PCNet%d/TransmitBytes", iInstance); 4939 4939 #ifdef VBOX_WITH_STATISTICS 4940 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTransmitSend, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet send transmit in HC","/Devices/PCNet%d/Transmit/Send", iInstance);4941 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTdtePollGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TdtePoll in GC", "/Devices/PCNet%d/TdtePollGC", iInstance);4942 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTdtePollHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TdtePoll in HC", "/Devices/PCNet%d/TdtePollHC", iInstance);4943 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRdtePollGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet RdtePoll in GC", "/Devices/PCNet%d/RdtePollGC", iInstance);4944 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRdtePollHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet RdtePoll in HC", "/Devices/PCNet%d/RdtePollHC", iInstance);4945 4946 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTmdStoreGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TmdStore in GC", "/Devices/PCNet%d/TmdStoreGC", iInstance);4947 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTmdStoreHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TmdStore in HC", "/Devices/PCNet%d/TmdStoreHC", iInstance);4940 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTransmitSend, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet send transmit in HC","/Devices/PCNet%d/Transmit/Send", iInstance); 4941 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTdtePollGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TdtePoll in GC", "/Devices/PCNet%d/TdtePollGC", iInstance); 4942 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTdtePollHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TdtePoll in HC", "/Devices/PCNet%d/TdtePollHC", iInstance); 4943 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRdtePollGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet RdtePoll in GC", "/Devices/PCNet%d/RdtePollGC", iInstance); 4944 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRdtePollHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet RdtePoll in HC", "/Devices/PCNet%d/RdtePollHC", iInstance); 4945 4946 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTmdStoreGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TmdStore in GC", "/Devices/PCNet%d/TmdStoreGC", iInstance); 4947 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTmdStoreHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet TmdStore in HC", "/Devices/PCNet%d/TmdStoreHC", iInstance); 4948 4948 4949 4949 unsigned i; 4950 for (i = 0; i < RT_ELEMENTS(p Data->aStatXmitFlush) - 1; i++)4951 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aStatXmitFlush[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitFlushIrq/%d", iInstance, i + 1);4952 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aStatXmitFlush[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitFlushIrq/%d+", iInstance, i + 1);4953 4954 for (i = 0; i < RT_ELEMENTS(p Data->aStatXmitChainCounts) - 1; i++)4955 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitChainCounts/%d", iInstance, i + 1);4956 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitChainCounts/%d+", iInstance, i + 1);4957 4958 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatXmitSkipCurrent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/Xmit/Skipped", iInstance, i + 1);4959 4960 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatInterrupt, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling interrupt checks", "/Devices/PCNet%d/UpdateIRQ", iInstance);4961 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatPollTimer, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling poll timer", "/Devices/PCNet%d/PollTimer", iInstance);4962 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatMIIReads, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of MII reads", "/Devices/PCNet%d/MIIReads", iInstance);4950 for (i = 0; i < RT_ELEMENTS(pThis->aStatXmitFlush) - 1; i++) 4951 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStatXmitFlush[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitFlushIrq/%d", iInstance, i + 1); 4952 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStatXmitFlush[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitFlushIrq/%d+", iInstance, i + 1); 4953 4954 for (i = 0; i < RT_ELEMENTS(pThis->aStatXmitChainCounts) - 1; i++) 4955 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitChainCounts/%d", iInstance, i + 1); 4956 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/XmitChainCounts/%d+", iInstance, i + 1); 4957 4958 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatXmitSkipCurrent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/Devices/PCNet%d/Xmit/Skipped", iInstance, i + 1); 4959 4960 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatInterrupt, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling interrupt checks", "/Devices/PCNet%d/UpdateIRQ", iInstance); 4961 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatPollTimer, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling poll timer", "/Devices/PCNet%d/PollTimer", iInstance); 4962 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatMIIReads, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of MII reads", "/Devices/PCNet%d/MIIReads", iInstance); 4963 4963 # ifdef PCNET_NO_POLLING 4964 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRCVRingWrite, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of receive ring writes", "/Devices/PCNet%d/Ring/RCVWrites", iInstance);4965 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatTXRingWrite, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of transmit ring writes", "/Devices/PCNet%d/Ring/TXWrites", iInstance);4966 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/HC/Writes", iInstance);4967 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/R0/Writes", iInstance);4968 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/GC/Writes", iInstance);4969 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteFailedHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/HC/Failed", iInstance);4970 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteFailedR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/R0/Failed", iInstance);4971 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteFailedGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/GC/Failed", iInstance);4972 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteOutsideHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/HC/Outside", iInstance);4973 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteOutsideR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/R0/Outside", iInstance);4974 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->StatRingWriteOutsideGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/GC/Outside", iInstance);4964 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRCVRingWrite, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of receive ring writes", "/Devices/PCNet%d/Ring/RCVWrites", iInstance); 4965 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatTXRingWrite, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of transmit ring writes", "/Devices/PCNet%d/Ring/TXWrites", iInstance); 4966 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/HC/Writes", iInstance); 4967 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/R0/Writes", iInstance); 4968 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored ring page writes", "/Devices/PCNet%d/Ring/GC/Writes", iInstance); 4969 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteFailedHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/HC/Failed", iInstance); 4970 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteFailedR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/R0/Failed", iInstance); 4971 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteFailedGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of failed ring page writes", "/Devices/PCNet%d/Ring/GC/Failed", iInstance); 4972 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteOutsideHC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/HC/Outside", iInstance); 4973 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteOutsideR0, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/R0/Outside", iInstance); 4974 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatRingWriteOutsideGC, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring","/Devices/PCNet%d/Ring/GC/Outside", iInstance); 4975 4975 # endif /* PCNET_NO_POLLING */ 4976 4976 #endif -
trunk/src/VBox/Devices/Network/DrvNAT.cpp
r11267 r11269 112 112 static DECLCALLBACK(void) drvNATOutput(const void * data, const uint8_t *msg, size_t size) 113 113 { 114 PDRVNAT p Data= (PDRVNAT)(void *)data;114 PDRVNAT pThis = (PDRVNAT)(void *)data; 115 115 LogFlow(("output: pvBuf=%p cb=%#x\n", msg, size)); 116 int rc = p Data->pPort->pfnWaitReceiveAvail(pData->pPort, 0);116 int rc = pThis->pPort->pfnWaitReceiveAvail(pThis->pPort, 0); 117 117 if (RT_SUCCESS(rc)) 118 p Data->pPort->pfnReceive(pData->pPort, msg, size);118 pThis->pPort->pfnReceive(pThis->pPort, msg, size); 119 119 LogFlow(("output: exit\n")); 120 120 } … … 133 133 static DECLCALLBACK(int) drvNATSend(PPDMINETWORKCONNECTOR pInterface, const void *pvBuf, size_t cb) 134 134 { 135 PDRVNAT p Data= PDMINETWORKCONNECTOR_2_DRVNAT(pInterface);135 PDRVNAT pThis = PDMINETWORKCONNECTOR_2_DRVNAT(pInterface); 136 136 137 137 LogFlow(("drvNATSend: pvBuf=%p cb=%#x\n", pvBuf, cb)); … … 140 140 pvBuf, cb, cb, pvBuf)); 141 141 142 int rc = RTCritSectEnter(&p Data->CritSect);142 int rc = RTCritSectEnter(&pThis->CritSect); 143 143 AssertReleaseRC(rc); 144 144 145 Assert(p Data->enmLinkState == PDMNETWORKLINKSTATE_UP);146 if (p Data->enmLinkState == PDMNETWORKLINKSTATE_UP) {147 #ifndef VBOX_NAT_SOURCES 148 slirp_input(p Data->pNATState, (uint8_t *)pvBuf, cb);145 Assert(pThis->enmLinkState == PDMNETWORKLINKSTATE_UP); 146 if (pThis->enmLinkState == PDMNETWORKLINKSTATE_UP) { 147 #ifndef VBOX_NAT_SOURCES 148 slirp_input(pThis->pNATState, (uint8_t *)pvBuf, cb); 149 149 #else 150 ether_chk(p Data, pvBuf, cb);150 ether_chk(pThis, pvBuf, cb); 151 151 #endif 152 152 } 153 RTCritSectLeave(&p Data->CritSect);153 RTCritSectLeave(&pThis->CritSect); 154 154 LogFlow(("drvNATSend: end\n")); 155 155 return VINF_SUCCESS; … … 183 183 static DECLCALLBACK(void) drvNATNotifyLinkChanged(PPDMINETWORKCONNECTOR pInterface, PDMNETWORKLINKSTATE enmLinkState) 184 184 { 185 PDRVNAT p Data= PDMINETWORKCONNECTOR_2_DRVNAT(pInterface);185 PDRVNAT pThis = PDMINETWORKCONNECTOR_2_DRVNAT(pInterface); 186 186 187 187 LogFlow(("drvNATNotifyLinkChanged: enmLinkState=%d\n", enmLinkState)); 188 188 189 int rc = RTCritSectEnter(&p Data->CritSect);189 int rc = RTCritSectEnter(&pThis->CritSect); 190 190 AssertReleaseRC(rc); 191 p Data->enmLinkState = enmLinkState;191 pThis->enmLinkState = enmLinkState; 192 192 193 193 switch (enmLinkState) … … 196 196 LogRel(("NAT: link up\n")); 197 197 #ifndef VBOX_NAT_SOURCES 198 slirp_link_up(p Data->pNATState);198 slirp_link_up(pThis->pNATState); 199 199 #endif 200 200 break; … … 204 204 LogRel(("NAT: link down\n")); 205 205 #ifndef VBOX_NAT_SOURCES 206 slirp_link_down(p Data->pNATState);206 slirp_link_down(pThis->pNATState); 207 207 #endif 208 208 break; … … 211 211 AssertMsgFailed(("drvNATNotifyLinkChanged: unexpected link state %d\n", enmLinkState)); 212 212 } 213 RTCritSectLeave(&p Data->CritSect);213 RTCritSectLeave(&pThis->CritSect); 214 214 } 215 215 … … 220 220 static DECLCALLBACK(void) drvNATPoller(PPDMDRVINS pDrvIns) 221 221 { 222 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);222 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 223 223 fd_set ReadFDs; 224 224 fd_set WriteFDs; … … 229 229 FD_ZERO(&XcptFDs); 230 230 231 int rc = RTCritSectEnter(&p Data->CritSect);231 int rc = RTCritSectEnter(&pThis->CritSect); 232 232 AssertReleaseRC(rc); 233 233 234 234 #ifndef VBOX_NAT_SOURCES 235 slirp_select_fill(p Data->pNATState, &cFDs, &ReadFDs, &WriteFDs, &XcptFDs);235 slirp_select_fill(pThis->pNATState, &cFDs, &ReadFDs, &WriteFDs, &XcptFDs); 236 236 #else 237 237 nat_select_fill(NULL, &cFDs, &ReadFDs, &WriteFDs, &XcptFDs); … … 242 242 #ifndef VBOX_NAT_SOURCES 243 243 if (cReadFDs >= 0) 244 slirp_select_poll(p Data->pNATState, &ReadFDs, &WriteFDs, &XcptFDs);244 slirp_select_poll(pThis->pNATState, &ReadFDs, &WriteFDs, &XcptFDs); 245 245 #else 246 246 if (cReadFDs >= 0) { 247 nat_select_poll(p Data, &ReadFDs, &WriteFDs, &XcptFDs);247 nat_select_poll(pThis, &ReadFDs, &WriteFDs, &XcptFDs); 248 248 } 249 249 #endif 250 250 251 RTCritSectLeave(&p Data->CritSect);251 RTCritSectLeave(&pThis->CritSect); 252 252 } 253 253 … … 260 260 int slirp_can_output(void *pvUser) 261 261 { 262 PDRVNAT p Data= (PDRVNAT)pvUser;263 264 Assert(p Data);262 PDRVNAT pThis = (PDRVNAT)pvUser; 263 264 Assert(pThis); 265 265 266 266 /** Happens during termination */ 267 if (!RTCritSectIsOwner(&p Data->CritSect))267 if (!RTCritSectIsOwner(&pThis->CritSect)) 268 268 return 0; 269 269 270 int rc = p Data->pPort->pfnWaitReceiveAvail(pData->pPort, 0);270 int rc = pThis->pPort->pfnWaitReceiveAvail(pThis->pPort, 0); 271 271 return RT_SUCCESS(rc); 272 272 } … … 278 278 void slirp_output(void *pvUser, const uint8_t *pu8Buf, int cb) 279 279 { 280 PDRVNAT p Data= (PDRVNAT)pvUser;280 PDRVNAT pThis = (PDRVNAT)pvUser; 281 281 282 282 LogFlow(("slirp_output BEGIN %x %d\n", pu8Buf, cb)); 283 Log2(("slirp_output: pu8Buf=%p cb=%#x (p Data=%p)\n"283 Log2(("slirp_output: pu8Buf=%p cb=%#x (pThis=%p)\n" 284 284 "%.*Vhxd\n", 285 pu8Buf, cb, p Data,285 pu8Buf, cb, pThis, 286 286 cb, pu8Buf)); 287 287 288 Assert(p Data);288 Assert(pThis); 289 289 290 290 /** Happens during termination */ 291 if (!RTCritSectIsOwner(&p Data->CritSect))291 if (!RTCritSectIsOwner(&pThis->CritSect)) 292 292 return; 293 293 294 int rc = p Data->pPort->pfnReceive(pData->pPort, pu8Buf, cb);294 int rc = pThis->pPort->pfnReceive(pThis->pPort, pu8Buf, cb); 295 295 AssertRC(rc); 296 296 LogFlow(("slirp_output END %x %d\n", pu8Buf, cb)); … … 310 310 { 311 311 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 312 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);312 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 313 313 switch (enmInterface) 314 314 { … … 316 316 return &pDrvIns->IBase; 317 317 case PDMINTERFACE_NETWORK_CONNECTOR: 318 return &p Data->INetworkConnector;318 return &pThis->INetworkConnector; 319 319 default: 320 320 return NULL; … … 333 333 static DECLCALLBACK(void) drvNATDestruct(PPDMDRVINS pDrvIns) 334 334 { 335 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);335 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 336 336 337 337 LogFlow(("drvNATDestruct:\n")); 338 338 339 int rc = RTCritSectEnter(&p Data->CritSect);339 int rc = RTCritSectEnter(&pThis->CritSect); 340 340 AssertReleaseRC(rc); 341 341 #ifndef VBOX_NAT_SOURCES 342 slirp_term(p Data->pNATState);343 p Data->pNATState = NULL;344 #endif 345 RTCritSectLeave(&p Data->CritSect);346 347 RTCritSectDelete(&p Data->CritSect);342 slirp_term(pThis->pNATState); 343 pThis->pNATState = NULL; 344 #endif 345 RTCritSectLeave(&pThis->CritSect); 346 347 RTCritSectDelete(&pThis->CritSect); 348 348 } 349 349 … … 355 355 * @param pCfgHandle The drivers configuration handle. 356 356 */ 357 static int drvNATConstructRedir(unsigned iInstance, PDRVNAT p Data, PCFGMNODE pCfgHandle, RTIPV4ADDR Network)357 static int drvNATConstructRedir(unsigned iInstance, PDRVNAT pThis, PCFGMNODE pCfgHandle, RTIPV4ADDR Network) 358 358 { 359 359 #ifndef VBOX_NAT_SOURCES … … 367 367 */ 368 368 if (!CFGMR3AreValuesValid(pNode, "Protocol\0UDP\0HostPort\0GuestPort\0GuestIP\0")) 369 return PDMDRV_SET_ERROR(p Data->pDrvIns, VERR_PDM_DRVINS_UNKNOWN_CFG_VALUES, N_("Unknown configuration in port forwarding"));369 return PDMDRV_SET_ERROR(pThis->pDrvIns, VERR_PDM_DRVINS_UNKNOWN_CFG_VALUES, N_("Unknown configuration in port forwarding")); 370 370 371 371 /* protocol type */ … … 379 379 fUDP = false; 380 380 else if (RT_FAILURE(rc)) 381 return PDMDrvHlpVMSetError(p Data->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"UDP\" boolean failed"), iInstance);381 return PDMDrvHlpVMSetError(pThis->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"UDP\" boolean failed"), iInstance); 382 382 } 383 383 else if (RT_SUCCESS(rc)) … … 388 388 fUDP = true; 389 389 else 390 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_INVALID_PARAMETER, RT_SRC_POS, N_("NAT#%d: Invalid configuration value for \"Protocol\": \"%s\""), iInstance, szProtocol);390 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_INVALID_PARAMETER, RT_SRC_POS, N_("NAT#%d: Invalid configuration value for \"Protocol\": \"%s\""), iInstance, szProtocol); 391 391 } 392 392 else 393 return PDMDrvHlpVMSetError(p Data->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"Protocol\" string failed"), iInstance);393 return PDMDrvHlpVMSetError(pThis->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"Protocol\" string failed"), iInstance); 394 394 395 395 /* host port */ … … 397 397 rc = CFGMR3QueryS32(pNode, "HostPort", &iHostPort); 398 398 if (RT_FAILURE(rc)) 399 return PDMDrvHlpVMSetError(p Data->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"HostPort\" integer failed"), iInstance);399 return PDMDrvHlpVMSetError(pThis->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"HostPort\" integer failed"), iInstance); 400 400 401 401 /* guest port */ … … 403 403 rc = CFGMR3QueryS32(pNode, "GuestPort", &iGuestPort); 404 404 if (RT_FAILURE(rc)) 405 return PDMDrvHlpVMSetError(p Data->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"GuestPort\" integer failed"), iInstance);405 return PDMDrvHlpVMSetError(pThis->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"GuestPort\" integer failed"), iInstance); 406 406 407 407 /* guest address */ … … 412 412 (Network & 0xFF000000) >> 24, (Network & 0xFF0000) >> 16, (Network & 0xFF00) >> 8, (Network & 0xE0) | 15); 413 413 else if (RT_FAILURE(rc)) 414 return PDMDrvHlpVMSetError(p Data->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"GuestIP\" string failed"), iInstance);414 return PDMDrvHlpVMSetError(pThis->pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"GuestIP\" string failed"), iInstance); 415 415 struct in_addr GuestIP; 416 416 if (!inet_aton(szGuestIP, &GuestIP)) 417 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_NAT_REDIR_GUEST_IP, RT_SRC_POS, N_("NAT#%d: configuration error: invalid \"GuestIP\"=\"%s\", inet_aton failed"), iInstance, szGuestIP);417 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_NAT_REDIR_GUEST_IP, RT_SRC_POS, N_("NAT#%d: configuration error: invalid \"GuestIP\"=\"%s\", inet_aton failed"), iInstance, szGuestIP); 418 418 419 419 /* … … 421 421 */ 422 422 Log(("drvNATConstruct: Redir %d -> %s:%d\n", iHostPort, szGuestIP, iGuestPort)); 423 if (slirp_redir(p Data->pNATState, fUDP, iHostPort, GuestIP, iGuestPort) < 0)424 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_NAT_REDIR_SETUP, RT_SRC_POS, N_("NAT#%d: configuration error: failed to set up redirection of %d to %s:%d. Probably a conflict with existing services or other rules"), iInstance, iHostPort, szGuestIP, iGuestPort);423 if (slirp_redir(pThis->pNATState, fUDP, iHostPort, GuestIP, iGuestPort) < 0) 424 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_NAT_REDIR_SETUP, RT_SRC_POS, N_("NAT#%d: configuration error: failed to set up redirection of %d to %s:%d. Probably a conflict with existing services or other rules"), iInstance, iHostPort, szGuestIP, iGuestPort); 425 425 } /* for each redir rule */ 426 426 #endif … … 432 432 * Get the MAC address into the slirp stack. 433 433 */ 434 static void drvNATSetMac(PDRVNAT p Data)435 { 436 #ifndef VBOX_NAT_SOURCES 437 if (p Data->pConfig)434 static void drvNATSetMac(PDRVNAT pThis) 435 { 436 #ifndef VBOX_NAT_SOURCES 437 if (pThis->pConfig) 438 438 { 439 439 RTMAC Mac; 440 p Data->pConfig->pfnGetMac(pData->pConfig, &Mac);441 slirp_set_ethaddr(p Data->pNATState, Mac.au8);440 pThis->pConfig->pfnGetMac(pThis->pConfig, &Mac); 441 slirp_set_ethaddr(pThis->pNATState, Mac.au8); 442 442 } 443 443 #endif … … 452 452 static DECLCALLBACK(int) drvNATLoadDone(PPDMDRVINS pDrvIns, PSSMHANDLE pSSMHandle) 453 453 { 454 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);455 drvNATSetMac(p Data);454 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 455 drvNATSetMac(pThis); 456 456 return VINF_SUCCESS; 457 457 } … … 463 463 static DECLCALLBACK(void) drvNATPowerOn(PPDMDRVINS pDrvIns) 464 464 { 465 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);466 drvNATSetMac(p Data);465 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 466 drvNATSetMac(pThis); 467 467 } 468 468 … … 480 480 static DECLCALLBACK(int) drvNATConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 481 481 { 482 PDRVNAT p Data= PDMINS_2_DATA(pDrvIns, PDRVNAT);482 PDRVNAT pThis = PDMINS_2_DATA(pDrvIns, PDRVNAT); 483 483 char szNetAddr[16]; 484 484 char szNetwork[32]; /* xxx.xxx.xxx.xxx/yy */ … … 494 494 * Init the static parts. 495 495 */ 496 p Data->pDrvIns = pDrvIns;497 #ifndef VBOX_NAT_SOURCES 498 p Data->pNATState = NULL;499 #endif 500 p Data->pszTFTPPrefix = NULL;501 p Data->pszBootFile = NULL;496 pThis->pDrvIns = pDrvIns; 497 #ifndef VBOX_NAT_SOURCES 498 pThis->pNATState = NULL; 499 #endif 500 pThis->pszTFTPPrefix = NULL; 501 pThis->pszBootFile = NULL; 502 502 /* IBase */ 503 503 pDrvIns->IBase.pfnQueryInterface = drvNATQueryInterface; 504 504 /* INetwork */ 505 p Data->INetworkConnector.pfnSend = drvNATSend;506 p Data->INetworkConnector.pfnSetPromiscuousMode = drvNATSetPromiscuousMode;507 p Data->INetworkConnector.pfnNotifyLinkChanged = drvNATNotifyLinkChanged;505 pThis->INetworkConnector.pfnSend = drvNATSend; 506 pThis->INetworkConnector.pfnSetPromiscuousMode = drvNATSetPromiscuousMode; 507 pThis->INetworkConnector.pfnNotifyLinkChanged = drvNATNotifyLinkChanged; 508 508 509 509 /* … … 517 517 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"PassDomain\" boolean failed"), pDrvIns->iInstance); 518 518 519 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TFTPPrefix", &p Data->pszTFTPPrefix);519 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TFTPPrefix", &pThis->pszTFTPPrefix); 520 520 if (RT_FAILURE(rc) && rc != VERR_CFGM_VALUE_NOT_FOUND) 521 521 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"TFTPPrefix\" string failed"), pDrvIns->iInstance); 522 rc = CFGMR3QueryStringAlloc(pCfgHandle, "BootFile", &p Data->pszBootFile);522 rc = CFGMR3QueryStringAlloc(pCfgHandle, "BootFile", &pThis->pszBootFile); 523 523 if (RT_FAILURE(rc) && rc != VERR_CFGM_VALUE_NOT_FOUND) 524 524 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NAT#%d: configuration query for \"BootFile\" string failed"), pDrvIns->iInstance); … … 527 527 * Query the network port interface. 528 528 */ 529 p Data->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT);530 if (!p Data->pPort)529 pThis->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT); 530 if (!pThis->pPort) 531 531 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, 532 532 N_("Configuration error: the above device/driver didn't export the network port interface")); 533 p Data->pConfig = (PPDMINETWORKCONFIG)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_CONFIG);534 if (!p Data->pConfig)533 pThis->pConfig = (PPDMINETWORKCONFIG)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_CONFIG); 534 if (!pThis->pConfig) 535 535 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, 536 536 N_("Configuration error: the above device/driver didn't export the network config interface")); … … 555 555 * The slirp lock.. 556 556 */ 557 rc = RTCritSectInit(&p Data->CritSect);557 rc = RTCritSectInit(&pThis->CritSect); 558 558 if (RT_FAILURE(rc)) 559 559 return rc; … … 574 574 * Initialize slirp. 575 575 */ 576 rc = slirp_init(&p Data->pNATState, &szNetAddr[0], Netmask, fPassDomain, pData->pszTFTPPrefix, pData->pszBootFile, pData);576 rc = slirp_init(&pThis->pNATState, &szNetAddr[0], Netmask, fPassDomain, pThis->pszTFTPPrefix, pThis->pszBootFile, pThis); 577 577 if (RT_SUCCESS(rc)) 578 578 { 579 int rc2 = drvNATConstructRedir(pDrvIns->iInstance, p Data, pCfgHandle, Network);579 int rc2 = drvNATConstructRedir(pDrvIns->iInstance, pThis, pCfgHandle, Network); 580 580 if (RT_SUCCESS(rc2)) 581 581 { … … 590 590 pDrvIns->pDrvHlp->pfnPDMPollerRegister(pDrvIns, drvNATPoller); 591 591 592 p Data->enmLinkState = PDMNETWORKLINKSTATE_UP;592 pThis->enmLinkState = PDMNETWORKLINKSTATE_UP; 593 593 #if 0 594 594 RTSemEventSignal(g_EventSem); … … 600 600 /* failure path */ 601 601 rc = rc2; 602 slirp_term(p Data->pNATState);603 p Data->pNATState = NULL;602 slirp_term(pThis->pNATState); 603 pThis->pNATState = NULL; 604 604 } 605 605 else … … 610 610 #else 611 611 pDrvIns->pDrvHlp->pfnPDMPollerRegister(pDrvIns, drvNATPoller); 612 p Data->enmLinkState = PDMNETWORKLINKSTATE_UP;612 pThis->enmLinkState = PDMNETWORKLINKSTATE_UP; 613 613 mbuf_init(NULL); 614 614 struct nat_output_callbacks cb; … … 631 631 #endif 632 632 #ifndef VBOX_NAT_SOURCES 633 RTCritSectDelete(&p Data->CritSect);633 RTCritSectDelete(&pThis->CritSect); 634 634 #endif 635 635 return rc; -
trunk/src/VBox/Devices/Network/DrvTAP.cpp
r11268 r11269 151 151 #ifdef RT_OS_SOLARIS 152 152 # ifdef VBOX_WITH_CROSSBOW 153 static int SolarisOpenVNIC(PDRVTAP p Data);153 static int SolarisOpenVNIC(PDRVTAP pThis); 154 154 static int SolarisDLPIErr2VBoxErr(int rc); 155 155 # else 156 static int SolarisTAPAttach(PDRVTAP p Data);156 static int SolarisTAPAttach(PDRVTAP pThis); 157 157 # endif 158 158 #endif … … 170 170 static DECLCALLBACK(int) drvTAPSend(PPDMINETWORKCONNECTOR pInterface, const void *pvBuf, size_t cb) 171 171 { 172 PDRVTAP p Data= PDMINETWORKCONNECTOR_2_DRVTAP(pInterface);173 STAM_COUNTER_INC(&p Data->StatPktSent);174 STAM_COUNTER_ADD(&p Data->StatPktSentBytes, cb);175 STAM_PROFILE_START(&p Data->StatTransmit, a);172 PDRVTAP pThis = PDMINETWORKCONNECTOR_2_DRVTAP(pInterface); 173 STAM_COUNTER_INC(&pThis->StatPktSent); 174 STAM_COUNTER_ADD(&pThis->StatPktSentBytes, cb); 175 STAM_PROFILE_START(&pThis->StatTransmit, a); 176 176 177 177 #ifdef LOG_ENABLED 178 178 uint64_t u64Now = RTTimeProgramNanoTS(); 179 179 LogFlow(("drvTAPSend: %-4d bytes at %llu ns deltas: r=%llu t=%llu\n", 180 cb, u64Now, u64Now - p Data->u64LastReceiveTS, u64Now - pData->u64LastTransferTS));181 p Data->u64LastTransferTS = u64Now;180 cb, u64Now, u64Now - pThis->u64LastReceiveTS, u64Now - pThis->u64LastTransferTS)); 181 pThis->u64LastTransferTS = u64Now; 182 182 #endif 183 183 Log2(("drvTAPSend: pvBuf=%p cb=%#x\n" … … 185 185 pvBuf, cb, cb, pvBuf)); 186 186 187 int rc = RTFileWrite(p Data->FileDevice, pvBuf, cb, NULL);188 189 STAM_PROFILE_STOP(&p Data->StatTransmit, a);187 int rc = RTFileWrite(pThis->FileDevice, pvBuf, cb, NULL); 188 189 STAM_PROFILE_STOP(&pThis->StatTransmit, a); 190 190 AssertRC(rc); 191 191 return rc; … … 233 233 static DECLCALLBACK(int) drvTAPAsyncIoThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 234 234 { 235 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);236 LogFlow(("drvTAPAsyncIoThread: p Data=%p\n", pData));235 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 236 LogFlow(("drvTAPAsyncIoThread: pThis=%p\n", pThis)); 237 237 238 238 if (pThread->enmState == PDMTHREADSTATE_INITIALIZING) 239 239 return VINF_SUCCESS; 240 240 241 STAM_PROFILE_ADV_START(&p Data->StatReceive, a);241 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 242 242 243 243 /* … … 250 250 */ 251 251 struct pollfd aFDs[2]; 252 aFDs[0].fd = p Data->FileDevice;252 aFDs[0].fd = pThis->FileDevice; 253 253 aFDs[0].events = POLLIN | POLLPRI; 254 254 aFDs[0].revents = 0; 255 aFDs[1].fd = p Data->PipeRead;255 aFDs[1].fd = pThis->PipeRead; 256 256 aFDs[1].events = POLLIN | POLLPRI | POLLERR | POLLHUP; 257 257 aFDs[1].revents = 0; 258 STAM_PROFILE_ADV_STOP(&p Data->StatReceive, a);258 STAM_PROFILE_ADV_STOP(&pThis->StatReceive, a); 259 259 errno=0; 260 260 int rc = poll(&aFDs[0], RT_ELEMENTS(aFDs), -1 /* infinite */); … … 264 264 break; 265 265 266 STAM_PROFILE_ADV_START(&p Data->StatReceive, a);266 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 267 267 if ( rc > 0 268 268 && (aFDs[0].revents & (POLLIN | POLLPRI)) … … 276 276 #ifdef VBOX_WITH_CROSSBOW 277 277 cbRead = sizeof(achBuf); 278 rc = g_pfnLibDlpiRecv(p Data->pDeviceHandle, NULL, NULL, achBuf, &cbRead, -1, NULL);278 rc = g_pfnLibDlpiRecv(pThis->pDeviceHandle, NULL, NULL, achBuf, &cbRead, -1, NULL); 279 279 rc = RT_LIKELY(rc == DLPI_SUCCESS) ? VINF_SUCCESS : SolarisDLPIErr2VBoxErr(rc); 280 280 #else … … 282 282 * after poll() returned successfully. I don't know why but a second 283 283 * RTFileRead() operation will return with VERR_TRY_AGAIN in any case. */ 284 rc = RTFileRead(p Data->FileDevice, achBuf, sizeof(achBuf), &cbRead);284 rc = RTFileRead(pThis->FileDevice, achBuf, sizeof(achBuf), &cbRead); 285 285 #endif 286 286 if (RT_SUCCESS(rc)) … … 299 299 * overflow error to allocate more receive buffers 300 300 */ 301 STAM_PROFILE_ADV_STOP(&p Data->StatReceive, a);302 int rc = p Data->pPort->pfnWaitReceiveAvail(pData->pPort, RT_INDEFINITE_WAIT);303 STAM_PROFILE_ADV_START(&p Data->StatReceive, a);301 STAM_PROFILE_ADV_STOP(&pThis->StatReceive, a); 302 int rc = pThis->pPort->pfnWaitReceiveAvail(pThis->pPort, RT_INDEFINITE_WAIT); 303 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 304 304 305 305 /* … … 316 316 uint64_t u64Now = RTTimeProgramNanoTS(); 317 317 LogFlow(("drvTAPAsyncIoThread: %-4d bytes at %llu ns deltas: r=%llu t=%llu\n", 318 cbRead, u64Now, u64Now - p Data->u64LastReceiveTS, u64Now - pData->u64LastTransferTS));319 p Data->u64LastReceiveTS = u64Now;318 cbRead, u64Now, u64Now - pThis->u64LastReceiveTS, u64Now - pThis->u64LastTransferTS)); 319 pThis->u64LastReceiveTS = u64Now; 320 320 #endif 321 321 Log2(("drvTAPAsyncIoThread: cbRead=%#x\n" "%.*Vhxd\n", cbRead, cbRead, achBuf)); 322 STAM_COUNTER_INC(&p Data->StatPktRecv);323 STAM_COUNTER_ADD(&p Data->StatPktRecvBytes, cbRead);324 rc = p Data->pPort->pfnReceive(pData->pPort, achBuf, cbRead);322 STAM_COUNTER_INC(&pThis->StatPktRecv); 323 STAM_COUNTER_ADD(&pThis->StatPktRecvBytes, cbRead); 324 rc = pThis->pPort->pfnReceive(pThis->pPort, achBuf, cbRead); 325 325 AssertRC(rc); 326 326 } … … 343 343 char ch; 344 344 size_t cbRead; 345 RTFileRead(p Data->PipeRead, &ch, 1, &cbRead);345 RTFileRead(pThis->PipeRead, &ch, 1, &cbRead); 346 346 } 347 347 else … … 363 363 364 364 LogFlow(("drvTAPAsyncIoThread: returns %Vrc\n", VINF_SUCCESS)); 365 STAM_PROFILE_ADV_STOP(&p Data->StatReceive, a);365 STAM_PROFILE_ADV_STOP(&pThis->StatReceive, a); 366 366 return VINF_SUCCESS; 367 367 } … … 377 377 static DECLCALLBACK(int) drvTapAsyncIoWakeup(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 378 378 { 379 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);380 381 int rc = RTFileWrite(p Data->PipeWrite, "", 1, NULL);379 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 380 381 int rc = RTFileWrite(pThis->PipeWrite, "", 1, NULL); 382 382 AssertRC(rc); 383 383 … … 391 391 * 392 392 * @returns VBox error code. 393 * @param p DataThe instance data.394 */ 395 static int drvTAPSetupApplication(PDRVTAP p Data)393 * @param pThis The instance data. 394 */ 395 static int drvTAPSetupApplication(PDRVTAP pThis) 396 396 { 397 397 char szCommand[4096]; … … 400 400 /* Convert MAC address bytes to string (required by Solaris' dladm). */ 401 401 char *pszHex = "0123456789abcdef"; 402 uint8_t *pMacAddr8 = p Data->MacAddress.au8;402 uint8_t *pMacAddr8 = pThis->MacAddress.au8; 403 403 char szMacAddress[3 * sizeof(RTMAC)]; 404 404 for (unsigned int i = 0; i < sizeof(RTMAC); i++) … … 411 411 szMacAddress[sizeof(szMacAddress) - 1] = 0; 412 412 413 RTStrPrintf(szCommand, sizeof(szCommand), "%s %s %s", p Data->pszSetupApplication,414 szMacAddress, p Data->fStatic ? pData->pszDeviceName : "");413 RTStrPrintf(szCommand, sizeof(szCommand), "%s %s %s", pThis->pszSetupApplication, 414 szMacAddress, pThis->fStatic ? pThis->pszDeviceName : ""); 415 415 #else 416 RTStrPrintf(szCommand, sizeof(szCommand), "%s %s", p Data->pszSetupApplication,417 p Data->fStatic ? pData->pszDeviceName : "");416 RTStrPrintf(szCommand, sizeof(szCommand), "%s %s", pThis->pszSetupApplication, 417 pThis->fStatic ? pThis->pszDeviceName : ""); 418 418 #endif 419 419 … … 423 423 if (pfSetupHandle == 0) 424 424 { 425 LogRel(("TAP#%d: Failed to run TAP setup application: %s\n", p Data->pDrvIns->iInstance,426 p Data->pszSetupApplication, strerror(errno)));425 LogRel(("TAP#%d: Failed to run TAP setup application: %s\n", pThis->pDrvIns->iInstance, 426 pThis->pszSetupApplication, strerror(errno))); 427 427 return VERR_HOSTIF_INIT_FAILED; 428 428 } 429 if (!p Data->fStatic)429 if (!pThis->fStatic) 430 430 { 431 431 /* Obtain device name from setup application. */ … … 444 444 /* Overwrite the terminating newline character. */ 445 445 acBuffer[cBufSize - 1] = 0; 446 RTStrAPrintf(&p Data->pszDeviceName, "%s", acBuffer);446 RTStrAPrintf(&pThis->pszDeviceName, "%s", acBuffer); 447 447 } 448 448 int rc = pclose(pfSetupHandle); … … 465 465 * 466 466 * @returns VBox error code. 467 * @param p DataThe instance data.468 */ 469 static int drvTAPTerminateApplication(PDRVTAP p Data)467 * @param pThis The instance data. 468 */ 469 static int drvTAPTerminateApplication(PDRVTAP pThis) 470 470 { 471 471 char *pszArgs[3]; 472 pszArgs[0] = p Data->pszTerminateApplication;473 pszArgs[1] = p Data->pszDeviceName;472 pszArgs[0] = pThis->pszTerminateApplication; 473 pszArgs[1] = pThis->pszDeviceName; 474 474 pszArgs[2] = NULL; 475 475 476 Log2(("Starting TAP terminate application: %s %s\n", p Data->pszTerminateApplication, pData->pszDeviceName));476 Log2(("Starting TAP terminate application: %s %s\n", pThis->pszTerminateApplication, pThis->pszDeviceName)); 477 477 RTPROCESS pid = NIL_RTPROCESS; 478 478 int rc = RTProcCreate(pszArgs[0], pszArgs, RTENV_DEFAULT, 0, &pid); … … 487 487 return VINF_SUCCESS; 488 488 489 LogRel(("TAP#%d: Error running TAP terminate application: %s\n", p Data->pDrvIns->iInstance, pData->pszTerminateApplication));489 LogRel(("TAP#%d: Error running TAP terminate application: %s\n", pThis->pDrvIns->iInstance, pThis->pszTerminateApplication)); 490 490 } 491 491 else 492 LogRel(("TAP#%d: RTProcWait failed for: %s\n", p Data->pDrvIns->iInstance, pData->pszTerminateApplication));492 LogRel(("TAP#%d: RTProcWait failed for: %s\n", pThis->pDrvIns->iInstance, pThis->pszTerminateApplication)); 493 493 } 494 494 else 495 495 { 496 496 /* Bad. RTProcCreate() failed! */ 497 LogRel(("TAP#%d: Failed to fork() process for running TAP terminate application: %s\n", p Data->pDrvIns->iInstance,498 p Data->pszTerminateApplication, strerror(errno)));497 LogRel(("TAP#%d: Failed to fork() process for running TAP terminate application: %s\n", pThis->pDrvIns->iInstance, 498 pThis->pszTerminateApplication, strerror(errno))); 499 499 } 500 500 return VERR_HOSTIF_TERM_FAILED; … … 510 510 * 511 511 * @returns VBox error code. 512 * @param p DataThe instance data.513 */ 514 static int SolarisOpenVNIC(PDRVTAP p Data)512 * @param pThis The instance data. 513 */ 514 static int SolarisOpenVNIC(PDRVTAP pThis) 515 515 { 516 516 /* 517 517 * Open & bind the NIC using the datalink provider routine. 518 518 */ 519 int rc = g_pfnLibDlpiOpen(p Data->pszDeviceName, &pData->pDeviceHandle, DLPI_RAW);519 int rc = g_pfnLibDlpiOpen(pThis->pszDeviceName, &pThis->pDeviceHandle, DLPI_RAW); 520 520 if (rc != DLPI_SUCCESS) 521 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,522 N_("Failed to open VNIC \"%s\" in raw mode"), p Data->pszDeviceName);521 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 522 N_("Failed to open VNIC \"%s\" in raw mode"), pThis->pszDeviceName); 523 523 524 524 dlpi_info_t vnicInfo; 525 rc = g_pfnLibDlpiInfo(p Data->pDeviceHandle, &vnicInfo, 0);525 rc = g_pfnLibDlpiInfo(pThis->pDeviceHandle, &vnicInfo, 0); 526 526 if (rc == DLPI_SUCCESS) 527 527 { 528 528 if (vnicInfo.di_mactype == DL_ETHER) 529 529 { 530 rc = g_pfnLibDlpiBind(p Data->pDeviceHandle, DLPI_ANY_SAP, NULL);530 rc = g_pfnLibDlpiBind(pThis->pDeviceHandle, DLPI_ANY_SAP, NULL); 531 531 if (rc == DLPI_SUCCESS) 532 532 { 533 rc = g_pfnLibDlpiSetPhysAddr(p Data->pDeviceHandle, DL_CURR_PHYS_ADDR, &pData->MacAddress, ETHERADDRL);533 rc = g_pfnLibDlpiSetPhysAddr(pThis->pDeviceHandle, DL_CURR_PHYS_ADDR, &pThis->MacAddress, ETHERADDRL); 534 534 if (rc == DLPI_SUCCESS) 535 535 { 536 rc = g_pfnLibDlpiPromiscon(p Data->pDeviceHandle, DL_PROMISC_SAP);536 rc = g_pfnLibDlpiPromiscon(pThis->pDeviceHandle, DL_PROMISC_SAP); 537 537 if (rc == DLPI_SUCCESS) 538 538 { 539 539 /* Need to use DL_PROMIS_PHYS (not multicast) as we cannot be sure what the guest needs. */ 540 rc = g_pfnLibDlpiPromiscon(p Data->pDeviceHandle, DL_PROMISC_PHYS);540 rc = g_pfnLibDlpiPromiscon(pThis->pDeviceHandle, DL_PROMISC_PHYS); 541 541 if (rc == DLPI_SUCCESS) 542 542 { 543 p Data->FileDevice = g_pfnLibDlpiFd(pData->pDeviceHandle);544 if (p Data->FileDevice >= 0)543 pThis->FileDevice = g_pfnLibDlpiFd(pThis->pDeviceHandle); 544 if (pThis->FileDevice >= 0) 545 545 { 546 Log(("SolarisOpenVNIC: %s -> %d\n", p Data->pszDeviceName, pData->FileDevice));546 Log(("SolarisOpenVNIC: %s -> %d\n", pThis->pszDeviceName, pThis->FileDevice)); 547 547 return VINF_SUCCESS; 548 548 } 549 549 550 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,550 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 551 551 N_("Failed to obtain file descriptor for VNIC")); 552 552 } 553 553 else 554 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,554 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 555 555 N_("Failed to set appropriate promiscous mode")); 556 556 } 557 557 else 558 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,558 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 559 559 N_("Failed to activate promiscous mode for VNIC")); 560 560 } 561 561 else 562 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,562 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 563 563 N_("Failed to set physical address for VNIC")); 564 564 } 565 565 else 566 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,566 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 567 567 N_("Failed to bind VNIC")); 568 568 } 569 569 else 570 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,570 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 571 571 N_("VNIC type is not ethernet")); 572 572 } 573 573 else 574 rc = PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS,574 rc = PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 575 575 N_("Failed to obtain VNIC info")); 576 g_pfnLibDlpiClose(p Data->pDeviceHandle);576 g_pfnLibDlpiClose(pThis->pDeviceHandle); 577 577 return rc; 578 578 } … … 625 625 * 626 626 * @returns VBox error code. 627 * @param p DataThe instance data.628 */ 629 static DECLCALLBACK(int) SolarisTAPAttach(PDRVTAP p Data)630 { 631 LogFlow(("SolarisTapAttach: p Data=%p\n", pData));627 * @param pThis The instance data. 628 */ 629 static DECLCALLBACK(int) SolarisTAPAttach(PDRVTAP pThis) 630 { 631 LogFlow(("SolarisTapAttach: pThis=%p\n", pThis)); 632 632 633 633 634 634 int IPFileDes = open("/dev/udp", O_RDWR, 0); 635 635 if (IPFileDes < 0) 636 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS,636 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS, 637 637 N_("Failed to open /dev/udp. errno=%d"), errno); 638 638 639 639 int TapFileDes = open("/dev/tap", O_RDWR, 0); 640 640 if (TapFileDes < 0) 641 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS,641 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS, 642 642 N_("Failed to open /dev/tap for TAP. errno=%d"), errno); 643 643 644 644 /* Use the PPA from the ifname if possible (e.g "tap2", then use 2 as PPA) */ 645 645 int iPPA = -1; 646 if (p Data->pszDeviceName)647 { 648 size_t cch = strlen(p Data->pszDeviceName);649 if (cch > 1 && isdigit(p Data->pszDeviceName[cch - 1]) != 0)650 iPPA = p Data->pszDeviceName[cch - 1] - '0';646 if (pThis->pszDeviceName) 647 { 648 size_t cch = strlen(pThis->pszDeviceName); 649 if (cch > 1 && isdigit(pThis->pszDeviceName[cch - 1]) != 0) 650 iPPA = pThis->pszDeviceName[cch - 1] - '0'; 651 651 } 652 652 … … 660 660 { 661 661 close(TapFileDes); 662 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS,662 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS, 663 663 N_("Failed to get new interface. errno=%d"), errno); 664 664 } … … 666 666 int InterfaceFD = open("/dev/tap", O_RDWR, 0); 667 667 if (!InterfaceFD) 668 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS,668 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_PDM_HIF_OPEN_FAILED, RT_SRC_POS, 669 669 N_("Failed to open interface /dev/tap. errno=%d"), errno); 670 670 … … 672 672 { 673 673 close(InterfaceFD); 674 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS,674 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS, 675 675 N_("Failed to push IP. errno=%d"), errno); 676 676 } … … 679 679 memset(&ifReq, 0, sizeof(ifReq)); 680 680 if (ioctl(InterfaceFD, SIOCGLIFFLAGS, &ifReq) == -1) 681 LogRel(("TAP#%d: Failed to get interface flags.\n", p Data->pDrvIns->iInstance));681 LogRel(("TAP#%d: Failed to get interface flags.\n", pThis->pDrvIns->iInstance)); 682 682 683 683 ifReq.lifr_ppa = iPPA; 684 RTStrPrintf (ifReq.lifr_name, sizeof(ifReq.lifr_name), p Data->pszDeviceName);684 RTStrPrintf (ifReq.lifr_name, sizeof(ifReq.lifr_name), pThis->pszDeviceName); 685 685 686 686 if (ioctl(InterfaceFD, SIOCSLIFNAME, &ifReq) == -1) 687 LogRel(("TAP#%d: Failed to set PPA. errno=%d\n", p Data->pDrvIns->iInstance, errno));687 LogRel(("TAP#%d: Failed to set PPA. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 688 688 689 689 if (ioctl(InterfaceFD, SIOCGLIFFLAGS, &ifReq) == -1) 690 LogRel(("TAP#%d: Failed to get interface flags after setting PPA. errno=%d\n", p Data->pDrvIns->iInstance, errno));690 LogRel(("TAP#%d: Failed to get interface flags after setting PPA. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 691 691 692 692 #ifdef VBOX_SOLARIS_TAP_ARP 693 693 /* Interface */ 694 694 if (ioctl(InterfaceFD, I_PUSH, "arp") == -1) 695 LogRel(("TAP#%d: Failed to push ARP to Interface FD. errno=%d\n", p Data->pDrvIns->iInstance, errno));695 LogRel(("TAP#%d: Failed to push ARP to Interface FD. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 696 696 697 697 /* IP */ 698 698 if (ioctl(IPFileDes, I_POP, NULL) == -1) 699 LogRel(("TAP#%d: Failed I_POP from IP FD. errno=%d\n", p Data->pDrvIns->iInstance, errno));699 LogRel(("TAP#%d: Failed I_POP from IP FD. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 700 700 701 701 if (ioctl(IPFileDes, I_PUSH, "arp") == -1) 702 LogRel(("TAP#%d: Failed to push ARP to IP FD. errno=%d\n", p Data->pDrvIns->iInstance, errno));702 LogRel(("TAP#%d: Failed to push ARP to IP FD. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 703 703 704 704 /* ARP */ 705 705 int ARPFileDes = open("/dev/tap", O_RDWR, 0); 706 706 if (ARPFileDes < 0) 707 LogRel(("TAP#%d: Failed to open for /dev/tap for ARP. errno=%d", p Data->pDrvIns->iInstance, errno));707 LogRel(("TAP#%d: Failed to open for /dev/tap for ARP. errno=%d", pThis->pDrvIns->iInstance, errno)); 708 708 709 709 if (ioctl(ARPFileDes, I_PUSH, "arp") == -1) 710 LogRel(("TAP#%d: Failed to push ARP to ARP FD. errno=%d\n", p Data->pDrvIns->iInstance, errno));710 LogRel(("TAP#%d: Failed to push ARP to ARP FD. errno=%d\n", pThis->pDrvIns->iInstance, errno)); 711 711 712 712 ioIF.ic_cmd = SIOCSLIFNAME; … … 715 715 ioIF.ic_dp = (char *)&ifReq; 716 716 if (ioctl(ARPFileDes, I_STR, &ioIF) == -1) 717 LogRel(("TAP#%d: Failed to set interface name to ARP.\n", p Data->pDrvIns->iInstance));717 LogRel(("TAP#%d: Failed to set interface name to ARP.\n", pThis->pDrvIns->iInstance)); 718 718 #endif 719 719 … … 729 729 close(ARPFileDes); 730 730 #endif 731 LogRel(("TAP#%d: Cannot link TAP device to IP.\n", p Data->pDrvIns->iInstance));732 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS,731 LogRel(("TAP#%d: Cannot link TAP device to IP.\n", pThis->pDrvIns->iInstance)); 732 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS, 733 733 N_("Failed to link TAP device to IP. Check TAP interface name. errno=%d"), errno); 734 734 } … … 737 737 int ARPMuxID = ioctl(IPFileDes, I_LINK, ARPFileDes); 738 738 if (ARPMuxID == -1) 739 LogRel(("TAP#%d: Failed to link TAP device to ARP\n", p Data->pDrvIns->iInstance));739 LogRel(("TAP#%d: Failed to link TAP device to ARP\n", pThis->pDrvIns->iInstance)); 740 740 741 741 close(ARPFileDes); … … 745 745 /* Reuse ifReq */ 746 746 memset(&ifReq, 0, sizeof(ifReq)); 747 RTStrPrintf (ifReq.lifr_name, sizeof(ifReq.lifr_name), p Data->pszDeviceName);747 RTStrPrintf (ifReq.lifr_name, sizeof(ifReq.lifr_name), pThis->pszDeviceName); 748 748 ifReq.lifr_ip_muxid = IPMuxID; 749 749 #ifdef VBOX_SOLARIS_TAP_ARP … … 758 758 ioctl(IPFileDes, I_PUNLINK, IPMuxID); 759 759 close(IPFileDes); 760 LogRel(("TAP#%d: Failed to set Mux ID.\n", p Data->pDrvIns->iInstance));761 return PDMDrvHlpVMSetError(p Data->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS,760 LogRel(("TAP#%d: Failed to set Mux ID.\n", pThis->pDrvIns->iInstance)); 761 return PDMDrvHlpVMSetError(pThis->pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS, 762 762 N_("Failed to set Mux ID. Check TAP interface name. errno=%d"), errno); 763 763 } 764 764 765 p Data->FileDevice = (RTFILE)TapFileDes;766 p Data->IPFileDevice = (RTFILE)IPFileDes;765 pThis->FileDevice = (RTFILE)TapFileDes; 766 pThis->IPFileDevice = (RTFILE)IPFileDes; 767 767 768 768 return VINF_SUCCESS; … … 785 785 { 786 786 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 787 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);787 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 788 788 switch (enmInterface) 789 789 { … … 791 791 return &pDrvIns->IBase; 792 792 case PDMINTERFACE_NETWORK_CONNECTOR: 793 return &p Data->INetworkConnector;793 return &pThis->INetworkConnector; 794 794 default: 795 795 return NULL; … … 809 809 { 810 810 LogFlow(("drvTAPDestruct\n")); 811 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);811 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 812 812 813 813 /* 814 814 * Terminate the control pipe. 815 815 */ 816 if (p Data->PipeWrite != NIL_RTFILE)817 { 818 int rc = RTFileClose(p Data->PipeWrite);816 if (pThis->PipeWrite != NIL_RTFILE) 817 { 818 int rc = RTFileClose(pThis->PipeWrite); 819 819 AssertRC(rc); 820 p Data->PipeWrite = NIL_RTFILE;821 } 822 if (p Data->PipeRead != NIL_RTFILE)823 { 824 int rc = RTFileClose(p Data->PipeRead);820 pThis->PipeWrite = NIL_RTFILE; 821 } 822 if (pThis->PipeRead != NIL_RTFILE) 823 { 824 int rc = RTFileClose(pThis->PipeRead); 825 825 AssertRC(rc); 826 p Data->PipeRead = NIL_RTFILE;826 pThis->PipeRead = NIL_RTFILE; 827 827 } 828 828 829 829 #ifdef RT_OS_SOLARIS 830 830 /** @todo r=bird: This *does* need checking against ConsoleImpl2.cpp if used on non-solaris systems. */ 831 if (p Data->FileDevice != NIL_RTFILE)832 { 833 int rc = RTFileClose(p Data->FileDevice);831 if (pThis->FileDevice != NIL_RTFILE) 832 { 833 int rc = RTFileClose(pThis->FileDevice); 834 834 AssertRC(rc); 835 p Data->FileDevice = NIL_RTFILE;835 pThis->FileDevice = NIL_RTFILE; 836 836 } 837 837 838 838 # ifndef VBOX_WITH_CROSSBOW 839 if (p Data->IPFileDevice != NIL_RTFILE)840 { 841 int rc = RTFileClose(p Data->IPFileDevice);839 if (pThis->IPFileDevice != NIL_RTFILE) 840 { 841 int rc = RTFileClose(pThis->IPFileDevice); 842 842 AssertRC(rc); 843 p Data->IPFileDevice = NIL_RTFILE;843 pThis->IPFileDevice = NIL_RTFILE; 844 844 } 845 845 # endif … … 849 849 * TerminateApplication would not be able to unplumb it. 850 850 */ 851 if (p Data->pszTerminateApplication)852 drvTAPTerminateApplication(p Data);851 if (pThis->pszTerminateApplication) 852 drvTAPTerminateApplication(pThis); 853 853 854 854 #endif /* RT_OS_SOLARIS */ 855 855 856 856 #ifdef RT_OS_SOLARIS 857 if (!p Data->fStatic)858 RTStrFree(p Data->pszDeviceName); /* allocated by drvTAPSetupApplication */857 if (!pThis->fStatic) 858 RTStrFree(pThis->pszDeviceName); /* allocated by drvTAPSetupApplication */ 859 859 else 860 MMR3HeapFree(p Data->pszDeviceName);860 MMR3HeapFree(pThis->pszDeviceName); 861 861 #else 862 MMR3HeapFree(p Data->pszDeviceName);863 #endif 864 MMR3HeapFree(p Data->pszSetupApplication);865 MMR3HeapFree(p Data->pszTerminateApplication);862 MMR3HeapFree(pThis->pszDeviceName); 863 #endif 864 MMR3HeapFree(pThis->pszSetupApplication); 865 MMR3HeapFree(pThis->pszTerminateApplication); 866 866 } 867 867 … … 879 879 static DECLCALLBACK(int) drvTAPConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 880 880 { 881 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);881 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 882 882 883 883 /* 884 884 * Init the static parts. 885 885 */ 886 p Data->pDrvIns = pDrvIns;887 p Data->FileDevice = NIL_RTFILE;888 p Data->pszDeviceName = NULL;886 pThis->pDrvIns = pDrvIns; 887 pThis->FileDevice = NIL_RTFILE; 888 pThis->pszDeviceName = NULL; 889 889 #ifdef RT_OS_SOLARIS 890 890 # ifdef VBOX_WITH_CROSSBOW 891 p Data->pDeviceHandle = NULL;891 pThis->pDeviceHandle = NULL; 892 892 # else 893 p Data->IPFileDevice = NIL_RTFILE;893 pThis->IPFileDevice = NIL_RTFILE; 894 894 # endif 895 p Data->fStatic = true;896 #endif 897 p Data->pszSetupApplication = NULL;898 p Data->pszTerminateApplication = NULL;895 pThis->fStatic = true; 896 #endif 897 pThis->pszSetupApplication = NULL; 898 pThis->pszTerminateApplication = NULL; 899 899 900 900 /* IBase */ 901 901 pDrvIns->IBase.pfnQueryInterface = drvTAPQueryInterface; 902 902 /* INetwork */ 903 p Data->INetworkConnector.pfnSend = drvTAPSend;904 p Data->INetworkConnector.pfnSetPromiscuousMode = drvTAPSetPromiscuousMode;905 p Data->INetworkConnector.pfnNotifyLinkChanged = drvTAPNotifyLinkChanged;903 pThis->INetworkConnector.pfnSend = drvTAPSend; 904 pThis->INetworkConnector.pfnSetPromiscuousMode = drvTAPSetPromiscuousMode; 905 pThis->INetworkConnector.pfnNotifyLinkChanged = drvTAPNotifyLinkChanged; 906 906 907 907 /* … … 922 922 * Query the network port interface. 923 923 */ 924 p Data->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT);925 if (!p Data->pPort)924 pThis->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT); 925 if (!pThis->pPort) 926 926 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, 927 927 N_("Configuration error: The above device/driver didn't export the network port interface")); … … 931 931 */ 932 932 #if defined(RT_OS_SOLARIS) /** @todo Other platforms' TAP code should be moved here from ConsoleImpl & VBoxBFE. */ 933 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TAPSetupApplication", &p Data->pszSetupApplication);933 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TAPSetupApplication", &pThis->pszSetupApplication); 934 934 if (RT_SUCCESS(rc)) 935 935 { 936 if (!RTPathExists(p Data->pszSetupApplication))936 if (!RTPathExists(pThis->pszSetupApplication)) 937 937 return PDMDrvHlpVMSetError(pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 938 N_("Invalid TAP setup program path: %s"), p Data->pszSetupApplication);938 N_("Invalid TAP setup program path: %s"), pThis->pszSetupApplication); 939 939 } 940 940 else if (rc != VERR_CFGM_VALUE_NOT_FOUND) 941 941 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Configuration error: failed to query \"TAPTerminateApplication\"")); 942 942 943 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TAPTerminateApplication", &p Data->pszTerminateApplication);943 rc = CFGMR3QueryStringAlloc(pCfgHandle, "TAPTerminateApplication", &pThis->pszTerminateApplication); 944 944 if (RT_SUCCESS(rc)) 945 945 { 946 if (!RTPathExists(p Data->pszTerminateApplication))946 if (!RTPathExists(pThis->pszTerminateApplication)) 947 947 return PDMDrvHlpVMSetError(pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, 948 N_("Invalid TAP terminate program path: %s"), p Data->pszTerminateApplication);948 N_("Invalid TAP terminate program path: %s"), pThis->pszTerminateApplication); 949 949 } 950 950 else if (rc != VERR_CFGM_VALUE_NOT_FOUND) … … 952 952 953 953 # ifdef VBOX_WITH_CROSSBOW 954 rc = CFGMR3QueryBytes(pCfgHandle, "MAC", &p Data->MacAddress, sizeof(pData->MacAddress));954 rc = CFGMR3QueryBytes(pCfgHandle, "MAC", &pThis->MacAddress, sizeof(pThis->MacAddress)); 955 955 if (RT_FAILURE(rc)) 956 956 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Configuration error: Failed to query \"MAC\"")); 957 957 # endif 958 958 959 rc = CFGMR3QueryStringAlloc(pCfgHandle, "Device", &p Data->pszDeviceName);959 rc = CFGMR3QueryStringAlloc(pCfgHandle, "Device", &pThis->pszDeviceName); 960 960 if (RT_FAILURE(rc)) 961 p Data->fStatic = false;961 pThis->fStatic = false; 962 962 963 963 /* Obtain the device name from the setup application (if none was specified). */ 964 if (p Data->pszSetupApplication)965 { 966 rc = drvTAPSetupApplication(p Data);964 if (pThis->pszSetupApplication) 965 { 966 rc = drvTAPSetupApplication(pThis); 967 967 if (RT_FAILURE(rc)) 968 968 return PDMDrvHlpVMSetError(pDrvIns, VERR_HOSTIF_INIT_FAILED, RT_SRC_POS, … … 979 979 N_("Failed to load library %s required for host interface networking."), LIB_DLPI); 980 980 } 981 rc = SolarisOpenVNIC(p Data);981 rc = SolarisOpenVNIC(pThis); 982 982 # else 983 rc = SolarisTAPAttach(p Data);983 rc = SolarisTAPAttach(pThis); 984 984 # endif 985 985 if (RT_FAILURE(rc)) … … 993 993 return PDMDRV_SET_ERROR(pDrvIns, rc, 994 994 N_("Configuration error: Query for \"FileHandle\" 32-bit signed integer failed")); 995 p Data->FileDevice = (RTFILE)iFile;996 if (!RTFileIsValid(p Data->FileDevice))995 pThis->FileDevice = (RTFILE)iFile; 996 if (!RTFileIsValid(pThis->FileDevice)) 997 997 return PDMDrvHlpVMSetError(pDrvIns, VERR_INVALID_HANDLE, RT_SRC_POS, 998 N_("The TAP file handle %RTfile is not valid"), p Data->FileDevice);998 N_("The TAP file handle %RTfile is not valid"), pThis->FileDevice); 999 999 #endif /* !RT_OS_SOLARIS */ 1000 1000 … … 1005 1005 * found any way to do that. 1006 1006 */ 1007 if (fcntl(p Data->FileDevice, F_SETFL, O_NONBLOCK) == -1)1007 if (fcntl(pThis->FileDevice, F_SETFL, O_NONBLOCK) == -1) 1008 1008 return PDMDrvHlpVMSetError(pDrvIns, VERR_HOSTIF_IOCTL, RT_SRC_POS, 1009 1009 N_("Configuration error: Failed to configure /dev/net/tun. errno=%d"), errno); 1010 1010 /** @todo determine device name. This can be done by reading the link /proc/<pid>/fd/<fd> */ 1011 Log(("drvTAPContruct: %d (from fd)\n", p Data->FileDevice));1011 Log(("drvTAPContruct: %d (from fd)\n", pThis->FileDevice)); 1012 1012 rc = VINF_SUCCESS; 1013 1013 … … 1026 1026 return rc; 1027 1027 } 1028 p Data->PipeRead = fds[0];1029 p Data->PipeWrite = fds[1];1028 pThis->PipeRead = fds[0]; 1029 pThis->PipeWrite = fds[1]; 1030 1030 1031 1031 /* 1032 1032 * Create the async I/O thread. 1033 1033 */ 1034 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pThread, pData, drvTAPAsyncIoThread, drvTapAsyncIoWakeup, 128 * _1K, RTTHREADTYPE_IO, "TAP");1034 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pThread, pThis, drvTAPAsyncIoThread, drvTapAsyncIoWakeup, 128 * _1K, RTTHREADTYPE_IO, "TAP"); 1035 1035 AssertRCReturn(rc, rc); 1036 1036 … … 1039 1039 * Statistics. 1040 1040 */ 1041 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktSent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of sent packets.", "/Drivers/TAP%d/Packets/Sent", pDrvIns->iInstance);1042 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktSentBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of sent bytes.", "/Drivers/TAP%d/Bytes/Sent", pDrvIns->iInstance);1043 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktRecv, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of received packets.", "/Drivers/TAP%d/Packets/Received", pDrvIns->iInstance);1044 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktRecvBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of received bytes.", "/Drivers/TAP%d/Bytes/Received", pDrvIns->iInstance);1045 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet transmit runs.", "/Drivers/TAP%d/Transmit", pDrvIns->iInstance);1046 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet receive runs.", "/Drivers/TAP%d/Receive", pDrvIns->iInstance);1041 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktSent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of sent packets.", "/Drivers/TAP%d/Packets/Sent", pDrvIns->iInstance); 1042 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktSentBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of sent bytes.", "/Drivers/TAP%d/Bytes/Sent", pDrvIns->iInstance); 1043 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktRecv, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of received packets.", "/Drivers/TAP%d/Packets/Received", pDrvIns->iInstance); 1044 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktRecvBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of received bytes.", "/Drivers/TAP%d/Bytes/Received", pDrvIns->iInstance); 1045 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet transmit runs.", "/Drivers/TAP%d/Transmit", pDrvIns->iInstance); 1046 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet receive runs.", "/Drivers/TAP%d/Receive", pDrvIns->iInstance); 1047 1047 #endif /* VBOX_WITH_STATISTICS */ 1048 1048 -
trunk/src/VBox/Devices/Network/DrvTAPWin.cpp
r11267 r11269 112 112 DWORD cbBytesWritten; 113 113 int rc; 114 PDRVTAP p Data= PDMINETWORKCONNECTOR_2_DRVTAP(pInterface);114 PDRVTAP pThis = PDMINETWORKCONNECTOR_2_DRVTAP(pInterface); 115 115 116 116 Log2(("drvTAPW32Send%d: pvBuf=%p cb=%#x\n" 117 "%.*Vhxd\n", p Data->pDrvIns->iInstance, pvBuf, cb, cb, pvBuf));117 "%.*Vhxd\n", pThis->pDrvIns->iInstance, pvBuf, cb, cb, pvBuf)); 118 118 119 119 #ifdef DEBUG 120 p Data->dwLastReadTime = timeGetTime();121 Log(("drvTAPW32Send %d bytes at %08x - delta %x\n", cb, p Data->dwLastReadTime, pData->dwLastReadTime - pData->dwLastWriteTime));120 pThis->dwLastReadTime = timeGetTime(); 121 Log(("drvTAPW32Send %d bytes at %08x - delta %x\n", cb, pThis->dwLastReadTime, pThis->dwLastReadTime - pThis->dwLastWriteTime)); 122 122 #endif 123 123 124 STAM_COUNTER_INC(&p Data->StatPktSent);125 STAM_COUNTER_ADD(&p Data->StatPktSentBytes, cb);126 STAM_PROFILE_ADV_START(&p Data->StatTransmit, a);124 STAM_COUNTER_INC(&pThis->StatPktSent); 125 STAM_COUNTER_ADD(&pThis->StatPktSentBytes, cb); 126 STAM_PROFILE_ADV_START(&pThis->StatTransmit, a); 127 127 128 128 memset(&overlapped, 0, sizeof(overlapped)); 129 overlapped.hEvent = p Data->hEventWrite;129 overlapped.hEvent = pThis->hEventWrite; 130 130 131 131 rc = VINF_SUCCESS; 132 if (WriteFile(p Data->hFile, pvBuf, cb, &cbBytesWritten, &overlapped) == FALSE)132 if (WriteFile(pThis->hFile, pvBuf, cb, &cbBytesWritten, &overlapped) == FALSE) 133 133 { 134 134 if (GetLastError() == ERROR_IO_PENDING) … … 145 145 } 146 146 } 147 STAM_PROFILE_ADV_STOP(&p Data->StatTransmit, a);147 STAM_PROFILE_ADV_STOP(&pThis->StatTransmit, a); 148 148 AssertRC(rc); 149 149 return rc; … … 187 187 static DECLCALLBACK(int) drvTAPW32AsyncIoThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 188 188 { 189 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);189 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 190 190 HANDLE haWait[2]; 191 191 DWORD rc = ERROR_SUCCESS, dwNumberOfBytesTransferred; … … 194 194 return VINF_SUCCESS; 195 195 196 Assert(p Data);197 haWait[0] = p Data->hEventRead;198 haWait[1] = p Data->hHaltAsyncEventSem;196 Assert(pThis); 197 haWait[0] = pThis->hEventRead; 198 haWait[1] = pThis->hHaltAsyncEventSem; 199 199 200 200 while(1) … … 202 202 BOOL bRet; 203 203 204 memset(&p Data->overlappedRead, 0, sizeof(pData->overlappedRead));205 p Data->overlappedRead.hEvent = pData->hEventRead;206 bRet = ReadFile(p Data->hFile, pData->readBuffer, sizeof(pData->readBuffer),207 &dwNumberOfBytesTransferred, &p Data->overlappedRead);204 memset(&pThis->overlappedRead, 0, sizeof(pThis->overlappedRead)); 205 pThis->overlappedRead.hEvent = pThis->hEventRead; 206 bRet = ReadFile(pThis->hFile, pThis->readBuffer, sizeof(pThis->readBuffer), 207 &dwNumberOfBytesTransferred, &pThis->overlappedRead); 208 208 if (bRet == FALSE) 209 209 { … … 219 219 break; /* asked to quit or fatal error. */ 220 220 221 rc = GetOverlappedResult(p Data->hFile, &pData->overlappedRead, &dwNumberOfBytesTransferred, FALSE);221 rc = GetOverlappedResult(pThis->hFile, &pThis->overlappedRead, &dwNumberOfBytesTransferred, FALSE); 222 222 Assert(rc == TRUE); 223 223 … … 230 230 * current packet and wait for the next one. 231 231 */ 232 rc = p Data->pPort->pfnWaitReceiveAvail(pData->pPort, RT_INDEFINITE_WAIT);232 rc = pThis->pPort->pfnWaitReceiveAvail(pThis->pPort, RT_INDEFINITE_WAIT); 233 233 if (RT_FAILURE(rc)) 234 234 continue; 235 235 236 STAM_COUNTER_INC(&p Data->StatPktRecv);237 STAM_COUNTER_ADD(&p Data->StatPktRecvBytes, dwNumberOfBytesTransferred);236 STAM_COUNTER_INC(&pThis->StatPktRecv); 237 STAM_COUNTER_ADD(&pThis->StatPktRecvBytes, dwNumberOfBytesTransferred); 238 238 #ifdef DEBUG 239 p Data->dwLastWriteTime = timeGetTime();239 pThis->dwLastWriteTime = timeGetTime(); 240 240 Log(("drvTAPW32AsyncIo %d bytes at %08x - delta %x\n", dwNumberOfBytesTransferred, 241 p Data->dwLastWriteTime, pData->dwLastWriteTime - pData->dwLastReadTime));241 pThis->dwLastWriteTime, pThis->dwLastWriteTime - pThis->dwLastReadTime)); 242 242 #endif 243 rc = p Data->pPort->pfnReceive(pData->pPort, pData->readBuffer, dwNumberOfBytesTransferred);243 rc = pThis->pPort->pfnReceive(pThis->pPort, pThis->readBuffer, dwNumberOfBytesTransferred); 244 244 AssertRC(rc); 245 245 } 246 246 247 SetEvent(p Data->hHaltAsyncEventSem);247 SetEvent(pThis->hHaltAsyncEventSem); 248 248 Log(("drvTAPW32AsyncIo: exit thread!!\n")); 249 249 return VINF_SUCCESS; … … 260 260 static DECLCALLBACK(int) drvTAPW32AsyncIoWakeup(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 261 261 { 262 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);262 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 263 263 264 264 /** @todo this isn't a safe method to notify the async thread; it might be using the instance … … 266 266 * without risks either. 267 267 */ 268 SetEvent(p Data->hHaltAsyncEventSem);268 SetEvent(pThis->hHaltAsyncEventSem); 269 269 270 270 /* Yield or else our async thread will never acquire the event semaphore */ 271 271 RTThreadSleep(16); 272 272 /* Wait for the async thread to quit; up to half a second */ 273 WaitForSingleObject(p Data->hHaltAsyncEventSem, 500);273 WaitForSingleObject(pThis->hHaltAsyncEventSem, 500); 274 274 275 275 return VINF_SUCCESS; … … 288 288 { 289 289 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 290 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);290 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 291 291 switch (enmInterface) 292 292 { … … 294 294 return &pDrvIns->IBase; 295 295 case PDMINTERFACE_NETWORK_CONNECTOR: 296 return &p Data->INetworkConnector;296 return &pThis->INetworkConnector; 297 297 default: 298 298 return NULL; … … 311 311 static DECLCALLBACK(void) drvTAPW32Destruct(PPDMDRVINS pDrvIns) 312 312 { 313 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);313 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 314 314 TAP_MEDIASTATUS mediastatus; 315 315 DWORD dwLength; … … 318 318 319 319 mediastatus.fConnect = FALSE; 320 BOOL ret = DeviceIoControl(p Data->hFile, TAP_IOCTL_SET_MEDIA_STATUS,320 BOOL ret = DeviceIoControl(pThis->hFile, TAP_IOCTL_SET_MEDIA_STATUS, 321 321 &mediastatus, sizeof(mediastatus), NULL, 0, &dwLength, NULL); 322 322 Assert(ret); 323 323 324 CloseHandle(p Data->hEventWrite);325 CancelIo(p Data->hFile);326 CloseHandle(p Data->hFile);324 CloseHandle(pThis->hEventWrite); 325 CancelIo(pThis->hFile); 326 CloseHandle(pThis->hFile); 327 327 } 328 328 … … 340 340 static DECLCALLBACK(int) drvTAPW32Construct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 341 341 { 342 PDRVTAP p Data= PDMINS_2_DATA(pDrvIns, PDRVTAP);342 PDRVTAP pThis = PDMINS_2_DATA(pDrvIns, PDRVTAP); 343 343 344 344 /* 345 345 * Init the static parts. 346 346 */ 347 p Data->pDrvIns = pDrvIns;348 p Data->hFile = INVALID_HANDLE_VALUE;347 pThis->pDrvIns = pDrvIns; 348 pThis->hFile = INVALID_HANDLE_VALUE; 349 349 /* IBase */ 350 350 pDrvIns->IBase.pfnQueryInterface = drvTAPW32QueryInterface; 351 351 /* INetwork */ 352 p Data->INetworkConnector.pfnSend = drvTAPW32Send;353 p Data->INetworkConnector.pfnSetPromiscuousMode = drvTAPW32SetPromiscuousMode;354 p Data->INetworkConnector.pfnNotifyLinkChanged = drvTAPW32NotifyLinkChanged;352 pThis->INetworkConnector.pfnSend = drvTAPW32Send; 353 pThis->INetworkConnector.pfnSetPromiscuousMode = drvTAPW32SetPromiscuousMode; 354 pThis->INetworkConnector.pfnNotifyLinkChanged = drvTAPW32NotifyLinkChanged; 355 355 356 356 /* … … 371 371 * Query the network port interface. 372 372 */ 373 p Data->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT);374 if (!p Data->pPort)373 pThis->pPort = (PPDMINETWORKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_NETWORK_PORT); 374 if (!pThis->pPort) 375 375 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, 376 376 N_("Configuration error: the above device/driver didn't export the network port interface")); … … 397 397 RTStrPrintfEx(NULL, NULL, szFullDriverName, sizeof(szFullDriverName), "\\\\.\\Global\\%s.tap", szDriverGUID); 398 398 399 p Data->hFile = CreateFile(szFullDriverName, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING,399 pThis->hFile = CreateFile(szFullDriverName, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 400 400 FILE_ATTRIBUTE_SYSTEM | FILE_FLAG_OVERLAPPED, 0); 401 401 402 if (p Data->hFile == INVALID_HANDLE_VALUE)402 if (pThis->hFile == INVALID_HANDLE_VALUE) 403 403 { 404 404 rc = GetLastError(); … … 412 412 } 413 413 414 BOOL ret = DeviceIoControl(p Data->hFile, TAP_IOCTL_GET_VERSION, &pData->tapVersion, sizeof (pData->tapVersion),415 &p Data->tapVersion, sizeof(pData->tapVersion), &length, NULL);414 BOOL ret = DeviceIoControl(pThis->hFile, TAP_IOCTL_GET_VERSION, &pThis->tapVersion, sizeof (pThis->tapVersion), 415 &pThis->tapVersion, sizeof(pThis->tapVersion), &length, NULL); 416 416 if (ret == FALSE) 417 417 { 418 CloseHandle(p Data->hFile);418 CloseHandle(pThis->hFile); 419 419 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_HIF_INVALID_VERSION, 420 420 N_("Failed to get the Host Interface Networking device driver version"));; 421 421 } 422 LogRel(("TAP version %d.%d\n", p Data->tapVersion.major, pData->tapVersion.minor));422 LogRel(("TAP version %d.%d\n", pThis->tapVersion.major, pThis->tapVersion.minor)); 423 423 424 424 /* Must be at least version 8.1 */ 425 if ( p Data->tapVersion.major != 8426 || p Data->tapVersion.minor < 1)427 { 428 CloseHandle(p Data->hFile);425 if ( pThis->tapVersion.major != 8 426 || pThis->tapVersion.minor < 1) 427 { 428 CloseHandle(pThis->hFile); 429 429 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_HIF_INVALID_VERSION, 430 430 N_("Invalid Host Interface Networking device driver version"));; … … 432 432 433 433 mediastatus.fConnect = TRUE; 434 ret = DeviceIoControl(p Data->hFile, TAP_IOCTL_SET_MEDIA_STATUS, &mediastatus, sizeof(mediastatus), NULL, 0, &length, NULL);434 ret = DeviceIoControl(pThis->hFile, TAP_IOCTL_SET_MEDIA_STATUS, &mediastatus, sizeof(mediastatus), NULL, 0, &length, NULL); 435 435 if (ret == FALSE) 436 436 { 437 CloseHandle(p Data->hFile);437 CloseHandle(pThis->hFile); 438 438 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES; 439 439 } … … 442 442 MMR3HeapFree(pszHostDriver); 443 443 444 p Data->hEventWrite = CreateEvent(NULL, FALSE, FALSE, NULL);445 p Data->hEventRead = CreateEvent(NULL, FALSE, FALSE, NULL);446 memset(&p Data->overlappedRead, 0, sizeof(pData->overlappedRead));447 448 p Data->hHaltAsyncEventSem = CreateEvent(NULL, FALSE, FALSE, NULL);449 Assert(p Data->hHaltAsyncEventSem != NULL);444 pThis->hEventWrite = CreateEvent(NULL, FALSE, FALSE, NULL); 445 pThis->hEventRead = CreateEvent(NULL, FALSE, FALSE, NULL); 446 memset(&pThis->overlappedRead, 0, sizeof(pThis->overlappedRead)); 447 448 pThis->hHaltAsyncEventSem = CreateEvent(NULL, FALSE, FALSE, NULL); 449 Assert(pThis->hHaltAsyncEventSem != NULL); 450 450 451 451 /* Create asynchronous thread */ 452 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pThread, pData, drvTAPW32AsyncIoThread, drvTAPW32AsyncIoWakeup, 128 * _1K, RTTHREADTYPE_IO, "TAP");452 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pThread, pThis, drvTAPW32AsyncIoThread, drvTAPW32AsyncIoWakeup, 128 * _1K, RTTHREADTYPE_IO, "TAP"); 453 453 AssertRCReturn(rc, rc); 454 454 … … 457 457 * Statistics. 458 458 */ 459 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktSent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of sent packets.", "/Drivers/TAP%d/Packets/Sent", pDrvIns->iInstance);460 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktSentBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of sent bytes.", "/Drivers/TAP%d/Bytes/Sent", pDrvIns->iInstance);461 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktRecv, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of received packets.", "/Drivers/TAP%d/Packets/Received", pDrvIns->iInstance);462 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatPktRecvBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of received bytes.", "/Drivers/TAP%d/Bytes/Received", pDrvIns->iInstance);463 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet transmit runs.", "/Drivers/TAP%d/Transmit", pDrvIns->iInstance);464 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet receive runs.", "/Drivers/TAP%d/Receive", pDrvIns->iInstance);465 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatRecvOverflows,STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Profiling packet receive overflows.", "/Drivers/TAP%d/RecvOverflows", pDrvIns->iInstance);459 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktSent, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of sent packets.", "/Drivers/TAP%d/Packets/Sent", pDrvIns->iInstance); 460 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktSentBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of sent bytes.", "/Drivers/TAP%d/Bytes/Sent", pDrvIns->iInstance); 461 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktRecv, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of received packets.", "/Drivers/TAP%d/Packets/Received", pDrvIns->iInstance); 462 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatPktRecvBytes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Number of received bytes.", "/Drivers/TAP%d/Bytes/Received", pDrvIns->iInstance); 463 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatTransmit, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet transmit runs.", "/Drivers/TAP%d/Transmit", pDrvIns->iInstance); 464 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatReceive, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling packet receive runs.", "/Drivers/TAP%d/Receive", pDrvIns->iInstance); 465 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatRecvOverflows,STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_OCCURENCE, "Profiling packet receive overflows.", "/Drivers/TAP%d/RecvOverflows", pDrvIns->iInstance); 466 466 #endif 467 467 -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r11208 r11269 1466 1466 static DECLCALLBACK(void *) acpiQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 1467 1467 { 1468 ACPIState *p Data= (ACPIState*)((uintptr_t)pInterface - RT_OFFSETOF(ACPIState, IBase));1468 ACPIState *pThis = (ACPIState*)((uintptr_t)pInterface - RT_OFFSETOF(ACPIState, IBase)); 1469 1469 switch (enmInterface) 1470 1470 { 1471 1471 case PDMINTERFACE_BASE: 1472 return &p Data->IBase;1472 return &pThis->IBase; 1473 1473 case PDMINTERFACE_ACPI_PORT: 1474 return &p Data->IACPIPort;1474 return &pThis->IACPIPort; 1475 1475 default: 1476 1476 return NULL; -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r11223 r11269 1656 1656 static DECLCALLBACK(void) apicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 1657 1657 { 1658 APICState *p Data= PDMINS_2_DATA(pDevIns, APICState *);1659 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);1660 p Data->pApicHlpRC = pData->pApicHlpR3->pfnGetRCHelpers(pDevIns);1661 p Data->pTimerRC = TMTimerRCPtr(pData->CTX_SUFF(pTimer));1658 APICState *pThis = PDMINS_2_DATA(pDevIns, APICState *); 1659 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1660 pThis->pApicHlpRC = pThis->pApicHlpR3->pfnGetRCHelpers(pDevIns); 1661 pThis->pTimerRC = TMTimerRCPtr(pThis->CTX_SUFF(pTimer)); 1662 1662 } 1663 1663 … … 1667 1667 static DECLCALLBACK(int) apicConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 1668 1668 { 1669 APICState *p Data= PDMINS_2_DATA(pDevIns, APICState *);1669 APICState *pThis = PDMINS_2_DATA(pDevIns, APICState *); 1670 1670 PDMAPICREG ApicReg; 1671 1671 int rc; … … 1701 1701 * Init the data. 1702 1702 */ 1703 p Data->pDevInsR3 = pDevIns;1704 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);1705 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);1706 p Data->apicbase = UINT32_C(0xfee00000) | MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE;1703 pThis->pDevInsR3 = pDevIns; 1704 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 1705 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1706 pThis->apicbase = UINT32_C(0xfee00000) | MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE; 1707 1707 for (i = 0; i < APIC_LVT_NB; i++) 1708 p Data->lvt[i] = 1 << 16; /* mask LVT */1709 p Data->spurious_vec = 0xff;1708 pThis->lvt[i] = 1 << 16; /* mask LVT */ 1709 pThis->spurious_vec = 0xff; 1710 1710 1711 1711 /* … … 1756 1756 1757 1757 Assert(pDevIns->pDevHlp->pfnAPICRegister); 1758 rc = pDevIns->pDevHlp->pfnAPICRegister(pDevIns, &ApicReg, &p Data->pApicHlpR3);1758 rc = pDevIns->pDevHlp->pfnAPICRegister(pDevIns, &ApicReg, &pThis->pApicHlpR3); 1759 1759 if (RT_FAILURE(rc)) 1760 1760 { … … 1779 1779 { 1780 1780 LogRel(("Activating Local APIC\n")); 1781 p Data->pApicHlpR3->pfnChangeFeature(pDevIns, true);1781 pThis->pApicHlpR3->pfnChangeFeature(pDevIns, true); 1782 1782 } 1783 1783 } … … 1786 1786 * Register the MMIO range. 1787 1787 */ 1788 rc = PDMDevHlpMMIORegister(pDevIns, p Data->apicbase & ~0xfff, 0x1000, pData,1788 rc = PDMDevHlpMMIORegister(pDevIns, pThis->apicbase & ~0xfff, 0x1000, pThis, 1789 1789 apicMMIOWrite, apicMMIORead, NULL, "APIC Memory"); 1790 1790 if (RT_FAILURE(rc)) … … 1792 1792 1793 1793 if (fGCEnabled) { 1794 p Data->pApicHlpRC = pData->pApicHlpR3->pfnGetRCHelpers(pDevIns);1795 1796 rc = PDMDevHlpMMIORegisterGC(pDevIns, p Data->apicbase & ~0xfff, 0x1000, 0,1794 pThis->pApicHlpRC = pThis->pApicHlpR3->pfnGetRCHelpers(pDevIns); 1795 1796 rc = PDMDevHlpMMIORegisterGC(pDevIns, pThis->apicbase & ~0xfff, 0x1000, 0, 1797 1797 "apicMMIOWrite", "apicMMIORead", NULL); 1798 1798 if (RT_FAILURE(rc)) … … 1801 1801 1802 1802 if (fR0Enabled) { 1803 p Data->pApicHlpR0 = pData->pApicHlpR3->pfnGetR0Helpers(pDevIns);1804 1805 rc = PDMDevHlpMMIORegisterR0(pDevIns, p Data->apicbase & ~0xfff, 0x1000, 0,1803 pThis->pApicHlpR0 = pThis->pApicHlpR3->pfnGetR0Helpers(pDevIns); 1804 1805 rc = PDMDevHlpMMIORegisterR0(pDevIns, pThis->apicbase & ~0xfff, 0x1000, 0, 1806 1806 "apicMMIOWrite", "apicMMIORead", NULL); 1807 1807 if (RT_FAILURE(rc)) … … 1813 1813 */ 1814 1814 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, apicTimer, 1815 "APIC Timer", &p Data->CTX_SUFF(pTimer));1815 "APIC Timer", &pThis->CTX_SUFF(pTimer)); 1816 1816 if (RT_FAILURE(rc)) 1817 1817 return rc; 1818 p Data->pTimerR0 = TMTimerR0Ptr(pData->CTX_SUFF(pTimer));1819 p Data->pTimerRC = TMTimerRCPtr(pData->CTX_SUFF(pTimer));1818 pThis->pTimerR0 = TMTimerR0Ptr(pThis->CTX_SUFF(pTimer)); 1819 pThis->pTimerRC = TMTimerRCPtr(pThis->CTX_SUFF(pTimer)); 1820 1820 1821 1821 /* … … 1823 1823 */ 1824 1824 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, 1825 sizeof(*p Data), NULL, apicSaveExec, NULL, NULL, apicLoadExec, NULL);1825 sizeof(*pThis), NULL, apicSaveExec, NULL, NULL, apicLoadExec, NULL); 1826 1826 if (RT_FAILURE(rc)) 1827 1827 return rc; … … 1831 1831 * Statistics. 1832 1832 */ 1833 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatMMIOReadGC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOReadGC", STAMUNIT_OCCURENCES, "Number of APIC MMIO reads in GC.");1834 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatMMIOReadHC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOReadHC", STAMUNIT_OCCURENCES, "Number of APIC MMIO reads in HC.");1835 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatMMIOWriteGC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOWriteGC", STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in GC.");1836 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatMMIOWriteHC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOWriteHC", STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in HC.");1837 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatClearedActiveIrq, STAMTYPE_COUNTER, "/PDM/APIC/Masked/ActiveIRQ", STAMUNIT_OCCURENCES, "Number of cleared irqs.");1833 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMMIOReadGC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOReadGC", STAMUNIT_OCCURENCES, "Number of APIC MMIO reads in GC."); 1834 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMMIOReadHC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOReadHC", STAMUNIT_OCCURENCES, "Number of APIC MMIO reads in HC."); 1835 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMMIOWriteGC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOWriteGC", STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in GC."); 1836 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMMIOWriteHC, STAMTYPE_COUNTER, "/PDM/APIC/MMIOWriteHC", STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in HC."); 1837 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveIrq, STAMTYPE_COUNTER, "/PDM/APIC/Masked/ActiveIRQ", STAMUNIT_OCCURENCES, "Number of cleared irqs."); 1838 1838 #endif 1839 1839 -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r11252 r11269 638 638 if (cb == 1) 639 639 { 640 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);641 const uint64_t u64Now = TMTimerGet(p Data->channels[0].CTX_SUFF(pTimer));642 Assert(TMTimerGetFreq(p Data->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */640 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 641 const uint64_t u64Now = TMTimerGet(pThis->channels[0].CTX_SUFF(pTimer)); 642 Assert(TMTimerGetFreq(pThis->channels[0].CTX_SUFF(pTimer)) == 1000000000); /* lazy bird. */ 643 643 644 644 /* bit 6,7 Parity error stuff. */ 645 645 /* bit 5 - mirrors timer 2 output condition. */ 646 const int fOut = pit_get_out(p Data, 2, u64Now);646 const int fOut = pit_get_out(pThis, 2, u64Now); 647 647 /* bit 4 - toggled every with each (DRAM?) refresh request, every 15.085 µs. */ 648 648 #ifdef FAKE_REFRESH_CLOCK 649 p Data->dummy_refresh_clock ^= 1;650 const int fRefresh = p Data->dummy_refresh_clock;649 pThis->dummy_refresh_clock ^= 1; 650 const int fRefresh = pThis->dummy_refresh_clock; 651 651 #else 652 652 const int fRefresh = (u64Now / 15085) & 1; … … 654 654 /* bit 2,3 NMI / parity status stuff. */ 655 655 /* bit 1 - speaker data status */ 656 const int fSpeakerStatus = p Data->speaker_data_on;656 const int fSpeakerStatus = pThis->speaker_data_on; 657 657 /* bit 0 - timer 2 clock gate to speaker status. */ 658 const int fTimer2GateStatus = pit_get_gate(p Data, 2);658 const int fTimer2GateStatus = pit_get_gate(pThis, 2); 659 659 660 660 *pu32 = fTimer2GateStatus … … 687 687 if (cb == 1) 688 688 { 689 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);690 p Data->speaker_data_on = (u32 >> 1) & 1;691 pit_set_gate(p Data, 2, u32 & 1);689 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 690 pThis->speaker_data_on = (u32 >> 1) & 1; 691 pit_set_gate(pThis, 2, u32 & 1); 692 692 } 693 693 Log(("pitIOPortSpeakerWrite: Port=%#x cb=%x u32=%#x\n", Port, cb, u32)); … … 705 705 static DECLCALLBACK(int) pitSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 706 706 { 707 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);707 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 708 708 unsigned i; 709 709 710 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)711 { 712 PITChannelState *s = &p Data->channels[i];710 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 711 { 712 PITChannelState *s = &pThis->channels[i]; 713 713 SSMR3PutU32(pSSMHandle, s->count); 714 714 SSMR3PutU16(pSSMHandle, s->latched_count); … … 731 731 } 732 732 733 SSMR3PutS32(pSSMHandle, p Data->speaker_data_on);733 SSMR3PutS32(pSSMHandle, pThis->speaker_data_on); 734 734 #ifdef FAKE_REFRESH_CLOCK 735 return SSMR3PutS32(pSSMHandle, p Data->dummy_refresh_clock);735 return SSMR3PutS32(pSSMHandle, pThis->dummy_refresh_clock); 736 736 #else 737 737 return SSMR3PutS32(pSSMHandle, 0); … … 750 750 static DECLCALLBACK(int) pitLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 751 751 { 752 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);752 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 753 753 unsigned i; 754 754 … … 756 756 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION; 757 757 758 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)759 { 760 PITChannelState *s = &p Data->channels[i];758 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 759 { 760 PITChannelState *s = &pThis->channels[i]; 761 761 SSMR3GetU32(pSSMHandle, &s->count); 762 762 SSMR3GetU16(pSSMHandle, &s->latched_count); … … 781 781 s->mode, s->count, s->count, PIT_FREQ / s->count, (PIT_FREQ * 100 / s->count) % 100, i)); 782 782 } 783 p Data->channels[0].cRelLogEntries = 0;784 } 785 786 SSMR3GetS32(pSSMHandle, &p Data->speaker_data_on);783 pThis->channels[0].cRelLogEntries = 0; 784 } 785 786 SSMR3GetS32(pSSMHandle, &pThis->speaker_data_on); 787 787 #ifdef FAKE_REFRESH_CLOCK 788 return SSMR3GetS32(pSSMHandle, &p Data->dummy_refresh_clock);788 return SSMR3GetS32(pSSMHandle, &pThis->dummy_refresh_clock); 789 789 #else 790 790 int32_t u32Dummy; … … 802 802 static DECLCALLBACK(void) pitTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer) 803 803 { 804 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);805 PITChannelState *s = &p Data->channels[0];804 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 805 PITChannelState *s = &pThis->channels[0]; 806 806 STAM_PROFILE_ADV_START(&s->CTX_SUFF(pPit)->StatPITHandler, a); 807 807 pit_irq_timer_update(s, s->next_transition_time); … … 819 819 static DECLCALLBACK(void) pitRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 820 820 { 821 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);821 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 822 822 unsigned i; 823 823 LogFlow(("pitRelocate: \n")); 824 824 825 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)826 { 827 PITChannelState *pCh = &p Data->channels[i];825 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 826 { 827 PITChannelState *pCh = &pThis->channels[i]; 828 828 if (pCh->pTimerR3) 829 829 pCh->pTimerRC = TMTimerRCPtr(pCh->pTimerR3); 830 p Data->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);830 pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns); 831 831 } 832 832 } … … 843 843 static DECLCALLBACK(void) pitReset(PPDMDEVINS pDevIns) 844 844 { 845 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);845 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 846 846 unsigned i; 847 847 LogFlow(("pitReset: \n")); 848 848 849 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)850 { 851 PITChannelState *s = &p Data->channels[i];849 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 850 { 851 PITChannelState *s = &pThis->channels[i]; 852 852 853 853 #if 1 /* Set everything back to virgin state. (might not be strictly correct) */ … … 879 879 static DECLCALLBACK(void) pitInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 880 880 { 881 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);881 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 882 882 unsigned i; 883 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)884 { 885 const PITChannelState *pCh = &p Data->channels[i];883 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 884 { 885 const PITChannelState *pCh = &pThis->channels[i]; 886 886 887 887 pHlp->pfnPrintf(pHlp, … … 904 904 #ifdef FAKE_REFRESH_CLOCK 905 905 pHlp->pfnPrintf(pHlp, "speaker_data_on=%#x dummy_refresh_clock=%#x\n", 906 p Data->speaker_data_on, pData->dummy_refresh_clock);906 pThis->speaker_data_on, pThis->dummy_refresh_clock); 907 907 #else 908 pHlp->pfnPrintf(pHlp, "speaker_data_on=%#x\n", p Data->speaker_data_on);908 pHlp->pfnPrintf(pHlp, "speaker_data_on=%#x\n", pThis->speaker_data_on); 909 909 #endif 910 910 } … … 926 926 static DECLCALLBACK(int) pitConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 927 927 { 928 PITState *p Data= PDMINS_2_DATA(pDevIns, PITState *);928 PITState *pThis = PDMINS_2_DATA(pDevIns, PITState *); 929 929 int rc; 930 930 uint8_t u8Irq; … … 970 970 N_("Configuration error: failed to read R0Enabled as boolean")); 971 971 972 p Data->pDevIns = pDevIns;973 p Data->channels[0].irq = u8Irq;974 for (i = 0; i < RT_ELEMENTS(p Data->channels); i++)975 { 976 p Data->channels[i].pPitR3 = pData;977 p Data->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns);978 p Data->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns);972 pThis->pDevIns = pDevIns; 973 pThis->channels[0].irq = u8Irq; 974 for (i = 0; i < RT_ELEMENTS(pThis->channels); i++) 975 { 976 pThis->channels[i].pPitR3 = pThis; 977 pThis->channels[i].pPitR0 = PDMINS_2_DATA_R0PTR(pDevIns); 978 pThis->channels[i].pPitRC = PDMINS_2_DATA_RCPTR(pDevIns); 979 979 } 980 980 … … 983 983 */ 984 984 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, pitTimer, "i8254 Programmable Interval Timer", 985 &p Data->channels[0].pTimerR3);985 &pThis->channels[0].pTimerR3); 986 986 if (RT_FAILURE(rc)) 987 987 return rc; 988 p Data->channels[0].pTimerRC = TMTimerRCPtr(pData->channels[0].pTimerR3);989 p Data->channels[0].pTimerR0 = TMTimerR0Ptr(pData->channels[0].pTimerR3);988 pThis->channels[0].pTimerRC = TMTimerRCPtr(pThis->channels[0].pTimerR3); 989 pThis->channels[0].pTimerR0 = TMTimerR0Ptr(pThis->channels[0].pTimerR3); 990 990 991 991 rc = PDMDevHlpIOPortRegister(pDevIns, u16Base, 4, NULL, pitIOPortWrite, pitIOPortRead, NULL, NULL, "i8254 Programmable Interval Timer"); … … 1018 1018 } 1019 1019 1020 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, PIT_SAVED_STATE_VERSION, sizeof(*p Data),1020 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, PIT_SAVED_STATE_VERSION, sizeof(*pThis), 1021 1021 NULL, pitSaveExec, NULL, 1022 1022 NULL, pitLoadExec, NULL); … … 1032 1032 * Register statistics and debug info. 1033 1033 */ 1034 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatPITIrq, STAMTYPE_COUNTER, "/TM/PIT/Irq", STAMUNIT_OCCURENCES, "The number of times a timer interrupt was triggered.");1035 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatPITHandler, STAMTYPE_PROFILE, "/TM/PIT/Handler", STAMUNIT_TICKS_PER_CALL, "Profiling timer callback handler.");1034 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPITIrq, STAMTYPE_COUNTER, "/TM/PIT/Irq", STAMUNIT_OCCURENCES, "The number of times a timer interrupt was triggered."); 1035 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatPITHandler, STAMTYPE_PROFILE, "/TM/PIT/Handler", STAMUNIT_TICKS_PER_CALL, "Profiling timer callback handler."); 1036 1036 1037 1037 PDMDevHlpDBGFInfoRegister(pDevIns, "pit", "Display PIT (i8254) status. (no arguments)", pitInfo); -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r11245 r11269 673 673 * Calculate and update the standard CMOS checksum. 674 674 * 675 * @param p DataPointer to the RTC state data.676 */ 677 static void rtcCalcCRC(RTCState *p Data)675 * @param pThis Pointer to the RTC state data. 676 */ 677 static void rtcCalcCRC(RTCState *pThis) 678 678 { 679 679 uint16_t u16; … … 681 681 682 682 for (i = RTC_CRC_START, u16 = 0; i <= RTC_CRC_LAST; i++) 683 u16 += p Data->cmos_data[i];684 p Data->cmos_data[RTC_CRC_LOW] = u16 & 0xff;685 p Data->cmos_data[RTC_CRC_HIGH] = (u16 >> 8) & 0xff;683 u16 += pThis->cmos_data[i]; 684 pThis->cmos_data[RTC_CRC_LOW] = u16 & 0xff; 685 pThis->cmos_data[RTC_CRC_HIGH] = (u16 >> 8) & 0xff; 686 686 } 687 687 … … 697 697 static DECLCALLBACK(int) rtcCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value) 698 698 { 699 RTCState *p Data= PDMINS_2_DATA(pDevIns, RTCState *);700 if (iReg < RT_ELEMENTS(p Data->cmos_data))699 RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *); 700 if (iReg < RT_ELEMENTS(pThis->cmos_data)) 701 701 { 702 p Data->cmos_data[iReg] = u8Value;702 pThis->cmos_data[iReg] = u8Value; 703 703 704 704 /* does it require checksum update? */ 705 705 if ( iReg >= RTC_CRC_START 706 706 && iReg <= RTC_CRC_LAST) 707 rtcCalcCRC(p Data);707 rtcCalcCRC(pThis); 708 708 709 709 return VINF_SUCCESS; … … 724 724 static DECLCALLBACK(int) rtcCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value) 725 725 { 726 RTCState *p Data= PDMINS_2_DATA(pDevIns, RTCState *);727 if (iReg < RT_ELEMENTS(p Data->cmos_data))726 RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *); 727 if (iReg < RT_ELEMENTS(pThis->cmos_data)) 728 728 { 729 *pu8Value = p Data->cmos_data[iReg];729 *pu8Value = pThis->cmos_data[iReg]; 730 730 return VINF_SUCCESS; 731 731 } … … 741 741 { 742 742 /** @todo this should be (re)done at power on if we didn't load a state... */ 743 RTCState *p Data= PDMINS_2_DATA(pDevIns, RTCState *);743 RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *); 744 744 745 745 /* … … 749 749 PDMDevHlpUTCNow(pDevIns, &Now); 750 750 RTTIME Time; 751 if (p Data->fUTC)751 if (pThis->fUTC) 752 752 RTTimeExplode(&Time, &Now); 753 753 else … … 765 765 Tm.tm_sec = Time.u8Second; 766 766 767 rtc_set_date(p Data, &Tm);768 769 int iYear = to_bcd(p Data, (Tm.tm_year / 100) + 19); /* tm_year is 1900 based */770 rtc_set_memory(p Data, 0x32, iYear); /* 32h - Century Byte (BCD value for the century */771 rtc_set_memory(p Data, 0x37, iYear); /* 37h - (IBM PS/2) Date Century Byte */767 rtc_set_date(pThis, &Tm); 768 769 int iYear = to_bcd(pThis, (Tm.tm_year / 100) + 19); /* tm_year is 1900 based */ 770 rtc_set_memory(pThis, 0x32, iYear); /* 32h - Century Byte (BCD value for the century */ 771 rtc_set_memory(pThis, 0x37, iYear); /* 37h - (IBM PS/2) Date Century Byte */ 772 772 773 773 /* 774 774 * Recalculate the checksum just in case. 775 775 */ 776 rtcCalcCRC(p Data);777 778 Log(("CMOS: \n%16.128Vhxd\n", p Data->cmos_data));776 rtcCalcCRC(pThis); 777 778 Log(("CMOS: \n%16.128Vhxd\n", pThis->cmos_data)); 779 779 return VINF_SUCCESS; 780 780 } … … 812 812 static DECLCALLBACK(int) rtcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 813 813 { 814 RTCState *p Data= PDMINS_2_DATA(pDevIns, RTCState *);814 RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *); 815 815 int rc; 816 816 uint8_t u8Irq; … … 852 852 853 853 854 p Data->pDevInsR3 = pDevIns;855 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);856 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);857 p Data->irq = u8Irq;858 p Data->cmos_data[RTC_REG_A] = 0x26;859 p Data->cmos_data[RTC_REG_B] = 0x02;860 p Data->cmos_data[RTC_REG_C] = 0x00;861 p Data->cmos_data[RTC_REG_D] = 0x80;862 p Data->RtcReg.u32Version = PDM_RTCREG_VERSION;863 p Data->RtcReg.pfnRead = rtcCMOSRead;864 p Data->RtcReg.pfnWrite = rtcCMOSWrite;854 pThis->pDevInsR3 = pDevIns; 855 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 856 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 857 pThis->irq = u8Irq; 858 pThis->cmos_data[RTC_REG_A] = 0x26; 859 pThis->cmos_data[RTC_REG_B] = 0x02; 860 pThis->cmos_data[RTC_REG_C] = 0x00; 861 pThis->cmos_data[RTC_REG_D] = 0x80; 862 pThis->RtcReg.u32Version = PDM_RTCREG_VERSION; 863 pThis->RtcReg.pfnRead = rtcCMOSRead; 864 pThis->RtcReg.pfnWrite = rtcCMOSWrite; 865 865 866 866 /* 867 867 * Create timers, arm them, register I/O Ports and save state. 868 868 */ 869 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerPeriodic, "MC146818 RTC/CMOS - Periodic", &p Data->pPeriodicTimerR3);869 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerPeriodic, "MC146818 RTC/CMOS - Periodic", &pThis->pPeriodicTimerR3); 870 870 if (RT_FAILURE(rc)) 871 871 return rc; 872 p Data->pPeriodicTimerR0 = TMTimerR0Ptr(pData->pPeriodicTimerR3);873 p Data->pPeriodicTimerRC = TMTimerRCPtr(pData->pPeriodicTimerR3);874 875 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond, "MC146818 RTC/CMOS - Second", &p Data->pSecondTimerR3);872 pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pThis->pPeriodicTimerR3); 873 pThis->pPeriodicTimerRC = TMTimerRCPtr(pThis->pPeriodicTimerR3); 874 875 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond, "MC146818 RTC/CMOS - Second", &pThis->pSecondTimerR3); 876 876 if (RT_FAILURE(rc)) 877 877 return rc; 878 p Data->pSecondTimerR0 = TMTimerR0Ptr(pData->pSecondTimerR3);879 p Data->pSecondTimerRC = TMTimerRCPtr(pData->pSecondTimerR3);880 881 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond2, "MC146818 RTC/CMOS - Second2", &p Data->pSecondTimer2R3);878 pThis->pSecondTimerR0 = TMTimerR0Ptr(pThis->pSecondTimerR3); 879 pThis->pSecondTimerRC = TMTimerRCPtr(pThis->pSecondTimerR3); 880 881 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond2, "MC146818 RTC/CMOS - Second2", &pThis->pSecondTimer2R3); 882 882 if (RT_FAILURE(rc)) 883 883 return rc; 884 p Data->pSecondTimer2R0 = TMTimerR0Ptr(pData->pSecondTimer2R3);885 p Data->pSecondTimer2RC = TMTimerRCPtr(pData->pSecondTimer2R3);886 p Data->next_second_time = TMTimerGet(pData->CTX_SUFF(pSecondTimer2)) + (TMTimerGetFreq(pData->CTX_SUFF(pSecondTimer2)) * 99) / 100;887 rc = TMTimerSet(p Data->CTX_SUFF(pSecondTimer2), pData->next_second_time);884 pThis->pSecondTimer2R0 = TMTimerR0Ptr(pThis->pSecondTimer2R3); 885 pThis->pSecondTimer2RC = TMTimerRCPtr(pThis->pSecondTimer2R3); 886 pThis->next_second_time = TMTimerGet(pThis->CTX_SUFF(pSecondTimer2)) + (TMTimerGetFreq(pThis->CTX_SUFF(pSecondTimer2)) * 99) / 100; 887 rc = TMTimerSet(pThis->CTX_SUFF(pSecondTimer2), pThis->next_second_time); 888 888 if (RT_FAILURE(rc)) 889 889 return rc; … … 905 905 } 906 906 907 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*p Data),907 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*pThis), 908 908 NULL, rtcSaveExec, NULL, 909 909 NULL, rtcLoadExec, NULL); … … 914 914 * Register ourselves as the RTC/CMOS with PDM. 915 915 */ 916 rc = pDevIns->pDevHlp->pfnRTCRegister(pDevIns, &p Data->RtcReg, &pData->pRtcHlpR3);916 rc = pDevIns->pDevHlp->pfnRTCRegister(pDevIns, &pThis->RtcReg, &pThis->pRtcHlpR3); 917 917 if (RT_FAILURE(rc)) 918 918 return rc; -
trunk/src/VBox/Devices/PC/DrvACPI.cpp
r11267 r11269 73 73 { 74 74 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 75 PDRVACPI p Data= PDMINS_2_DATA(pDrvIns, PDRVACPI);75 PDRVACPI pThis = PDMINS_2_DATA(pDrvIns, PDRVACPI); 76 76 switch (enmInterface) 77 77 { … … 79 79 return &pDrvIns->IBase; 80 80 case PDMINTERFACE_ACPI_CONNECTOR: 81 return &p Data->IACPIConnector;81 return &pThis->IACPIConnector; 82 82 default: 83 83 return NULL; … … 442 442 static DECLCALLBACK(int) drvACPIConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 443 443 { 444 PDRVACPI p Data= PDMINS_2_DATA(pDrvIns, PDRVACPI);444 PDRVACPI pThis = PDMINS_2_DATA(pDrvIns, PDRVACPI); 445 445 446 446 /* 447 447 * Init the static parts. 448 448 */ 449 p Data->pDrvIns = pDrvIns;449 pThis->pDrvIns = pDrvIns; 450 450 /* IBase */ 451 451 pDrvIns->IBase.pfnQueryInterface = drvACPIQueryInterface; 452 452 /* IACPIConnector */ 453 p Data->IACPIConnector.pfnQueryPowerSource = drvACPIQueryPowerSource;454 p Data->IACPIConnector.pfnQueryBatteryStatus = drvACPIQueryBatteryStatus;453 pThis->IACPIConnector.pfnQueryPowerSource = drvACPIQueryPowerSource; 454 pThis->IACPIConnector.pfnQueryBatteryStatus = drvACPIQueryBatteryStatus; 455 455 456 456 /* … … 473 473 * Query the ACPI port interface. 474 474 */ 475 p Data->pPort = (PPDMIACPIPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase,475 pThis->pPort = (PPDMIACPIPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, 476 476 PDMINTERFACE_ACPI_PORT); 477 if (!p Data->pPort)477 if (!pThis->pPort) 478 478 { 479 479 AssertMsgFailed(("Configuration error: " -
trunk/src/VBox/Devices/Parallel/DevParallel.cpp
r11267 r11269 402 402 static DECLCALLBACK(int) parallelNotifyInterrupt(PPDMIHOSTPARALLELPORT pInterface) 403 403 { 404 ParallelState *p Data= PDMIHOSTPARALLELPORT_2_PARALLELSTATE(pInterface);405 406 PDMCritSectEnter(&p Data->CritSect, VINF_SUCCESS);407 parallel_set_irq(p Data);408 PDMCritSectLeave(&p Data->CritSect);404 ParallelState *pThis = PDMIHOSTPARALLELPORT_2_PARALLELSTATE(pInterface); 405 406 PDMCritSectEnter(&pThis->CritSect, VINF_SUCCESS); 407 parallel_set_irq(pThis); 408 PDMCritSectLeave(&pThis->CritSect); 409 409 410 410 return VINF_SUCCESS; … … 426 426 RTIOPORT Port, uint32_t u32, unsigned cb) 427 427 { 428 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);428 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 429 429 int rc = VINF_SUCCESS; 430 430 431 431 if (cb == 1) 432 432 { 433 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);433 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 434 434 if (rc == VINF_SUCCESS) 435 435 { 436 436 Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, u32)); 437 rc = parallel_ioport_write (p Data, Port, u32);438 PDMCritSectLeave(&p Data->CritSect);437 rc = parallel_ioport_write (pThis, Port, u32); 438 PDMCritSectLeave(&pThis->CritSect); 439 439 } 440 440 } … … 459 459 RTIOPORT Port, uint32_t *pu32, unsigned cb) 460 460 { 461 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);461 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 462 462 int rc = VINF_SUCCESS; 463 463 464 464 if (cb == 1) 465 465 { 466 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_READ);466 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ); 467 467 if (rc == VINF_SUCCESS) 468 468 { 469 *pu32 = parallel_ioport_read (p Data, Port, &rc);469 *pu32 = parallel_ioport_read (pThis, Port, &rc); 470 470 Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, *pu32)); 471 PDMCritSectLeave(&p Data->CritSect);471 PDMCritSectLeave(&pThis->CritSect); 472 472 } 473 473 } … … 493 493 RTIOPORT Port, uint32_t u32, unsigned cb) 494 494 { 495 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);495 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 496 496 int rc = VINF_SUCCESS; 497 497 498 498 if (cb == 1) 499 499 { 500 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);500 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 501 501 if (rc == VINF_SUCCESS) 502 502 { 503 503 Log2(("%s: ecp port %#06x val %#04x\n", __FUNCTION__, Port, u32)); 504 rc = parallel_ioport_write_ecp (p Data, Port, u32);505 PDMCritSectLeave(&p Data->CritSect);504 rc = parallel_ioport_write_ecp (pThis, Port, u32); 505 PDMCritSectLeave(&pThis->CritSect); 506 506 } 507 507 } … … 526 526 RTIOPORT Port, uint32_t *pu32, unsigned cb) 527 527 { 528 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);528 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 529 529 int rc = VINF_SUCCESS; 530 530 531 531 if (cb == 1) 532 532 { 533 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_READ);533 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ); 534 534 if (rc == VINF_SUCCESS) 535 535 { 536 *pu32 = parallel_ioport_read_ecp (p Data, Port, &rc);536 *pu32 = parallel_ioport_read_ecp (pThis, Port, &rc); 537 537 Log2(("%s: ecp port %#06x val %#04x\n", __FUNCTION__, Port, *pu32)); 538 PDMCritSectLeave(&p Data->CritSect);538 PDMCritSectLeave(&pThis->CritSect); 539 539 } 540 540 } … … 557 557 PSSMHANDLE pSSMHandle) 558 558 { 559 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);560 561 SSMR3PutU8(pSSMHandle, p Data->reg_data);562 SSMR3PutU8(pSSMHandle, p Data->reg_status);563 SSMR3PutU8(pSSMHandle, p Data->reg_control);564 SSMR3PutS32(pSSMHandle, p Data->irq);565 SSMR3PutU32(pSSMHandle, p Data->base);559 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 560 561 SSMR3PutU8(pSSMHandle, pThis->reg_data); 562 SSMR3PutU8(pSSMHandle, pThis->reg_status); 563 SSMR3PutU8(pSSMHandle, pThis->reg_control); 564 SSMR3PutS32(pSSMHandle, pThis->irq); 565 SSMR3PutU32(pSSMHandle, pThis->base); 566 566 567 567 return SSMR3PutU32(pSSMHandle, ~0); /* sanity/terminator */ … … 582 582 int rc; 583 583 uint32_t u32; 584 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);584 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 585 585 586 586 if (u32Version != PARALLEL_SAVED_STATE_VERSION) … … 590 590 } 591 591 592 SSMR3GetU8(pSSMHandle, &p Data->reg_data);593 SSMR3GetU8(pSSMHandle, &p Data->reg_status);594 SSMR3GetU8(pSSMHandle, &p Data->reg_control);595 SSMR3GetS32(pSSMHandle, &p Data->irq);596 SSMR3GetU32(pSSMHandle, &p Data->base);592 SSMR3GetU8(pSSMHandle, &pThis->reg_data); 593 SSMR3GetU8(pSSMHandle, &pThis->reg_status); 594 SSMR3GetU8(pSSMHandle, &pThis->reg_control); 595 SSMR3GetS32(pSSMHandle, &pThis->irq); 596 SSMR3GetU32(pSSMHandle, &pThis->base); 597 597 598 598 rc = SSMR3GetU32(pSSMHandle, &u32); … … 606 606 } 607 607 608 p Data->pDevInsHC = pDevIns;609 p Data->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);608 pThis->pDevInsHC = pDevIns; 609 pThis->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns); 610 610 return VINF_SUCCESS; 611 611 } … … 617 617 static DECLCALLBACK(void) parallelRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 618 618 { 619 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);620 p Data->pDevInsGC += offDelta;619 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 620 pThis->pDevInsGC += offDelta; 621 621 } 622 622 … … 624 624 static DECLCALLBACK(void *) parallelQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 625 625 { 626 ParallelState *p Data= PDMIBASE_2_PARALLELSTATE(pInterface);626 ParallelState *pThis = PDMIBASE_2_PARALLELSTATE(pInterface); 627 627 switch (enmInterface) 628 628 { 629 629 case PDMINTERFACE_BASE: 630 return &p Data->IBase;630 return &pThis->IBase; 631 631 case PDMINTERFACE_HOST_PARALLEL_PORT: 632 return &p Data->IHostParallelPort;632 return &pThis->IHostParallelPort; 633 633 default: 634 634 return NULL; … … 647 647 static DECLCALLBACK(int) parallelDestruct(PPDMDEVINS pDevIns) 648 648 { 649 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState *);650 651 PDMR3CritSectDelete(&p Data->CritSect);652 RTSemEventDestroy(p Data->ReceiveSem);649 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState *); 650 651 PDMR3CritSectDelete(&pThis->CritSect); 652 RTSemEventDestroy(pThis->ReceiveSem); 653 653 654 654 return VINF_SUCCESS; … … 674 674 { 675 675 int rc; 676 ParallelState *p Data= PDMINS_2_DATA(pDevIns, ParallelState*);676 ParallelState *pThis = PDMINS_2_DATA(pDevIns, ParallelState*); 677 677 uint16_t io_base; 678 678 uint8_t irq_lvl; … … 680 680 Assert(iInstance < 4); 681 681 682 p Data->pDevInsHC = pDevIns;683 p Data->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);682 pThis->pDevInsHC = pDevIns; 683 pThis->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns); 684 684 685 685 /* … … 690 690 N_("Configuration error: Unknown config key")); 691 691 692 rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &p Data->fGCEnabled);692 rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &pThis->fGCEnabled); 693 693 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 694 p Data->fGCEnabled = true;694 pThis->fGCEnabled = true; 695 695 else if (RT_FAILURE(rc)) 696 696 return PDMDEV_SET_ERROR(pDevIns, rc, 697 697 N_("Configuration error: Failed to get the \"GCEnabled\" value")); 698 698 699 rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &p Data->fR0Enabled);699 rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &pThis->fR0Enabled); 700 700 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 701 p Data->fR0Enabled = true;701 pThis->fR0Enabled = true; 702 702 else if (RT_FAILURE(rc)) 703 703 return PDMDEV_SET_ERROR(pDevIns, rc, … … 705 705 706 706 /* IBase */ 707 p Data->IBase.pfnQueryInterface = parallelQueryInterface;707 pThis->IBase.pfnQueryInterface = parallelQueryInterface; 708 708 709 709 /* IHostParallelPort */ 710 p Data->IHostParallelPort.pfnNotifyInterrupt = parallelNotifyInterrupt;711 712 rc = RTSemEventCreate(&p Data->ReceiveSem);710 pThis->IHostParallelPort.pfnNotifyInterrupt = parallelNotifyInterrupt; 711 712 rc = RTSemEventCreate(&pThis->ReceiveSem); 713 713 AssertRC(rc); 714 714 … … 719 719 char szName[24]; 720 720 RTStrPrintf(szName, sizeof(szName), "Parallel#%d", iInstance); 721 rc = PDMDevHlpCritSectInit(pDevIns, &p Data->CritSect, szName);721 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, szName); 722 722 if (RT_FAILURE(rc)) 723 723 return rc; … … 739 739 Log(("parallelConstruct instance %d iobase=%04x irq=%d\n", iInstance, io_base, irq_lvl)); 740 740 741 p Data->irq = irq_lvl;742 p Data->base = io_base;741 pThis->irq = irq_lvl; 742 pThis->base = io_base; 743 743 744 744 /* Init parallel state */ 745 p Data->reg_data = 0;746 p Data->reg_ecp_ecr = LPT_ECP_ECR_CHIPMODE_COMPAT | LPT_ECP_ECR_FIFO_EMPTY;747 p Data->act_fifo_pos_read = 0;748 p Data->act_fifo_pos_write = 0;745 pThis->reg_data = 0; 746 pThis->reg_ecp_ecr = LPT_ECP_ECR_CHIPMODE_COMPAT | LPT_ECP_ECR_FIFO_EMPTY; 747 pThis->act_fifo_pos_read = 0; 748 pThis->act_fifo_pos_write = 0; 749 749 750 750 rc = PDMDevHlpIOPortRegister(pDevIns, io_base, 8, 0, … … 763 763 #endif 764 764 765 if (p Data->fGCEnabled)765 if (pThis->fGCEnabled) 766 766 { 767 767 rc = PDMDevHlpIOPortRegisterGC(pDevIns, io_base, 8, 0, "parallelIOPortWrite", … … 778 778 } 779 779 780 if (p Data->fR0Enabled)780 if (pThis->fR0Enabled) 781 781 { 782 782 rc = PDMDevHlpIOPortRegisterR0(pDevIns, io_base, 8, 0, "parallelIOPortWrite", … … 795 795 /* Attach the parallel port driver and get the interfaces. For now no run-time 796 796 * changes are supported. */ 797 rc = PDMDevHlpDriverAttach(pDevIns, 0, &p Data->IBase, &pData->pDrvBase, "Parallel Host");797 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Parallel Host"); 798 798 if (RT_SUCCESS(rc)) 799 799 { 800 p Data->pDrvHostParallelConnector = (PDMIHOSTPARALLELCONNECTOR *)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase,800 pThis->pDrvHostParallelConnector = (PDMIHOSTPARALLELCONNECTOR *)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, 801 801 PDMINTERFACE_HOST_PARALLEL_CONNECTOR); 802 if (!p Data->pDrvHostParallelConnector)802 if (!pThis->pDrvHostParallelConnector) 803 803 { 804 804 AssertMsgFailed(("Configuration error: instance %d has no host parallel interface!\n", iInstance)); … … 809 809 else if (rc == VERR_PDM_NO_ATTACHED_DRIVER) 810 810 { 811 p Data->pDrvBase = NULL;812 p Data->pDrvHostParallelConnector = NULL;811 pThis->pDrvBase = NULL; 812 pThis->pDrvHostParallelConnector = NULL; 813 813 LogRel(("Parallel%d: no unit\n", iInstance)); 814 814 } … … 821 821 822 822 /* Set compatibility mode */ 823 p Data->pDrvHostParallelConnector->pfnSetMode(pData->pDrvHostParallelConnector, PDM_PARALLEL_PORT_MODE_COMPAT);823 pThis->pDrvHostParallelConnector->pfnSetMode(pThis->pDrvHostParallelConnector, PDM_PARALLEL_PORT_MODE_COMPAT); 824 824 /* Get status of control register */ 825 p Data->pDrvHostParallelConnector->pfnReadControl(pData->pDrvHostParallelConnector, &pData->reg_control);825 pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->reg_control); 826 826 827 827 rc = PDMDevHlpSSMRegister( … … 830 830 iInstance, /* u32Instance */ 831 831 PARALLEL_SAVED_STATE_VERSION, /* u32Version */ 832 sizeof (*p Data), /* cbGuess */832 sizeof (*pThis), /* cbGuess */ 833 833 NULL, /* pfnSavePrep */ 834 834 parallelSaveExec, /* pfnSaveExec */ -
trunk/src/VBox/Devices/Parallel/DrvHostParallel.cpp
r11268 r11269 94 94 { 95 95 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 96 PDRVHOSTPARALLEL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL);96 PDRVHOSTPARALLEL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL); 97 97 switch (enmInterface) 98 98 { … … 100 100 return &pDrvIns->IBase; 101 101 case PDMINTERFACE_HOST_PARALLEL_CONNECTOR: 102 return &p Data->IHostParallelConnector;102 return &pThis->IHostParallelConnector; 103 103 default: 104 104 return NULL; … … 111 111 static DECLCALLBACK(int) drvHostParallelWrite(PPDMIHOSTPARALLELCONNECTOR pInterface, const void *pvBuf, size_t *cbWrite) 112 112 { 113 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);113 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 114 114 const unsigned char *pBuffer = (const unsigned char *)pvBuf; 115 115 116 116 LogFlow(("%s: pvBuf=%#p cbWrite=%d\n", __FUNCTION__, pvBuf, *cbWrite)); 117 117 118 ioctl(p Data->FileDevice, PPWDATA, pBuffer);118 ioctl(pThis->FileDevice, PPWDATA, pBuffer); 119 119 *cbWrite = 1; 120 120 … … 124 124 static DECLCALLBACK(int) drvHostParallelRead(PPDMIHOSTPARALLELCONNECTOR pInterface, void *pvBuf, size_t *cbRead) 125 125 { 126 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);126 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 127 127 unsigned char *pBuffer = (unsigned char *)pvBuf; 128 128 129 129 LogFlow(("%s: pvBuf=%#p cbRead=%d\n", __FUNCTION__, pvBuf, cbRead)); 130 130 131 ioctl(p Data->FileDevice, PPRDATA, pBuffer);131 ioctl(pThis->FileDevice, PPRDATA, pBuffer); 132 132 *cbRead = 1; 133 133 … … 137 137 static DECLCALLBACK(int) drvHostParallelSetMode(PPDMIHOSTPARALLELCONNECTOR pInterface, PDMPARALLELPORTMODE enmMode) 138 138 { 139 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);139 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 140 140 int ppdev_mode; 141 141 … … 154 154 } 155 155 156 ioctl(p Data->FileDevice, PPSETMODE, &ppdev_mode);156 ioctl(pThis->FileDevice, PPSETMODE, &ppdev_mode); 157 157 158 158 return VINF_SUCCESS; … … 161 161 static DECLCALLBACK(int) drvHostParallelWriteControl(PPDMIHOSTPARALLELCONNECTOR pInterface, uint8_t fReg) 162 162 { 163 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);163 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 164 164 165 165 LogFlow(("%s: fReg=%d\n", __FUNCTION__, fReg)); 166 166 167 ioctl(p Data->FileDevice, PPWCONTROL, &fReg);167 ioctl(pThis->FileDevice, PPWCONTROL, &fReg); 168 168 169 169 return VINF_SUCCESS; … … 172 172 static DECLCALLBACK(int) drvHostParallelReadControl(PPDMIHOSTPARALLELCONNECTOR pInterface, uint8_t *pfReg) 173 173 { 174 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);174 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 175 175 uint8_t fReg; 176 176 177 ioctl(p Data->FileDevice, PPRCONTROL, &fReg);177 ioctl(pThis->FileDevice, PPRCONTROL, &fReg); 178 178 179 179 LogFlow(("%s: fReg=%d\n", __FUNCTION__, fReg)); … … 186 186 static DECLCALLBACK(int) drvHostParallelReadStatus(PPDMIHOSTPARALLELCONNECTOR pInterface, uint8_t *pfReg) 187 187 { 188 PDRVHOSTPARALLEL p Data= PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface);188 PDRVHOSTPARALLEL pThis = PDMIHOSTPARALLELCONNECTOR_2_DRVHOSTPARALLEL(pInterface); 189 189 uint8_t fReg; 190 190 191 ioctl(p Data->FileDevice, PPRSTATUS, &fReg);191 ioctl(pThis->FileDevice, PPRSTATUS, &fReg); 192 192 193 193 LogFlow(("%s: fReg=%d\n", __FUNCTION__, fReg)); … … 200 200 static DECLCALLBACK(int) drvHostParallelMonitorThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 201 201 { 202 PDRVHOSTPARALLEL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL);202 PDRVHOSTPARALLEL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL); 203 203 struct pollfd aFDs[2]; 204 204 … … 210 210 int rc; 211 211 212 aFDs[0].fd = p Data->FileDevice;212 aFDs[0].fd = pThis->FileDevice; 213 213 aFDs[0].events = POLLIN; 214 214 aFDs[0].revents = 0; 215 aFDs[1].fd = p Data->WakeupPipeR;215 aFDs[1].fd = pThis->WakeupPipeR; 216 216 aFDs[1].events = POLLIN | POLLERR | POLLHUP; 217 217 aFDs[1].revents = 0; … … 232 232 char ch; 233 233 size_t cbRead; 234 RTFileRead(p Data->WakeupPipeR, &ch, 1, &cbRead);234 RTFileRead(pThis->WakeupPipeR, &ch, 1, &cbRead); 235 235 continue; 236 236 } 237 237 238 238 /* Interrupt occured. */ 239 rc = p Data->pDrvHostParallelPort->pfnNotifyInterrupt(pData->pDrvHostParallelPort);239 rc = pThis->pDrvHostParallelPort->pfnNotifyInterrupt(pThis->pDrvHostParallelPort); 240 240 AssertRC(rc); 241 241 } … … 253 253 static DECLCALLBACK(int) drvHostParallelWakeupMonitorThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 254 254 { 255 PDRVHOSTPARALLEL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL);256 257 return RTFileWrite(p Data->WakeupPipeW, "", 1, NULL);255 PDRVHOSTPARALLEL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL); 256 257 return RTFileWrite(pThis->WakeupPipeW, "", 1, NULL); 258 258 } 259 259 … … 272 272 static DECLCALLBACK(int) drvHostParallelConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 273 273 { 274 PDRVHOSTPARALLEL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL);274 PDRVHOSTPARALLEL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL); 275 275 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 276 276 … … 289 289 pDrvIns->IBase.pfnQueryInterface = drvHostParallelQueryInterface; 290 290 /* IHostParallelConnector. */ 291 p Data->IHostParallelConnector.pfnWrite = drvHostParallelWrite;292 p Data->IHostParallelConnector.pfnRead = drvHostParallelRead;293 p Data->IHostParallelConnector.pfnSetMode = drvHostParallelSetMode;294 p Data->IHostParallelConnector.pfnWriteControl = drvHostParallelWriteControl;295 p Data->IHostParallelConnector.pfnReadControl = drvHostParallelReadControl;296 p Data->IHostParallelConnector.pfnReadStatus = drvHostParallelReadStatus;291 pThis->IHostParallelConnector.pfnWrite = drvHostParallelWrite; 292 pThis->IHostParallelConnector.pfnRead = drvHostParallelRead; 293 pThis->IHostParallelConnector.pfnSetMode = drvHostParallelSetMode; 294 pThis->IHostParallelConnector.pfnWriteControl = drvHostParallelWriteControl; 295 pThis->IHostParallelConnector.pfnReadControl = drvHostParallelReadControl; 296 pThis->IHostParallelConnector.pfnReadStatus = drvHostParallelReadStatus; 297 297 298 298 /* … … 300 300 */ 301 301 /* Device */ 302 int rc = CFGMR3QueryStringAlloc(pCfgHandle, "DevicePath", &p Data->pszDevicePath);302 int rc = CFGMR3QueryStringAlloc(pCfgHandle, "DevicePath", &pThis->pszDevicePath); 303 303 if (RT_FAILURE(rc)) 304 304 { … … 310 310 * Open the device 311 311 */ 312 rc = RTFileOpen(&p Data->FileDevice, pData->pszDevicePath, RTFILE_O_OPEN | RTFILE_O_READWRITE);312 rc = RTFileOpen(&pThis->FileDevice, pThis->pszDevicePath, RTFILE_O_OPEN | RTFILE_O_READWRITE); 313 313 if (RT_FAILURE(rc)) 314 314 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("Parallel#%d could not open '%s'"), 315 pDrvIns->iInstance, p Data->pszDevicePath);315 pDrvIns->iInstance, pThis->pszDevicePath); 316 316 317 317 /* 318 318 * Try to get exclusive access to parallel port 319 319 */ 320 rc = ioctl(p Data->FileDevice, PPEXCL);320 rc = ioctl(pThis->FileDevice, PPEXCL); 321 321 if (rc < 0) 322 322 return PDMDrvHlpVMSetError(pDrvIns, RTErrConvertFromErrno(errno), RT_SRC_POS, 323 323 N_("Parallel#%d could not get exclusive access for parallel port '%s'" 324 324 "Be sure that no other process or driver accesses this port"), 325 pDrvIns->iInstance, p Data->pszDevicePath);325 pDrvIns->iInstance, pThis->pszDevicePath); 326 326 327 327 /* 328 328 * Claim the parallel port 329 329 */ 330 rc = ioctl(p Data->FileDevice, PPCLAIM);330 rc = ioctl(pThis->FileDevice, PPCLAIM); 331 331 if (rc < 0) 332 332 return PDMDrvHlpVMSetError(pDrvIns, RTErrConvertFromErrno(errno), RT_SRC_POS, 333 333 N_("Parallel#%d could not claim parallel port '%s'" 334 334 "Be sure that no other process or driver accesses this port"), 335 pDrvIns->iInstance, p Data->pszDevicePath);335 pDrvIns->iInstance, pThis->pszDevicePath); 336 336 337 337 /* 338 338 * Get the IHostParallelPort interface of the above driver/device. 339 339 */ 340 p Data->pDrvHostParallelPort = (PPDMIHOSTPARALLELPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_HOST_PARALLEL_PORT);341 if (!p Data->pDrvHostParallelPort)340 pThis->pDrvHostParallelPort = (PPDMIHOSTPARALLELPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_HOST_PARALLEL_PORT); 341 if (!pThis->pDrvHostParallelPort) 342 342 return PDMDrvHlpVMSetError(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, RT_SRC_POS, N_("Parallel#%d has no parallel port interface above"), 343 343 pDrvIns->iInstance); … … 353 353 return rc; 354 354 } 355 p Data->WakeupPipeR = aFDs[0];356 p Data->WakeupPipeW = aFDs[1];355 pThis->WakeupPipeR = aFDs[0]; 356 pThis->WakeupPipeW = aFDs[1]; 357 357 358 358 /* 359 359 * Start waiting for interrupts. 360 360 */ 361 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pMonitorThread, pData, drvHostParallelMonitorThread, drvHostParallelWakeupMonitorThread, 0,361 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pMonitorThread, pThis, drvHostParallelMonitorThread, drvHostParallelWakeupMonitorThread, 0, 362 362 RTTHREADTYPE_IO, "ParMon"); 363 363 if (RT_FAILURE(rc)) … … 378 378 static DECLCALLBACK(void) drvHostParallelDestruct(PPDMDRVINS pDrvIns) 379 379 { 380 PDRVHOSTPARALLEL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL);380 PDRVHOSTPARALLEL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTPARALLEL); 381 381 382 382 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 383 383 384 ioctl(p Data->FileDevice, PPRELEASE);385 386 if (p Data->WakeupPipeW != NIL_RTFILE)387 { 388 int rc = RTFileClose(p Data->WakeupPipeW);384 ioctl(pThis->FileDevice, PPRELEASE); 385 386 if (pThis->WakeupPipeW != NIL_RTFILE) 387 { 388 int rc = RTFileClose(pThis->WakeupPipeW); 389 389 AssertRC(rc); 390 p Data->WakeupPipeW = NIL_RTFILE;391 } 392 if (p Data->WakeupPipeR != NIL_RTFILE)393 { 394 int rc = RTFileClose(p Data->WakeupPipeR);390 pThis->WakeupPipeW = NIL_RTFILE; 391 } 392 if (pThis->WakeupPipeR != NIL_RTFILE) 393 { 394 int rc = RTFileClose(pThis->WakeupPipeR); 395 395 AssertRC(rc); 396 p Data->WakeupPipeR = NIL_RTFILE;397 } 398 if (p Data->FileDevice != NIL_RTFILE)399 { 400 int rc = RTFileClose(p Data->FileDevice);396 pThis->WakeupPipeR = NIL_RTFILE; 397 } 398 if (pThis->FileDevice != NIL_RTFILE) 399 { 400 int rc = RTFileClose(pThis->FileDevice); 401 401 AssertRC(rc); 402 p Data->FileDevice = NIL_RTFILE;402 pThis->FileDevice = NIL_RTFILE; 403 403 } 404 404 } -
trunk/src/VBox/Devices/Serial/DevSerial.cpp
r11267 r11269 400 400 static DECLCALLBACK(int) serialNotifyRead(PPDMICHARPORT pInterface, const void *pvBuf, size_t *pcbRead) 401 401 { 402 SerialState *p Data= PDMICHARPORT_2_SERIALSTATE(pInterface);402 SerialState *pThis = PDMICHARPORT_2_SERIALSTATE(pInterface); 403 403 int rc; 404 404 405 405 Assert(*pcbRead != 0); 406 406 407 PDMCritSectEnter(&p Data->CritSect, VERR_PERMISSION_DENIED);408 if (p Data->lsr & UART_LSR_DR)407 PDMCritSectEnter(&pThis->CritSect, VERR_PERMISSION_DENIED); 408 if (pThis->lsr & UART_LSR_DR) 409 409 { 410 410 /* If a character is still in the read queue, then wait for it to be emptied. */ 411 PDMCritSectLeave(&p Data->CritSect);412 rc = RTSemEventWait(p Data->ReceiveSem, 250);411 PDMCritSectLeave(&pThis->CritSect); 412 rc = RTSemEventWait(pThis->ReceiveSem, 250); 413 413 if (RT_FAILURE(rc)) 414 414 return rc; 415 415 416 PDMCritSectEnter(&p Data->CritSect, VERR_PERMISSION_DENIED);417 } 418 419 if (!(p Data->lsr & UART_LSR_DR))420 { 421 p Data->rbr = *(const char *)pvBuf;422 p Data->lsr |= UART_LSR_DR;423 serial_update_irq(p Data);416 PDMCritSectEnter(&pThis->CritSect, VERR_PERMISSION_DENIED); 417 } 418 419 if (!(pThis->lsr & UART_LSR_DR)) 420 { 421 pThis->rbr = *(const char *)pvBuf; 422 pThis->lsr |= UART_LSR_DR; 423 serial_update_irq(pThis); 424 424 *pcbRead = 1; 425 425 rc = VINF_SUCCESS; … … 428 428 rc = VERR_TIMEOUT; 429 429 430 PDMCritSectLeave(&p Data->CritSect);430 PDMCritSectLeave(&pThis->CritSect); 431 431 432 432 return rc; … … 435 435 static DECLCALLBACK(int) serialNotifyStatusLinesChanged(PPDMICHARPORT pInterface, uint32_t newStatusLines) 436 436 { 437 SerialState *p Data= PDMICHARPORT_2_SERIALSTATE(pInterface);437 SerialState *pThis = PDMICHARPORT_2_SERIALSTATE(pInterface); 438 438 uint8_t newMsr = 0; 439 439 440 440 Log(("%s: pInterface=%p newStatusLines=%u\n", __FUNCTION__, pInterface, newStatusLines)); 441 441 442 PDMCritSectEnter(&p Data->CritSect, VERR_PERMISSION_DENIED);442 PDMCritSectEnter(&pThis->CritSect, VERR_PERMISSION_DENIED); 443 443 444 444 /* Set new states. */ … … 453 453 454 454 /* Compare the old and the new states and set the delta bits accordingly. */ 455 if ((newMsr & UART_MSR_DCD) != (p Data->msr & UART_MSR_DCD))455 if ((newMsr & UART_MSR_DCD) != (pThis->msr & UART_MSR_DCD)) 456 456 newMsr |= UART_MSR_DDCD; 457 if ((newMsr & UART_MSR_RI) == 1 && (p Data->msr & UART_MSR_RI) == 0)457 if ((newMsr & UART_MSR_RI) == 1 && (pThis->msr & UART_MSR_RI) == 0) 458 458 newMsr |= UART_MSR_TERI; 459 if ((newMsr & UART_MSR_DSR) != (p Data->msr & UART_MSR_DSR))459 if ((newMsr & UART_MSR_DSR) != (pThis->msr & UART_MSR_DSR)) 460 460 newMsr |= UART_MSR_DDSR; 461 if ((newMsr & UART_MSR_CTS) != (p Data->msr & UART_MSR_CTS))461 if ((newMsr & UART_MSR_CTS) != (pThis->msr & UART_MSR_CTS)) 462 462 newMsr |= UART_MSR_DCTS; 463 463 464 p Data->msr = newMsr;465 p Data->msr_changed = true;466 serial_update_irq(p Data);467 468 PDMCritSectLeave(&p Data->CritSect);464 pThis->msr = newMsr; 465 pThis->msr_changed = true; 466 serial_update_irq(pThis); 467 468 PDMCritSectLeave(&pThis->CritSect); 469 469 470 470 return VINF_SUCCESS; … … 487 487 RTIOPORT Port, uint32_t u32, unsigned cb) 488 488 { 489 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);489 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 490 490 int rc = VINF_SUCCESS; 491 491 492 492 if (cb == 1) 493 493 { 494 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_WRITE);494 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_WRITE); 495 495 if (rc == VINF_SUCCESS) 496 496 { 497 497 Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, u32)); 498 rc = serial_ioport_write (p Data, Port, u32);499 PDMCritSectLeave(&p Data->CritSect);498 rc = serial_ioport_write (pThis, Port, u32); 499 PDMCritSectLeave(&pThis->CritSect); 500 500 } 501 501 } … … 520 520 RTIOPORT Port, uint32_t *pu32, unsigned cb) 521 521 { 522 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);522 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 523 523 int rc = VINF_SUCCESS; 524 524 525 525 if (cb == 1) 526 526 { 527 rc = PDMCritSectEnter(&p Data->CritSect, VINF_IOM_HC_IOPORT_READ);527 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_HC_IOPORT_READ); 528 528 if (rc == VINF_SUCCESS) 529 529 { 530 *pu32 = serial_ioport_read (p Data, Port, &rc);530 *pu32 = serial_ioport_read (pThis, Port, &rc); 531 531 Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, *pu32)); 532 PDMCritSectLeave(&p Data->CritSect);532 PDMCritSectLeave(&pThis->CritSect); 533 533 } 534 534 } … … 550 550 PSSMHANDLE pSSMHandle) 551 551 { 552 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);553 554 SSMR3PutU16(pSSMHandle, p Data->divider);555 SSMR3PutU8(pSSMHandle, p Data->rbr);556 SSMR3PutU8(pSSMHandle, p Data->ier);557 SSMR3PutU8(pSSMHandle, p Data->lcr);558 SSMR3PutU8(pSSMHandle, p Data->mcr);559 SSMR3PutU8(pSSMHandle, p Data->lsr);560 SSMR3PutU8(pSSMHandle, p Data->msr);561 SSMR3PutU8(pSSMHandle, p Data->scr);562 SSMR3PutS32(pSSMHandle, p Data->thr_ipending);563 SSMR3PutS32(pSSMHandle, p Data->irq);564 SSMR3PutS32(pSSMHandle, p Data->last_break_enable);565 SSMR3PutU32(pSSMHandle, p Data->base);566 SSMR3PutBool(pSSMHandle, p Data->msr_changed);552 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 553 554 SSMR3PutU16(pSSMHandle, pThis->divider); 555 SSMR3PutU8(pSSMHandle, pThis->rbr); 556 SSMR3PutU8(pSSMHandle, pThis->ier); 557 SSMR3PutU8(pSSMHandle, pThis->lcr); 558 SSMR3PutU8(pSSMHandle, pThis->mcr); 559 SSMR3PutU8(pSSMHandle, pThis->lsr); 560 SSMR3PutU8(pSSMHandle, pThis->msr); 561 SSMR3PutU8(pSSMHandle, pThis->scr); 562 SSMR3PutS32(pSSMHandle, pThis->thr_ipending); 563 SSMR3PutS32(pSSMHandle, pThis->irq); 564 SSMR3PutS32(pSSMHandle, pThis->last_break_enable); 565 SSMR3PutU32(pSSMHandle, pThis->base); 566 SSMR3PutBool(pSSMHandle, pThis->msr_changed); 567 567 return SSMR3PutU32(pSSMHandle, ~0); /* sanity/terminator */ 568 568 } … … 582 582 int rc; 583 583 uint32_t u32; 584 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);584 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 585 585 586 586 if (u32Version != SERIAL_SAVED_STATE_VERSION) … … 590 590 } 591 591 592 SSMR3GetU16(pSSMHandle, &p Data->divider);593 SSMR3GetU8(pSSMHandle, &p Data->rbr);594 SSMR3GetU8(pSSMHandle, &p Data->ier);595 SSMR3GetU8(pSSMHandle, &p Data->lcr);596 SSMR3GetU8(pSSMHandle, &p Data->mcr);597 SSMR3GetU8(pSSMHandle, &p Data->lsr);598 SSMR3GetU8(pSSMHandle, &p Data->msr);599 SSMR3GetU8(pSSMHandle, &p Data->scr);600 SSMR3GetS32(pSSMHandle, &p Data->thr_ipending);601 SSMR3GetS32(pSSMHandle, &p Data->irq);602 SSMR3GetS32(pSSMHandle, &p Data->last_break_enable);603 SSMR3GetU32(pSSMHandle, &p Data->base);604 SSMR3GetBool(pSSMHandle, &p Data->msr_changed);592 SSMR3GetU16(pSSMHandle, &pThis->divider); 593 SSMR3GetU8(pSSMHandle, &pThis->rbr); 594 SSMR3GetU8(pSSMHandle, &pThis->ier); 595 SSMR3GetU8(pSSMHandle, &pThis->lcr); 596 SSMR3GetU8(pSSMHandle, &pThis->mcr); 597 SSMR3GetU8(pSSMHandle, &pThis->lsr); 598 SSMR3GetU8(pSSMHandle, &pThis->msr); 599 SSMR3GetU8(pSSMHandle, &pThis->scr); 600 SSMR3GetS32(pSSMHandle, &pThis->thr_ipending); 601 SSMR3GetS32(pSSMHandle, &pThis->irq); 602 SSMR3GetS32(pSSMHandle, &pThis->last_break_enable); 603 SSMR3GetU32(pSSMHandle, &pThis->base); 604 SSMR3GetBool(pSSMHandle, &pThis->msr_changed); 605 605 606 606 rc = SSMR3GetU32(pSSMHandle, &u32); … … 616 616 * in the saved state. */ 617 617 618 if (p Data->lsr & UART_LSR_DR)619 { 620 int rc = RTSemEventSignal(p Data->ReceiveSem);618 if (pThis->lsr & UART_LSR_DR) 619 { 620 int rc = RTSemEventSignal(pThis->ReceiveSem); 621 621 AssertRC(rc); 622 622 } 623 p Data->pDevInsHC = pDevIns;624 p Data->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);623 pThis->pDevInsHC = pDevIns; 624 pThis->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns); 625 625 return VINF_SUCCESS; 626 626 } … … 632 632 static DECLCALLBACK(void) serialRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 633 633 { 634 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);635 p Data->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);634 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 635 pThis->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns); 636 636 } 637 637 … … 640 640 static DECLCALLBACK(int) serialIOPortRegionMap(PPCIDEVICE pPciDev, /* unsigned */ int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 641 641 { 642 SerialState *p Data= PCIDEV_2_SERIALSTATE(pPciDev);642 SerialState *pThis = PCIDEV_2_SERIALSTATE(pPciDev); 643 643 int rc = VINF_SUCCESS; 644 644 … … 648 648 AssertMsg(RT_ALIGN(GCPhysAddress, 8) == GCPhysAddress, ("Expected 8 byte alignment. GCPhysAddress=%#x\n", GCPhysAddress)); 649 649 650 p Data->base = (RTIOPORT)GCPhysAddress;651 LogRel(("Serial#%d: mapping I/O at %#06x\n", p Data->pDevIns->iInstance, pData->base));650 pThis->base = (RTIOPORT)GCPhysAddress; 651 LogRel(("Serial#%d: mapping I/O at %#06x\n", pThis->pDevIns->iInstance, pThis->base)); 652 652 653 653 /* 654 654 * Register our port IO handlers. 655 655 */ 656 rc = PDMDevHlpIOPortRegister(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress, 8, (void *)p Data,656 rc = PDMDevHlpIOPortRegister(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress, 8, (void *)pThis, 657 657 serial_io_write, serial_io_read, NULL, NULL, "SERIAL"); 658 658 AssertRC(rc); … … 666 666 static DECLCALLBACK(void *) serialQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 667 667 { 668 SerialState *p Data= PDMIBASE_2_SERIALSTATE(pInterface);668 SerialState *pThis = PDMIBASE_2_SERIALSTATE(pInterface); 669 669 switch (enmInterface) 670 670 { 671 671 case PDMINTERFACE_BASE: 672 return &p Data->IBase;672 return &pThis->IBase; 673 673 case PDMINTERFACE_CHAR_PORT: 674 return &p Data->ICharPort;674 return &pThis->ICharPort; 675 675 default: 676 676 return NULL; … … 689 689 static DECLCALLBACK(int) serialDestruct(PPDMDEVINS pDevIns) 690 690 { 691 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState *);692 693 RTSemEventDestroy(p Data->ReceiveSem);694 p Data->ReceiveSem = NIL_RTSEMEVENT;695 696 PDMR3CritSectDelete(&p Data->CritSect);691 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState *); 692 693 RTSemEventDestroy(pThis->ReceiveSem); 694 pThis->ReceiveSem = NIL_RTSEMEVENT; 695 696 PDMR3CritSectDelete(&pThis->CritSect); 697 697 return VINF_SUCCESS; 698 698 } … … 717 717 { 718 718 int rc; 719 SerialState *p Data= PDMINS_2_DATA(pDevIns, SerialState*);719 SerialState *pThis = PDMINS_2_DATA(pDevIns, SerialState*); 720 720 uint16_t io_base; 721 721 uint8_t irq_lvl; … … 723 723 Assert(iInstance < 4); 724 724 725 p Data->pDevInsHC = pDevIns;726 p Data->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);725 pThis->pDevInsHC = pDevIns; 726 pThis->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns); 727 727 728 728 /* … … 735 735 } 736 736 737 rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &p Data->fGCEnabled);737 rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &pThis->fGCEnabled); 738 738 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 739 p Data->fGCEnabled = true;739 pThis->fGCEnabled = true; 740 740 else if (RT_FAILURE(rc)) 741 741 return PDMDEV_SET_ERROR(pDevIns, rc, 742 742 N_("Configuration error: Failed to get the \"GCEnabled\" value")); 743 743 744 rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &p Data->fR0Enabled);744 rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &pThis->fR0Enabled); 745 745 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 746 p Data->fR0Enabled = true;746 pThis->fR0Enabled = true; 747 747 else if (RT_FAILURE(rc)) 748 748 return PDMDEV_SET_ERROR(pDevIns, rc, … … 750 750 751 751 /* IBase */ 752 p Data->IBase.pfnQueryInterface = serialQueryInterface;752 pThis->IBase.pfnQueryInterface = serialQueryInterface; 753 753 754 754 /* ICharPort */ 755 p Data->ICharPort.pfnNotifyRead = serialNotifyRead;756 p Data->ICharPort.pfnNotifyStatusLinesChanged = serialNotifyStatusLinesChanged;757 758 rc = RTSemEventCreate(&p Data->ReceiveSem);755 pThis->ICharPort.pfnNotifyRead = serialNotifyRead; 756 pThis->ICharPort.pfnNotifyStatusLinesChanged = serialNotifyStatusLinesChanged; 757 758 rc = RTSemEventCreate(&pThis->ReceiveSem); 759 759 AssertRC(rc); 760 760 … … 765 765 char szName[24]; 766 766 RTStrPrintf(szName, sizeof(szName), "Serial#%d", iInstance); 767 rc = PDMDevHlpCritSectInit(pDevIns, &p Data->CritSect, szName);767 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, szName); 768 768 if (RT_FAILURE(rc)) 769 769 return rc; … … 796 796 Log(("serialConstruct instance %d iobase=%04x irq=%d\n", iInstance, io_base, irq_lvl)); 797 797 798 p Data->irq = irq_lvl;799 p Data->lsr = UART_LSR_TEMT | UART_LSR_THRE;800 p Data->iir = UART_IIR_NO_INT;801 p Data->msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS;798 pThis->irq = irq_lvl; 799 pThis->lsr = UART_LSR_TEMT | UART_LSR_THRE; 800 pThis->iir = UART_IIR_NO_INT; 801 pThis->msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS; 802 802 #ifdef VBOX_SERIAL_PCI 803 p Data->base = -1;804 p Data->dev.config[0x00] = 0xee; /* Vendor: ??? */805 p Data->dev.config[0x01] = 0x80;806 p Data->dev.config[0x02] = 0x01; /* Device: ??? */807 p Data->dev.config[0x03] = 0x01;808 p Data->dev.config[0x04] = PCI_COMMAND_IOACCESS;809 p Data->dev.config[0x09] = 0x01; /* Programming interface: 16450 */810 p Data->dev.config[0x0a] = 0x00; /* Subclass: Serial controller */811 p Data->dev.config[0x0b] = 0x07; /* Class: Communication controller */812 p Data->dev.config[0x0e] = 0x00; /* Header type: standard */813 p Data->dev.config[0x3c] = irq_lvl; /* preconfigure IRQ number (0 = autoconfig)*/814 p Data->dev.config[0x3d] = 1; /* interrupt pin 0 */815 rc = PDMDevHlpPCIRegister(pDevIns, &p Data->dev);803 pThis->base = -1; 804 pThis->dev.config[0x00] = 0xee; /* Vendor: ??? */ 805 pThis->dev.config[0x01] = 0x80; 806 pThis->dev.config[0x02] = 0x01; /* Device: ??? */ 807 pThis->dev.config[0x03] = 0x01; 808 pThis->dev.config[0x04] = PCI_COMMAND_IOACCESS; 809 pThis->dev.config[0x09] = 0x01; /* Programming interface: 16450 */ 810 pThis->dev.config[0x0a] = 0x00; /* Subclass: Serial controller */ 811 pThis->dev.config[0x0b] = 0x07; /* Class: Communication controller */ 812 pThis->dev.config[0x0e] = 0x00; /* Header type: standard */ 813 pThis->dev.config[0x3c] = irq_lvl; /* preconfigure IRQ number (0 = autoconfig)*/ 814 pThis->dev.config[0x3d] = 1; /* interrupt pin 0 */ 815 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev); 816 816 if (RT_FAILURE(rc)) 817 817 return rc; … … 823 823 return rc; 824 824 #else /* !VBOX_SERIAL_PCI */ 825 p Data->base = io_base;825 pThis->base = io_base; 826 826 rc = PDMDevHlpIOPortRegister(pDevIns, io_base, 8, 0, 827 827 serialIOPortWrite, serialIOPortRead, … … 830 830 return rc; 831 831 832 if (p Data->fGCEnabled)832 if (pThis->fGCEnabled) 833 833 rc = PDMDevHlpIOPortRegisterGC(pDevIns, io_base, 8, 0, "serialIOPortWrite", 834 834 "serialIOPortRead", NULL, NULL, "Serial"); 835 835 836 if (p Data->fR0Enabled)836 if (pThis->fR0Enabled) 837 837 rc = PDMDevHlpIOPortRegisterR0(pDevIns, io_base, 8, 0, "serialIOPortWrite", 838 838 "serialIOPortRead", NULL, NULL, "Serial"); … … 842 842 /* Attach the char driver and get the interfaces. For now no run-time 843 843 * changes are supported. */ 844 rc = PDMDevHlpDriverAttach(pDevIns, 0, &p Data->IBase, &pData->pDrvBase, "Serial Char");844 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Serial Char"); 845 845 if (RT_SUCCESS(rc)) 846 846 { 847 p Data->pDrvChar = (PDMICHAR *)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_CHAR);848 if (!p Data->pDrvChar)847 pThis->pDrvChar = (PDMICHAR *)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_CHAR); 848 if (!pThis->pDrvChar) 849 849 { 850 850 AssertMsgFailed(("Configuration error: instance %d has no char interface!\n", iInstance)); … … 855 855 else if (rc == VERR_PDM_NO_ATTACHED_DRIVER) 856 856 { 857 p Data->pDrvBase = NULL;858 p Data->pDrvChar = NULL;857 pThis->pDrvBase = NULL; 858 pThis->pDrvChar = NULL; 859 859 LogRel(("Serial%d: no unit\n", iInstance)); 860 860 } … … 871 871 iInstance, /* u32Instance */ 872 872 SERIAL_SAVED_STATE_VERSION, /* u32Version */ 873 sizeof (*p Data), /* cbGuess */873 sizeof (*pThis), /* cbGuess */ 874 874 NULL, /* pfnSavePrep */ 875 875 serialSaveExec, /* pfnSaveExec */ -
trunk/src/VBox/Devices/Serial/DrvChar.cpp
r11267 r11269 94 94 { 95 95 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 96 PDRVCHAR p Data= PDMINS_2_DATA(pDrvIns, PDRVCHAR);96 PDRVCHAR pThis = PDMINS_2_DATA(pDrvIns, PDRVCHAR); 97 97 switch (enmInterface) 98 98 { … … 100 100 return &pDrvIns->IBase; 101 101 case PDMINTERFACE_CHAR: 102 return &p Data->IChar;102 return &pThis->IChar; 103 103 default: 104 104 return NULL; … … 112 112 static DECLCALLBACK(int) drvCharWrite(PPDMICHAR pInterface, const void *pvBuf, size_t cbWrite) 113 113 { 114 PDRVCHAR p Data= PDMICHAR_2_DRVCHAR(pInterface);114 PDRVCHAR pThis = PDMICHAR_2_DRVCHAR(pInterface); 115 115 const char *pBuffer = (const char *)pvBuf; 116 116 … … 119 119 for (uint32_t i=0;i<cbWrite;i++) 120 120 { 121 uint32_t idx = p Data->iSendQueueHead;122 123 p Data->aSendQueue[idx] = pBuffer[i];121 uint32_t idx = pThis->iSendQueueHead; 122 123 pThis->aSendQueue[idx] = pBuffer[i]; 124 124 idx = (idx + 1) & CHAR_MAX_SEND_QUEUE_MASK; 125 125 126 STAM_COUNTER_INC(&p Data->StatBytesWritten);127 ASMAtomicXchgU32(&p Data->iSendQueueHead, idx);128 } 129 RTSemEventSignal(p Data->SendSem);126 STAM_COUNTER_INC(&pThis->StatBytesWritten); 127 ASMAtomicXchgU32(&pThis->iSendQueueHead, idx); 128 } 129 RTSemEventSignal(pThis->SendSem); 130 130 return VINF_SUCCESS; 131 131 } … … 134 134 static DECLCALLBACK(int) drvCharSetParameters(PPDMICHAR pInterface, unsigned Bps, char chParity, unsigned cDataBits, unsigned cStopBits) 135 135 { 136 /*PDRVCHAR p Data= PDMICHAR_2_DRVCHAR(pInterface); - unused*/136 /*PDRVCHAR pThis = PDMICHAR_2_DRVCHAR(pInterface); - unused*/ 137 137 138 138 LogFlow(("%s: Bps=%u chParity=%c cDataBits=%u cStopBits=%u\n", __FUNCTION__, Bps, chParity, cDataBits, cStopBits)); … … 152 152 static DECLCALLBACK(int) drvCharSendLoop(RTTHREAD ThreadSelf, void *pvUser) 153 153 { 154 PDRVCHAR p Data= (PDRVCHAR)pvUser;154 PDRVCHAR pThis = (PDRVCHAR)pvUser; 155 155 156 156 for(;;) 157 157 { 158 int rc = RTSemEventWait(p Data->SendSem, RT_INDEFINITE_WAIT);158 int rc = RTSemEventWait(pThis->SendSem, RT_INDEFINITE_WAIT); 159 159 if (RT_FAILURE(rc)) 160 160 break; … … 163 163 * Write the character to the attached stream (if present). 164 164 */ 165 if ( !p Data->fShutdown166 && p Data->pDrvStream)165 if ( !pThis->fShutdown 166 && pThis->pDrvStream) 167 167 { 168 while (p Data->iSendQueueTail != pData->iSendQueueHead)168 while (pThis->iSendQueueTail != pThis->iSendQueueHead) 169 169 { 170 170 size_t cbProcessed = 1; 171 171 172 rc = p Data->pDrvStream->pfnWrite(pData->pDrvStream, &pData->aSendQueue[pData->iSendQueueTail], &cbProcessed);172 rc = pThis->pDrvStream->pfnWrite(pThis->pDrvStream, &pThis->aSendQueue[pThis->iSendQueueTail], &cbProcessed); 173 173 if (RT_SUCCESS(rc)) 174 174 { 175 175 Assert(cbProcessed); 176 p Data->iSendQueueTail++;177 p Data->iSendQueueTail &= CHAR_MAX_SEND_QUEUE_MASK;176 pThis->iSendQueueTail++; 177 pThis->iSendQueueTail &= CHAR_MAX_SEND_QUEUE_MASK; 178 178 } 179 179 else if (rc == VERR_TIMEOUT) … … 194 194 } 195 195 196 p Data->SendThread = NIL_RTTHREAD;196 pThis->SendThread = NIL_RTTHREAD; 197 197 198 198 return VINF_SUCCESS; … … 210 210 static DECLCALLBACK(int) drvCharReceiveLoop(RTTHREAD ThreadSelf, void *pvUser) 211 211 { 212 PDRVCHAR p Data= (PDRVCHAR)pvUser;212 PDRVCHAR pThis = (PDRVCHAR)pvUser; 213 213 char aBuffer[256], *pBuffer; 214 214 size_t cbRemaining, cbProcessed; … … 217 217 cbRemaining = 0; 218 218 pBuffer = aBuffer; 219 while (!p Data->fShutdown)219 while (!pThis->fShutdown) 220 220 { 221 221 if (!cbRemaining) 222 222 { 223 223 /* Get block of data from stream driver. */ 224 if (p Data->pDrvStream)224 if (pThis->pDrvStream) 225 225 { 226 226 cbRemaining = sizeof(aBuffer); 227 rc = p Data->pDrvStream->pfnRead(pData->pDrvStream, aBuffer, &cbRemaining);227 rc = pThis->pDrvStream->pfnRead(pThis->pDrvStream, aBuffer, &cbRemaining); 228 228 if (RT_FAILURE(rc)) 229 229 { … … 243 243 /* Send data to guest. */ 244 244 cbProcessed = cbRemaining; 245 rc = p Data->pDrvCharPort->pfnNotifyRead(pData->pDrvCharPort, pBuffer, &cbProcessed);245 rc = pThis->pDrvCharPort->pfnNotifyRead(pThis->pDrvCharPort, pBuffer, &cbProcessed); 246 246 if (RT_SUCCESS(rc)) 247 247 { … … 249 249 pBuffer += cbProcessed; 250 250 cbRemaining -= cbProcessed; 251 STAM_COUNTER_ADD(&p Data->StatBytesRead, cbProcessed);251 STAM_COUNTER_ADD(&pThis->StatBytesRead, cbProcessed); 252 252 } 253 253 else if (rc == VERR_TIMEOUT) … … 265 265 } 266 266 267 p Data->ReceiveThread = NIL_RTTHREAD;267 pThis->ReceiveThread = NIL_RTTHREAD; 268 268 269 269 return VINF_SUCCESS; … … 300 300 static DECLCALLBACK(int) drvCharConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 301 301 { 302 PDRVCHAR p Data= PDMINS_2_DATA(pDrvIns, PDRVCHAR);302 PDRVCHAR pThis = PDMINS_2_DATA(pDrvIns, PDRVCHAR); 303 303 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 304 304 … … 306 306 * Init basic data members and interfaces. 307 307 */ 308 p Data->ReceiveThread = NIL_RTTHREAD;309 p Data->fShutdown = false;308 pThis->ReceiveThread = NIL_RTTHREAD; 309 pThis->fShutdown = false; 310 310 /* IBase. */ 311 311 pDrvIns->IBase.pfnQueryInterface = drvCharQueryInterface; 312 312 /* IChar. */ 313 p Data->IChar.pfnWrite = drvCharWrite;314 p Data->IChar.pfnSetParameters = drvCharSetParameters;315 p Data->IChar.pfnSetModemLines = drvCharSetModemLines;313 pThis->IChar.pfnWrite = drvCharWrite; 314 pThis->IChar.pfnSetParameters = drvCharSetParameters; 315 pThis->IChar.pfnSetModemLines = drvCharSetModemLines; 316 316 317 317 /* 318 318 * Get the ICharPort interface of the above driver/device. 319 319 */ 320 p Data->pDrvCharPort = (PPDMICHARPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_CHAR_PORT);321 if (!p Data->pDrvCharPort)320 pThis->pDrvCharPort = (PPDMICHARPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_CHAR_PORT); 321 if (!pThis->pDrvCharPort) 322 322 return PDMDrvHlpVMSetError(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, RT_SRC_POS, N_("Char#%d has no char port interface above"), pDrvIns->iInstance); 323 323 … … 329 329 if (RT_FAILURE(rc)) 330 330 return rc; /* Don't call PDMDrvHlpVMSetError here as we assume that the driver already set an appropriate error */ 331 p Data->pDrvStream = (PPDMISTREAM)pBase->pfnQueryInterface(pBase, PDMINTERFACE_STREAM);332 if (!p Data->pDrvStream)331 pThis->pDrvStream = (PPDMISTREAM)pBase->pfnQueryInterface(pBase, PDMINTERFACE_STREAM); 332 if (!pThis->pDrvStream) 333 333 return PDMDrvHlpVMSetError(pDrvIns, VERR_PDM_MISSING_INTERFACE_BELOW, RT_SRC_POS, N_("Char#%d has no stream interface below"), pDrvIns->iInstance); 334 334 335 rc = RTThreadCreate(&p Data->ReceiveThread, drvCharReceiveLoop, (void *)pData, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "CharRecv");335 rc = RTThreadCreate(&pThis->ReceiveThread, drvCharReceiveLoop, (void *)pThis, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "CharRecv"); 336 336 if (RT_FAILURE(rc)) 337 337 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("Char#%d cannot create receive thread"), pDrvIns->iInstance); 338 338 339 rc = RTSemEventCreate(&p Data->SendSem);339 rc = RTSemEventCreate(&pThis->SendSem); 340 340 AssertRC(rc); 341 341 342 rc = RTThreadCreate(&p Data->SendThread, drvCharSendLoop, (void *)pData, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "CharSend");342 rc = RTThreadCreate(&pThis->SendThread, drvCharSendLoop, (void *)pThis, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "CharSend"); 343 343 if (RT_FAILURE(rc)) 344 344 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("Char#%d cannot create send thread"), pDrvIns->iInstance); 345 345 346 346 347 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatBytesWritten, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes written", "/Devices/Char%d/Written", pDrvIns->iInstance);348 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatBytesRead, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes read", "/Devices/Char%d/Read", pDrvIns->iInstance);347 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes written", "/Devices/Char%d/Written", pDrvIns->iInstance); 348 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes read", "/Devices/Char%d/Read", pDrvIns->iInstance); 349 349 350 350 return VINF_SUCCESS; … … 362 362 static DECLCALLBACK(void) drvCharDestruct(PPDMDRVINS pDrvIns) 363 363 { 364 PDRVCHAR p Data= PDMINS_2_DATA(pDrvIns, PDRVCHAR);364 PDRVCHAR pThis = PDMINS_2_DATA(pDrvIns, PDRVCHAR); 365 365 366 366 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 367 367 368 p Data->fShutdown = true;369 if (p Data->ReceiveThread)370 { 371 RTThreadWait(p Data->ReceiveThread, 1000, NULL);372 if (p Data->ReceiveThread != NIL_RTTHREAD)368 pThis->fShutdown = true; 369 if (pThis->ReceiveThread) 370 { 371 RTThreadWait(pThis->ReceiveThread, 1000, NULL); 372 if (pThis->ReceiveThread != NIL_RTTHREAD) 373 373 LogRel(("Char%d: receive thread did not terminate\n", pDrvIns->iInstance)); 374 374 } 375 375 376 376 /* Empty the send queue */ 377 p Data->iSendQueueTail = pData->iSendQueueHead = 0;378 379 RTSemEventSignal(p Data->SendSem);380 RTSemEventDestroy(p Data->SendSem);381 p Data->SendSem = NIL_RTSEMEVENT;382 383 if (p Data->SendThread)384 { 385 RTThreadWait(p Data->SendThread, 1000, NULL);386 if (p Data->SendThread != NIL_RTTHREAD)377 pThis->iSendQueueTail = pThis->iSendQueueHead = 0; 378 379 RTSemEventSignal(pThis->SendSem); 380 RTSemEventDestroy(pThis->SendSem); 381 pThis->SendSem = NIL_RTSEMEVENT; 382 383 if (pThis->SendThread) 384 { 385 RTThreadWait(pThis->SendThread, 1000, NULL); 386 if (pThis->SendThread != NIL_RTTHREAD) 387 387 LogRel(("Char%d: send thread did not terminate\n", pDrvIns->iInstance)); 388 388 } -
trunk/src/VBox/Devices/Serial/DrvHostSerial.cpp
r11268 r11269 146 146 { 147 147 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 148 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);148 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 149 149 switch (enmInterface) 150 150 { … … 152 152 return &pDrvIns->IBase; 153 153 case PDMINTERFACE_CHAR: 154 return &p Data->IChar;154 return &pThis->IChar; 155 155 default: 156 156 return NULL; … … 164 164 static DECLCALLBACK(int) drvHostSerialWrite(PPDMICHAR pInterface, const void *pvBuf, size_t cbWrite) 165 165 { 166 PDRVHOSTSERIAL p Data= PDMICHAR_2_DRVHOSTSERIAL(pInterface);166 PDRVHOSTSERIAL pThis = PDMICHAR_2_DRVHOSTSERIAL(pInterface); 167 167 const uint8_t *pbBuffer = (const uint8_t *)pvBuf; 168 168 … … 171 171 for (uint32_t i=0;i<cbWrite;i++) 172 172 { 173 uint32_t idx = p Data->iSendQueueHead;174 175 p Data->aSendQueue[idx] = pbBuffer[i];173 uint32_t idx = pThis->iSendQueueHead; 174 175 pThis->aSendQueue[idx] = pbBuffer[i]; 176 176 idx = (idx + 1) & CHAR_MAX_SEND_QUEUE_MASK; 177 177 178 STAM_COUNTER_INC(&p Data->StatBytesWritten);179 ASMAtomicXchgU32(&p Data->iSendQueueHead, idx);180 } 181 RTSemEventSignal(p Data->SendSem);178 STAM_COUNTER_INC(&pThis->StatBytesWritten); 179 ASMAtomicXchgU32(&pThis->iSendQueueHead, idx); 180 } 181 RTSemEventSignal(pThis->SendSem); 182 182 return VINF_SUCCESS; 183 183 } … … 185 185 static DECLCALLBACK(int) drvHostSerialSetParameters(PPDMICHAR pInterface, unsigned Bps, char chParity, unsigned cDataBits, unsigned cStopBits) 186 186 { 187 PDRVHOSTSERIAL p Data= PDMICHAR_2_DRVHOSTSERIAL(pInterface);187 PDRVHOSTSERIAL pThis = PDMICHAR_2_DRVHOSTSERIAL(pInterface); 188 188 #ifdef RT_OS_LINUX 189 189 struct termios *termiosSetup; … … 300 300 termiosSetup->c_lflag = ~(ICANON | ECHO | ECHOE | ISIG); 301 301 302 tcsetattr(p Data->DeviceFile, TCSANOW, termiosSetup);302 tcsetattr(pThis->DeviceFile, TCSANOW, termiosSetup); 303 303 RTMemTmpFree(termiosSetup); 304 304 #elif defined(RT_OS_WINDOWS) … … 396 396 comSetup->EvtChar = 0; 397 397 398 SetCommState(p Data->hDeviceFile, comSetup);398 SetCommState(pThis->hDeviceFile, comSetup); 399 399 RTMemTmpFree(comSetup); 400 400 #endif /* RT_OS_WINDOWS */ … … 414 414 static DECLCALLBACK(int) drvHostSerialSendThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 415 415 { 416 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);416 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 417 417 418 418 if (pThread->enmState == PDMTHREADSTATE_INITIALIZING) … … 421 421 #ifdef RT_OS_WINDOWS 422 422 HANDLE haWait[2]; 423 haWait[0] = p Data->hEventSend;424 haWait[1] = p Data->hHaltEventSem;423 haWait[0] = pThis->hEventSend; 424 haWait[1] = pThis->hHaltEventSem; 425 425 #endif 426 426 427 427 while (pThread->enmState == PDMTHREADSTATE_RUNNING) 428 428 { 429 int rc = RTSemEventWait(p Data->SendSem, RT_INDEFINITE_WAIT);429 int rc = RTSemEventWait(pThis->SendSem, RT_INDEFINITE_WAIT); 430 430 if (RT_FAILURE(rc)) 431 431 break; … … 435 435 */ 436 436 while ( pThread->enmState == PDMTHREADSTATE_RUNNING 437 && p Data->iSendQueueTail != pData->iSendQueueHead)437 && pThis->iSendQueueTail != pThis->iSendQueueHead) 438 438 { 439 439 unsigned cbProcessed = 1; … … 441 441 #if defined(RT_OS_LINUX) 442 442 443 rc = RTFileWrite(p Data->DeviceFile, &pData->aSendQueue[pData->iSendQueueTail], cbProcessed, NULL);443 rc = RTFileWrite(pThis->DeviceFile, &pThis->aSendQueue[pThis->iSendQueueTail], cbProcessed, NULL); 444 444 445 445 #elif defined(RT_OS_WINDOWS) 446 446 447 447 DWORD cbBytesWritten; 448 memset(&p Data->overlappedSend, 0, sizeof(pData->overlappedSend));449 p Data->overlappedSend.hEvent = pData->hEventSend;450 451 if (!WriteFile(p Data->hDeviceFile, &pData->aSendQueue[pData->iSendQueueTail], cbProcessed, &cbBytesWritten, &pData->overlappedSend))448 memset(&pThis->overlappedSend, 0, sizeof(pThis->overlappedSend)); 449 pThis->overlappedSend.hEvent = pThis->hEventSend; 450 451 if (!WriteFile(pThis->hDeviceFile, &pThis->aSendQueue[pThis->iSendQueueTail], cbProcessed, &cbBytesWritten, &pThis->overlappedSend)) 452 452 { 453 453 DWORD dwRet = GetLastError(); … … 470 470 { 471 471 Assert(cbProcessed); 472 p Data->iSendQueueTail++;473 p Data->iSendQueueTail &= CHAR_MAX_SEND_QUEUE_MASK;472 pThis->iSendQueueTail++; 473 pThis->iSendQueueTail &= CHAR_MAX_SEND_QUEUE_MASK; 474 474 } 475 475 else if (RT_FAILURE(rc)) … … 493 493 static DECLCALLBACK(int) drvHostSerialWakeupSendThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 494 494 { 495 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);495 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 496 496 int rc; 497 497 498 rc = RTSemEventSignal(p Data->SendSem);498 rc = RTSemEventSignal(pThis->SendSem); 499 499 if (RT_FAILURE(rc)) 500 500 return rc; 501 501 502 502 #ifdef RT_OS_WINDOWS 503 if (!SetEvent(p Data->hHaltEventSem))503 if (!SetEvent(pThis->hHaltEventSem)) 504 504 return RTErrConvertFromWin32(GetLastError()); 505 505 #endif … … 522 522 static DECLCALLBACK(int) drvHostSerialRecvThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 523 523 { 524 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);524 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 525 525 uint8_t abBuffer[256]; 526 526 uint8_t *pbBuffer = NULL; … … 533 533 #ifdef RT_OS_WINDOWS 534 534 HANDLE haWait[2]; 535 haWait[0] = p Data->hEventRecv;536 haWait[1] = p Data->hHaltEventSem;535 haWait[0] = pThis->hEventRecv; 536 haWait[1] = pThis->hHaltEventSem; 537 537 #endif 538 538 … … 547 547 size_t cbRead; 548 548 struct pollfd aFDs[2]; 549 aFDs[0].fd = p Data->DeviceFile;549 aFDs[0].fd = pThis->DeviceFile; 550 550 aFDs[0].events = POLLIN; 551 551 aFDs[0].revents = 0; 552 aFDs[1].fd = p Data->WakeupPipeR;552 aFDs[1].fd = pThis->WakeupPipeR; 553 553 aFDs[1].events = POLLIN | POLLERR | POLLHUP; 554 554 aFDs[1].revents = 0; … … 569 569 char ch; 570 570 size_t cbRead; 571 RTFileRead(p Data->WakeupPipeR, &ch, 1, &cbRead);571 RTFileRead(pThis->WakeupPipeR, &ch, 1, &cbRead); 572 572 continue; 573 573 } 574 rc = RTFileRead(p Data->DeviceFile, abBuffer, sizeof(abBuffer), &cbRead);574 rc = RTFileRead(pThis->DeviceFile, abBuffer, sizeof(abBuffer), &cbRead); 575 575 if (RT_FAILURE(rc)) 576 576 { … … 585 585 DWORD dwNumberOfBytesTransferred; 586 586 587 memset(&p Data->overlappedRecv, 0, sizeof(pData->overlappedRecv));588 p Data->overlappedRecv.hEvent = pData->hEventRecv;589 590 if (!WaitCommEvent(p Data->hDeviceFile, &dwEventMask, &pData->overlappedRecv))587 memset(&pThis->overlappedRecv, 0, sizeof(pThis->overlappedRecv)); 588 pThis->overlappedRecv.hEvent = pThis->hEventRecv; 589 590 if (!WaitCommEvent(pThis->hDeviceFile, &dwEventMask, &pThis->overlappedRecv)) 591 591 { 592 592 DWORD dwRet = GetLastError(); … … 613 613 if (dwEventMask & EV_RXCHAR) 614 614 { 615 if (!ReadFile(p Data->hDeviceFile, abBuffer, sizeof(abBuffer), &dwNumberOfBytesTransferred, &pData->overlappedRecv))615 if (!ReadFile(pThis->hDeviceFile, abBuffer, sizeof(abBuffer), &dwNumberOfBytesTransferred, &pThis->overlappedRecv)) 616 616 { 617 617 LogRel(("HostSerial#%d: Read failed with error %Vrc; terminating the worker thread.\n", pDrvIns->iInstance, RTErrConvertFromWin32(GetLastError()))); … … 627 627 628 628 /* Get the new state */ 629 if (GetCommModemStatus(p Data->hDeviceFile, &dwNewStatusLinesState))629 if (GetCommModemStatus(pThis->hDeviceFile, &dwNewStatusLinesState)) 630 630 { 631 631 if (dwNewStatusLinesState & MS_RLSD_ON) … … 637 637 if (dwNewStatusLinesState & MS_CTS_ON) 638 638 uNewStatusLinesState |= PDM_ICHAR_STATUS_LINES_CTS; 639 rc = p Data->pDrvCharPort->pfnNotifyStatusLinesChanged(pData->pDrvCharPort, uNewStatusLinesState);639 rc = pThis->pDrvCharPort->pfnNotifyStatusLinesChanged(pThis->pDrvCharPort, uNewStatusLinesState); 640 640 if (RT_FAILURE(rc)) 641 641 { … … 659 659 /* Send data to the guest. */ 660 660 size_t cbProcessed = cbRemaining; 661 rc = p Data->pDrvCharPort->pfnNotifyRead(pData->pDrvCharPort, pbBuffer, &cbProcessed);661 rc = pThis->pDrvCharPort->pfnNotifyRead(pThis->pDrvCharPort, pbBuffer, &cbProcessed); 662 662 if (RT_SUCCESS(rc)) 663 663 { … … 665 665 pbBuffer += cbProcessed; 666 666 cbRemaining -= cbProcessed; 667 STAM_COUNTER_ADD(&p Data->StatBytesRead, cbProcessed);667 STAM_COUNTER_ADD(&pThis->StatBytesRead, cbProcessed); 668 668 } 669 669 else if (rc == VERR_TIMEOUT) … … 693 693 static DECLCALLBACK(int) drvHostSerialWakeupRecvThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 694 694 { 695 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);695 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 696 696 #ifdef RT_OS_LINUX 697 return RTFileWrite(p Data->WakeupPipeW, "", 1, NULL);697 return RTFileWrite(pThis->WakeupPipeW, "", 1, NULL); 698 698 #elif defined(RT_OS_WINDOWS) 699 if (!SetEvent(p Data->hHaltEventSem))699 if (!SetEvent(pThis->hHaltEventSem)) 700 700 return RTErrConvertFromWin32(GetLastError()); 701 701 return VINF_SUCCESS; … … 720 720 static DECLCALLBACK(int) drvHostSerialMonitorThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 721 721 { 722 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);722 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 723 723 int rc = VINF_SUCCESS; 724 724 unsigned uStatusLinesToCheck = 0; … … 737 737 * Wait for status line change. 738 738 */ 739 rc = ioctl(p Data->DeviceFile, TIOCMIWAIT, &uStatusLinesToCheck);739 rc = ioctl(pThis->DeviceFile, TIOCMIWAIT, &uStatusLinesToCheck); 740 740 if (pThread->enmState != PDMTHREADSTATE_RUNNING) 741 741 break; … … 745 745 PDMDrvHlpVMSetRuntimeError(pDrvIns, false, "DrvHostSerialFail", 746 746 N_("Ioctl failed for serial host device '%s' (%Vrc). The device will not work properly"), 747 p Data->pszDevicePath, RTErrConvertFromErrno(errno));747 pThis->pszDevicePath, RTErrConvertFromErrno(errno)); 748 748 break; 749 749 } 750 750 751 rc = ioctl(p Data->DeviceFile, TIOCMGET, &statusLines);751 rc = ioctl(pThis->DeviceFile, TIOCMGET, &statusLines); 752 752 if (rc < 0) 753 753 goto ioctl_error; … … 761 761 if (statusLines & TIOCM_CTS) 762 762 newStatusLine |= PDM_ICHAR_STATUS_LINES_CTS; 763 rc = p Data->pDrvCharPort->pfnNotifyStatusLinesChanged(pData->pDrvCharPort, newStatusLine);763 rc = pThis->pDrvCharPort->pfnNotifyStatusLinesChanged(pThis->pDrvCharPort, newStatusLine); 764 764 } 765 765 … … 778 778 static DECLCALLBACK(int) drvHostSerialWakeupMonitorThread(PPDMDRVINS pDrvIns, PPDMTHREAD pThread) 779 779 { 780 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);780 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 781 781 int rc; 782 782 unsigned int uSerialLineFlags; … … 793 793 794 794 /* Get current status of control lines. */ 795 rc = ioctl(p Data->DeviceFile, TIOCMGET, &uSerialLineStatus);795 rc = ioctl(pThis->DeviceFile, TIOCMGET, &uSerialLineStatus); 796 796 if (rc < 0) 797 797 goto ioctl_error; 798 798 799 799 uSerialLineFlags = TIOCM_LOOP; 800 rc = ioctl(p Data->DeviceFile, TIOCMBIS, &uSerialLineFlags);800 rc = ioctl(pThis->DeviceFile, TIOCMBIS, &uSerialLineFlags); 801 801 if (rc < 0) 802 802 goto ioctl_error; … … 809 809 uSerialLineFlags = TIOCM_RTS; 810 810 811 rc = ioctl(p Data->DeviceFile, uIoctl, &uSerialLineFlags);811 rc = ioctl(pThis->DeviceFile, uIoctl, &uSerialLineFlags); 812 812 if (rc < 0) 813 813 goto ioctl_error; … … 816 816 uIoctl = (uIoctl == TIOCMBIC) ? TIOCMBIS : TIOCMBIC; 817 817 818 rc = ioctl(p Data->DeviceFile, uIoctl, &uSerialLineFlags);818 rc = ioctl(pThis->DeviceFile, uIoctl, &uSerialLineFlags); 819 819 if (rc < 0) 820 820 goto ioctl_error; … … 824 824 */ 825 825 uSerialLineFlags = TIOCM_LOOP; 826 rc = ioctl(p Data->DeviceFile, TIOCMBIC, &uSerialLineFlags);826 rc = ioctl(pThis->DeviceFile, TIOCMBIC, &uSerialLineFlags); 827 827 if (rc >= 0) 828 828 return VINF_SUCCESS; … … 831 831 PDMDrvHlpVMSetRuntimeError(pDrvIns, false, "DrvHostSerialFail", 832 832 N_("Ioctl failed for serial host device '%s' (%Vrc). The device will not work properly"), 833 p Data->pszDevicePath, RTErrConvertFromErrno(errno));833 pThis->pszDevicePath, RTErrConvertFromErrno(errno)); 834 834 return VINF_SUCCESS; 835 835 } … … 846 846 static DECLCALLBACK(int) drvHostSerialSetModemLines(PPDMICHAR pInterface, bool RequestToSend, bool DataTerminalReady) 847 847 { 848 PDRVHOSTSERIAL p Data= PDMICHAR_2_DRVHOSTSERIAL(pInterface);848 PDRVHOSTSERIAL pThis = PDMICHAR_2_DRVHOSTSERIAL(pInterface); 849 849 850 850 #ifdef RT_OS_LINUX … … 863 863 864 864 if (modemStateSet) 865 ioctl(p Data->DeviceFile, TIOCMBIS, &modemStateSet);865 ioctl(pThis->DeviceFile, TIOCMBIS, &modemStateSet); 866 866 867 867 if (modemStateClear) 868 ioctl(p Data->DeviceFile, TIOCMBIC, &modemStateClear);868 ioctl(pThis->DeviceFile, TIOCMBIC, &modemStateClear); 869 869 #elif defined(RT_OS_WINDOWS) 870 870 if (RequestToSend) 871 EscapeCommFunction(p Data->hDeviceFile, SETRTS);871 EscapeCommFunction(pThis->hDeviceFile, SETRTS); 872 872 else 873 EscapeCommFunction(p Data->hDeviceFile, CLRRTS);873 EscapeCommFunction(pThis->hDeviceFile, CLRRTS); 874 874 875 875 if (DataTerminalReady) 876 EscapeCommFunction(p Data->hDeviceFile, SETDTR);876 EscapeCommFunction(pThis->hDeviceFile, SETDTR); 877 877 else 878 EscapeCommFunction(p Data->hDeviceFile, CLRDTR);878 EscapeCommFunction(pThis->hDeviceFile, CLRDTR); 879 879 #endif 880 880 … … 898 898 static DECLCALLBACK(int) drvHostSerialConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 899 899 { 900 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);900 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 901 901 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 902 902 … … 905 905 */ 906 906 #ifdef RT_OS_LINUX 907 p Data->DeviceFile = NIL_RTFILE;908 p Data->WakeupPipeR = NIL_RTFILE;909 p Data->WakeupPipeW = NIL_RTFILE;907 pThis->DeviceFile = NIL_RTFILE; 908 pThis->WakeupPipeR = NIL_RTFILE; 909 pThis->WakeupPipeW = NIL_RTFILE; 910 910 #endif 911 911 /* IBase. */ 912 912 pDrvIns->IBase.pfnQueryInterface = drvHostSerialQueryInterface; 913 913 /* IChar. */ 914 p Data->IChar.pfnWrite = drvHostSerialWrite;915 p Data->IChar.pfnSetParameters = drvHostSerialSetParameters;916 p Data->IChar.pfnSetModemLines = drvHostSerialSetModemLines;914 pThis->IChar.pfnWrite = drvHostSerialWrite; 915 pThis->IChar.pfnSetParameters = drvHostSerialSetParameters; 916 pThis->IChar.pfnSetModemLines = drvHostSerialSetModemLines; 917 917 918 918 /* … … 920 920 */ 921 921 /* Device */ 922 int rc = CFGMR3QueryStringAlloc(pCfgHandle, "DevicePath", &p Data->pszDevicePath);922 int rc = CFGMR3QueryStringAlloc(pCfgHandle, "DevicePath", &pThis->pszDevicePath); 923 923 if (RT_FAILURE(rc)) 924 924 { … … 932 932 #ifdef RT_OS_WINDOWS 933 933 934 p Data->hHaltEventSem = CreateEvent(NULL, FALSE, FALSE, NULL);935 AssertReturn(p Data->hHaltEventSem != NULL, VERR_NO_MEMORY);936 937 p Data->hEventRecv = CreateEvent(NULL, FALSE, FALSE, NULL);938 AssertReturn(p Data->hEventRecv != NULL, VERR_NO_MEMORY);939 940 p Data->hEventSend = CreateEvent(NULL, FALSE, FALSE, NULL);941 AssertReturn(p Data->hEventSend != NULL, VERR_NO_MEMORY);942 943 HANDLE hFile = CreateFile(p Data->pszDevicePath,934 pThis->hHaltEventSem = CreateEvent(NULL, FALSE, FALSE, NULL); 935 AssertReturn(pThis->hHaltEventSem != NULL, VERR_NO_MEMORY); 936 937 pThis->hEventRecv = CreateEvent(NULL, FALSE, FALSE, NULL); 938 AssertReturn(pThis->hEventRecv != NULL, VERR_NO_MEMORY); 939 940 pThis->hEventSend = CreateEvent(NULL, FALSE, FALSE, NULL); 941 AssertReturn(pThis->hEventSend != NULL, VERR_NO_MEMORY); 942 943 HANDLE hFile = CreateFile(pThis->pszDevicePath, 944 944 GENERIC_READ | GENERIC_WRITE, 945 945 0, // must be opened with exclusive access … … 952 952 else 953 953 { 954 p Data->hDeviceFile = hFile;954 pThis->hDeviceFile = hFile; 955 955 /* for overlapped read */ 956 956 if (!SetCommMask(hFile, EV_RXCHAR | EV_CTS | EV_DSR | EV_RING | EV_RLSD)) … … 964 964 #else 965 965 966 rc = RTFileOpen(&p Data->DeviceFile, pData->pszDevicePath, RTFILE_O_OPEN | RTFILE_O_READWRITE);966 rc = RTFileOpen(&pThis->DeviceFile, pThis->pszDevicePath, RTFILE_O_OPEN | RTFILE_O_READWRITE); 967 967 968 968 #endif … … 970 970 if (RT_FAILURE(rc)) 971 971 { 972 AssertMsgFailed(("Could not open host device %s, rc=%Vrc\n", p Data->pszDevicePath, rc));972 AssertMsgFailed(("Could not open host device %s, rc=%Vrc\n", pThis->pszDevicePath, rc)); 973 973 switch (rc) 974 974 { … … 984 984 "of that device"), 985 985 #endif 986 p Data->pszDevicePath, pData->pszDevicePath);986 pThis->pszDevicePath, pThis->pszDevicePath); 987 987 default: 988 988 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, 989 989 N_("Failed to open host device '%s'"), 990 p Data->pszDevicePath);990 pThis->pszDevicePath); 991 991 } 992 992 } … … 995 995 #ifdef RT_OS_LINUX 996 996 997 fcntl(p Data->DeviceFile, F_SETFL, O_NONBLOCK);997 fcntl(pThis->DeviceFile, F_SETFL, O_NONBLOCK); 998 998 int aFDs[2]; 999 999 if (pipe(aFDs) != 0) … … 1003 1003 return rc; 1004 1004 } 1005 p Data->WakeupPipeR = aFDs[0];1006 p Data->WakeupPipeW = aFDs[1];1005 pThis->WakeupPipeR = aFDs[0]; 1006 pThis->WakeupPipeW = aFDs[1]; 1007 1007 1008 1008 #elif defined(RT_OS_WINDOWS) … … 1017 1017 comTimeout.WriteTotalTimeoutConstant = 0; 1018 1018 1019 SetCommTimeouts(p Data->hDeviceFile, &comTimeout);1019 SetCommTimeouts(pThis->hDeviceFile, &comTimeout); 1020 1020 1021 1021 #endif … … 1024 1024 * Get the ICharPort interface of the above driver/device. 1025 1025 */ 1026 p Data->pDrvCharPort = (PPDMICHARPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_CHAR_PORT);1027 if (!p Data->pDrvCharPort)1026 pThis->pDrvCharPort = (PPDMICHARPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_CHAR_PORT); 1027 if (!pThis->pDrvCharPort) 1028 1028 return PDMDrvHlpVMSetError(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, RT_SRC_POS, N_("HostSerial#%d has no char port interface above"), pDrvIns->iInstance); 1029 1029 1030 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pRecvThread, pData, drvHostSerialRecvThread, drvHostSerialWakeupRecvThread, 0, RTTHREADTYPE_IO, "SerRecv");1030 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pRecvThread, pThis, drvHostSerialRecvThread, drvHostSerialWakeupRecvThread, 0, RTTHREADTYPE_IO, "SerRecv"); 1031 1031 if (RT_FAILURE(rc)) 1032 1032 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("HostSerial#%d cannot create receive thread"), pDrvIns->iInstance); 1033 1033 1034 rc = RTSemEventCreate(&p Data->SendSem);1034 rc = RTSemEventCreate(&pThis->SendSem); 1035 1035 AssertRC(rc); 1036 1036 1037 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pSendThread, pData, drvHostSerialSendThread, drvHostSerialWakeupSendThread, 0, RTTHREADTYPE_IO, "SerSend");1037 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pSendThread, pThis, drvHostSerialSendThread, drvHostSerialWakeupSendThread, 0, RTTHREADTYPE_IO, "SerSend"); 1038 1038 if (RT_FAILURE(rc)) 1039 1039 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("HostSerial#%d cannot create send thread"), pDrvIns->iInstance); … … 1041 1041 #if defined(RT_OS_LINUX) 1042 1042 /* Linux needs a separate thread which monitors the status lines. */ 1043 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &p Data->pMonitorThread, pData, drvHostSerialMonitorThread, drvHostSerialWakeupMonitorThread, 0, RTTHREADTYPE_IO, "SerMon");1043 rc = PDMDrvHlpPDMThreadCreate(pDrvIns, &pThis->pMonitorThread, pThis, drvHostSerialMonitorThread, drvHostSerialWakeupMonitorThread, 0, RTTHREADTYPE_IO, "SerMon"); 1044 1044 if (RT_FAILURE(rc)) 1045 1045 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("HostSerial#%d cannot create monitor thread"), pDrvIns->iInstance); 1046 1046 #endif 1047 1047 1048 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatBytesWritten, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes written", "/Devices/HostSerial%d/Written", pDrvIns->iInstance);1049 PDMDrvHlpSTAMRegisterF(pDrvIns, &p Data->StatBytesRead, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes read", "/Devices/HostSerial%d/Read", pDrvIns->iInstance);1048 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes written", "/Devices/HostSerial%d/Written", pDrvIns->iInstance); 1049 PDMDrvHlpSTAMRegisterF(pDrvIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_BYTES, "Nr of bytes read", "/Devices/HostSerial%d/Read", pDrvIns->iInstance); 1050 1050 1051 1051 return VINF_SUCCESS; … … 1063 1063 static DECLCALLBACK(void) drvHostSerialDestruct(PPDMDRVINS pDrvIns) 1064 1064 { 1065 PDRVHOSTSERIAL p Data= PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL);1065 PDRVHOSTSERIAL pThis = PDMINS_2_DATA(pDrvIns, PDRVHOSTSERIAL); 1066 1066 1067 1067 LogFlow(("%s: iInstance=%d\n", __FUNCTION__, pDrvIns->iInstance)); 1068 1068 1069 1069 /* Empty the send queue */ 1070 p Data->iSendQueueTail = pData->iSendQueueHead = 0;1071 1072 RTSemEventDestroy(p Data->SendSem);1073 p Data->SendSem = NIL_RTSEMEVENT;1070 pThis->iSendQueueTail = pThis->iSendQueueHead = 0; 1071 1072 RTSemEventDestroy(pThis->SendSem); 1073 pThis->SendSem = NIL_RTSEMEVENT; 1074 1074 1075 1075 #if defined(RT_OS_LINUX) 1076 1076 1077 if (p Data->WakeupPipeW != NIL_RTFILE)1077 if (pThis->WakeupPipeW != NIL_RTFILE) 1078 1078 { 1079 int rc = RTFileClose(p Data->WakeupPipeW);1079 int rc = RTFileClose(pThis->WakeupPipeW); 1080 1080 AssertRC(rc); 1081 p Data->WakeupPipeW = NIL_RTFILE;1082 } 1083 if (p Data->WakeupPipeR != NIL_RTFILE)1081 pThis->WakeupPipeW = NIL_RTFILE; 1082 } 1083 if (pThis->WakeupPipeR != NIL_RTFILE) 1084 1084 { 1085 int rc = RTFileClose(p Data->WakeupPipeR);1085 int rc = RTFileClose(pThis->WakeupPipeR); 1086 1086 AssertRC(rc); 1087 p Data->WakeupPipeR = NIL_RTFILE;1088 } 1089 if (p Data->DeviceFile != NIL_RTFILE)1087 pThis->WakeupPipeR = NIL_RTFILE; 1088 } 1089 if (pThis->DeviceFile != NIL_RTFILE) 1090 1090 { 1091 int rc = RTFileClose(p Data->DeviceFile);1091 int rc = RTFileClose(pThis->DeviceFile); 1092 1092 AssertRC(rc); 1093 p Data->DeviceFile = NIL_RTFILE;1093 pThis->DeviceFile = NIL_RTFILE; 1094 1094 } 1095 1095 1096 1096 #elif defined(RT_OS_WINDOWS) 1097 1097 1098 CloseHandle(p Data->hEventRecv);1099 CloseHandle(p Data->hEventSend);1100 CancelIo(p Data->hDeviceFile);1101 CloseHandle(p Data->hDeviceFile);1098 CloseHandle(pThis->hEventRecv); 1099 CloseHandle(pThis->hEventSend); 1100 CancelIo(pThis->hDeviceFile); 1101 CloseHandle(pThis->hDeviceFile); 1102 1102 1103 1103 #endif -
trunk/src/VBox/Devices/Serial/DrvNamedPipe.cpp
r11267 r11269 103 103 { 104 104 int rc = VINF_SUCCESS; 105 PDRVNAMEDPIPE p Data= PDMISTREAM_2_DRVNAMEDPIPE(pInterface);106 LogFlow(("%s: pvBuf=%p cbRead=%#x (%s)\n", __FUNCTION__, pvBuf, cbRead, p Data->pszLocation));105 PDRVNAMEDPIPE pThis = PDMISTREAM_2_DRVNAMEDPIPE(pInterface); 106 LogFlow(("%s: pvBuf=%p cbRead=%#x (%s)\n", __FUNCTION__, pvBuf, cbRead, pThis->pszLocation)); 107 107 108 108 Assert(pvBuf); 109 109 #ifdef RT_OS_WINDOWS 110 if (p Data->NamedPipe != INVALID_HANDLE_VALUE)110 if (pThis->NamedPipe != INVALID_HANDLE_VALUE) 111 111 { 112 112 DWORD cbReallyRead; 113 p Data->OverlappedRead.Offset = 0;114 p Data->OverlappedRead.OffsetHigh = 0;115 if (!ReadFile(p Data->NamedPipe, pvBuf, *cbRead, &cbReallyRead, &pData->OverlappedRead))113 pThis->OverlappedRead.Offset = 0; 114 pThis->OverlappedRead.OffsetHigh = 0; 115 if (!ReadFile(pThis->NamedPipe, pvBuf, *cbRead, &cbReallyRead, &pThis->OverlappedRead)) 116 116 { 117 117 DWORD uError = GetLastError(); … … 133 133 134 134 /* Wait for incoming bytes. */ 135 if (GetOverlappedResult(p Data->NamedPipe, &pData->OverlappedRead, &cbReallyRead, TRUE) == FALSE)135 if (GetOverlappedResult(pThis->NamedPipe, &pThis->OverlappedRead, &cbReallyRead, TRUE) == FALSE) 136 136 uError = GetLastError(); 137 137 } … … 144 144 if (RT_FAILURE(rc)) 145 145 { 146 Log(("drvNamedPipeRead: FileRead returned %Vrc fShutdown=%d\n", rc, p Data->fShutdown));147 if ( !p Data->fShutdown146 Log(("drvNamedPipeRead: FileRead returned %Vrc fShutdown=%d\n", rc, pThis->fShutdown)); 147 if ( !pThis->fShutdown 148 148 && ( rc == VERR_EOF 149 149 || rc == VERR_BROKEN_PIPE … … 152 152 153 153 { 154 FlushFileBuffers(p Data->NamedPipe);155 DisconnectNamedPipe(p Data->NamedPipe);156 if (!p Data->fIsServer)154 FlushFileBuffers(pThis->NamedPipe); 155 DisconnectNamedPipe(pThis->NamedPipe); 156 if (!pThis->fIsServer) 157 157 { 158 CloseHandle(p Data->NamedPipe);159 p Data->NamedPipe = INVALID_HANDLE_VALUE;158 CloseHandle(pThis->NamedPipe); 159 pThis->NamedPipe = INVALID_HANDLE_VALUE; 160 160 } 161 161 /* pretend success */ … … 167 167 } 168 168 #else /* !RT_OS_WINDOWS */ 169 if (p Data->LocalSocket != NIL_RTSOCKET)169 if (pThis->LocalSocket != NIL_RTSOCKET) 170 170 { 171 171 ssize_t cbReallyRead; 172 cbReallyRead = recv(p Data->LocalSocket, pvBuf, *cbRead, 0);172 cbReallyRead = recv(pThis->LocalSocket, pvBuf, *cbRead, 0); 173 173 if (cbReallyRead == 0) 174 174 { 175 RTSOCKET tmp = p Data->LocalSocket;176 p Data->LocalSocket = NIL_RTSOCKET;175 RTSOCKET tmp = pThis->LocalSocket; 176 pThis->LocalSocket = NIL_RTSOCKET; 177 177 close(tmp); 178 178 } … … 200 200 { 201 201 int rc = VINF_SUCCESS; 202 PDRVNAMEDPIPE p Data= PDMISTREAM_2_DRVNAMEDPIPE(pInterface);203 LogFlow(("%s: pvBuf=%p cbWrite=%#x (%s)\n", __FUNCTION__, pvBuf, cbWrite, p Data->pszLocation));202 PDRVNAMEDPIPE pThis = PDMISTREAM_2_DRVNAMEDPIPE(pInterface); 203 LogFlow(("%s: pvBuf=%p cbWrite=%#x (%s)\n", __FUNCTION__, pvBuf, cbWrite, pThis->pszLocation)); 204 204 205 205 Assert(pvBuf); 206 206 #ifdef RT_OS_WINDOWS 207 if (p Data->NamedPipe != INVALID_HANDLE_VALUE)207 if (pThis->NamedPipe != INVALID_HANDLE_VALUE) 208 208 { 209 209 unsigned cbWritten; 210 p Data->OverlappedWrite.Offset = 0;211 p Data->OverlappedWrite.OffsetHigh = 0;212 if (!WriteFile(p Data->NamedPipe, pvBuf, *cbWrite, NULL, &pData->OverlappedWrite))210 pThis->OverlappedWrite.Offset = 0; 211 pThis->OverlappedWrite.OffsetHigh = 0; 212 if (!WriteFile(pThis->NamedPipe, pvBuf, *cbWrite, NULL, &pThis->OverlappedWrite)) 213 213 { 214 214 DWORD uError = GetLastError(); … … 229 229 { 230 230 /* Wait for the write to complete. */ 231 if (GetOverlappedResult(p Data->NamedPipe, &pData->OverlappedWrite, (DWORD *)&cbWritten, TRUE) == FALSE)231 if (GetOverlappedResult(pThis->NamedPipe, &pThis->OverlappedWrite, (DWORD *)&cbWritten, TRUE) == FALSE) 232 232 uError = GetLastError(); 233 233 } … … 241 241 || rc == VERR_BROKEN_PIPE) 242 242 { 243 FlushFileBuffers(p Data->NamedPipe);244 DisconnectNamedPipe(p Data->NamedPipe);245 if (!p Data->fIsServer)243 FlushFileBuffers(pThis->NamedPipe); 244 DisconnectNamedPipe(pThis->NamedPipe); 245 if (!pThis->fIsServer) 246 246 { 247 CloseHandle(p Data->NamedPipe);248 p Data->NamedPipe = INVALID_HANDLE_VALUE;247 CloseHandle(pThis->NamedPipe); 248 pThis->NamedPipe = INVALID_HANDLE_VALUE; 249 249 } 250 250 /* pretend success */ … … 256 256 } 257 257 #else /* !RT_OS_WINDOWS */ 258 if (p Data->LocalSocket != NIL_RTSOCKET)258 if (pThis->LocalSocket != NIL_RTSOCKET) 259 259 { 260 260 ssize_t cbWritten; 261 cbWritten = send(p Data->LocalSocket, pvBuf, *cbWrite, 0);261 cbWritten = send(pThis->LocalSocket, pvBuf, *cbWrite, 0); 262 262 if (cbWritten == 0) 263 263 { 264 RTSOCKET tmp = p Data->LocalSocket;265 p Data->LocalSocket = NIL_RTSOCKET;264 RTSOCKET tmp = pThis->LocalSocket; 265 pThis->LocalSocket = NIL_RTSOCKET; 266 266 close(tmp); 267 267 } … … 316 316 static DECLCALLBACK(int) drvNamedPipeListenLoop(RTTHREAD ThreadSelf, void *pvUser) 317 317 { 318 PDRVNAMEDPIPE p Data= (PDRVNAMEDPIPE)pvUser;318 PDRVNAMEDPIPE pThis = (PDRVNAMEDPIPE)pvUser; 319 319 int rc = VINF_SUCCESS; 320 320 #ifdef RT_OS_WINDOWS 321 HANDLE NamedPipe = p Data->NamedPipe;321 HANDLE NamedPipe = pThis->NamedPipe; 322 322 HANDLE hEvent = CreateEvent(NULL, TRUE, FALSE, 0); 323 323 #endif 324 324 325 while (RT_LIKELY(!p Data->fShutdown))325 while (RT_LIKELY(!pThis->fShutdown)) 326 326 { 327 327 #ifdef RT_OS_WINDOWS … … 333 333 BOOL fConnected = ConnectNamedPipe(NamedPipe, &overlapped); 334 334 if ( !fConnected 335 && !p Data->fShutdown)335 && !pThis->fShutdown) 336 336 { 337 337 DWORD hrc = GetLastError(); … … 342 342 343 343 hrc = 0; 344 if (GetOverlappedResult(p Data->NamedPipe, &overlapped, &dummy, TRUE) == FALSE)344 if (GetOverlappedResult(pThis->NamedPipe, &overlapped, &dummy, TRUE) == FALSE) 345 345 hrc = GetLastError(); 346 346 347 347 } 348 348 349 if (p Data->fShutdown)349 if (pThis->fShutdown) 350 350 break; 351 351 352 352 if (hrc == ERROR_PIPE_CONNECTED) 353 353 { 354 RTSemEventWait(p Data->ListenSem, 250);354 RTSemEventWait(pThis->ListenSem, 250); 355 355 } 356 356 else if (hrc != ERROR_SUCCESS) 357 357 { 358 358 rc = RTErrConvertFromWin32(hrc); 359 LogRel(("NamedPipe%d: ConnectNamedPipe failed, rc=%Vrc\n", p Data->pDrvIns->iInstance, rc));359 LogRel(("NamedPipe%d: ConnectNamedPipe failed, rc=%Vrc\n", pThis->pDrvIns->iInstance, rc)); 360 360 break; 361 361 } 362 362 } 363 363 #else /* !RT_OS_WINDOWS */ 364 if (listen(p Data->LocalSocketServer, 0) == -1)364 if (listen(pThis->LocalSocketServer, 0) == -1) 365 365 { 366 366 rc = RTErrConvertFromErrno(errno); 367 LogRel(("NamedPipe%d: listen failed, rc=%Vrc\n", p Data->pDrvIns->iInstance, rc));367 LogRel(("NamedPipe%d: listen failed, rc=%Vrc\n", pThis->pDrvIns->iInstance, rc)); 368 368 break; 369 369 } 370 int s = accept(p Data->LocalSocketServer, NULL, NULL);370 int s = accept(pThis->LocalSocketServer, NULL, NULL); 371 371 if (s == -1) 372 372 { 373 373 rc = RTErrConvertFromErrno(errno); 374 LogRel(("NamedPipe%d: accept failed, rc=%Vrc\n", p Data->pDrvIns->iInstance, rc));374 LogRel(("NamedPipe%d: accept failed, rc=%Vrc\n", pThis->pDrvIns->iInstance, rc)); 375 375 break; 376 376 } 377 377 else 378 378 { 379 if (p Data->LocalSocket != NIL_RTSOCKET)380 { 381 LogRel(("NamedPipe%d: only single connection supported\n", p Data->pDrvIns->iInstance));379 if (pThis->LocalSocket != NIL_RTSOCKET) 380 { 381 LogRel(("NamedPipe%d: only single connection supported\n", pThis->pDrvIns->iInstance)); 382 382 close(s); 383 383 } 384 384 else 385 p Data->LocalSocket = s;385 pThis->LocalSocket = s; 386 386 } 387 387 #endif /* !RT_OS_WINDOWS */ … … 391 391 CloseHandle(hEvent); 392 392 #endif 393 p Data->ListenThread = NIL_RTTHREAD;393 pThis->ListenThread = NIL_RTTHREAD; 394 394 return VINF_SUCCESS; 395 395 } … … 410 410 int rc; 411 411 char *pszLocation = NULL; 412 PDRVNAMEDPIPE p Data= PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE);412 PDRVNAMEDPIPE pThis = PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE); 413 413 414 414 /* 415 415 * Init the static parts. 416 416 */ 417 p Data->pDrvIns = pDrvIns;418 p Data->pszLocation = NULL;419 p Data->fIsServer = false;420 #ifdef RT_OS_WINDOWS 421 p Data->NamedPipe = INVALID_HANDLE_VALUE;422 #else /* !RT_OS_WINDOWS */ 423 p Data->LocalSocketServer = NIL_RTSOCKET;424 p Data->LocalSocket = NIL_RTSOCKET;425 #endif /* !RT_OS_WINDOWS */ 426 p Data->ListenThread = NIL_RTTHREAD;427 p Data->fShutdown = false;417 pThis->pDrvIns = pDrvIns; 418 pThis->pszLocation = NULL; 419 pThis->fIsServer = false; 420 #ifdef RT_OS_WINDOWS 421 pThis->NamedPipe = INVALID_HANDLE_VALUE; 422 #else /* !RT_OS_WINDOWS */ 423 pThis->LocalSocketServer = NIL_RTSOCKET; 424 pThis->LocalSocket = NIL_RTSOCKET; 425 #endif /* !RT_OS_WINDOWS */ 426 pThis->ListenThread = NIL_RTTHREAD; 427 pThis->fShutdown = false; 428 428 /* IBase */ 429 429 pDrvIns->IBase.pfnQueryInterface = drvNamedPipeQueryInterface; 430 430 /* IStream */ 431 p Data->IStream.pfnRead = drvNamedPipeRead;432 p Data->IStream.pfnWrite = drvNamedPipeWrite;431 pThis->IStream.pfnRead = drvNamedPipeRead; 432 pThis->IStream.pfnWrite = drvNamedPipeWrite; 433 433 434 434 /* … … 447 447 goto out; 448 448 } 449 p Data->pszLocation = pszLocation;449 pThis->pszLocation = pszLocation; 450 450 451 451 bool fIsServer; … … 456 456 goto out; 457 457 } 458 p Data->fIsServer = fIsServer;458 pThis->fIsServer = fIsServer; 459 459 460 460 #ifdef RT_OS_WINDOWS 461 461 if (fIsServer) 462 462 { 463 HANDLE hPipe = CreateNamedPipe(p Data->pszLocation, PIPE_ACCESS_DUPLEX | FILE_FLAG_OVERLAPPED, PIPE_TYPE_BYTE | PIPE_READMODE_BYTE | PIPE_WAIT, 1, 32, 32, 10000, NULL);463 HANDLE hPipe = CreateNamedPipe(pThis->pszLocation, PIPE_ACCESS_DUPLEX | FILE_FLAG_OVERLAPPED, PIPE_TYPE_BYTE | PIPE_READMODE_BYTE | PIPE_WAIT, 1, 32, 32, 10000, NULL); 464 464 if (hPipe == INVALID_HANDLE_VALUE) 465 465 { 466 466 rc = RTErrConvertFromWin32(GetLastError()); 467 LogRel(("NamedPipe%d: CreateNamedPipe failed rc=%Vrc\n", p Data->pDrvIns->iInstance));467 LogRel(("NamedPipe%d: CreateNamedPipe failed rc=%Vrc\n", pThis->pDrvIns->iInstance)); 468 468 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NamedPipe#%d failed to create named pipe %s"), pDrvIns->iInstance, pszLocation); 469 469 } 470 p Data->NamedPipe = hPipe;471 472 rc = RTSemEventCreate(&p Data->ListenSem);470 pThis->NamedPipe = hPipe; 471 472 rc = RTSemEventCreate(&pThis->ListenSem); 473 473 AssertRC(rc); 474 474 475 rc = RTThreadCreate(&p Data->ListenThread, drvNamedPipeListenLoop, (void *)pData, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "SerPipe");475 rc = RTThreadCreate(&pThis->ListenThread, drvNamedPipeListenLoop, (void *)pThis, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "SerPipe"); 476 476 if RT_FAILURE(rc) 477 477 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NamedPipe#%d failed to create listening thread"), pDrvIns->iInstance); … … 481 481 { 482 482 /* Connect to the named pipe. */ 483 HANDLE hPipe = CreateFile(p Data->pszLocation, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, FILE_FLAG_OVERLAPPED, NULL);483 HANDLE hPipe = CreateFile(pThis->pszLocation, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, FILE_FLAG_OVERLAPPED, NULL); 484 484 if (hPipe == INVALID_HANDLE_VALUE) 485 485 { 486 486 rc = RTErrConvertFromWin32(GetLastError()); 487 LogRel(("NamedPipe%d: CreateFile failed rc=%Vrc\n", p Data->pDrvIns->iInstance));487 LogRel(("NamedPipe%d: CreateFile failed rc=%Vrc\n", pThis->pDrvIns->iInstance)); 488 488 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NamedPipe#%d failed to connect to named pipe %s"), pDrvIns->iInstance, pszLocation); 489 489 } 490 p Data->NamedPipe = hPipe;491 } 492 493 memset(&p Data->OverlappedWrite, 0, sizeof(pData->OverlappedWrite));494 memset(&p Data->OverlappedRead, 0, sizeof(pData->OverlappedRead));495 p Data->OverlappedWrite.hEvent = CreateEvent(NULL, TRUE, FALSE, NULL);496 p Data->OverlappedRead.hEvent = CreateEvent(NULL, TRUE, FALSE, NULL);490 pThis->NamedPipe = hPipe; 491 } 492 493 memset(&pThis->OverlappedWrite, 0, sizeof(pThis->OverlappedWrite)); 494 memset(&pThis->OverlappedRead, 0, sizeof(pThis->OverlappedRead)); 495 pThis->OverlappedWrite.hEvent = CreateEvent(NULL, TRUE, FALSE, NULL); 496 pThis->OverlappedRead.hEvent = CreateEvent(NULL, TRUE, FALSE, NULL); 497 497 #else /* !RT_OS_WINDOWS */ 498 498 int s; … … 512 512 if (bind(s, (struct sockaddr *)&addr, sizeof(addr)) == -1) 513 513 return PDMDrvHlpVMSetError(pDrvIns, RTErrConvertFromErrno(errno), RT_SRC_POS, N_("NamedPipe#%d failed to bind to local socket %s"), pDrvIns->iInstance, pszLocation); 514 p Data->LocalSocketServer = s;515 rc = RTThreadCreate(&p Data->ListenThread, drvNamedPipeListenLoop, (void *)pData, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "SerPipe");514 pThis->LocalSocketServer = s; 515 rc = RTThreadCreate(&pThis->ListenThread, drvNamedPipeListenLoop, (void *)pThis, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "SerPipe"); 516 516 if RT_FAILURE(rc) 517 517 return PDMDrvHlpVMSetError(pDrvIns, rc, RT_SRC_POS, N_("NamedPipe#%d failed to create listening thread"), pDrvIns->iInstance); … … 522 522 if (connect(s, (struct sockaddr *)&addr, sizeof(addr)) == -1) 523 523 return PDMDrvHlpVMSetError(pDrvIns, RTErrConvertFromErrno(errno), RT_SRC_POS, N_("NamedPipe#%d failed to connect to local socket %s"), pDrvIns->iInstance, pszLocation); 524 p Data->LocalSocket = s;524 pThis->LocalSocket = s; 525 525 } 526 526 #endif /* !RT_OS_WINDOWS */ … … 550 550 static DECLCALLBACK(void) drvNamedPipeDestruct(PPDMDRVINS pDrvIns) 551 551 { 552 PDRVNAMEDPIPE p Data= PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE);553 LogFlow(("%s: %s\n", __FUNCTION__, p Data->pszLocation));554 555 if (p Data->ListenThread)556 { 557 RTThreadWait(p Data->ListenThread, 250, NULL);558 if (p Data->ListenThread != NIL_RTTHREAD)552 PDRVNAMEDPIPE pThis = PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE); 553 LogFlow(("%s: %s\n", __FUNCTION__, pThis->pszLocation)); 554 555 if (pThis->ListenThread) 556 { 557 RTThreadWait(pThis->ListenThread, 250, NULL); 558 if (pThis->ListenThread != NIL_RTTHREAD) 559 559 LogRel(("NamedPipe%d: listen thread did not terminate\n", pDrvIns->iInstance)); 560 560 } 561 561 562 if (p Data->pszLocation)563 MMR3HeapFree(p Data->pszLocation);562 if (pThis->pszLocation) 563 MMR3HeapFree(pThis->pszLocation); 564 564 } 565 565 … … 574 574 static DECLCALLBACK(void) drvNamedPipePowerOff(PPDMDRVINS pDrvIns) 575 575 { 576 PDRVNAMEDPIPE p Data= PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE);577 LogFlow(("%s: %s\n", __FUNCTION__, p Data->pszLocation));578 579 p Data->fShutdown = true;580 581 #ifdef RT_OS_WINDOWS 582 if (p Data->NamedPipe != INVALID_HANDLE_VALUE)583 { 584 if (p Data->fIsServer)585 { 586 FlushFileBuffers(p Data->NamedPipe);587 DisconnectNamedPipe(p Data->NamedPipe);588 } 589 590 CloseHandle(p Data->NamedPipe);591 p Data->NamedPipe = INVALID_HANDLE_VALUE;592 CloseHandle(p Data->OverlappedRead.hEvent);593 CloseHandle(p Data->OverlappedWrite.hEvent);594 } 595 if (p Data->fIsServer)576 PDRVNAMEDPIPE pThis = PDMINS_2_DATA(pDrvIns, PDRVNAMEDPIPE); 577 LogFlow(("%s: %s\n", __FUNCTION__, pThis->pszLocation)); 578 579 pThis->fShutdown = true; 580 581 #ifdef RT_OS_WINDOWS 582 if (pThis->NamedPipe != INVALID_HANDLE_VALUE) 583 { 584 if (pThis->fIsServer) 585 { 586 FlushFileBuffers(pThis->NamedPipe); 587 DisconnectNamedPipe(pThis->NamedPipe); 588 } 589 590 CloseHandle(pThis->NamedPipe); 591 pThis->NamedPipe = INVALID_HANDLE_VALUE; 592 CloseHandle(pThis->OverlappedRead.hEvent); 593 CloseHandle(pThis->OverlappedWrite.hEvent); 594 } 595 if (pThis->fIsServer) 596 596 { 597 597 /* Wake up listen thread */ 598 RTSemEventSignal(p Data->ListenSem);599 RTSemEventDestroy(p Data->ListenSem);600 } 601 #else /* !RT_OS_WINDOWS */ 602 if (p Data->fIsServer)603 { 604 if (p Data->LocalSocketServer != NIL_RTSOCKET)605 close(p Data->LocalSocketServer);606 if (p Data->pszLocation)607 RTFileDelete(p Data->pszLocation);598 RTSemEventSignal(pThis->ListenSem); 599 RTSemEventDestroy(pThis->ListenSem); 600 } 601 #else /* !RT_OS_WINDOWS */ 602 if (pThis->fIsServer) 603 { 604 if (pThis->LocalSocketServer != NIL_RTSOCKET) 605 close(pThis->LocalSocketServer); 606 if (pThis->pszLocation) 607 RTFileDelete(pThis->pszLocation); 608 608 } 609 609 else 610 610 { 611 if (p Data->LocalSocket != NIL_RTSOCKET)612 close(p Data->LocalSocket);611 if (pThis->LocalSocket != NIL_RTSOCKET) 612 close(pThis->LocalSocket); 613 613 } 614 614 #endif /* !RT_OS_WINDOWS */ -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r11267 r11269 3032 3032 * @returns true on success. 3033 3033 * @returns false when the thread is still processing. 3034 * @param p DataPointer to the controller data.3034 * @param pThis Pointer to the controller data. 3035 3035 * @param cMillies How long to wait (total). 3036 3036 */ … … 4372 4372 { 4373 4373 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4374 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4375 PATACONTROLLER pCtl = &p Data->aCts[i];4374 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4375 PATACONTROLLER pCtl = &pThis->aCts[i]; 4376 4376 int rc; 4377 4377 … … 4406 4406 { 4407 4407 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4408 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4409 PATACONTROLLER pCtl = &p Data->aCts[i];4408 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4409 PATACONTROLLER pCtl = &pThis->aCts[i]; 4410 4410 int rc; 4411 4411 … … 4452 4452 static DECLCALLBACK(int) ataBMDMAIORangeMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 4453 4453 { 4454 PCIATAState *p Data= PCIDEV_2_PCIATASTATE(pPciDev);4454 PCIATAState *pThis = PCIDEV_2_PCIATASTATE(pPciDev); 4455 4455 int rc = VINF_SUCCESS; 4456 4456 Assert(enmType == PCI_ADDRESS_SPACE_IO); … … 4459 4459 4460 4460 /* Register the port range. */ 4461 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4461 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4462 4462 { 4463 4463 int rc2 = PDMDevHlpIOPortRegister(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, … … 4467 4467 rc = rc2; 4468 4468 4469 if (p Data->fGCEnabled)4469 if (pThis->fGCEnabled) 4470 4470 { 4471 4471 rc2 = PDMDevHlpIOPortRegisterGC(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, … … 4475 4475 rc = rc2; 4476 4476 } 4477 if (p Data->fR0Enabled)4477 if (pThis->fR0Enabled) 4478 4478 { 4479 4479 rc2 = PDMDevHlpIOPortRegisterR0(pPciDev->pDevIns, (RTIOPORT)GCPhysAddress + i * 8, 8, … … 4496 4496 static DECLCALLBACK(void) ataReset(PPDMDEVINS pDevIns) 4497 4497 { 4498 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4499 4500 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4501 { 4502 p Data->aCts[i].iSelectedIf = 0;4503 p Data->aCts[i].iAIOIf = 0;4504 p Data->aCts[i].BmDma.u8Cmd = 0;4498 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4499 4500 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4501 { 4502 pThis->aCts[i].iSelectedIf = 0; 4503 pThis->aCts[i].iAIOIf = 0; 4504 pThis->aCts[i].BmDma.u8Cmd = 0; 4505 4505 /* Report that both drives present on the bus are in DMA mode. This 4506 4506 * pretends that there is a BIOS that has set it up. Normal reset 4507 4507 * default is 0x00. */ 4508 p Data->aCts[i].BmDma.u8Status = (pData->aCts[i].aIfs[0].pDrvBase != NULL ? BM_STATUS_D0DMA : 0)4509 | (p Data->aCts[i].aIfs[1].pDrvBase != NULL ? BM_STATUS_D1DMA : 0);4510 p Data->aCts[i].BmDma.pvAddr = 0;4511 4512 p Data->aCts[i].fReset = true;4513 p Data->aCts[i].fRedo = false;4514 p Data->aCts[i].fRedoIdle = false;4515 ataAsyncIOClearRequests(&p Data->aCts[i]);4508 pThis->aCts[i].BmDma.u8Status = (pThis->aCts[i].aIfs[0].pDrvBase != NULL ? BM_STATUS_D0DMA : 0) 4509 | (pThis->aCts[i].aIfs[1].pDrvBase != NULL ? BM_STATUS_D1DMA : 0); 4510 pThis->aCts[i].BmDma.pvAddr = 0; 4511 4512 pThis->aCts[i].fReset = true; 4513 pThis->aCts[i].fRedo = false; 4514 pThis->aCts[i].fRedoIdle = false; 4515 ataAsyncIOClearRequests(&pThis->aCts[i]); 4516 4516 Log2(("%s: Ctl#%d: message to async I/O thread, reset controller\n", __FUNCTION__, i)); 4517 ataAsyncIOPutRequest(&p Data->aCts[i], &ataResetARequest);4518 ataAsyncIOPutRequest(&p Data->aCts[i], &ataResetCRequest);4519 if (!ataWaitForAsyncIOIsIdle(&p Data->aCts[i], 30000))4517 ataAsyncIOPutRequest(&pThis->aCts[i], &ataResetARequest); 4518 ataAsyncIOPutRequest(&pThis->aCts[i], &ataResetCRequest); 4519 if (!ataWaitForAsyncIOIsIdle(&pThis->aCts[i], 30000)) 4520 4520 AssertReleaseMsgFailed(("Async I/O thread busy after reset\n")); 4521 4521 4522 for (uint32_t j = 0; j < RT_ELEMENTS(p Data->aCts[i].aIfs); j++)4523 ataResetDevice(&p Data->aCts[i].aIfs[j]);4522 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 4523 ataResetDevice(&pThis->aCts[i].aIfs[j]); 4524 4524 } 4525 4525 } … … 4538 4538 static DECLCALLBACK(void *) ataStatus_QueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 4539 4539 { 4540 PCIATAState *p Data= PDMIBASE_2_PCIATASTATE(pInterface);4540 PCIATAState *pThis = PDMIBASE_2_PCIATASTATE(pInterface); 4541 4541 switch (enmInterface) 4542 4542 { 4543 4543 case PDMINTERFACE_BASE: 4544 return &p Data->IBase;4544 return &pThis->IBase; 4545 4545 case PDMINTERFACE_LED_PORTS: 4546 return &p Data->ILeds;4546 return &pThis->ILeds; 4547 4547 default: 4548 4548 return NULL; … … 4563 4563 static DECLCALLBACK(int) ataStatus_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 4564 4564 { 4565 PCIATAState *p Data= PDMILEDPORTS_2_PCIATASTATE(pInterface);4565 PCIATAState *pThis = PDMILEDPORTS_2_PCIATASTATE(pInterface); 4566 4566 if (iLUN >= 0 && iLUN <= 4) 4567 4567 { 4568 4568 switch (iLUN) 4569 4569 { 4570 case 0: *ppLed = &p Data->aCts[0].aIfs[0].Led; break;4571 case 1: *ppLed = &p Data->aCts[0].aIfs[1].Led; break;4572 case 2: *ppLed = &p Data->aCts[1].aIfs[0].Led; break;4573 case 3: *ppLed = &p Data->aCts[1].aIfs[1].Led; break;4570 case 0: *ppLed = &pThis->aCts[0].aIfs[0].Led; break; 4571 case 1: *ppLed = &pThis->aCts[0].aIfs[1].Led; break; 4572 case 2: *ppLed = &pThis->aCts[1].aIfs[0].Led; break; 4573 case 3: *ppLed = &pThis->aCts[1].aIfs[1].Led; break; 4574 4574 } 4575 4575 Assert((*ppLed)->u32Magic == PDMLED_MAGIC); … … 4618 4618 { 4619 4619 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4620 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4621 PATACONTROLLER pCtl = &p Data->aCts[i];4620 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4621 PATACONTROLLER pCtl = &pThis->aCts[i]; 4622 4622 int rc = VINF_SUCCESS; 4623 4623 … … 4650 4650 { 4651 4651 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4652 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4653 PATACONTROLLER pCtl = &p Data->aCts[i];4652 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4653 PATACONTROLLER pCtl = &pThis->aCts[i]; 4654 4654 int rc = VINF_SUCCESS; 4655 4655 … … 4687 4687 { 4688 4688 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4689 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4690 PATACONTROLLER pCtl = &p Data->aCts[i];4689 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4690 PATACONTROLLER pCtl = &pThis->aCts[i]; 4691 4691 int rc = VINF_SUCCESS; 4692 4692 … … 4744 4744 { 4745 4745 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4746 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4747 PATACONTROLLER pCtl = &p Data->aCts[i];4746 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4747 PATACONTROLLER pCtl = &pThis->aCts[i]; 4748 4748 int rc; 4749 4749 … … 4801 4801 { 4802 4802 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4803 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4804 PATACONTROLLER pCtl = &p Data->aCts[i];4803 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4804 PATACONTROLLER pCtl = &pThis->aCts[i]; 4805 4805 int rc; 4806 4806 … … 4825 4825 { 4826 4826 uint32_t i = (uint32_t)(uintptr_t)pvUser; 4827 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4828 PATACONTROLLER pCtl = &p Data->aCts[i];4827 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4828 PATACONTROLLER pCtl = &pThis->aCts[i]; 4829 4829 int rc; 4830 4830 … … 4850 4850 * @returns true on success. 4851 4851 * @returns false when one or more threads is still processing. 4852 * @param p DataPointer to the instance data.4852 * @param pThis Pointer to the instance data. 4853 4853 * @param cMillies How long to wait (total). 4854 4854 */ 4855 4855 static bool ataWaitForAllAsyncIOIsIdle(PPDMDEVINS pDevIns, unsigned cMillies) 4856 4856 { 4857 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4857 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4858 4858 bool fVMLocked; 4859 4859 uint64_t u64Start; … … 4879 4879 /* Check all async I/O threads. */ 4880 4880 fAllIdle = true; 4881 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4882 { 4883 pCtl = &p Data->aCts[i];4881 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4882 { 4883 pCtl = &pThis->aCts[i]; 4884 4884 fAllIdle &= ataAsyncIOIsIdle(pCtl, false); 4885 4885 if (!fAllIdle) … … 4918 4918 static DECLCALLBACK(void) ataRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 4919 4919 { 4920 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4921 4922 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4923 { 4924 p Data->aCts[i].pDevInsRC += offDelta;4925 p Data->aCts[i].aIfs[0].pDevInsRC += offDelta;4926 p Data->aCts[i].aIfs[0].pControllerRC += offDelta;4927 ataRelocBuffer(pDevIns, &p Data->aCts[i].aIfs[0]);4928 p Data->aCts[i].aIfs[1].pDevInsRC += offDelta;4929 p Data->aCts[i].aIfs[1].pControllerRC += offDelta;4930 ataRelocBuffer(pDevIns, &p Data->aCts[i].aIfs[1]);4920 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4921 4922 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4923 { 4924 pThis->aCts[i].pDevInsRC += offDelta; 4925 pThis->aCts[i].aIfs[0].pDevInsRC += offDelta; 4926 pThis->aCts[i].aIfs[0].pControllerRC += offDelta; 4927 ataRelocBuffer(pDevIns, &pThis->aCts[i].aIfs[0]); 4928 pThis->aCts[i].aIfs[1].pDevInsRC += offDelta; 4929 pThis->aCts[i].aIfs[1].pControllerRC += offDelta; 4930 ataRelocBuffer(pDevIns, &pThis->aCts[i].aIfs[1]); 4931 4931 } 4932 4932 } … … 4943 4943 static DECLCALLBACK(int) ataDestruct(PPDMDEVINS pDevIns) 4944 4944 { 4945 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);4945 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 4946 4946 int rc; 4947 4947 … … 4951 4951 * Terminate all async helper threads 4952 4952 */ 4953 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4954 { 4955 if (p Data->aCts[i].AsyncIOThread != NIL_RTTHREAD)4956 { 4957 ASMAtomicXchgU32(&p Data->aCts[i].fShutdown, true);4958 rc = RTSemEventSignal(p Data->aCts[i].AsyncIOSem);4953 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4954 { 4955 if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD) 4956 { 4957 ASMAtomicXchgU32(&pThis->aCts[i].fShutdown, true); 4958 rc = RTSemEventSignal(pThis->aCts[i].AsyncIOSem); 4959 4959 AssertRC(rc); 4960 4960 } … … 4967 4967 if (ataWaitForAllAsyncIOIsIdle(pDevIns, 20000)) 4968 4968 { 4969 for (unsigned i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4970 { 4971 rc = RTThreadWait(p Data->aCts[i].AsyncIOThread, 30000 /* 30 s*/, NULL);4969 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4970 { 4971 rc = RTThreadWait(pThis->aCts[i].AsyncIOThread, 30000 /* 30 s*/, NULL); 4972 4972 AssertMsg(RT_SUCCESS(rc) || rc == VERR_INVALID_HANDLE, ("rc=%Rrc i=%d\n", rc, i)); 4973 4973 } … … 4979 4979 * Now the request mutexes are no longer needed. Free resources. 4980 4980 */ 4981 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)4982 { 4983 if (p Data->aCts[i].AsyncIORequestMutex != NIL_RTSEMEVENT)4984 { 4985 RTSemMutexDestroy(p Data->aCts[i].AsyncIORequestMutex);4986 p Data->aCts[i].AsyncIORequestMutex = NIL_RTSEMEVENT;4981 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 4982 { 4983 if (pThis->aCts[i].AsyncIORequestMutex != NIL_RTSEMEVENT) 4984 { 4985 RTSemMutexDestroy(pThis->aCts[i].AsyncIORequestMutex); 4986 pThis->aCts[i].AsyncIORequestMutex = NIL_RTSEMEVENT; 4987 4987 } 4988 4988 } … … 5233 5233 static DECLCALLBACK(void) ataResume(PPDMDEVINS pDevIns) 5234 5234 { 5235 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);5235 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5236 5236 int rc; 5237 5237 5238 5238 Log(("%s:\n", __FUNCTION__)); 5239 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5240 { 5241 if (p Data->aCts[i].fRedo && pData->aCts[i].fRedoIdle)5242 { 5243 rc = RTSemEventSignal(p Data->aCts[i].SuspendIOSem);5239 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5240 { 5241 if (pThis->aCts[i].fRedo && pThis->aCts[i].fRedoIdle) 5242 { 5243 rc = RTSemEventSignal(pThis->aCts[i].SuspendIOSem); 5244 5244 AssertRC(rc); 5245 5245 } … … 5273 5273 static DECLCALLBACK(int) ataSaveLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 5274 5274 { 5275 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);5275 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5276 5276 5277 5277 /* sanity - the suspend notification will wait on the async stuff. */ 5278 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5279 { 5280 Assert(ataAsyncIOIsIdle(&p Data->aCts[i], false));5281 if (!ataAsyncIOIsIdle(&p Data->aCts[i], false))5278 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5279 { 5280 Assert(ataAsyncIOIsIdle(&pThis->aCts[i], false)); 5281 if (!ataAsyncIOIsIdle(&pThis->aCts[i], false)) 5282 5282 return VERR_SSM_IDE_ASYNC_TIMEOUT; 5283 5283 } … … 5295 5295 static DECLCALLBACK(int) ataSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 5296 5296 { 5297 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);5298 5299 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5300 { 5301 SSMR3PutU8(pSSMHandle, p Data->aCts[i].iSelectedIf);5302 SSMR3PutU8(pSSMHandle, p Data->aCts[i].iAIOIf);5303 SSMR3PutU8(pSSMHandle, p Data->aCts[i].uAsyncIOState);5304 SSMR3PutBool(pSSMHandle, p Data->aCts[i].fChainedTransfer);5305 SSMR3PutBool(pSSMHandle, p Data->aCts[i].fReset);5306 SSMR3PutBool(pSSMHandle, p Data->aCts[i].fRedo);5307 SSMR3PutBool(pSSMHandle, p Data->aCts[i].fRedoIdle);5308 SSMR3PutBool(pSSMHandle, p Data->aCts[i].fRedoDMALastDesc);5309 SSMR3PutMem(pSSMHandle, &p Data->aCts[i].BmDma, sizeof(pData->aCts[i].BmDma));5310 SSMR3PutGCPhys32(pSSMHandle, p Data->aCts[i].pFirstDMADesc);5311 SSMR3PutGCPhys32(pSSMHandle, p Data->aCts[i].pLastDMADesc);5312 SSMR3PutGCPhys32(pSSMHandle, p Data->aCts[i].pRedoDMABuffer);5313 SSMR3PutU32(pSSMHandle, p Data->aCts[i].cbRedoDMABuffer);5314 5315 for (uint32_t j = 0; j < RT_ELEMENTS(p Data->aCts[i].aIfs); j++)5316 { 5317 SSMR3PutBool(pSSMHandle, p Data->aCts[i].aIfs[j].fLBA48);5318 SSMR3PutBool(pSSMHandle, p Data->aCts[i].aIfs[j].fATAPI);5319 SSMR3PutBool(pSSMHandle, p Data->aCts[i].aIfs[j].fIrqPending);5320 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].cMultSectors);5321 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].PCHSGeometry.cCylinders);5322 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].PCHSGeometry.cHeads);5323 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].PCHSGeometry.cSectors);5324 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].cSectorsPerIRQ);5325 SSMR3PutU64(pSSMHandle, p Data->aCts[i].aIfs[j].cTotalSectors);5326 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegFeature);5327 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegFeatureHOB);5328 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegError);5329 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegNSector);5330 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegNSectorHOB);5331 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegSector);5332 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegSectorHOB);5333 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegLCyl);5334 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegLCylHOB);5335 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegHCyl);5336 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegHCylHOB);5337 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegSelect);5338 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegStatus);5339 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegCommand);5340 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATARegDevCtl);5341 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATATransferMode);5342 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uTxDir);5343 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].iBeginTransfer);5344 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].iSourceSink);5345 SSMR3PutBool(pSSMHandle, p Data->aCts[i].aIfs[j].fDMA);5346 SSMR3PutBool(pSSMHandle, p Data->aCts[i].aIfs[j].fATAPITransfer);5347 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].cbTotalTransfer);5348 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].cbElementaryTransfer);5349 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].iIOBufferCur);5350 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].iIOBufferEnd);5351 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].iIOBufferPIODataStart);5352 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].iIOBufferPIODataEnd);5353 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].iATAPILBA);5354 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].cbATAPISector);5355 SSMR3PutMem(pSSMHandle, &p Data->aCts[i].aIfs[j].aATAPICmd, sizeof(pData->aCts[i].aIfs[j].aATAPICmd));5356 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATAPISenseKey);5357 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].uATAPIASC);5358 SSMR3PutU8(pSSMHandle, p Data->aCts[i].aIfs[j].cNotifiedMediaChange);5359 SSMR3PutMem(pSSMHandle, &p Data->aCts[i].aIfs[j].Led, sizeof(pData->aCts[i].aIfs[j].Led));5360 SSMR3PutU32(pSSMHandle, p Data->aCts[i].aIfs[j].cbIOBuffer);5361 if (p Data->aCts[i].aIfs[j].cbIOBuffer)5362 SSMR3PutMem(pSSMHandle, p Data->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer), pData->aCts[i].aIfs[j].cbIOBuffer);5297 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5298 5299 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5300 { 5301 SSMR3PutU8(pSSMHandle, pThis->aCts[i].iSelectedIf); 5302 SSMR3PutU8(pSSMHandle, pThis->aCts[i].iAIOIf); 5303 SSMR3PutU8(pSSMHandle, pThis->aCts[i].uAsyncIOState); 5304 SSMR3PutBool(pSSMHandle, pThis->aCts[i].fChainedTransfer); 5305 SSMR3PutBool(pSSMHandle, pThis->aCts[i].fReset); 5306 SSMR3PutBool(pSSMHandle, pThis->aCts[i].fRedo); 5307 SSMR3PutBool(pSSMHandle, pThis->aCts[i].fRedoIdle); 5308 SSMR3PutBool(pSSMHandle, pThis->aCts[i].fRedoDMALastDesc); 5309 SSMR3PutMem(pSSMHandle, &pThis->aCts[i].BmDma, sizeof(pThis->aCts[i].BmDma)); 5310 SSMR3PutGCPhys32(pSSMHandle, pThis->aCts[i].pFirstDMADesc); 5311 SSMR3PutGCPhys32(pSSMHandle, pThis->aCts[i].pLastDMADesc); 5312 SSMR3PutGCPhys32(pSSMHandle, pThis->aCts[i].pRedoDMABuffer); 5313 SSMR3PutU32(pSSMHandle, pThis->aCts[i].cbRedoDMABuffer); 5314 5315 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 5316 { 5317 SSMR3PutBool(pSSMHandle, pThis->aCts[i].aIfs[j].fLBA48); 5318 SSMR3PutBool(pSSMHandle, pThis->aCts[i].aIfs[j].fATAPI); 5319 SSMR3PutBool(pSSMHandle, pThis->aCts[i].aIfs[j].fIrqPending); 5320 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].cMultSectors); 5321 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].PCHSGeometry.cCylinders); 5322 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].PCHSGeometry.cHeads); 5323 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].PCHSGeometry.cSectors); 5324 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].cSectorsPerIRQ); 5325 SSMR3PutU64(pSSMHandle, pThis->aCts[i].aIfs[j].cTotalSectors); 5326 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegFeature); 5327 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegFeatureHOB); 5328 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegError); 5329 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegNSector); 5330 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegNSectorHOB); 5331 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegSector); 5332 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegSectorHOB); 5333 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegLCyl); 5334 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegLCylHOB); 5335 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegHCyl); 5336 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegHCylHOB); 5337 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegSelect); 5338 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegStatus); 5339 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegCommand); 5340 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATARegDevCtl); 5341 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATATransferMode); 5342 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uTxDir); 5343 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].iBeginTransfer); 5344 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].iSourceSink); 5345 SSMR3PutBool(pSSMHandle, pThis->aCts[i].aIfs[j].fDMA); 5346 SSMR3PutBool(pSSMHandle, pThis->aCts[i].aIfs[j].fATAPITransfer); 5347 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].cbTotalTransfer); 5348 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].cbElementaryTransfer); 5349 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].iIOBufferCur); 5350 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].iIOBufferEnd); 5351 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].iIOBufferPIODataStart); 5352 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].iIOBufferPIODataEnd); 5353 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].iATAPILBA); 5354 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].cbATAPISector); 5355 SSMR3PutMem(pSSMHandle, &pThis->aCts[i].aIfs[j].aATAPICmd, sizeof(pThis->aCts[i].aIfs[j].aATAPICmd)); 5356 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATAPISenseKey); 5357 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].uATAPIASC); 5358 SSMR3PutU8(pSSMHandle, pThis->aCts[i].aIfs[j].cNotifiedMediaChange); 5359 SSMR3PutMem(pSSMHandle, &pThis->aCts[i].aIfs[j].Led, sizeof(pThis->aCts[i].aIfs[j].Led)); 5360 SSMR3PutU32(pSSMHandle, pThis->aCts[i].aIfs[j].cbIOBuffer); 5361 if (pThis->aCts[i].aIfs[j].cbIOBuffer) 5362 SSMR3PutMem(pSSMHandle, pThis->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer), pThis->aCts[i].aIfs[j].cbIOBuffer); 5363 5363 else 5364 Assert(p Data->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer) == NULL);5365 } 5366 } 5367 SSMR3PutBool(pSSMHandle, p Data->fPIIX4);5364 Assert(pThis->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer) == NULL); 5365 } 5366 } 5367 SSMR3PutBool(pSSMHandle, pThis->fPIIX4); 5368 5368 5369 5369 return SSMR3PutU32(pSSMHandle, ~0); /* sanity/terminator */ … … 5381 5381 static DECLCALLBACK(int) ataLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 5382 5382 { 5383 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);5383 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5384 5384 int rc; 5385 5385 uint32_t u32; … … 5394 5394 * Restore valid parts of the PCIATAState structure 5395 5395 */ 5396 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5396 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5397 5397 { 5398 5398 /* integrity check */ 5399 if (!ataAsyncIOIsIdle(&p Data->aCts[i], false))5399 if (!ataAsyncIOIsIdle(&pThis->aCts[i], false)) 5400 5400 { 5401 5401 AssertMsgFailed(("Async I/O for controller %d is active\n", i)); … … 5404 5404 } 5405 5405 5406 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].iSelectedIf);5407 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].iAIOIf);5408 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].uAsyncIOState);5409 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].fChainedTransfer);5410 SSMR3GetBool(pSSMHandle, (bool *)&p Data->aCts[i].fReset);5411 SSMR3GetBool(pSSMHandle, (bool *)&p Data->aCts[i].fRedo);5412 SSMR3GetBool(pSSMHandle, (bool *)&p Data->aCts[i].fRedoIdle);5413 SSMR3GetBool(pSSMHandle, (bool *)&p Data->aCts[i].fRedoDMALastDesc);5414 SSMR3GetMem(pSSMHandle, &p Data->aCts[i].BmDma, sizeof(pData->aCts[i].BmDma));5415 SSMR3GetGCPhys32(pSSMHandle, &p Data->aCts[i].pFirstDMADesc);5416 SSMR3GetGCPhys32(pSSMHandle, &p Data->aCts[i].pLastDMADesc);5417 SSMR3GetGCPhys32(pSSMHandle, &p Data->aCts[i].pRedoDMABuffer);5418 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].cbRedoDMABuffer);5419 5420 for (uint32_t j = 0; j < RT_ELEMENTS(p Data->aCts[i].aIfs); j++)5421 { 5422 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].aIfs[j].fLBA48);5423 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].aIfs[j].fATAPI);5424 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].aIfs[j].fIrqPending);5425 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].cMultSectors);5426 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].PCHSGeometry.cCylinders);5427 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].PCHSGeometry.cHeads);5428 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].PCHSGeometry.cSectors);5429 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].cSectorsPerIRQ);5430 SSMR3GetU64(pSSMHandle, &p Data->aCts[i].aIfs[j].cTotalSectors);5431 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegFeature);5432 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegFeatureHOB);5433 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegError);5434 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegNSector);5435 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegNSectorHOB);5436 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegSector);5437 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegSectorHOB);5438 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegLCyl);5439 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegLCylHOB);5440 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegHCyl);5441 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegHCylHOB);5442 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegSelect);5443 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegStatus);5444 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegCommand);5445 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATARegDevCtl);5446 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATATransferMode);5447 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uTxDir);5448 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].iBeginTransfer);5449 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].iSourceSink);5450 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].aIfs[j].fDMA);5451 SSMR3GetBool(pSSMHandle, &p Data->aCts[i].aIfs[j].fATAPITransfer);5452 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].cbTotalTransfer);5453 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].cbElementaryTransfer);5454 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].iIOBufferCur);5455 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].iIOBufferEnd);5456 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].iIOBufferPIODataStart);5457 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].iIOBufferPIODataEnd);5458 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].iATAPILBA);5459 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].cbATAPISector);5460 SSMR3GetMem(pSSMHandle, &p Data->aCts[i].aIfs[j].aATAPICmd, sizeof(pData->aCts[i].aIfs[j].aATAPICmd));5461 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATAPISenseKey);5462 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].uATAPIASC);5463 SSMR3GetU8(pSSMHandle, &p Data->aCts[i].aIfs[j].cNotifiedMediaChange);5464 SSMR3GetMem(pSSMHandle, &p Data->aCts[i].aIfs[j].Led, sizeof(pData->aCts[i].aIfs[j].Led));5465 SSMR3GetU32(pSSMHandle, &p Data->aCts[i].aIfs[j].cbIOBuffer);5466 if (p Data->aCts[i].aIfs[j].cbIOBuffer)5406 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].iSelectedIf); 5407 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].iAIOIf); 5408 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].uAsyncIOState); 5409 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].fChainedTransfer); 5410 SSMR3GetBool(pSSMHandle, (bool *)&pThis->aCts[i].fReset); 5411 SSMR3GetBool(pSSMHandle, (bool *)&pThis->aCts[i].fRedo); 5412 SSMR3GetBool(pSSMHandle, (bool *)&pThis->aCts[i].fRedoIdle); 5413 SSMR3GetBool(pSSMHandle, (bool *)&pThis->aCts[i].fRedoDMALastDesc); 5414 SSMR3GetMem(pSSMHandle, &pThis->aCts[i].BmDma, sizeof(pThis->aCts[i].BmDma)); 5415 SSMR3GetGCPhys32(pSSMHandle, &pThis->aCts[i].pFirstDMADesc); 5416 SSMR3GetGCPhys32(pSSMHandle, &pThis->aCts[i].pLastDMADesc); 5417 SSMR3GetGCPhys32(pSSMHandle, &pThis->aCts[i].pRedoDMABuffer); 5418 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].cbRedoDMABuffer); 5419 5420 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 5421 { 5422 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].aIfs[j].fLBA48); 5423 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].aIfs[j].fATAPI); 5424 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].aIfs[j].fIrqPending); 5425 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].cMultSectors); 5426 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].PCHSGeometry.cCylinders); 5427 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].PCHSGeometry.cHeads); 5428 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].PCHSGeometry.cSectors); 5429 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].cSectorsPerIRQ); 5430 SSMR3GetU64(pSSMHandle, &pThis->aCts[i].aIfs[j].cTotalSectors); 5431 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegFeature); 5432 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegFeatureHOB); 5433 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegError); 5434 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegNSector); 5435 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegNSectorHOB); 5436 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegSector); 5437 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegSectorHOB); 5438 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegLCyl); 5439 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegLCylHOB); 5440 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegHCyl); 5441 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegHCylHOB); 5442 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegSelect); 5443 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegStatus); 5444 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegCommand); 5445 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATARegDevCtl); 5446 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATATransferMode); 5447 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uTxDir); 5448 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].iBeginTransfer); 5449 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].iSourceSink); 5450 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].aIfs[j].fDMA); 5451 SSMR3GetBool(pSSMHandle, &pThis->aCts[i].aIfs[j].fATAPITransfer); 5452 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].cbTotalTransfer); 5453 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].cbElementaryTransfer); 5454 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].iIOBufferCur); 5455 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].iIOBufferEnd); 5456 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].iIOBufferPIODataStart); 5457 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].iIOBufferPIODataEnd); 5458 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].iATAPILBA); 5459 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].cbATAPISector); 5460 SSMR3GetMem(pSSMHandle, &pThis->aCts[i].aIfs[j].aATAPICmd, sizeof(pThis->aCts[i].aIfs[j].aATAPICmd)); 5461 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATAPISenseKey); 5462 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].uATAPIASC); 5463 SSMR3GetU8(pSSMHandle, &pThis->aCts[i].aIfs[j].cNotifiedMediaChange); 5464 SSMR3GetMem(pSSMHandle, &pThis->aCts[i].aIfs[j].Led, sizeof(pThis->aCts[i].aIfs[j].Led)); 5465 SSMR3GetU32(pSSMHandle, &pThis->aCts[i].aIfs[j].cbIOBuffer); 5466 if (pThis->aCts[i].aIfs[j].cbIOBuffer) 5467 5467 { 5468 if (p Data->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer))5469 SSMR3GetMem(pSSMHandle, p Data->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer), pData->aCts[i].aIfs[j].cbIOBuffer);5468 if (pThis->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer)) 5469 SSMR3GetMem(pSSMHandle, pThis->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer), pThis->aCts[i].aIfs[j].cbIOBuffer); 5470 5470 else 5471 5471 { … … 5476 5476 /* skip the buffer if we're loading for the debugger / animator. */ 5477 5477 uint8_t u8Ignored; 5478 size_t cbLeft = p Data->aCts[i].aIfs[j].cbIOBuffer;5478 size_t cbLeft = pThis->aCts[i].aIfs[j].cbIOBuffer; 5479 5479 while (cbLeft-- > 0) 5480 5480 SSMR3GetU8(pSSMHandle, &u8Ignored); … … 5482 5482 } 5483 5483 else 5484 Assert(p Data->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer) == NULL);5485 } 5486 } 5487 SSMR3GetBool(pSSMHandle, &p Data->fPIIX4);5484 Assert(pThis->aCts[i].aIfs[j].CTX_SUFF(pbIOBuffer) == NULL); 5485 } 5486 } 5487 SSMR3GetBool(pSSMHandle, &pThis->fPIIX4); 5488 5488 5489 5489 rc = SSMR3GetU32(pSSMHandle, &u32); … … 5516 5516 static DECLCALLBACK(int) ataConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 5517 5517 { 5518 PCIATAState *p Data= PDMINS_2_DATA(pDevIns, PCIATAState *);5518 PCIATAState *pThis = PDMINS_2_DATA(pDevIns, PCIATAState *); 5519 5519 PPDMIBASE pBase; 5520 5520 int rc; … … 5528 5528 * Initialize NIL handle values (for the destructor). 5529 5529 */ 5530 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5531 { 5532 p Data->aCts[i].AsyncIOSem = NIL_RTSEMEVENT;5533 p Data->aCts[i].SuspendIOSem = NIL_RTSEMEVENT;5534 p Data->aCts[i].AsyncIORequestMutex = NIL_RTSEMEVENT;5530 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5531 { 5532 pThis->aCts[i].AsyncIOSem = NIL_RTSEMEVENT; 5533 pThis->aCts[i].SuspendIOSem = NIL_RTSEMEVENT; 5534 pThis->aCts[i].AsyncIORequestMutex = NIL_RTSEMEVENT; 5535 5535 } 5536 5536 … … 5561 5561 Assert(DelayIRQMillies < 50); 5562 5562 5563 rc = CFGMR3QueryBoolDef(pCfgHandle, "PIIX4", &p Data->fPIIX4, false);5563 rc = CFGMR3QueryBoolDef(pCfgHandle, "PIIX4", &pThis->fPIIX4, false); 5564 5564 if (RT_FAILURE(rc)) 5565 5565 return PDMDEV_SET_ERROR(pDevIns, rc, 5566 5566 N_("PIIX3 configuration error: failed to read PIIX4 as boolean")); 5567 Log(("%s: fPIIX4=%d\n", __FUNCTION__, p Data->fPIIX4));5567 Log(("%s: fPIIX4=%d\n", __FUNCTION__, pThis->fPIIX4)); 5568 5568 5569 5569 /* … … 5571 5571 */ 5572 5572 /* Status LUN. */ 5573 p Data->IBase.pfnQueryInterface = ataStatus_QueryInterface;5574 p Data->ILeds.pfnQueryStatusLed = ataStatus_QueryStatusLed;5573 pThis->IBase.pfnQueryInterface = ataStatus_QueryInterface; 5574 pThis->ILeds.pfnQueryStatusLed = ataStatus_QueryStatusLed; 5575 5575 5576 5576 /* PCI configuration space. */ 5577 PCIDevSetVendorId(&p Data->dev, 0x8086); /* Intel */5578 if (p Data->fPIIX4)5579 { 5580 PCIDevSetDeviceId(&p Data->dev, 0x7111); /* PIIX4 IDE */5581 PCIDevSetRevisionId(&p Data->dev, 0x01); /* PIIX4E */5582 p Data->dev.config[0x48] = 0x00; /* UDMACTL */5583 p Data->dev.config[0x4A] = 0x00; /* UDMATIM */5584 p Data->dev.config[0x4B] = 0x00;5577 PCIDevSetVendorId(&pThis->dev, 0x8086); /* Intel */ 5578 if (pThis->fPIIX4) 5579 { 5580 PCIDevSetDeviceId(&pThis->dev, 0x7111); /* PIIX4 IDE */ 5581 PCIDevSetRevisionId(&pThis->dev, 0x01); /* PIIX4E */ 5582 pThis->dev.config[0x48] = 0x00; /* UDMACTL */ 5583 pThis->dev.config[0x4A] = 0x00; /* UDMATIM */ 5584 pThis->dev.config[0x4B] = 0x00; 5585 5585 } 5586 5586 else 5587 PCIDevSetDeviceId(&p Data->dev, 0x7010); /* PIIX3 IDE */5588 PCIDevSetCommand( &p Data->dev, PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS | PCI_COMMAND_BUSMASTER);5589 PCIDevSetClassProg( &p Data->dev, 0x8a); /* programming interface = PCI_IDE bus master is supported */5590 PCIDevSetClassSub( &p Data->dev, 0x01); /* class_sub = PCI_IDE */5591 PCIDevSetClassBase( &p Data->dev, 0x01); /* class_base = PCI_mass_storage */5592 PCIDevSetHeaderType(&p Data->dev, 0x00);5593 5594 p Data->pDevIns = pDevIns;5595 p Data->fGCEnabled = fGCEnabled;5596 p Data->fR0Enabled = fR0Enabled;5597 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5598 { 5599 p Data->aCts[i].pDevInsR3 = pDevIns;5600 p Data->aCts[i].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);5601 p Data->aCts[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);5602 p Data->aCts[i].DelayIRQMillies = (uint32_t)DelayIRQMillies;5603 for (uint32_t j = 0; j < RT_ELEMENTS(p Data->aCts[i].aIfs); j++)5604 { 5605 p Data->aCts[i].aIfs[j].iLUN = i * RT_ELEMENTS(pData->aCts) + j;5606 p Data->aCts[i].aIfs[j].pDevInsR3 = pDevIns;5607 p Data->aCts[i].aIfs[j].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);5608 p Data->aCts[i].aIfs[j].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);5609 p Data->aCts[i].aIfs[j].pControllerR3 = &pData->aCts[i];5610 p Data->aCts[i].aIfs[j].pControllerR0 = MMHyperR3ToR0(PDMDevHlpGetVM(pDevIns), &pData->aCts[i]);5611 p Data->aCts[i].aIfs[j].pControllerRC = MMHyperR3ToRC(PDMDevHlpGetVM(pDevIns), &pData->aCts[i]);5612 p Data->aCts[i].aIfs[j].IBase.pfnQueryInterface = ataQueryInterface;5613 p Data->aCts[i].aIfs[j].IMountNotify.pfnMountNotify = ataMountNotify;5614 p Data->aCts[i].aIfs[j].IMountNotify.pfnUnmountNotify = ataUnmountNotify;5615 p Data->aCts[i].aIfs[j].Led.u32Magic = PDMLED_MAGIC;5616 } 5617 } 5618 5619 Assert(RT_ELEMENTS(p Data->aCts) == 2);5620 p Data->aCts[0].irq = 14;5621 p Data->aCts[0].IOPortBase1 = 0x1f0;5622 p Data->aCts[0].IOPortBase2 = 0x3f6;5623 p Data->aCts[1].irq = 15;5624 p Data->aCts[1].IOPortBase1 = 0x170;5625 p Data->aCts[1].IOPortBase2 = 0x376;5587 PCIDevSetDeviceId(&pThis->dev, 0x7010); /* PIIX3 IDE */ 5588 PCIDevSetCommand( &pThis->dev, PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS | PCI_COMMAND_BUSMASTER); 5589 PCIDevSetClassProg( &pThis->dev, 0x8a); /* programming interface = PCI_IDE bus master is supported */ 5590 PCIDevSetClassSub( &pThis->dev, 0x01); /* class_sub = PCI_IDE */ 5591 PCIDevSetClassBase( &pThis->dev, 0x01); /* class_base = PCI_mass_storage */ 5592 PCIDevSetHeaderType(&pThis->dev, 0x00); 5593 5594 pThis->pDevIns = pDevIns; 5595 pThis->fGCEnabled = fGCEnabled; 5596 pThis->fR0Enabled = fR0Enabled; 5597 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5598 { 5599 pThis->aCts[i].pDevInsR3 = pDevIns; 5600 pThis->aCts[i].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 5601 pThis->aCts[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5602 pThis->aCts[i].DelayIRQMillies = (uint32_t)DelayIRQMillies; 5603 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 5604 { 5605 pThis->aCts[i].aIfs[j].iLUN = i * RT_ELEMENTS(pThis->aCts) + j; 5606 pThis->aCts[i].aIfs[j].pDevInsR3 = pDevIns; 5607 pThis->aCts[i].aIfs[j].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 5608 pThis->aCts[i].aIfs[j].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5609 pThis->aCts[i].aIfs[j].pControllerR3 = &pThis->aCts[i]; 5610 pThis->aCts[i].aIfs[j].pControllerR0 = MMHyperR3ToR0(PDMDevHlpGetVM(pDevIns), &pThis->aCts[i]); 5611 pThis->aCts[i].aIfs[j].pControllerRC = MMHyperR3ToRC(PDMDevHlpGetVM(pDevIns), &pThis->aCts[i]); 5612 pThis->aCts[i].aIfs[j].IBase.pfnQueryInterface = ataQueryInterface; 5613 pThis->aCts[i].aIfs[j].IMountNotify.pfnMountNotify = ataMountNotify; 5614 pThis->aCts[i].aIfs[j].IMountNotify.pfnUnmountNotify = ataUnmountNotify; 5615 pThis->aCts[i].aIfs[j].Led.u32Magic = PDMLED_MAGIC; 5616 } 5617 } 5618 5619 Assert(RT_ELEMENTS(pThis->aCts) == 2); 5620 pThis->aCts[0].irq = 14; 5621 pThis->aCts[0].IOPortBase1 = 0x1f0; 5622 pThis->aCts[0].IOPortBase2 = 0x3f6; 5623 pThis->aCts[1].irq = 15; 5624 pThis->aCts[1].IOPortBase1 = 0x170; 5625 pThis->aCts[1].IOPortBase2 = 0x376; 5626 5626 5627 5627 /* … … 5630 5630 * device the slot next to itself. 5631 5631 */ 5632 rc = PDMDevHlpPCIRegister(pDevIns, &p Data->dev);5632 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev); 5633 5633 if (RT_FAILURE(rc)) 5634 5634 return PDMDEV_SET_ERROR(pDevIns, rc, 5635 5635 N_("PIIX3 cannot register PCI device")); 5636 AssertMsg(p Data->dev.devfn == 9 || iInstance != 0, ("pData->dev.devfn=%d\n", pData->dev.devfn));5636 AssertMsg(pThis->dev.devfn == 9 || iInstance != 0, ("pThis->dev.devfn=%d\n", pThis->dev.devfn)); 5637 5637 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 4, 0x10, PCI_ADDRESS_SPACE_IO, ataBMDMAIORangeMap); 5638 5638 if (RT_FAILURE(rc)) … … 5644 5644 * The ports are all hardcoded and enforced by the PIIX3 host bridge controller. 5645 5645 */ 5646 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5647 { 5648 rc = PDMDevHlpIOPortRegister(pDevIns, p Data->aCts[i].IOPortBase1, 8, (RTHCPTR)i,5646 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5647 { 5648 rc = PDMDevHlpIOPortRegister(pDevIns, pThis->aCts[i].IOPortBase1, 8, (RTHCPTR)i, 5649 5649 ataIOPortWrite1, ataIOPortRead1, ataIOPortWriteStr1, ataIOPortReadStr1, "ATA I/O Base 1"); 5650 5650 if (RT_FAILURE(rc)) … … 5653 5653 if (fGCEnabled) 5654 5654 { 5655 rc = PDMDevHlpIOPortRegisterGC(pDevIns, p Data->aCts[i].IOPortBase1, 8, (RTGCPTR)i,5655 rc = PDMDevHlpIOPortRegisterGC(pDevIns, pThis->aCts[i].IOPortBase1, 8, (RTGCPTR)i, 5656 5656 "ataIOPortWrite1", "ataIOPortRead1", "ataIOPortWriteStr1", "ataIOPortReadStr1", "ATA I/O Base 1"); 5657 5657 if (RT_FAILURE(rc)) … … 5662 5662 { 5663 5663 #if 1 5664 rc = PDMDevHlpIOPortRegisterR0(pDevIns, p Data->aCts[i].IOPortBase1, 8, (RTR0PTR)i,5664 rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->aCts[i].IOPortBase1, 8, (RTR0PTR)i, 5665 5665 "ataIOPortWrite1", "ataIOPortRead1", NULL, NULL, "ATA I/O Base 1"); 5666 5666 #else 5667 rc = PDMDevHlpIOPortRegisterR0(pDevIns, p Data->aCts[i].IOPortBase1, 8, (RTR0PTR)i,5667 rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->aCts[i].IOPortBase1, 8, (RTR0PTR)i, 5668 5668 "ataIOPortWrite1", "ataIOPortRead1", "ataIOPortWriteStr1", "ataIOPortReadStr1", "ATA I/O Base 1"); 5669 5669 #endif … … 5672 5672 } 5673 5673 5674 rc = PDMDevHlpIOPortRegister(pDevIns, p Data->aCts[i].IOPortBase2, 1, (RTHCPTR)i,5674 rc = PDMDevHlpIOPortRegister(pDevIns, pThis->aCts[i].IOPortBase2, 1, (RTHCPTR)i, 5675 5675 ataIOPortWrite2, ataIOPortRead2, NULL, NULL, "ATA I/O Base 2"); 5676 5676 if (RT_FAILURE(rc)) … … 5679 5679 if (fGCEnabled) 5680 5680 { 5681 rc = PDMDevHlpIOPortRegisterGC(pDevIns, p Data->aCts[i].IOPortBase2, 1, (RTGCPTR)i,5681 rc = PDMDevHlpIOPortRegisterGC(pDevIns, pThis->aCts[i].IOPortBase2, 1, (RTGCPTR)i, 5682 5682 "ataIOPortWrite2", "ataIOPortRead2", NULL, NULL, "ATA I/O Base 2"); 5683 5683 if (RT_FAILURE(rc)) … … 5686 5686 if (fR0Enabled) 5687 5687 { 5688 rc = PDMDevHlpIOPortRegisterR0(pDevIns, p Data->aCts[i].IOPortBase2, 1, (RTR0PTR)i,5688 rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->aCts[i].IOPortBase2, 1, (RTR0PTR)i, 5689 5689 "ataIOPortWrite2", "ataIOPortRead2", NULL, NULL, "ATA I/O Base 2"); 5690 5690 if (RT_FAILURE(rc)) … … 5692 5692 } 5693 5693 5694 for (uint32_t j = 0; j < RT_ELEMENTS(p Data->aCts[i].aIfs); j++)5695 { 5696 ATADevState *pIf = &p Data->aCts[i].aIfs[j];5694 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 5695 { 5696 ATADevState *pIf = &pThis->aCts[i].aIfs[j]; 5697 5697 PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATADMA, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of ATA DMA transfers.", "/Devices/ATA%d/Unit%d/DMA", i, j); 5698 5698 PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATAPIO, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of ATA PIO transfers.", "/Devices/ATA%d/Unit%d/PIO", i, j); … … 5715 5715 } 5716 5716 #ifdef VBOX_WITH_STATISTICS /** @todo release too. */ 5717 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatAsyncOps, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "The number of async operations.", "/Devices/ATA%d/Async/Operations", i);5717 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncOps, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "The number of async operations.", "/Devices/ATA%d/Async/Operations", i); 5718 5718 /** @todo STAMUNIT_MICROSECS */ 5719 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatAsyncMinWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Minimum wait in microseconds.", "/Devices/ATA%d/Async/MinWait", i);5720 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatAsyncMaxWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Maximum wait in microseconds.", "/Devices/ATA%d/Async/MaxWait", i);5721 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatAsyncTimeUS, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Total time spent in microseconds.","/Devices/ATA%d/Async/TotalTimeUS", i);5722 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatAsyncTime, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling of async operations.", "/Devices/ATA%d/Async/Time", i);5723 PDMDevHlpSTAMRegisterF(pDevIns, &p Data->aCts[i].StatLockWait, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling of locks.", "/Devices/ATA%d/Async/LockWait", i);5719 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncMinWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Minimum wait in microseconds.", "/Devices/ATA%d/Async/MinWait", i); 5720 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncMaxWait, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Maximum wait in microseconds.", "/Devices/ATA%d/Async/MaxWait", i); 5721 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncTimeUS, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, "Total time spent in microseconds.","/Devices/ATA%d/Async/TotalTimeUS", i); 5722 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatAsyncTime, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling of async operations.", "/Devices/ATA%d/Async/Time", i); 5723 PDMDevHlpSTAMRegisterF(pDevIns, &pThis->aCts[i].StatLockWait, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling of locks.", "/Devices/ATA%d/Async/LockWait", i); 5724 5724 #endif /* VBOX_WITH_STATISTICS */ 5725 5725 … … 5727 5727 char szName[24]; 5728 5728 RTStrPrintf(szName, sizeof(szName), "ATA%d", i); 5729 rc = PDMDevHlpCritSectInit(pDevIns, &p Data->aCts[i].lock, szName);5729 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->aCts[i].lock, szName); 5730 5730 if (RT_FAILURE(rc)) 5731 5731 return PDMDEV_SET_ERROR(pDevIns, rc, N_("PIIX3 cannot initialize critical section")); … … 5735 5735 * Attach status driver (optional). 5736 5736 */ 5737 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &p Data->IBase, &pBase, "Status Port");5737 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port"); 5738 5738 if (RT_SUCCESS(rc)) 5739 p Data->pLedsConnector = (PDMILEDCONNECTORS *)pBase->pfnQueryInterface(pBase, PDMINTERFACE_LED_CONNECTORS);5739 pThis->pLedsConnector = (PDMILEDCONNECTORS *)pBase->pfnQueryInterface(pBase, PDMINTERFACE_LED_CONNECTORS); 5740 5740 else if (rc != VERR_PDM_NO_ATTACHED_DRIVER) 5741 5741 { … … 5748 5748 */ 5749 5749 uint32_t cbTotalBuffer = 0; 5750 for (uint32_t i = 0; i < RT_ELEMENTS(p Data->aCts); i++)5751 { 5752 PATACONTROLLER pCtl = &p Data->aCts[i];5750 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 5751 { 5752 PATACONTROLLER pCtl = &pThis->aCts[i]; 5753 5753 5754 5754 /* … … 5770 5770 for (uint32_t j = 0; j < RT_ELEMENTS(pCtl->aIfs); j++) 5771 5771 { 5772 static const char *s_apszDescs[RT_ELEMENTS(p Data->aCts)][RT_ELEMENTS(pCtl->aIfs)] =5772 static const char *s_apszDescs[RT_ELEMENTS(pThis->aCts)][RT_ELEMENTS(pCtl->aIfs)] = 5773 5773 { 5774 5774 { "Primary Master", "Primary Slave" }, … … 5814 5814 5815 5815 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 5816 ATA_SAVED_STATE_VERSION, sizeof(*p Data) + cbTotalBuffer,5816 ATA_SAVED_STATE_VERSION, sizeof(*pThis) + cbTotalBuffer, 5817 5817 ataSaveLoadPrep, ataSaveExec, NULL, 5818 5818 ataSaveLoadPrep, ataLoadExec, NULL); -
trunk/src/VBox/Devices/Storage/DrvBlock.cpp
r11267 r11269 127 127 static DECLCALLBACK(int) drvblockRead(PPDMIBLOCK pInterface, uint64_t off, void *pvBuf, size_t cbRead) 128 128 { 129 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);130 131 /* 132 * Check the state. 133 */ 134 if (!p Data->pDrvMedia)129 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 130 131 /* 132 * Check the state. 133 */ 134 if (!pThis->pDrvMedia) 135 135 { 136 136 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 138 138 } 139 139 140 int rc = p Data->pDrvMedia->pfnRead(pData->pDrvMedia, off, pvBuf, cbRead);140 int rc = pThis->pDrvMedia->pfnRead(pThis->pDrvMedia, off, pvBuf, cbRead); 141 141 return rc; 142 142 } … … 146 146 static DECLCALLBACK(int) drvblockWrite(PPDMIBLOCK pInterface, uint64_t off, const void *pvBuf, size_t cbWrite) 147 147 { 148 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);149 150 /* 151 * Check the state. 152 */ 153 if (!p Data->pDrvMedia)148 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 149 150 /* 151 * Check the state. 152 */ 153 if (!pThis->pDrvMedia) 154 154 { 155 155 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 157 157 } 158 158 159 int rc = p Data->pDrvMedia->pfnWrite(pData->pDrvMedia, off, pvBuf, cbWrite);159 int rc = pThis->pDrvMedia->pfnWrite(pThis->pDrvMedia, off, pvBuf, cbWrite); 160 160 #ifdef VBOX_PERIODIC_FLUSH 161 if (p Data->cbFlushInterval)162 { 163 p Data->cbDataWritten += cbWrite;164 if (p Data->cbDataWritten > pData->cbFlushInterval)161 if (pThis->cbFlushInterval) 162 { 163 pThis->cbDataWritten += cbWrite; 164 if (pThis->cbDataWritten > pThis->cbFlushInterval) 165 165 { 166 p Data->cbDataWritten = 0;167 p Data->pDrvMedia->pfnFlush(pData->pDrvMedia);166 pThis->cbDataWritten = 0; 167 pThis->pDrvMedia->pfnFlush(pThis->pDrvMedia); 168 168 } 169 169 } … … 177 177 static DECLCALLBACK(int) drvblockFlush(PPDMIBLOCK pInterface) 178 178 { 179 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);180 181 /* 182 * Check the state. 183 */ 184 if (!p Data->pDrvMedia)179 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 180 181 /* 182 * Check the state. 183 */ 184 if (!pThis->pDrvMedia) 185 185 { 186 186 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 189 189 190 190 #ifdef VBOX_IGNORE_FLUSH 191 if (p Data->fIgnoreFlush)191 if (pThis->fIgnoreFlush) 192 192 return VINF_SUCCESS; 193 193 #endif /* VBOX_IGNORE_FLUSH */ 194 194 195 int rc = p Data->pDrvMedia->pfnFlush(pData->pDrvMedia);195 int rc = pThis->pDrvMedia->pfnFlush(pThis->pDrvMedia); 196 196 if (rc == VERR_NOT_IMPLEMENTED) 197 197 rc = VINF_SUCCESS; … … 203 203 static DECLCALLBACK(bool) drvblockIsReadOnly(PPDMIBLOCK pInterface) 204 204 { 205 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);206 207 /* 208 * Check the state. 209 */ 210 if (!p Data->pDrvMedia)205 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 206 207 /* 208 * Check the state. 209 */ 210 if (!pThis->pDrvMedia) 211 211 return false; 212 212 213 bool fRc = p Data->pDrvMedia->pfnIsReadOnly(pData->pDrvMedia);213 bool fRc = pThis->pDrvMedia->pfnIsReadOnly(pThis->pDrvMedia); 214 214 return fRc; 215 215 } … … 219 219 static DECLCALLBACK(uint64_t) drvblockGetSize(PPDMIBLOCK pInterface) 220 220 { 221 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);222 223 /* 224 * Check the state. 225 */ 226 if (!p Data->pDrvMedia)221 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 222 223 /* 224 * Check the state. 225 */ 226 if (!pThis->pDrvMedia) 227 227 return 0; 228 228 229 uint64_t cb = p Data->pDrvMedia->pfnGetSize(pData->pDrvMedia);229 uint64_t cb = pThis->pDrvMedia->pfnGetSize(pThis->pDrvMedia); 230 230 LogFlow(("drvblockGetSize: returns %llu\n", cb)); 231 231 return cb; … … 236 236 static DECLCALLBACK(PDMBLOCKTYPE) drvblockGetType(PPDMIBLOCK pInterface) 237 237 { 238 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);239 LogFlow(("drvblockGetType: returns %d\n", p Data->enmType));240 return p Data->enmType;238 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 239 LogFlow(("drvblockGetType: returns %d\n", pThis->enmType)); 240 return pThis->enmType; 241 241 } 242 242 … … 245 245 static DECLCALLBACK(int) drvblockGetUuid(PPDMIBLOCK pInterface, PRTUUID pUuid) 246 246 { 247 PDRVBLOCK p Data= PDMIBLOCK_2_DRVBLOCK(pInterface);247 PDRVBLOCK pThis = PDMIBLOCK_2_DRVBLOCK(pInterface); 248 248 249 249 /* 250 250 * Copy the uuid. 251 251 */ 252 *pUuid = p Data->Uuid;252 *pUuid = pThis->Uuid; 253 253 return VINF_SUCCESS; 254 254 } … … 262 262 static DECLCALLBACK(int) drvblockAsyncReadStart(PPDMIBLOCKASYNC pInterface, uint64_t off, PPDMDATASEG pSeg, unsigned cSeg, size_t cbRead, void *pvUser) 263 263 { 264 PDRVBLOCK p Data= PDMIBLOCKASYNC_2_DRVBLOCK(pInterface);265 266 /* 267 * Check the state. 268 */ 269 if (!p Data->pDrvMediaAsync)264 PDRVBLOCK pThis = PDMIBLOCKASYNC_2_DRVBLOCK(pInterface); 265 266 /* 267 * Check the state. 268 */ 269 if (!pThis->pDrvMediaAsync) 270 270 { 271 271 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 273 273 } 274 274 275 int rc = p Data->pDrvMediaAsync->pfnStartRead(pData->pDrvMediaAsync, off, pSeg, cSeg, cbRead, pvUser);275 int rc = pThis->pDrvMediaAsync->pfnStartRead(pThis->pDrvMediaAsync, off, pSeg, cSeg, cbRead, pvUser); 276 276 return rc; 277 277 } … … 281 281 static DECLCALLBACK(int) drvblockAsyncWriteStart(PPDMIBLOCKASYNC pInterface, uint64_t off, PPDMDATASEG pSeg, unsigned cSeg, size_t cbWrite, void *pvUser) 282 282 { 283 PDRVBLOCK p Data= PDMIBLOCKASYNC_2_DRVBLOCK(pInterface);284 285 /* 286 * Check the state. 287 */ 288 if (!p Data->pDrvMediaAsync)283 PDRVBLOCK pThis = PDMIBLOCKASYNC_2_DRVBLOCK(pInterface); 284 285 /* 286 * Check the state. 287 */ 288 if (!pThis->pDrvMediaAsync) 289 289 { 290 290 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 292 292 } 293 293 294 int rc = p Data->pDrvMediaAsync->pfnStartWrite(pData->pDrvMediaAsync, off, pSeg, cSeg, cbWrite, pvUser);294 int rc = pThis->pDrvMediaAsync->pfnStartWrite(pThis->pDrvMediaAsync, off, pSeg, cSeg, cbWrite, pvUser); 295 295 296 296 return rc; … … 304 304 static DECLCALLBACK(int) drvblockAsyncTransferCompleteNotify(PPDMIMEDIAASYNCPORT pInterface, void *pvUser) 305 305 { 306 PDRVBLOCK p Data= PDMIMEDIAASYNCPORT_2_DRVBLOCK(pInterface);307 308 return p Data->pDrvBlockAsyncPort->pfnTransferCompleteNotify(pData->pDrvBlockAsyncPort, pvUser);306 PDRVBLOCK pThis = PDMIMEDIAASYNCPORT_2_DRVBLOCK(pInterface); 307 308 return pThis->pDrvBlockAsyncPort->pfnTransferCompleteNotify(pThis->pDrvBlockAsyncPort, pvUser); 309 309 } 310 310 … … 318 318 static DECLCALLBACK(int) drvblockGetPCHSGeometry(PPDMIBLOCKBIOS pInterface, PPDMMEDIAGEOMETRY pPCHSGeometry) 319 319 { 320 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);321 322 /* 323 * Check the state. 324 */ 325 if (!p Data->pDrvMedia)320 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 321 322 /* 323 * Check the state. 324 */ 325 if (!pThis->pDrvMedia) 326 326 return VERR_PDM_MEDIA_NOT_MOUNTED; 327 327 … … 329 329 * Use configured/cached values if present. 330 330 */ 331 if ( p Data->PCHSGeometry.cCylinders > 0332 && p Data->PCHSGeometry.cHeads > 0333 && p Data->PCHSGeometry.cSectors > 0)334 { 335 *pPCHSGeometry = p Data->PCHSGeometry;336 LogFlow(("%s: returns VINF_SUCCESS {%d,%d,%d}\n", __FUNCTION__, p Data->PCHSGeometry.cCylinders, pData->PCHSGeometry.cHeads, pData->PCHSGeometry.cSectors));331 if ( pThis->PCHSGeometry.cCylinders > 0 332 && pThis->PCHSGeometry.cHeads > 0 333 && pThis->PCHSGeometry.cSectors > 0) 334 { 335 *pPCHSGeometry = pThis->PCHSGeometry; 336 LogFlow(("%s: returns VINF_SUCCESS {%d,%d,%d}\n", __FUNCTION__, pThis->PCHSGeometry.cCylinders, pThis->PCHSGeometry.cHeads, pThis->PCHSGeometry.cSectors)); 337 337 return VINF_SUCCESS; 338 338 } … … 341 341 * Call media. 342 342 */ 343 int rc = p Data->pDrvMedia->pfnBiosGetPCHSGeometry(pData->pDrvMedia, &pData->PCHSGeometry);343 int rc = pThis->pDrvMedia->pfnBiosGetPCHSGeometry(pThis->pDrvMedia, &pThis->PCHSGeometry); 344 344 345 345 if (RT_SUCCESS(rc)) 346 346 { 347 *pPCHSGeometry = p Data->PCHSGeometry;348 LogFlow(("%s: returns %Vrc {%d,%d,%d}\n", __FUNCTION__, rc, p Data->PCHSGeometry.cCylinders, pData->PCHSGeometry.cHeads, pData->PCHSGeometry.cSectors));347 *pPCHSGeometry = pThis->PCHSGeometry; 348 LogFlow(("%s: returns %Vrc {%d,%d,%d}\n", __FUNCTION__, rc, pThis->PCHSGeometry.cCylinders, pThis->PCHSGeometry.cHeads, pThis->PCHSGeometry.cSectors)); 349 349 } 350 350 else if (rc == VERR_NOT_IMPLEMENTED) … … 361 361 { 362 362 LogFlow(("%s: cCylinders=%d cHeads=%d cSectors=%d\n", __FUNCTION__, pPCHSGeometry->cCylinders, pPCHSGeometry->cHeads, pPCHSGeometry->cSectors)); 363 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);364 365 /* 366 * Check the state. 367 */ 368 if (!p Data->pDrvMedia)363 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 364 365 /* 366 * Check the state. 367 */ 368 if (!pThis->pDrvMedia) 369 369 { 370 370 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 375 375 * Call media. Ignore the not implemented return code. 376 376 */ 377 int rc = p Data->pDrvMedia->pfnBiosSetPCHSGeometry(pData->pDrvMedia, pPCHSGeometry);377 int rc = pThis->pDrvMedia->pfnBiosSetPCHSGeometry(pThis->pDrvMedia, pPCHSGeometry); 378 378 379 379 if ( RT_SUCCESS(rc) 380 380 || rc == VERR_NOT_IMPLEMENTED) 381 381 { 382 p Data->PCHSGeometry = *pPCHSGeometry;382 pThis->PCHSGeometry = *pPCHSGeometry; 383 383 rc = VINF_SUCCESS; 384 384 } … … 390 390 static DECLCALLBACK(int) drvblockGetLCHSGeometry(PPDMIBLOCKBIOS pInterface, PPDMMEDIAGEOMETRY pLCHSGeometry) 391 391 { 392 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);393 394 /* 395 * Check the state. 396 */ 397 if (!p Data->pDrvMedia)392 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 393 394 /* 395 * Check the state. 396 */ 397 if (!pThis->pDrvMedia) 398 398 return VERR_PDM_MEDIA_NOT_MOUNTED; 399 399 … … 401 401 * Use configured/cached values if present. 402 402 */ 403 if ( p Data->LCHSGeometry.cCylinders > 0404 && p Data->LCHSGeometry.cHeads > 0405 && p Data->LCHSGeometry.cSectors > 0)406 { 407 *pLCHSGeometry = p Data->LCHSGeometry;408 LogFlow(("%s: returns VINF_SUCCESS {%d,%d,%d}\n", __FUNCTION__, p Data->LCHSGeometry.cCylinders, pData->LCHSGeometry.cHeads, pData->LCHSGeometry.cSectors));403 if ( pThis->LCHSGeometry.cCylinders > 0 404 && pThis->LCHSGeometry.cHeads > 0 405 && pThis->LCHSGeometry.cSectors > 0) 406 { 407 *pLCHSGeometry = pThis->LCHSGeometry; 408 LogFlow(("%s: returns VINF_SUCCESS {%d,%d,%d}\n", __FUNCTION__, pThis->LCHSGeometry.cCylinders, pThis->LCHSGeometry.cHeads, pThis->LCHSGeometry.cSectors)); 409 409 return VINF_SUCCESS; 410 410 } … … 413 413 * Call media. 414 414 */ 415 int rc = p Data->pDrvMedia->pfnBiosGetLCHSGeometry(pData->pDrvMedia, &pData->LCHSGeometry);415 int rc = pThis->pDrvMedia->pfnBiosGetLCHSGeometry(pThis->pDrvMedia, &pThis->LCHSGeometry); 416 416 417 417 if (RT_SUCCESS(rc)) 418 418 { 419 *pLCHSGeometry = p Data->LCHSGeometry;420 LogFlow(("%s: returns %Vrc {%d,%d,%d}\n", __FUNCTION__, rc, p Data->LCHSGeometry.cCylinders, pData->LCHSGeometry.cHeads, pData->LCHSGeometry.cSectors));419 *pLCHSGeometry = pThis->LCHSGeometry; 420 LogFlow(("%s: returns %Vrc {%d,%d,%d}\n", __FUNCTION__, rc, pThis->LCHSGeometry.cCylinders, pThis->LCHSGeometry.cHeads, pThis->LCHSGeometry.cSectors)); 421 421 } 422 422 else if (rc == VERR_NOT_IMPLEMENTED) … … 433 433 { 434 434 LogFlow(("%s: cCylinders=%d cHeads=%d cSectors=%d\n", __FUNCTION__, pLCHSGeometry->cCylinders, pLCHSGeometry->cHeads, pLCHSGeometry->cSectors)); 435 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);436 437 /* 438 * Check the state. 439 */ 440 if (!p Data->pDrvMedia)435 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 436 437 /* 438 * Check the state. 439 */ 440 if (!pThis->pDrvMedia) 441 441 { 442 442 AssertMsgFailed(("Invalid state! Not mounted!\n")); … … 447 447 * Call media. Ignore the not implemented return code. 448 448 */ 449 int rc = p Data->pDrvMedia->pfnBiosSetLCHSGeometry(pData->pDrvMedia, pLCHSGeometry);449 int rc = pThis->pDrvMedia->pfnBiosSetLCHSGeometry(pThis->pDrvMedia, pLCHSGeometry); 450 450 451 451 if ( RT_SUCCESS(rc) 452 452 || rc == VERR_NOT_IMPLEMENTED) 453 453 { 454 p Data->LCHSGeometry = *pLCHSGeometry;454 pThis->LCHSGeometry = *pLCHSGeometry; 455 455 rc = VINF_SUCCESS; 456 456 } … … 462 462 static DECLCALLBACK(bool) drvblockIsVisible(PPDMIBLOCKBIOS pInterface) 463 463 { 464 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);465 LogFlow(("drvblockIsVisible: returns %d\n", p Data->fBiosVisible));466 return p Data->fBiosVisible;464 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 465 LogFlow(("drvblockIsVisible: returns %d\n", pThis->fBiosVisible)); 466 return pThis->fBiosVisible; 467 467 } 468 468 … … 471 471 static DECLCALLBACK(PDMBLOCKTYPE) drvblockBiosGetType(PPDMIBLOCKBIOS pInterface) 472 472 { 473 PDRVBLOCK p Data= PDMIBLOCKBIOS_2_DRVBLOCK(pInterface);474 LogFlow(("drvblockBiosGetType: returns %d\n", p Data->enmType));475 return p Data->enmType;473 PDRVBLOCK pThis = PDMIBLOCKBIOS_2_DRVBLOCK(pInterface); 474 LogFlow(("drvblockBiosGetType: returns %d\n", pThis->enmType)); 475 return pThis->enmType; 476 476 } 477 477 … … 488 488 { 489 489 LogFlow(("drvblockMount: pszFilename=%p:{%s} pszCoreDriver=%p:{%s}\n", pszFilename, pszFilename, pszCoreDriver, pszCoreDriver)); 490 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);490 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 491 491 492 492 /* 493 493 * Validate state. 494 494 */ 495 if (p Data->pDrvMedia)495 if (pThis->pDrvMedia) 496 496 { 497 497 AssertMsgFailed(("Already mounted\n")); … … 504 504 if (pszFilename) 505 505 { 506 int rc = p Data->pDrvIns->pDrvHlp->pfnMountPrepare(pData->pDrvIns, pszFilename, pszCoreDriver);506 int rc = pThis->pDrvIns->pDrvHlp->pfnMountPrepare(pThis->pDrvIns, pszFilename, pszCoreDriver); 507 507 if (RT_FAILURE(rc)) 508 508 { … … 516 516 */ 517 517 PPDMIBASE pBase; 518 int rc = p Data->pDrvIns->pDrvHlp->pfnAttach(pData->pDrvIns, &pBase);518 int rc = pThis->pDrvIns->pDrvHlp->pfnAttach(pThis->pDrvIns, &pBase); 519 519 if (RT_FAILURE(rc)) 520 520 { … … 523 523 } 524 524 525 p Data->pDrvMedia = (PPDMIMEDIA)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA);526 if (p Data->pDrvMedia)525 pThis->pDrvMedia = (PPDMIMEDIA)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA); 526 if (pThis->pDrvMedia) 527 527 { 528 528 /* 529 529 * Initialize state. 530 530 */ 531 p Data->fLocked = false;532 p Data->PCHSGeometry.cCylinders = 0;533 p Data->PCHSGeometry.cHeads = 0;534 p Data->PCHSGeometry.cSectors = 0;535 p Data->LCHSGeometry.cCylinders = 0;536 p Data->LCHSGeometry.cHeads = 0;537 p Data->LCHSGeometry.cSectors = 0;531 pThis->fLocked = false; 532 pThis->PCHSGeometry.cCylinders = 0; 533 pThis->PCHSGeometry.cHeads = 0; 534 pThis->PCHSGeometry.cSectors = 0; 535 pThis->LCHSGeometry.cCylinders = 0; 536 pThis->LCHSGeometry.cHeads = 0; 537 pThis->LCHSGeometry.cSectors = 0; 538 538 #ifdef VBOX_PERIODIC_FLUSH 539 p Data->cbDataWritten = 0;539 pThis->cbDataWritten = 0; 540 540 #endif /* VBOX_PERIODIC_FLUSH */ 541 541 … … 543 543 * Notify driver/device above us. 544 544 */ 545 if (p Data->pDrvMountNotify)546 p Data->pDrvMountNotify->pfnMountNotify(pData->pDrvMountNotify);545 if (pThis->pDrvMountNotify) 546 pThis->pDrvMountNotify->pfnMountNotify(pThis->pDrvMountNotify); 547 547 Log(("drvblockMount: Success\n")); 548 548 return VINF_SUCCESS; … … 555 555 */ 556 556 AssertMsgFailed(("No media interface!\n")); 557 int rc2 = p Data->pDrvIns->pDrvHlp->pfnDetach(pData->pDrvIns);557 int rc2 = pThis->pDrvIns->pDrvHlp->pfnDetach(pThis->pDrvIns); 558 558 AssertRC(rc2); 559 p Data->pDrvMedia = NULL;559 pThis->pDrvMedia = NULL; 560 560 return rc; 561 561 } … … 565 565 static DECLCALLBACK(int) drvblockUnmount(PPDMIMOUNT pInterface, bool fForce) 566 566 { 567 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);567 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 568 568 569 569 /* 570 570 * Validate state. 571 571 */ 572 if (!p Data->pDrvMedia)572 if (!pThis->pDrvMedia) 573 573 { 574 574 Log(("drvblockUmount: Not mounted\n")); 575 575 return VERR_PDM_MEDIA_NOT_MOUNTED; 576 576 } 577 if (p Data->fLocked && !fForce)577 if (pThis->fLocked && !fForce) 578 578 { 579 579 Log(("drvblockUmount: Locked\n")); … … 582 582 583 583 /* Media is no longer locked even if it was previously. */ 584 p Data->fLocked = false;584 pThis->fLocked = false; 585 585 586 586 /* 587 587 * Detach the media driver and query it's interface. 588 588 */ 589 int rc = p Data->pDrvIns->pDrvHlp->pfnDetach(pData->pDrvIns);589 int rc = pThis->pDrvIns->pDrvHlp->pfnDetach(pThis->pDrvIns); 590 590 if (RT_FAILURE(rc)) 591 591 { … … 593 593 return rc; 594 594 } 595 Assert(!p Data->pDrvMedia);595 Assert(!pThis->pDrvMedia); 596 596 597 597 /* 598 598 * Notify driver/device above us. 599 599 */ 600 if (p Data->pDrvMountNotify)601 p Data->pDrvMountNotify->pfnUnmountNotify(pData->pDrvMountNotify);600 if (pThis->pDrvMountNotify) 601 pThis->pDrvMountNotify->pfnUnmountNotify(pThis->pDrvMountNotify); 602 602 Log(("drvblockUnmount: success\n")); 603 603 return VINF_SUCCESS; … … 608 608 static DECLCALLBACK(bool) drvblockIsMounted(PPDMIMOUNT pInterface) 609 609 { 610 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);611 return p Data->pDrvMedia != NULL;610 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 611 return pThis->pDrvMedia != NULL; 612 612 } 613 613 … … 615 615 static DECLCALLBACK(int) drvblockLock(PPDMIMOUNT pInterface) 616 616 { 617 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);618 Log(("drvblockLock: %d -> %d\n", p Data->fLocked, true));619 p Data->fLocked = true;617 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 618 Log(("drvblockLock: %d -> %d\n", pThis->fLocked, true)); 619 pThis->fLocked = true; 620 620 return VINF_SUCCESS; 621 621 } … … 624 624 static DECLCALLBACK(int) drvblockUnlock(PPDMIMOUNT pInterface) 625 625 { 626 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);627 Log(("drvblockUnlock: %d -> %d\n", p Data->fLocked, false));628 p Data->fLocked = false;626 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 627 Log(("drvblockUnlock: %d -> %d\n", pThis->fLocked, false)); 628 pThis->fLocked = false; 629 629 return VINF_SUCCESS; 630 630 } … … 633 633 static DECLCALLBACK(bool) drvblockIsLocked(PPDMIMOUNT pInterface) 634 634 { 635 PDRVBLOCK p Data= PDMIMOUNT_2_DRVBLOCK(pInterface);636 return p Data->fLocked;635 PDRVBLOCK pThis = PDMIMOUNT_2_DRVBLOCK(pInterface); 636 return pThis->fLocked; 637 637 } 638 638 … … 644 644 { 645 645 PPDMDRVINS pDrvIns = PDMIBASE_2_PDMDRV(pInterface); 646 PDRVBLOCK p Data= PDMINS_2_DATA(pDrvIns, PDRVBLOCK);646 PDRVBLOCK pThis = PDMINS_2_DATA(pDrvIns, PDRVBLOCK); 647 647 switch (enmInterface) 648 648 { … … 650 650 return &pDrvIns->IBase; 651 651 case PDMINTERFACE_BLOCK: 652 return &p Data->IBlock;652 return &pThis->IBlock; 653 653 case PDMINTERFACE_BLOCK_BIOS: 654 return p Data->fBiosVisible ? &pData->IBlockBios : NULL;654 return pThis->fBiosVisible ? &pThis->IBlockBios : NULL; 655 655 case PDMINTERFACE_MOUNT: 656 return p Data->fMountable ? &pData->IMount : NULL;656 return pThis->fMountable ? &pThis->IMount : NULL; 657 657 case PDMINTERFACE_BLOCK_ASYNC: 658 return p Data->pDrvMediaAsync ? &pData->IBlockAsync : NULL;658 return pThis->pDrvMediaAsync ? &pThis->IBlockAsync : NULL; 659 659 case PDMINTERFACE_MEDIA_ASYNC_PORT: 660 return p Data->pDrvBlockAsyncPort ? &pData->IMediaAsyncPort : NULL;660 return pThis->pDrvBlockAsyncPort ? &pThis->IMediaAsyncPort : NULL; 661 661 default: 662 662 return NULL; … … 670 670 static DECLCALLBACK(void) drvblockDetach(PPDMDRVINS pDrvIns) 671 671 { 672 PDRVBLOCK p Data= PDMINS_2_DATA(pDrvIns, PDRVBLOCK);673 p Data->pDrvMedia = NULL;674 p Data->pDrvMediaAsync = NULL;672 PDRVBLOCK pThis = PDMINS_2_DATA(pDrvIns, PDRVBLOCK); 673 pThis->pDrvMedia = NULL; 674 pThis->pDrvMediaAsync = NULL; 675 675 } 676 676 … … 683 683 static DECLCALLBACK(void) drvblockReset(PPDMDRVINS pDrvIns) 684 684 { 685 PDRVBLOCK p Data= PDMINS_2_DATA(pDrvIns, PDRVBLOCK);686 687 p Data->fLocked = false;685 PDRVBLOCK pThis = PDMINS_2_DATA(pDrvIns, PDRVBLOCK); 686 687 pThis->fLocked = false; 688 688 } 689 689 … … 700 700 static DECLCALLBACK(int) drvblockConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 701 701 { 702 PDRVBLOCK p Data= PDMINS_2_DATA(pDrvIns, PDRVBLOCK);702 PDRVBLOCK pThis = PDMINS_2_DATA(pDrvIns, PDRVBLOCK); 703 703 LogFlow(("drvblockConstruct: iInstance=%d\n", pDrvIns->iInstance)); 704 704 … … 716 716 * Initialize most of the data members. 717 717 */ 718 p Data->pDrvIns = pDrvIns;718 pThis->pDrvIns = pDrvIns; 719 719 720 720 /* IBase. */ … … 722 722 723 723 /* IBlock. */ 724 p Data->IBlock.pfnRead = drvblockRead;725 p Data->IBlock.pfnWrite = drvblockWrite;726 p Data->IBlock.pfnFlush = drvblockFlush;727 p Data->IBlock.pfnIsReadOnly = drvblockIsReadOnly;728 p Data->IBlock.pfnGetSize = drvblockGetSize;729 p Data->IBlock.pfnGetType = drvblockGetType;730 p Data->IBlock.pfnGetUuid = drvblockGetUuid;724 pThis->IBlock.pfnRead = drvblockRead; 725 pThis->IBlock.pfnWrite = drvblockWrite; 726 pThis->IBlock.pfnFlush = drvblockFlush; 727 pThis->IBlock.pfnIsReadOnly = drvblockIsReadOnly; 728 pThis->IBlock.pfnGetSize = drvblockGetSize; 729 pThis->IBlock.pfnGetType = drvblockGetType; 730 pThis->IBlock.pfnGetUuid = drvblockGetUuid; 731 731 732 732 /* IBlockBios. */ 733 p Data->IBlockBios.pfnGetPCHSGeometry = drvblockGetPCHSGeometry;734 p Data->IBlockBios.pfnSetPCHSGeometry = drvblockSetPCHSGeometry;735 p Data->IBlockBios.pfnGetLCHSGeometry = drvblockGetLCHSGeometry;736 p Data->IBlockBios.pfnSetLCHSGeometry = drvblockSetLCHSGeometry;737 p Data->IBlockBios.pfnIsVisible = drvblockIsVisible;738 p Data->IBlockBios.pfnGetType = drvblockBiosGetType;733 pThis->IBlockBios.pfnGetPCHSGeometry = drvblockGetPCHSGeometry; 734 pThis->IBlockBios.pfnSetPCHSGeometry = drvblockSetPCHSGeometry; 735 pThis->IBlockBios.pfnGetLCHSGeometry = drvblockGetLCHSGeometry; 736 pThis->IBlockBios.pfnSetLCHSGeometry = drvblockSetLCHSGeometry; 737 pThis->IBlockBios.pfnIsVisible = drvblockIsVisible; 738 pThis->IBlockBios.pfnGetType = drvblockBiosGetType; 739 739 740 740 /* IMount. */ 741 p Data->IMount.pfnMount = drvblockMount;742 p Data->IMount.pfnUnmount = drvblockUnmount;743 p Data->IMount.pfnIsMounted = drvblockIsMounted;744 p Data->IMount.pfnLock = drvblockLock;745 p Data->IMount.pfnUnlock = drvblockUnlock;746 p Data->IMount.pfnIsLocked = drvblockIsLocked;741 pThis->IMount.pfnMount = drvblockMount; 742 pThis->IMount.pfnUnmount = drvblockUnmount; 743 pThis->IMount.pfnIsMounted = drvblockIsMounted; 744 pThis->IMount.pfnLock = drvblockLock; 745 pThis->IMount.pfnUnlock = drvblockUnlock; 746 pThis->IMount.pfnIsLocked = drvblockIsLocked; 747 747 748 748 /* IBlockAsync. */ 749 p Data->IBlockAsync.pfnStartRead = drvblockAsyncReadStart;750 p Data->IBlockAsync.pfnStartWrite = drvblockAsyncWriteStart;749 pThis->IBlockAsync.pfnStartRead = drvblockAsyncReadStart; 750 pThis->IBlockAsync.pfnStartWrite = drvblockAsyncWriteStart; 751 751 752 752 /* IMediaAsyncPort. */ 753 p Data->IMediaAsyncPort.pfnTransferCompleteNotify = drvblockAsyncTransferCompleteNotify;753 pThis->IMediaAsyncPort.pfnTransferCompleteNotify = drvblockAsyncTransferCompleteNotify; 754 754 755 755 /* 756 756 * Get the IBlockPort & IMountNotify interfaces of the above driver/device. 757 757 */ 758 p Data->pDrvBlockPort = (PPDMIBLOCKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_BLOCK_PORT);759 if (!p Data->pDrvBlockPort)758 pThis->pDrvBlockPort = (PPDMIBLOCKPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_BLOCK_PORT); 759 if (!pThis->pDrvBlockPort) 760 760 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_ABOVE, 761 761 N_("No block port interface above")); 762 762 763 763 /* Try to get the optional async block port interface above. */ 764 p Data->pDrvBlockAsyncPort = (PPDMIBLOCKASYNCPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_BLOCK_ASYNC_PORT);765 766 p Data->pDrvMountNotify = (PPDMIMOUNTNOTIFY)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_MOUNT_NOTIFY);764 pThis->pDrvBlockAsyncPort = (PPDMIBLOCKASYNCPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_BLOCK_ASYNC_PORT); 765 766 pThis->pDrvMountNotify = (PPDMIMOUNTNOTIFY)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_MOUNT_NOTIFY); 767 767 768 768 /* … … 775 775 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_BLOCK_NO_TYPE, N_("Failed to obtain the type")); 776 776 if (!strcmp(psz, "HardDisk")) 777 p Data->enmType = PDMBLOCKTYPE_HARD_DISK;777 pThis->enmType = PDMBLOCKTYPE_HARD_DISK; 778 778 else if (!strcmp(psz, "DVD")) 779 p Data->enmType = PDMBLOCKTYPE_DVD;779 pThis->enmType = PDMBLOCKTYPE_DVD; 780 780 else if (!strcmp(psz, "CDROM")) 781 p Data->enmType = PDMBLOCKTYPE_CDROM;781 pThis->enmType = PDMBLOCKTYPE_CDROM; 782 782 else if (!strcmp(psz, "Floppy 2.88")) 783 p Data->enmType = PDMBLOCKTYPE_FLOPPY_2_88;783 pThis->enmType = PDMBLOCKTYPE_FLOPPY_2_88; 784 784 else if (!strcmp(psz, "Floppy 1.44")) 785 p Data->enmType = PDMBLOCKTYPE_FLOPPY_1_44;785 pThis->enmType = PDMBLOCKTYPE_FLOPPY_1_44; 786 786 else if (!strcmp(psz, "Floppy 1.20")) 787 p Data->enmType = PDMBLOCKTYPE_FLOPPY_1_20;787 pThis->enmType = PDMBLOCKTYPE_FLOPPY_1_20; 788 788 else if (!strcmp(psz, "Floppy 720")) 789 p Data->enmType = PDMBLOCKTYPE_FLOPPY_720;789 pThis->enmType = PDMBLOCKTYPE_FLOPPY_720; 790 790 else if (!strcmp(psz, "Floppy 360")) 791 p Data->enmType = PDMBLOCKTYPE_FLOPPY_360;791 pThis->enmType = PDMBLOCKTYPE_FLOPPY_360; 792 792 else 793 793 { … … 797 797 return VERR_PDM_BLOCK_UNKNOWN_TYPE; 798 798 } 799 Log2(("drvblockConstruct: enmType=%d\n", p Data->enmType));799 Log2(("drvblockConstruct: enmType=%d\n", pThis->enmType)); 800 800 MMR3HeapFree(psz); psz = NULL; 801 801 802 802 /* Mountable */ 803 rc = CFGMR3QueryBoolDef(pCfgHandle, "Mountable", &p Data->fMountable, false);803 rc = CFGMR3QueryBoolDef(pCfgHandle, "Mountable", &pThis->fMountable, false); 804 804 if (RT_FAILURE(rc)) 805 805 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"Mountable\" from the config")); 806 806 807 807 /* Locked */ 808 rc = CFGMR3QueryBoolDef(pCfgHandle, "Locked", &p Data->fLocked, false);808 rc = CFGMR3QueryBoolDef(pCfgHandle, "Locked", &pThis->fLocked, false); 809 809 if (RT_FAILURE(rc)) 810 810 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"Locked\" from the config")); 811 811 812 812 /* BIOS visible */ 813 rc = CFGMR3QueryBoolDef(pCfgHandle, "BIOSVisible", &p Data->fBiosVisible, true);813 rc = CFGMR3QueryBoolDef(pCfgHandle, "BIOSVisible", &pThis->fBiosVisible, true); 814 814 if (RT_FAILURE(rc)) 815 815 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"BIOSVisible\" from the config")); … … 818 818 819 819 /* Cylinders */ 820 rc = CFGMR3QueryU32Def(pCfgHandle, "Cylinders", &p Data->LCHSGeometry.cCylinders, 0);820 rc = CFGMR3QueryU32Def(pCfgHandle, "Cylinders", &pThis->LCHSGeometry.cCylinders, 0); 821 821 if (RT_FAILURE(rc)) 822 822 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"Cylinders\" from the config")); 823 823 824 824 /* Heads */ 825 rc = CFGMR3QueryU32Def(pCfgHandle, "Heads", &p Data->LCHSGeometry.cHeads, 0);825 rc = CFGMR3QueryU32Def(pCfgHandle, "Heads", &pThis->LCHSGeometry.cHeads, 0); 826 826 if (RT_FAILURE(rc)) 827 827 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"Heads\" from the config")); 828 828 829 829 /* Sectors */ 830 rc = CFGMR3QueryU32Def(pCfgHandle, "Sectors", &p Data->LCHSGeometry.cSectors, 0);830 rc = CFGMR3QueryU32Def(pCfgHandle, "Sectors", &pThis->LCHSGeometry.cSectors, 0); 831 831 if (RT_FAILURE(rc)) 832 832 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"Sectors\" from the config")); … … 835 835 rc = CFGMR3QueryStringAlloc(pCfgHandle, "Uuid", &psz); 836 836 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 837 RTUuidClear(&p Data->Uuid);837 RTUuidClear(&pThis->Uuid); 838 838 else if (RT_SUCCESS(rc)) 839 839 { 840 rc = RTUuidFromStr(&p Data->Uuid, psz);840 rc = RTUuidFromStr(&pThis->Uuid, psz); 841 841 if (RT_FAILURE(rc)) 842 842 { … … 852 852 853 853 #ifdef VBOX_PERIODIC_FLUSH 854 rc = CFGMR3QueryU32Def(pCfgHandle, "FlushInterval", &p Data->cbFlushInterval, 0);854 rc = CFGMR3QueryU32Def(pCfgHandle, "FlushInterval", &pThis->cbFlushInterval, 0); 855 855 if (RT_FAILURE(rc)) 856 856 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"FlushInterval\" from the config")); … … 858 858 859 859 #ifdef VBOX_IGNORE_FLUSH 860 rc = CFGMR3QueryBoolDef(pCfgHandle, "IgnoreFlush", &p Data->fIgnoreFlush, true);860 rc = CFGMR3QueryBoolDef(pCfgHandle, "IgnoreFlush", &pThis->fIgnoreFlush, true); 861 861 if (RT_FAILURE(rc)) 862 862 return PDMDRV_SET_ERROR(pDrvIns, rc, N_("Failed to query \"IgnoreFlush\" from the config")); … … 869 869 rc = pDrvIns->pDrvHlp->pfnAttach(pDrvIns, &pBase); 870 870 if ( rc == VERR_PDM_NO_ATTACHED_DRIVER 871 && p Data->enmType != PDMBLOCKTYPE_HARD_DISK)871 && pThis->enmType != PDMBLOCKTYPE_HARD_DISK) 872 872 return VINF_SUCCESS; 873 873 if (RT_FAILURE(rc)) … … 876 876 return rc; 877 877 } 878 p Data->pDrvMedia = (PPDMIMEDIA)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA);879 if (!p Data->pDrvMedia)878 pThis->pDrvMedia = (PPDMIMEDIA)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA); 879 if (!pThis->pDrvMedia) 880 880 return PDMDRV_SET_ERROR(pDrvIns, VERR_PDM_MISSING_INTERFACE_BELOW, 881 881 N_("No media or async media interface below")); 882 882 883 883 /* Try to get the optional async interface. */ 884 p Data->pDrvMediaAsync = (PPDMIMEDIAASYNC)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA_ASYNC);885 886 if (RTUuidIsNull(&p Data->Uuid))887 { 888 if (p Data->enmType == PDMBLOCKTYPE_HARD_DISK)889 p Data->pDrvMedia->pfnGetUuid(pData->pDrvMedia, &pData->Uuid);884 pThis->pDrvMediaAsync = (PPDMIMEDIAASYNC)pBase->pfnQueryInterface(pBase, PDMINTERFACE_MEDIA_ASYNC); 885 886 if (RTUuidIsNull(&pThis->Uuid)) 887 { 888 if (pThis->enmType == PDMBLOCKTYPE_HARD_DISK) 889 pThis->pDrvMedia->pfnGetUuid(pThis->pDrvMedia, &pThis->Uuid); 890 890 } 891 891 -
trunk/src/VBox/Devices/Storage/DrvMediaISO.cpp
r11267 r11269 99 99 static DECLCALLBACK(int) drvMediaISOConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 100 100 { 101 PDRVMEDIAISO p Data= PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO);101 PDRVMEDIAISO pThis = PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO); 102 102 103 103 /* 104 104 * Init the static parts. 105 105 */ 106 p Data->pDrvIns = pDrvIns;107 p Data->File = NIL_RTFILE;106 pThis->pDrvIns = pDrvIns; 107 pThis->File = NIL_RTFILE; 108 108 /* IBase */ 109 109 pDrvIns->IBase.pfnQueryInterface = drvMediaISOQueryInterface; 110 110 /* IMedia */ 111 p Data->IMedia.pfnRead = drvMediaISORead;112 p Data->IMedia.pfnWrite = drvMediaISOWrite;113 p Data->IMedia.pfnFlush = drvMediaISOFlush;114 p Data->IMedia.pfnGetSize = drvMediaISOGetSize;115 p Data->IMedia.pfnGetUuid = drvMediaISOGetUuid;116 p Data->IMedia.pfnIsReadOnly = drvMediaISOIsReadOnly;117 p Data->IMedia.pfnBiosGetPCHSGeometry = drvMediaISOBiosGetPCHSGeometry;118 p Data->IMedia.pfnBiosSetPCHSGeometry = drvMediaISOBiosSetPCHSGeometry;119 p Data->IMedia.pfnBiosGetLCHSGeometry = drvMediaISOBiosGetLCHSGeometry;120 p Data->IMedia.pfnBiosSetLCHSGeometry = drvMediaISOBiosSetLCHSGeometry;111 pThis->IMedia.pfnRead = drvMediaISORead; 112 pThis->IMedia.pfnWrite = drvMediaISOWrite; 113 pThis->IMedia.pfnFlush = drvMediaISOFlush; 114 pThis->IMedia.pfnGetSize = drvMediaISOGetSize; 115 pThis->IMedia.pfnGetUuid = drvMediaISOGetUuid; 116 pThis->IMedia.pfnIsReadOnly = drvMediaISOIsReadOnly; 117 pThis->IMedia.pfnBiosGetPCHSGeometry = drvMediaISOBiosGetPCHSGeometry; 118 pThis->IMedia.pfnBiosSetPCHSGeometry = drvMediaISOBiosSetPCHSGeometry; 119 pThis->IMedia.pfnBiosGetLCHSGeometry = drvMediaISOBiosGetLCHSGeometry; 120 pThis->IMedia.pfnBiosSetLCHSGeometry = drvMediaISOBiosSetLCHSGeometry; 121 121 122 122 /* … … 134 134 * Open the image. 135 135 */ 136 rc = RTFileOpen(&p Data->File, pszName,136 rc = RTFileOpen(&pThis->File, pszName, 137 137 RTFILE_O_READ | RTFILE_O_OPEN | RTFILE_O_DENY_WRITE); 138 138 if (RT_SUCCESS(rc)) 139 139 { 140 140 LogFlow(("drvMediaISOConstruct: ISO image '%s' opened successfully.\n", pszName)); 141 p Data->pszFilename = pszName;141 pThis->pszFilename = pszName; 142 142 } 143 143 else … … 161 161 static DECLCALLBACK(void) drvMediaISODestruct(PPDMDRVINS pDrvIns) 162 162 { 163 PDRVMEDIAISO p Data= PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO);164 LogFlow(("drvMediaISODestruct: '%s'\n", p Data->pszFilename));165 166 if (p Data->File != NIL_RTFILE)167 { 168 RTFileClose(p Data->File);169 p Data->File = NIL_RTFILE;170 } 171 if (p Data->pszFilename)172 MMR3HeapFree(p Data->pszFilename);163 PDRVMEDIAISO pThis = PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO); 164 LogFlow(("drvMediaISODestruct: '%s'\n", pThis->pszFilename)); 165 166 if (pThis->File != NIL_RTFILE) 167 { 168 RTFileClose(pThis->File); 169 pThis->File = NIL_RTFILE; 170 } 171 if (pThis->pszFilename) 172 MMR3HeapFree(pThis->pszFilename); 173 173 } 174 174 … … 177 177 static DECLCALLBACK(uint64_t) drvMediaISOGetSize(PPDMIMEDIA pInterface) 178 178 { 179 PDRVMEDIAISO p Data= PDMIMEDIA_2_DRVMEDIAISO(pInterface);180 LogFlow(("drvMediaISOGetSize: '%s'\n", p Data->pszFilename));179 PDRVMEDIAISO pThis = PDMIMEDIA_2_DRVMEDIAISO(pInterface); 180 LogFlow(("drvMediaISOGetSize: '%s'\n", pThis->pszFilename)); 181 181 182 182 uint64_t cbFile; 183 int rc = RTFileGetSize(p Data->File, &cbFile);183 int rc = RTFileGetSize(pThis->File, &cbFile); 184 184 if (RT_SUCCESS(rc)) 185 185 { 186 LogFlow(("drvMediaISOGetSize: returns %lld (%s)\n", cbFile, p Data->pszFilename));186 LogFlow(("drvMediaISOGetSize: returns %lld (%s)\n", cbFile, pThis->pszFilename)); 187 187 return cbFile; 188 188 } 189 189 190 AssertMsgFailed(("Error querying ISO file size, rc=%Vrc. (%s)\n", rc, p Data->pszFilename));190 AssertMsgFailed(("Error querying ISO file size, rc=%Vrc. (%s)\n", rc, pThis->pszFilename)); 191 191 return 0; 192 192 } … … 228 228 static DECLCALLBACK(int) drvMediaISORead(PPDMIMEDIA pInterface, uint64_t off, void *pvBuf, size_t cbRead) 229 229 { 230 PDRVMEDIAISO p Data= PDMIMEDIA_2_DRVMEDIAISO(pInterface);231 LogFlow(("drvMediaISORead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n", off, pvBuf, cbRead, p Data->pszFilename));232 233 Assert(p Data->File);230 PDRVMEDIAISO pThis = PDMIMEDIA_2_DRVMEDIAISO(pInterface); 231 LogFlow(("drvMediaISORead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n", off, pvBuf, cbRead, pThis->pszFilename)); 232 233 Assert(pThis->File); 234 234 Assert(pvBuf); 235 235 … … 237 237 * Seek to the position and read. 238 238 */ 239 int rc = RTFileSeek(p Data->File, off, RTFILE_SEEK_BEGIN, NULL);239 int rc = RTFileSeek(pThis->File, off, RTFILE_SEEK_BEGIN, NULL); 240 240 if (RT_SUCCESS(rc)) 241 241 { 242 rc = RTFileRead(p Data->File, pvBuf, cbRead, NULL);242 rc = RTFileRead(pThis->File, pvBuf, cbRead, NULL); 243 243 if (RT_SUCCESS(rc)) 244 244 { 245 245 Log2(("drvMediaISORead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n" 246 246 "%16.*Vhxd\n", 247 off, pvBuf, cbRead, p Data->pszFilename,247 off, pvBuf, cbRead, pThis->pszFilename, 248 248 cbRead, pvBuf)); 249 249 } 250 250 else 251 251 AssertMsgFailed(("RTFileRead(%d, %p, %#x) -> %Vrc (off=%#llx '%s')\n", 252 p Data->File, pvBuf, cbRead, rc, off, pData->pszFilename));252 pThis->File, pvBuf, cbRead, rc, off, pThis->pszFilename)); 253 253 } 254 254 else 255 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", p Data->File, off, rc));255 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", pThis->File, off, rc)); 256 256 LogFlow(("drvMediaISORead: returns %Vrc\n", rc)); 257 257 return rc; … … 302 302 { 303 303 PPDMDRVINS pDrvIns = PDMIBASE_2_DRVINS(pInterface); 304 PDRVMEDIAISO p Data= PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO);304 PDRVMEDIAISO pThis = PDMINS_2_DATA(pDrvIns, PDRVMEDIAISO); 305 305 switch (enmInterface) 306 306 { … … 308 308 return &pDrvIns->IBase; 309 309 case PDMINTERFACE_MEDIA: 310 return &p Data->IMedia;310 return &pThis->IMedia; 311 311 default: 312 312 return NULL; -
trunk/src/VBox/Devices/Storage/DrvRawImage.cpp
r11267 r11269 102 102 static DECLCALLBACK(int) drvRawImageConstruct(PPDMDRVINS pDrvIns, PCFGMNODE pCfgHandle) 103 103 { 104 PDRVRAWIMAGE p Data= PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE);104 PDRVRAWIMAGE pThis = PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE); 105 105 106 106 /* 107 107 * Init the static parts. 108 108 */ 109 p Data->pDrvIns = pDrvIns;110 p Data->File = NIL_RTFILE;109 pThis->pDrvIns = pDrvIns; 110 pThis->File = NIL_RTFILE; 111 111 /* IBase */ 112 112 pDrvIns->IBase.pfnQueryInterface = drvRawImageQueryInterface; 113 113 /* IMedia */ 114 p Data->IMedia.pfnRead = drvRawImageRead;115 p Data->IMedia.pfnWrite = drvRawImageWrite;116 p Data->IMedia.pfnFlush = drvRawImageFlush;117 p Data->IMedia.pfnGetSize = drvRawImageGetSize;118 p Data->IMedia.pfnGetUuid = drvRawImageGetUuid;119 p Data->IMedia.pfnIsReadOnly = drvRawImageIsReadOnly;120 p Data->IMedia.pfnBiosGetPCHSGeometry = drvRawImageBiosGetPCHSGeometry;121 p Data->IMedia.pfnBiosSetPCHSGeometry = drvRawImageBiosSetPCHSGeometry;122 p Data->IMedia.pfnBiosGetLCHSGeometry = drvRawImageBiosGetLCHSGeometry;123 p Data->IMedia.pfnBiosSetLCHSGeometry = drvRawImageBiosSetLCHSGeometry;114 pThis->IMedia.pfnRead = drvRawImageRead; 115 pThis->IMedia.pfnWrite = drvRawImageWrite; 116 pThis->IMedia.pfnFlush = drvRawImageFlush; 117 pThis->IMedia.pfnGetSize = drvRawImageGetSize; 118 pThis->IMedia.pfnGetUuid = drvRawImageGetUuid; 119 pThis->IMedia.pfnIsReadOnly = drvRawImageIsReadOnly; 120 pThis->IMedia.pfnBiosGetPCHSGeometry = drvRawImageBiosGetPCHSGeometry; 121 pThis->IMedia.pfnBiosSetPCHSGeometry = drvRawImageBiosSetPCHSGeometry; 122 pThis->IMedia.pfnBiosGetLCHSGeometry = drvRawImageBiosGetLCHSGeometry; 123 pThis->IMedia.pfnBiosSetLCHSGeometry = drvRawImageBiosSetLCHSGeometry; 124 124 125 125 /* … … 140 140 * Open the image. 141 141 */ 142 rc = RTFileOpen(&p Data->File, pszName,142 rc = RTFileOpen(&pThis->File, pszName, 143 143 RTFILE_O_READWRITE | RTFILE_O_OPEN | RTFILE_O_DENY_NONE); 144 144 if (RT_SUCCESS(rc)) 145 145 { 146 146 LogFlow(("drvRawImageConstruct: Raw image '%s' opened successfully.\n", pszName)); 147 p Data->pszFilename = pszName;148 p Data->fReadOnly = false;147 pThis->pszFilename = pszName; 148 pThis->fReadOnly = false; 149 149 } 150 150 else 151 151 { 152 rc = RTFileOpen(&p Data->File, pszName,152 rc = RTFileOpen(&pThis->File, pszName, 153 153 RTFILE_O_READ | RTFILE_O_OPEN | RTFILE_O_DENY_NONE); 154 154 if (RT_SUCCESS(rc)) 155 155 { 156 156 LogFlow(("drvRawImageConstruct: Raw image '%s' opened successfully.\n", pszName)); 157 p Data->pszFilename = pszName;158 p Data->fReadOnly = true;157 pThis->pszFilename = pszName; 158 pThis->fReadOnly = true; 159 159 } 160 160 else … … 179 179 static DECLCALLBACK(void) drvRawImageDestruct(PPDMDRVINS pDrvIns) 180 180 { 181 PDRVRAWIMAGE p Data= PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE);182 LogFlow(("drvRawImageDestruct: '%s'\n", p Data->pszFilename));183 184 if (p Data->File != NIL_RTFILE)185 { 186 RTFileClose(p Data->File);187 p Data->File = NIL_RTFILE;188 } 189 if (p Data->pszFilename)190 MMR3HeapFree(p Data->pszFilename);181 PDRVRAWIMAGE pThis = PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE); 182 LogFlow(("drvRawImageDestruct: '%s'\n", pThis->pszFilename)); 183 184 if (pThis->File != NIL_RTFILE) 185 { 186 RTFileClose(pThis->File); 187 pThis->File = NIL_RTFILE; 188 } 189 if (pThis->pszFilename) 190 MMR3HeapFree(pThis->pszFilename); 191 191 } 192 192 … … 195 195 static DECLCALLBACK(uint64_t) drvRawImageGetSize(PPDMIMEDIA pInterface) 196 196 { 197 PDRVRAWIMAGE p Data= PDMIMEDIA_2_DRVRAWIMAGE(pInterface);198 LogFlow(("drvRawImageGetSize: '%s'\n", p Data->pszFilename));197 PDRVRAWIMAGE pThis = PDMIMEDIA_2_DRVRAWIMAGE(pInterface); 198 LogFlow(("drvRawImageGetSize: '%s'\n", pThis->pszFilename)); 199 199 200 200 uint64_t cbFile; 201 int rc = RTFileGetSize(p Data->File, &cbFile);201 int rc = RTFileGetSize(pThis->File, &cbFile); 202 202 if (RT_SUCCESS(rc)) 203 203 { 204 LogFlow(("drvRawImageGetSize: returns %lld (%s)\n", cbFile, p Data->pszFilename));204 LogFlow(("drvRawImageGetSize: returns %lld (%s)\n", cbFile, pThis->pszFilename)); 205 205 return cbFile; 206 206 } 207 207 208 AssertMsgFailed(("Error querying Raw image file size, rc=%Vrc. (%s)\n", rc, p Data->pszFilename));208 AssertMsgFailed(("Error querying Raw image file size, rc=%Vrc. (%s)\n", rc, pThis->pszFilename)); 209 209 return 0; 210 210 } … … 246 246 static DECLCALLBACK(int) drvRawImageRead(PPDMIMEDIA pInterface, uint64_t off, void *pvBuf, size_t cbRead) 247 247 { 248 PDRVRAWIMAGE p Data= PDMIMEDIA_2_DRVRAWIMAGE(pInterface);249 LogFlow(("drvRawImageRead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n", off, pvBuf, cbRead, p Data->pszFilename));250 251 Assert(p Data->File);248 PDRVRAWIMAGE pThis = PDMIMEDIA_2_DRVRAWIMAGE(pInterface); 249 LogFlow(("drvRawImageRead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n", off, pvBuf, cbRead, pThis->pszFilename)); 250 251 Assert(pThis->File); 252 252 Assert(pvBuf); 253 253 … … 255 255 * Seek to the position and read. 256 256 */ 257 int rc = RTFileSeek(p Data->File, off, RTFILE_SEEK_BEGIN, NULL);257 int rc = RTFileSeek(pThis->File, off, RTFILE_SEEK_BEGIN, NULL); 258 258 if (RT_SUCCESS(rc)) 259 259 { 260 rc = RTFileRead(p Data->File, pvBuf, cbRead, NULL);260 rc = RTFileRead(pThis->File, pvBuf, cbRead, NULL); 261 261 if (RT_SUCCESS(rc)) 262 262 { 263 263 Log2(("drvRawImageRead: off=%#llx pvBuf=%p cbRead=%#x (%s)\n" 264 264 "%16.*Vhxd\n", 265 off, pvBuf, cbRead, p Data->pszFilename,265 off, pvBuf, cbRead, pThis->pszFilename, 266 266 cbRead, pvBuf)); 267 267 } 268 268 else 269 269 AssertMsgFailed(("RTFileRead(%d, %p, %#x) -> %Vrc (off=%#llx '%s')\n", 270 p Data->File, pvBuf, cbRead, rc, off, pData->pszFilename));270 pThis->File, pvBuf, cbRead, rc, off, pThis->pszFilename)); 271 271 } 272 272 else 273 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", p Data->File, off, rc));273 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", pThis->File, off, rc)); 274 274 LogFlow(("drvRawImageRead: returns %Vrc\n", rc)); 275 275 return rc; … … 280 280 static DECLCALLBACK(int) drvRawImageWrite(PPDMIMEDIA pInterface, uint64_t off, const void *pvBuf, size_t cbWrite) 281 281 { 282 PDRVRAWIMAGE p Data= PDMIMEDIA_2_DRVRAWIMAGE(pInterface);283 LogFlow(("drvRawImageWrite: off=%#llx pvBuf=%p cbWrite=%#x (%s)\n", off, pvBuf, cbWrite, p Data->pszFilename));284 285 Assert(p Data->File);282 PDRVRAWIMAGE pThis = PDMIMEDIA_2_DRVRAWIMAGE(pInterface); 283 LogFlow(("drvRawImageWrite: off=%#llx pvBuf=%p cbWrite=%#x (%s)\n", off, pvBuf, cbWrite, pThis->pszFilename)); 284 285 Assert(pThis->File); 286 286 Assert(pvBuf); 287 287 … … 289 289 * Seek to the position and write. 290 290 */ 291 int rc = RTFileSeek(p Data->File, off, RTFILE_SEEK_BEGIN, NULL);291 int rc = RTFileSeek(pThis->File, off, RTFILE_SEEK_BEGIN, NULL); 292 292 if (RT_SUCCESS(rc)) 293 293 { 294 rc = RTFileWrite(p Data->File, pvBuf, cbWrite, NULL);294 rc = RTFileWrite(pThis->File, pvBuf, cbWrite, NULL); 295 295 if (RT_SUCCESS(rc)) 296 296 { 297 297 Log2(("drvRawImageWrite: off=%#llx pvBuf=%p cbWrite=%#x (%s)\n" 298 298 "%16.*Vhxd\n", 299 off, pvBuf, cbWrite, p Data->pszFilename,299 off, pvBuf, cbWrite, pThis->pszFilename, 300 300 cbWrite, pvBuf)); 301 301 } 302 302 else 303 303 AssertMsgFailed(("RTFileWrite(%d, %p, %#x) -> %Vrc (off=%#llx '%s')\n", 304 p Data->File, pvBuf, cbWrite, rc, off, pData->pszFilename));304 pThis->File, pvBuf, cbWrite, rc, off, pThis->pszFilename)); 305 305 } 306 306 else 307 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", p Data->File, off, rc));307 AssertMsgFailed(("RTFileSeek(%d,%#llx,) -> %Vrc\n", pThis->File, off, rc)); 308 308 LogFlow(("drvRawImageWrite: returns %Vrc\n", rc)); 309 309 return rc; … … 314 314 static DECLCALLBACK(int) drvRawImageFlush(PPDMIMEDIA pInterface) 315 315 { 316 PDRVRAWIMAGE p Data= PDMIMEDIA_2_DRVRAWIMAGE(pInterface);317 LogFlow(("drvRawImageFlush: (%s)\n", p Data->pszFilename));318 319 Assert(p Data->File != NIL_RTFILE);320 int rc = RTFileFlush(p Data->File);316 PDRVRAWIMAGE pThis = PDMIMEDIA_2_DRVRAWIMAGE(pInterface); 317 LogFlow(("drvRawImageFlush: (%s)\n", pThis->pszFilename)); 318 319 Assert(pThis->File != NIL_RTFILE); 320 int rc = RTFileFlush(pThis->File); 321 321 LogFlow(("drvRawImageFlush: returns %Vrc\n", rc)); 322 322 return rc; … … 335 335 static DECLCALLBACK(bool) drvRawImageIsReadOnly(PPDMIMEDIA pInterface) 336 336 { 337 PDRVRAWIMAGE p Data= PDMIMEDIA_2_DRVRAWIMAGE(pInterface);338 return p Data->fReadOnly;337 PDRVRAWIMAGE pThis = PDMIMEDIA_2_DRVRAWIMAGE(pInterface); 338 return pThis->fReadOnly; 339 339 } 340 340 … … 352 352 { 353 353 PPDMDRVINS pDrvIns = PDMIBASE_2_DRVINS(pInterface); 354 PDRVRAWIMAGE p Data= PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE);354 PDRVRAWIMAGE pThis = PDMINS_2_DATA(pDrvIns, PDRVRAWIMAGE); 355 355 switch (enmInterface) 356 356 { … … 358 358 return &pDrvIns->IBase; 359 359 case PDMINTERFACE_MEDIA: 360 return &p Data->IMedia;360 return &pThis->IMedia; 361 361 default: 362 362 return NULL; -
trunk/src/VBox/Devices/Storage/DrvVD.cpp
r11267 r11269 276 276 LogFlow(("%s: off=%#llx pvBuf=%p cbRead=%d\n", __FUNCTION__, 277 277 off, pvBuf, cbRead)); 278 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);279 int rc = VDRead(p Data->pDisk, off, pvBuf, cbRead);278 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 279 int rc = VDRead(pThis->pDisk, off, pvBuf, cbRead); 280 280 if (RT_SUCCESS(rc)) 281 281 Log2(("%s: off=%#llx pvBuf=%p cbRead=%d %.*Vhxd\n", __FUNCTION__, … … 292 292 LogFlow(("%s: off=%#llx pvBuf=%p cbWrite=%d\n", __FUNCTION__, 293 293 off, pvBuf, cbWrite)); 294 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);294 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 295 295 Log2(("%s: off=%#llx pvBuf=%p cbWrite=%d %.*Vhxd\n", __FUNCTION__, 296 296 off, pvBuf, cbWrite, cbWrite, pvBuf)); 297 int rc = VDWrite(p Data->pDisk, off, pvBuf, cbWrite);297 int rc = VDWrite(pThis->pDisk, off, pvBuf, cbWrite); 298 298 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 299 299 return rc; … … 304 304 { 305 305 LogFlow(("%s:\n", __FUNCTION__)); 306 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);307 int rc = VDFlush(p Data->pDisk);306 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 307 int rc = VDFlush(pThis->pDisk); 308 308 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 309 309 return rc; … … 314 314 { 315 315 LogFlow(("%s:\n", __FUNCTION__)); 316 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);317 uint64_t cb = VDGetSize(p Data->pDisk, VD_LAST_IMAGE);316 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 317 uint64_t cb = VDGetSize(pThis->pDisk, VD_LAST_IMAGE); 318 318 LogFlow(("%s: returns %#llx (%llu)\n", __FUNCTION__, cb, cb)); 319 319 return cb; … … 324 324 { 325 325 LogFlow(("%s:\n", __FUNCTION__)); 326 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);327 bool f = VDIsReadOnly(p Data->pDisk);326 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 327 bool f = VDIsReadOnly(pThis->pDisk); 328 328 LogFlow(("%s: returns %d\n", __FUNCTION__, f)); 329 329 return f; … … 335 335 { 336 336 LogFlow(("%s:\n", __FUNCTION__)); 337 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);338 int rc = VDGetPCHSGeometry(p Data->pDisk, VD_LAST_IMAGE, pPCHSGeometry);337 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 338 int rc = VDGetPCHSGeometry(pThis->pDisk, VD_LAST_IMAGE, pPCHSGeometry); 339 339 if (RT_FAILURE(rc)) 340 340 { … … 353 353 LogFlow(("%s: CHS=%d/%d/%d\n", __FUNCTION__, 354 354 pPCHSGeometry->cCylinders, pPCHSGeometry->cHeads, pPCHSGeometry->cSectors)); 355 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);356 int rc = VDSetPCHSGeometry(p Data->pDisk, VD_LAST_IMAGE, pPCHSGeometry);355 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 356 int rc = VDSetPCHSGeometry(pThis->pDisk, VD_LAST_IMAGE, pPCHSGeometry); 357 357 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 358 358 return rc; … … 364 364 { 365 365 LogFlow(("%s:\n", __FUNCTION__)); 366 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);367 int rc = VDGetLCHSGeometry(p Data->pDisk, VD_LAST_IMAGE, pLCHSGeometry);366 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 367 int rc = VDGetLCHSGeometry(pThis->pDisk, VD_LAST_IMAGE, pLCHSGeometry); 368 368 if (RT_FAILURE(rc)) 369 369 { … … 382 382 LogFlow(("%s: CHS=%d/%d/%d\n", __FUNCTION__, 383 383 pLCHSGeometry->cCylinders, pLCHSGeometry->cHeads, pLCHSGeometry->cSectors)); 384 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);385 int rc = VDSetLCHSGeometry(p Data->pDisk, VD_LAST_IMAGE, pLCHSGeometry);384 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 385 int rc = VDSetLCHSGeometry(pThis->pDisk, VD_LAST_IMAGE, pLCHSGeometry); 386 386 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 387 387 return rc; … … 392 392 { 393 393 LogFlow(("%s:\n", __FUNCTION__)); 394 PVBOXDISK p Data= PDMIMEDIA_2_VBOXDISK(pInterface);395 int rc = VDGetUuid(p Data->pDisk, 0, pUuid);394 PVBOXDISK pThis = PDMIMEDIA_2_VBOXDISK(pInterface); 395 int rc = VDGetUuid(pThis->pDisk, 0, pUuid); 396 396 LogFlow(("%s: returns %Vrc ({%Vuuid})\n", __FUNCTION__, rc, pUuid)); 397 397 return rc; … … 408 408 LogFlow(("%s: uOffset=%#llx paSeg=%#p cSeg=%u cbRead=%d\n pvUser=%#p", __FUNCTION__, 409 409 uOffset, paSeg, cSeg, cbRead, pvUser)); 410 PVBOXDISK p Data= PDMIMEDIAASYNC_2_VBOXDISK(pInterface);411 int rc = VDAsyncRead(p Data->pDisk, uOffset, cbRead, paSeg, cSeg, pvUser);410 PVBOXDISK pThis = PDMIMEDIAASYNC_2_VBOXDISK(pInterface); 411 int rc = VDAsyncRead(pThis->pDisk, uOffset, cbRead, paSeg, cSeg, pvUser); 412 412 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 413 413 return rc; … … 420 420 LogFlow(("%s: uOffset=%#llx paSeg=%#p cSeg=%u cbWrite=%d\n pvUser=%#p", __FUNCTION__, 421 421 uOffset, paSeg, cSeg, cbWrite, pvUser)); 422 PVBOXDISK p Data= PDMIMEDIAASYNC_2_VBOXDISK(pInterface);423 int rc = VDAsyncWrite(p Data->pDisk, uOffset, cbWrite, paSeg, cSeg, pvUser);422 PVBOXDISK pThis = PDMIMEDIAASYNC_2_VBOXDISK(pInterface); 423 int rc = VDAsyncWrite(pThis->pDisk, uOffset, cbWrite, paSeg, cSeg, pvUser); 424 424 LogFlow(("%s: returns %Vrc\n", __FUNCTION__, rc)); 425 425 return rc; … … 432 432 static DECLCALLBACK(int) drvvdTasksCompleteNotify(PPDMITRANSPORTASYNCPORT pInterface, void *pvUser) 433 433 { 434 PVBOXDISK p Data= PDMITRANSPORTASYNCPORT_2_VBOXDISK(pInterface);434 PVBOXDISK pThis = PDMITRANSPORTASYNCPORT_2_VBOXDISK(pInterface); 435 435 PDRVVDASYNCTASK pDrvVDAsyncTask = (PDRVVDASYNCTASK)pvUser; 436 436 int rc = VINF_VDI_ASYNC_IO_FINISHED; … … 443 443 if (rc == VINF_VDI_ASYNC_IO_FINISHED) 444 444 { 445 rc = p Data->pDrvMediaAsyncPort->pfnTransferCompleteNotify(pData->pDrvMediaAsyncPort, pDrvVDAsyncTask->pvUserCaller);445 rc = pThis->pDrvMediaAsyncPort->pfnTransferCompleteNotify(pThis->pDrvMediaAsyncPort, pDrvVDAsyncTask->pvUserCaller); 446 446 } 447 447 else if (rc == VERR_VDI_ASYNC_IO_IN_PROGRESS) 448 448 rc = VINF_SUCCESS; 449 449 450 rc = RTCacheInsert(p Data->pCache, pDrvVDAsyncTask);450 rc = RTCacheInsert(pThis->pCache, pDrvVDAsyncTask); 451 451 AssertRC(rc); 452 452 … … 464 464 { 465 465 PPDMDRVINS pDrvIns = PDMIBASE_2_DRVINS(pInterface); 466 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);466 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 467 467 switch (enmInterface) 468 468 { … … 470 470 return &pDrvIns->IBase; 471 471 case PDMINTERFACE_MEDIA: 472 return &p Data->IMedia;472 return &pThis->IMedia; 473 473 case PDMINTERFACE_MEDIA_ASYNC: 474 return p Data->fAsyncIOSupported ? &pData->IMediaAsync : NULL;474 return pThis->fAsyncIOSupported ? &pThis->IMediaAsync : NULL; 475 475 case PDMINTERFACE_TRANSPORT_ASYNC_PORT: 476 return &p Data->ITransportAsyncPort;476 return &pThis->ITransportAsyncPort; 477 477 default: 478 478 return NULL; … … 500 500 { 501 501 LogFlow(("%s:\n", __FUNCTION__)); 502 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);502 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 503 503 int rc = VINF_SUCCESS; 504 504 char *pszName = NULL; /**< The path of the disk image file. */ … … 511 511 */ 512 512 pDrvIns->IBase.pfnQueryInterface = drvvdQueryInterface; 513 p Data->pDrvIns = pDrvIns;514 p Data->fTempReadOnly = false;515 p Data->pDisk = NULL;513 pThis->pDrvIns = pDrvIns; 514 pThis->fTempReadOnly = false; 515 pThis->pDisk = NULL; 516 516 517 517 /* IMedia */ 518 p Data->IMedia.pfnRead = drvvdRead;519 p Data->IMedia.pfnWrite = drvvdWrite;520 p Data->IMedia.pfnFlush = drvvdFlush;521 p Data->IMedia.pfnGetSize = drvvdGetSize;522 p Data->IMedia.pfnIsReadOnly = drvvdIsReadOnly;523 p Data->IMedia.pfnBiosGetPCHSGeometry = drvvdBiosGetPCHSGeometry;524 p Data->IMedia.pfnBiosSetPCHSGeometry = drvvdBiosSetPCHSGeometry;525 p Data->IMedia.pfnBiosGetLCHSGeometry = drvvdBiosGetLCHSGeometry;526 p Data->IMedia.pfnBiosSetLCHSGeometry = drvvdBiosSetLCHSGeometry;527 p Data->IMedia.pfnGetUuid = drvvdGetUuid;518 pThis->IMedia.pfnRead = drvvdRead; 519 pThis->IMedia.pfnWrite = drvvdWrite; 520 pThis->IMedia.pfnFlush = drvvdFlush; 521 pThis->IMedia.pfnGetSize = drvvdGetSize; 522 pThis->IMedia.pfnIsReadOnly = drvvdIsReadOnly; 523 pThis->IMedia.pfnBiosGetPCHSGeometry = drvvdBiosGetPCHSGeometry; 524 pThis->IMedia.pfnBiosSetPCHSGeometry = drvvdBiosSetPCHSGeometry; 525 pThis->IMedia.pfnBiosGetLCHSGeometry = drvvdBiosGetLCHSGeometry; 526 pThis->IMedia.pfnBiosSetLCHSGeometry = drvvdBiosSetLCHSGeometry; 527 pThis->IMedia.pfnGetUuid = drvvdGetUuid; 528 528 529 529 /* IMediaAsync */ 530 p Data->IMediaAsync.pfnStartRead = drvvdStartRead;531 p Data->IMediaAsync.pfnStartWrite = drvvdStartWrite;530 pThis->IMediaAsync.pfnStartRead = drvvdStartRead; 531 pThis->IMediaAsync.pfnStartWrite = drvvdStartWrite; 532 532 533 533 /* ITransportAsyncPort */ 534 p Data->ITransportAsyncPort.pfnTaskCompleteNotify = drvvdTasksCompleteNotify;534 pThis->ITransportAsyncPort.pfnTaskCompleteNotify = drvvdTasksCompleteNotify; 535 535 536 536 /* Initialize supported VD interfaces. */ 537 p Data->VDIErrorCallbacks.cbSize = sizeof(VDINTERFACEERROR);538 p Data->VDIErrorCallbacks.enmInterface = VDINTERFACETYPE_ERROR;539 p Data->VDIErrorCallbacks.pfnError = drvvdErrorCallback;540 541 rc = VDInterfaceCreate(&p Data->VDIError, "DrvVD_VDIError", VDINTERFACETYPE_ERROR,542 &p Data->VDIErrorCallbacks, pDrvIns, NULL);537 pThis->VDIErrorCallbacks.cbSize = sizeof(VDINTERFACEERROR); 538 pThis->VDIErrorCallbacks.enmInterface = VDINTERFACETYPE_ERROR; 539 pThis->VDIErrorCallbacks.pfnError = drvvdErrorCallback; 540 541 rc = VDInterfaceCreate(&pThis->VDIError, "DrvVD_VDIError", VDINTERFACETYPE_ERROR, 542 &pThis->VDIErrorCallbacks, pDrvIns, NULL); 543 543 AssertRC(rc); 544 544 545 p Data->VDIAsyncIOCallbacks.cbSize = sizeof(VDINTERFACEASYNCIO);546 p Data->VDIAsyncIOCallbacks.enmInterface = VDINTERFACETYPE_ASYNCIO;547 p Data->VDIAsyncIOCallbacks.pfnOpen = drvvdAsyncIOOpen;548 p Data->VDIAsyncIOCallbacks.pfnClose = drvvdAsyncIOClose;549 p Data->VDIAsyncIOCallbacks.pfnRead = drvvdAsyncIORead;550 p Data->VDIAsyncIOCallbacks.pfnWrite = drvvdAsyncIOWrite;551 p Data->VDIAsyncIOCallbacks.pfnFlush = drvvdAsyncIOFlush;552 p Data->VDIAsyncIOCallbacks.pfnPrepareRead = drvvdAsyncIOPrepareRead;553 p Data->VDIAsyncIOCallbacks.pfnPrepareWrite = drvvdAsyncIOPrepareWrite;554 p Data->VDIAsyncIOCallbacks.pfnTasksSubmit = drvvdAsyncIOTasksSubmit;555 556 rc = VDInterfaceCreate(&p Data->VDIAsyncIO, "DrvVD_AsyncIO", VDINTERFACETYPE_ASYNCIO,557 &p Data->VDIAsyncIOCallbacks, pData, &pData->VDIError);545 pThis->VDIAsyncIOCallbacks.cbSize = sizeof(VDINTERFACEASYNCIO); 546 pThis->VDIAsyncIOCallbacks.enmInterface = VDINTERFACETYPE_ASYNCIO; 547 pThis->VDIAsyncIOCallbacks.pfnOpen = drvvdAsyncIOOpen; 548 pThis->VDIAsyncIOCallbacks.pfnClose = drvvdAsyncIOClose; 549 pThis->VDIAsyncIOCallbacks.pfnRead = drvvdAsyncIORead; 550 pThis->VDIAsyncIOCallbacks.pfnWrite = drvvdAsyncIOWrite; 551 pThis->VDIAsyncIOCallbacks.pfnFlush = drvvdAsyncIOFlush; 552 pThis->VDIAsyncIOCallbacks.pfnPrepareRead = drvvdAsyncIOPrepareRead; 553 pThis->VDIAsyncIOCallbacks.pfnPrepareWrite = drvvdAsyncIOPrepareWrite; 554 pThis->VDIAsyncIOCallbacks.pfnTasksSubmit = drvvdAsyncIOTasksSubmit; 555 556 rc = VDInterfaceCreate(&pThis->VDIAsyncIO, "DrvVD_AsyncIO", VDINTERFACETYPE_ASYNCIO, 557 &pThis->VDIAsyncIOCallbacks, pThis, &pThis->VDIError); 558 558 AssertRC(rc); 559 559 560 p Data->VDIConfigCallbacks.cbSize = sizeof(VDINTERFACECONFIG);561 p Data->VDIConfigCallbacks.enmInterface = VDINTERFACETYPE_CONFIG;562 p Data->VDIConfigCallbacks.pfnAreValuesValid = drvvdCfgAreValuesValid;563 p Data->VDIConfigCallbacks.pfnQueryType = drvvdCfgQueryType;564 p Data->VDIConfigCallbacks.pfnQuerySize = drvvdCfgQuerySize;565 p Data->VDIConfigCallbacks.pfnQueryInteger = drvvdCfgQueryInteger;566 p Data->VDIConfigCallbacks.pfnQueryIntegerDef = drvvdCfgQueryIntegerDef;567 p Data->VDIConfigCallbacks.pfnQueryString = drvvdCfgQueryString;568 p Data->VDIConfigCallbacks.pfnQueryStringDef = drvvdCfgQueryStringDef;569 p Data->VDIConfigCallbacks.pfnQueryBytes = drvvdCfgQueryBytes;560 pThis->VDIConfigCallbacks.cbSize = sizeof(VDINTERFACECONFIG); 561 pThis->VDIConfigCallbacks.enmInterface = VDINTERFACETYPE_CONFIG; 562 pThis->VDIConfigCallbacks.pfnAreValuesValid = drvvdCfgAreValuesValid; 563 pThis->VDIConfigCallbacks.pfnQueryType = drvvdCfgQueryType; 564 pThis->VDIConfigCallbacks.pfnQuerySize = drvvdCfgQuerySize; 565 pThis->VDIConfigCallbacks.pfnQueryInteger = drvvdCfgQueryInteger; 566 pThis->VDIConfigCallbacks.pfnQueryIntegerDef = drvvdCfgQueryIntegerDef; 567 pThis->VDIConfigCallbacks.pfnQueryString = drvvdCfgQueryString; 568 pThis->VDIConfigCallbacks.pfnQueryStringDef = drvvdCfgQueryStringDef; 569 pThis->VDIConfigCallbacks.pfnQueryBytes = drvvdCfgQueryBytes; 570 570 571 571 /** @todo TEMP! this isn't really correct - this needs to be made per image, … … 573 573 * At the moment this is harmless, as iSCSI can only be used as a base 574 574 * image, and no other backend uses the private data for these callbacks. */ 575 rc = VDInterfaceCreate(&p Data->VDIConfig, "DrvVD_Config", VDINTERFACETYPE_CONFIG,576 &p Data->VDIConfigCallbacks, NULL /**< @todo TEMP */, &pData->VDIAsyncIO);575 rc = VDInterfaceCreate(&pThis->VDIConfig, "DrvVD_Config", VDINTERFACETYPE_CONFIG, 576 &pThis->VDIConfigCallbacks, NULL /**< @todo TEMP */, &pThis->VDIAsyncIO); 577 577 AssertRC(rc); 578 578 579 579 /* Try to attach async media port interface above.*/ 580 p Data->pDrvMediaAsyncPort = (PPDMIMEDIAASYNCPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_MEDIA_ASYNC_PORT);580 pThis->pDrvMediaAsyncPort = (PPDMIMEDIAASYNCPORT)pDrvIns->pUpBase->pfnQueryInterface(pDrvIns->pUpBase, PDMINTERFACE_MEDIA_ASYNC_PORT); 581 581 582 582 /* … … 584 584 * async interface. 585 585 */ 586 if (p Data->pDrvMediaAsyncPort)586 if (pThis->pDrvMediaAsyncPort) 587 587 { 588 588 /* Try to attach the driver. */ … … 596 596 * Revert to non async I/O. 597 597 */ 598 p Data->pDrvMediaAsyncPort = NULL;598 pThis->pDrvMediaAsyncPort = NULL; 599 599 } 600 600 else if (RT_FAILURE(rc)) … … 605 605 { 606 606 /* Success query the async transport interface. */ 607 p Data->pDrvTransportAsync = (PPDMITRANSPORTASYNC)pBase->pfnQueryInterface(pBase, PDMINTERFACE_TRANSPORT_ASYNC);608 if (!p Data->pDrvTransportAsync)607 pThis->pDrvTransportAsync = (PPDMITRANSPORTASYNC)pBase->pfnQueryInterface(pBase, PDMINTERFACE_TRANSPORT_ASYNC); 608 if (!pThis->pDrvTransportAsync) 609 609 { 610 610 /* Whoops. */ … … 659 659 { 660 660 /** @todo TEMP! later the iSCSI config callbacks won't be included here */ 661 rc = VDCreate(&p Data->VDIConfig, &pData->pDisk);661 rc = VDCreate(&pThis->VDIConfig, &pThis->pDisk); 662 662 /* Error message is already set correctly. */ 663 663 } … … 717 717 { 718 718 PCFGMNODE pCfg = CFGMR3GetChild(pCurNode, "VDConfig"); 719 p Data->VDIConfig.pvUser = pCfg; /**< @todo TEMP! */719 pThis->VDIConfig.pvUser = pCfg; /**< @todo TEMP! */ 720 720 } 721 721 … … 730 730 if (fHonorZeroWrites) 731 731 uOpenFlags |= VD_OPEN_FLAGS_HONOR_ZEROES; 732 if (p Data->pDrvMediaAsyncPort)732 if (pThis->pDrvMediaAsyncPort) 733 733 uOpenFlags |= VD_OPEN_FLAGS_ASYNC_IO; 734 734 735 735 /** Try to open backend in asyc I/O mode first. */ 736 rc = VDOpen(p Data->pDisk, pszFormat, pszName, uOpenFlags);736 rc = VDOpen(pThis->pDisk, pszFormat, pszName, uOpenFlags); 737 737 if (rc == VERR_NOT_SUPPORTED) 738 738 { 739 739 /* Seems async I/O is not supported by the backend, open in normal mode. */ 740 740 uOpenFlags &= ~VD_OPEN_FLAGS_ASYNC_IO; 741 rc = VDOpen(p Data->pDisk, pszFormat, pszName, uOpenFlags);741 rc = VDOpen(pThis->pDisk, pszFormat, pszName, uOpenFlags); 742 742 } 743 743 … … 745 745 Log(("%s: %d - Opened '%s' in %s mode\n", __FUNCTION__, 746 746 iLevel, pszName, 747 VDIsReadOnly(p Data->pDisk) ? "read-only" : "read-write"));747 VDIsReadOnly(pThis->pDisk) ? "read-only" : "read-write")); 748 748 else 749 749 { … … 765 765 if (RT_FAILURE(rc)) 766 766 { 767 if (VALID_PTR(p Data->pDisk))768 { 769 VDDestroy(p Data->pDisk);770 p Data->pDisk = NULL;767 if (VALID_PTR(pThis->pDisk)) 768 { 769 VDDestroy(pThis->pDisk); 770 pThis->pDisk = NULL; 771 771 } 772 772 if (VALID_PTR(pszName)) … … 780 780 * it. 781 781 */ 782 p Data->fAsyncIOSupported = true;783 for (unsigned i = 0; i < VDGetCount(p Data->pDisk); i++)782 pThis->fAsyncIOSupported = true; 783 for (unsigned i = 0; i < VDGetCount(pThis->pDisk); i++) 784 784 { 785 785 VDBACKENDINFO vdBackendInfo; 786 786 787 rc = VDBackendInfoSingle(p Data->pDisk, i, &vdBackendInfo);787 rc = VDBackendInfoSingle(pThis->pDisk, i, &vdBackendInfo); 788 788 AssertRC(rc); 789 789 … … 794 794 * Check if current file is supported with async I/O) 795 795 */ 796 rc = VDImageIsAsyncIOSupported(p Data->pDisk, i, &pData->fAsyncIOSupported);796 rc = VDImageIsAsyncIOSupported(pThis->pDisk, i, &pThis->fAsyncIOSupported); 797 797 AssertRC(rc); 798 798 … … 802 802 * at least one does not support it. 803 803 */ 804 if (!p Data->fAsyncIOSupported)804 if (!pThis->fAsyncIOSupported) 805 805 break; 806 806 } 807 807 else 808 808 { 809 p Data->fAsyncIOSupported = false;809 pThis->fAsyncIOSupported = false; 810 810 break; 811 811 } … … 813 813 814 814 /* Create cache if async I/O is supported. */ 815 if (p Data->fAsyncIOSupported)816 { 817 rc = RTCacheCreate(&p Data->pCache, 0, sizeof(DRVVDASYNCTASK), RTOBJCACHE_PROTECT_INSERT);815 if (pThis->fAsyncIOSupported) 816 { 817 rc = RTCacheCreate(&pThis->pCache, 0, sizeof(DRVVDASYNCTASK), RTOBJCACHE_PROTECT_INSERT); 818 818 AssertMsg(RT_SUCCESS(rc), ("Failed to create cache rc=%Vrc\n", rc)); 819 819 } … … 834 834 { 835 835 int rc; 836 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);837 LogFlow(("%s:\n", __FUNCTION__)); 838 839 if (p Data->pCache)840 { 841 rc = RTCacheDestroy(p Data->pCache);836 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 837 LogFlow(("%s:\n", __FUNCTION__)); 838 839 if (pThis->pCache) 840 { 841 rc = RTCacheDestroy(pThis->pCache); 842 842 AssertRC(rc); 843 843 } … … 855 855 { 856 856 LogFlow(("%s:\n", __FUNCTION__)); 857 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);858 if (!VDIsReadOnly(p Data->pDisk))857 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 858 if (!VDIsReadOnly(pThis->pDisk)) 859 859 { 860 860 unsigned uOpenFlags; 861 int rc = VDGetOpenFlags(p Data->pDisk, VD_LAST_IMAGE, &uOpenFlags);861 int rc = VDGetOpenFlags(pThis->pDisk, VD_LAST_IMAGE, &uOpenFlags); 862 862 AssertRC(rc); 863 863 uOpenFlags |= VD_OPEN_FLAGS_READONLY; 864 rc = VDSetOpenFlags(p Data->pDisk, VD_LAST_IMAGE, uOpenFlags);864 rc = VDSetOpenFlags(pThis->pDisk, VD_LAST_IMAGE, uOpenFlags); 865 865 AssertRC(rc); 866 p Data->fTempReadOnly = true;866 pThis->fTempReadOnly = true; 867 867 } 868 868 } … … 877 877 { 878 878 LogFlow(("%s:\n", __FUNCTION__)); 879 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);880 if (p Data->fTempReadOnly)879 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 880 if (pThis->fTempReadOnly) 881 881 { 882 882 unsigned uOpenFlags; 883 int rc = VDGetOpenFlags(p Data->pDisk, VD_LAST_IMAGE, &uOpenFlags);883 int rc = VDGetOpenFlags(pThis->pDisk, VD_LAST_IMAGE, &uOpenFlags); 884 884 AssertRC(rc); 885 885 uOpenFlags &= ~VD_OPEN_FLAGS_READONLY; 886 rc = VDSetOpenFlags(p Data->pDisk, VD_LAST_IMAGE, uOpenFlags);886 rc = VDSetOpenFlags(pThis->pDisk, VD_LAST_IMAGE, uOpenFlags); 887 887 AssertRC(rc); 888 p Data->fTempReadOnly = false;888 pThis->fTempReadOnly = false; 889 889 } 890 890 } … … 893 893 { 894 894 LogFlow(("%s:\n", __FUNCTION__)); 895 PVBOXDISK p Data= PDMINS_2_DATA(pDrvIns, PVBOXDISK);895 PVBOXDISK pThis = PDMINS_2_DATA(pDrvIns, PVBOXDISK); 896 896 897 897 /* … … 900 900 * async transport driver is destructed. 901 901 */ 902 int rc = VDCloseAll(p Data->pDisk);902 int rc = VDCloseAll(pThis->pDisk); 903 903 AssertRC(rc); 904 904 } -
trunk/src/VBox/Devices/Storage/VBoxHDD.cpp
r11267 r11269 56 56 static DECLCALLBACK(uint64_t) vdiGetSize(PPDMIMEDIA pInterface) 57 57 { 58 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);59 uint64_t cb = VDIDiskGetSize(p Data);58 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 59 uint64_t cb = VDIDiskGetSize(pThis); 60 60 LogFlow(("vdiGetSize: returns %#llx (%llu)\n", cb, cb)); 61 61 return cb; … … 94 94 static DECLCALLBACK(int) vdiBiosGetLCHSGeometry(PPDMIMEDIA pInterface, PPDMMEDIAGEOMETRY pLCHSGeometry) 95 95 { 96 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);97 int rc = VDIDiskGetLCHSGeometry(p Data, pLCHSGeometry);96 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 97 int rc = VDIDiskGetLCHSGeometry(pThis, pLCHSGeometry); 98 98 if (RT_SUCCESS(rc)) 99 99 { … … 113 113 static DECLCALLBACK(int) vdiBiosSetLCHSGeometry(PPDMIMEDIA pInterface, PCPDMMEDIAGEOMETRY pLCHSGeometry) 114 114 { 115 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);116 int rc = VDIDiskSetLCHSGeometry(p Data, pLCHSGeometry);115 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 116 int rc = VDIDiskSetLCHSGeometry(pThis, pLCHSGeometry); 117 117 LogFlow(("%s: returns %Vrc (%d,%d,%d)\n", __FUNCTION__, rc, pLCHSGeometry->cCylinders, pLCHSGeometry->cHeads, pLCHSGeometry->cSectors)); 118 118 return rc; … … 128 128 { 129 129 LogFlow(("vdiRead: off=%#llx pvBuf=%p cbRead=%d\n", off, pvBuf, cbRead)); 130 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);131 int rc = VDIDiskRead(p Data, off, pvBuf, cbRead);130 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 131 int rc = VDIDiskRead(pThis, off, pvBuf, cbRead); 132 132 if (RT_SUCCESS(rc)) 133 133 Log2(("vdiRead: off=%#llx pvBuf=%p cbRead=%d\n" … … 147 147 { 148 148 LogFlow(("vdiWrite: off=%#llx pvBuf=%p cbWrite=%d\n", off, pvBuf, cbWrite)); 149 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);149 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 150 150 Log2(("vdiWrite: off=%#llx pvBuf=%p cbWrite=%d\n" 151 151 "%.*Vhxd\n", 152 152 off, pvBuf, cbWrite, cbWrite, pvBuf)); 153 int rc = VDIDiskWrite(p Data, off, pvBuf, cbWrite);153 int rc = VDIDiskWrite(pThis, off, pvBuf, cbWrite); 154 154 LogFlow(("vdiWrite: returns %Vrc\n", rc)); 155 155 return rc; … … 165 165 { 166 166 LogFlow(("vdiFlush:\n")); 167 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);168 VDIFlushImage(p Data->pLast);167 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 168 VDIFlushImage(pThis->pLast); 169 169 int rc = VINF_SUCCESS; 170 170 LogFlow(("vdiFlush: returns %Vrc\n", rc)); … … 176 176 static DECLCALLBACK(int) vdiGetUuid(PPDMIMEDIA pInterface, PRTUUID pUuid) 177 177 { 178 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);179 int rc = VDIDiskGetImageUuid(p Data, 0, pUuid);178 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 179 int rc = VDIDiskGetImageUuid(pThis, 0, pUuid); 180 180 LogFlow(("vdiGetUuid: returns %Vrc ({%Vuuid})\n", rc, pUuid)); 181 181 return rc; … … 186 186 static DECLCALLBACK(bool) vdiIsReadOnly(PPDMIMEDIA pInterface) 187 187 { 188 PVDIDISK p Data= PDMIMEDIA_2_VDIDISK(pInterface);189 LogFlow(("vdiIsReadOnly: returns %d\n", VDIDiskIsReadOnly(p Data)));190 return VDIDiskIsReadOnly(p Data);188 PVDIDISK pThis = PDMIMEDIA_2_VDIDISK(pInterface); 189 LogFlow(("vdiIsReadOnly: returns %d\n", VDIDiskIsReadOnly(pThis))); 190 return VDIDiskIsReadOnly(pThis); 191 191 } 192 192 … … 204 204 { 205 205 PPDMDRVINS pDrvIns = PDMIBASE_2_DRVINS(pInterface); 206 PVDIDISK p Data= PDMINS_2_DATA(pDrvIns, PVDIDISK);206 PVDIDISK pThis = PDMINS_2_DATA(pDrvIns, PVDIDISK); 207 207 switch (enmInterface) 208 208 { … … 210 210 return &pDrvIns->IBase; 211 211 case PDMINTERFACE_MEDIA: 212 return &p Data->IMedia;212 return &pThis->IMedia; 213 213 default: 214 214 return NULL; … … 227 227 LogFlow(("vdiSuspend:\n")); 228 228 #if 1 //#ifdef DEBUG_dmik 229 PVDIDISK p Data= PDMINS_2_DATA(pDrvIns, PVDIDISK);230 if (!(p Data->pLast->fOpen & VDI_OPEN_FLAGS_READONLY))231 { 232 int rc = vdiChangeImageMode(p Data->pLast, false);229 PVDIDISK pThis = PDMINS_2_DATA(pDrvIns, PVDIDISK); 230 if (!(pThis->pLast->fOpen & VDI_OPEN_FLAGS_READONLY)) 231 { 232 int rc = vdiChangeImageMode(pThis->pLast, false); 233 233 AssertRC(rc); 234 234 } … … 248 248 LogFlow(("vdiSuspend:\n")); 249 249 #if 1 // #ifdef DEBUG_dmik 250 PVDIDISK p Data= PDMINS_2_DATA(pDrvIns, PVDIDISK);251 if (!(p Data->pLast->fOpen & VDI_OPEN_FLAGS_READONLY))252 { 253 int rc = vdiChangeImageMode(p Data->pLast, true);250 PVDIDISK pThis = PDMINS_2_DATA(pDrvIns, PVDIDISK); 251 if (!(pThis->pLast->fOpen & VDI_OPEN_FLAGS_READONLY)) 252 { 253 int rc = vdiChangeImageMode(pThis->pLast, true); 254 254 AssertRC(rc); 255 255 } … … 269 269 { 270 270 LogFlow(("vdiDestruct:\n")); 271 PVDIDISK p Data= PDMINS_2_DATA(pDrvIns, PVDIDISK);272 VDIDiskCloseAllImages(p Data);271 PVDIDISK pThis = PDMINS_2_DATA(pDrvIns, PVDIDISK); 272 VDIDiskCloseAllImages(pThis); 273 273 } 274 274 … … 287 287 { 288 288 LogFlow(("vdiConstruct:\n")); 289 PVDIDISK p Data= PDMINS_2_DATA(pDrvIns, PVDIDISK);289 PVDIDISK pThis = PDMINS_2_DATA(pDrvIns, PVDIDISK); 290 290 char *pszName; /**< The path of the disk image file. */ 291 291 bool fReadOnly; /**< True if the media is readonly. */ … … 296 296 */ 297 297 pDrvIns->IBase.pfnQueryInterface = vdiQueryInterface; 298 p Data->pDrvIns = pDrvIns;299 300 vdiInitVDIDisk(p Data);298 pThis->pDrvIns = pDrvIns; 299 300 vdiInitVDIDisk(pThis); 301 301 302 302 /* IMedia */ 303 p Data->IMedia.pfnRead = vdiRead;304 p Data->IMedia.pfnWrite = vdiWrite;305 p Data->IMedia.pfnFlush = vdiFlush;306 p Data->IMedia.pfnGetSize = vdiGetSize;307 p Data->IMedia.pfnGetUuid = vdiGetUuid;308 p Data->IMedia.pfnIsReadOnly = vdiIsReadOnly;309 p Data->IMedia.pfnBiosGetPCHSGeometry = vdiBiosGetPCHSGeometry;310 p Data->IMedia.pfnBiosSetPCHSGeometry = vdiBiosSetPCHSGeometry;311 p Data->IMedia.pfnBiosGetLCHSGeometry = vdiBiosGetLCHSGeometry;312 p Data->IMedia.pfnBiosSetLCHSGeometry = vdiBiosSetLCHSGeometry;303 pThis->IMedia.pfnRead = vdiRead; 304 pThis->IMedia.pfnWrite = vdiWrite; 305 pThis->IMedia.pfnFlush = vdiFlush; 306 pThis->IMedia.pfnGetSize = vdiGetSize; 307 pThis->IMedia.pfnGetUuid = vdiGetUuid; 308 pThis->IMedia.pfnIsReadOnly = vdiIsReadOnly; 309 pThis->IMedia.pfnBiosGetPCHSGeometry = vdiBiosGetPCHSGeometry; 310 pThis->IMedia.pfnBiosSetPCHSGeometry = vdiBiosSetPCHSGeometry; 311 pThis->IMedia.pfnBiosGetLCHSGeometry = vdiBiosGetLCHSGeometry; 312 pThis->IMedia.pfnBiosSetLCHSGeometry = vdiBiosSetLCHSGeometry; 313 313 314 314 /* … … 371 371 * Open the image. 372 372 */ 373 rc = VDIDiskOpenImage(p Data, pszName, fReadOnly ? VDI_OPEN_FLAGS_READONLY373 rc = VDIDiskOpenImage(pThis, pszName, fReadOnly ? VDI_OPEN_FLAGS_READONLY 374 374 : VDI_OPEN_FLAGS_NORMAL); 375 375 if (RT_SUCCESS(rc)) 376 376 Log(("vdiConstruct: %d - Opened '%s' in %s mode\n", 377 iLevel, pszName, VDIDiskIsReadOnly(p Data) ? "read-only" : "read-write"));377 iLevel, pszName, VDIDiskIsReadOnly(pThis) ? "read-only" : "read-write")); 378 378 else 379 379 AssertMsgFailed(("Failed to open image '%s' rc=%Vrc\n", pszName, rc)); … … 387 387 /* If any of the images has the flag set, handle zero writes like normal. */ 388 388 if (RT_SUCCESS(rc)) 389 p Data->fHonorZeroWrites = fHonorZeroWrites;389 pThis->fHonorZeroWrites = fHonorZeroWrites; 390 390 391 391 /* On failure, vdiDestruct will be called, so no need to clean up here. */ -
trunk/src/VBox/Devices/VMMDev/VBoxDev.cpp
r11267 r11269 284 284 static DECLCALLBACK(int) vmmdevBackdoorLog(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 285 285 { 286 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState *);287 288 if (!p Data->fBackdoorLogDisabled && cb == 1 && Port == RTLOG_DEBUG_PORT)286 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState *); 287 288 if (!pThis->fBackdoorLogDisabled && cb == 1 && Port == RTLOG_DEBUG_PORT) 289 289 { 290 290 … … 301 301 if (u32 == '\n' || u32 == '\r') 302 302 { 303 p Data->szMsg[pData->iMsg] = '\0';304 if (p Data->iMsg)305 LogRel(("Guest Log: %s\n", p Data->szMsg));306 p Data->iMsg = 0;303 pThis->szMsg[pThis->iMsg] = '\0'; 304 if (pThis->iMsg) 305 LogRel(("Guest Log: %s\n", pThis->szMsg)); 306 pThis->iMsg = 0; 307 307 } 308 308 else 309 309 { 310 if (p Data->iMsg >= sizeof(pData->szMsg)-1)311 { 312 p Data->szMsg[pData->iMsg] = '\0';313 LogRel(("Guest Log: %s\n", p Data->szMsg));314 p Data->iMsg = 0;315 } 316 p Data->szMsg[pData->iMsg] = (char )u32;317 p Data->szMsg[++pData->iMsg] = '\0';310 if (pThis->iMsg >= sizeof(pThis->szMsg)-1) 311 { 312 pThis->szMsg[pThis->iMsg] = '\0'; 313 LogRel(("Guest Log: %s\n", pThis->szMsg)); 314 pThis->iMsg = 0; 315 } 316 pThis->szMsg[pThis->iMsg] = (char )u32; 317 pThis->szMsg[++pThis->iMsg] = '\0'; 318 318 } 319 319 } … … 340 340 if (cb == 4) 341 341 { 342 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState *);342 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState *); 343 343 switch (u32) 344 344 { 345 345 case 0: 346 p Data->fTimesyncBackdoorLo = false;346 pThis->fTimesyncBackdoorLo = false; 347 347 break; 348 348 case 1: 349 p Data->fTimesyncBackdoorLo = true;349 pThis->fTimesyncBackdoorLo = true; 350 350 } 351 351 return VINF_SUCCESS; … … 372 372 if (cb == 4) 373 373 { 374 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState *);374 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState *); 375 375 RTTIMESPEC now; 376 376 377 if (p Data->fTimesyncBackdoorLo)378 { 379 *pu32 = (uint32_t)(p Data->hostTime & (uint64_t)0xFFFFFFFF);377 if (pThis->fTimesyncBackdoorLo) 378 { 379 *pu32 = (uint32_t)(pThis->hostTime & (uint64_t)0xFFFFFFFF); 380 380 } 381 381 else 382 382 { 383 p Data->hostTime = RTTimeSpecGetMilli(PDMDevHlpUTCNow(pDevIns, &now));384 *pu32 = (uint32_t)(p Data->hostTime >> 32);383 pThis->hostTime = RTTimeSpecGetMilli(PDMDevHlpUTCNow(pDevIns, &now)); 384 *pu32 = (uint32_t)(pThis->hostTime >> 32); 385 385 } 386 386 rc = VINF_SUCCESS; … … 398 398 static DECLCALLBACK(int) vmmdevRequestHandler(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 399 399 { 400 VMMDevState *p Data= (VMMDevState*)pvUser;400 VMMDevState *pThis = (VMMDevState*)pvUser; 401 401 int rcRet = VINF_SUCCESS; 402 402 … … 429 429 430 430 if ( requestHeader.requestType != VMMDevReq_ReportGuestInfo 431 && !p Data->fu32AdditionsOk)431 && !pThis->fu32AdditionsOk) 432 432 { 433 433 Log(("VMMDev: guest has not yet reported to us. Refusing operation.\n")); … … 484 484 VMMDevReportGuestInfo *guestInfo = (VMMDevReportGuestInfo*)pRequestHeader; 485 485 486 if (memcmp (&p Data->guestInfo, &guestInfo->guestInfo, sizeof (guestInfo->guestInfo)) != 0)486 if (memcmp (&pThis->guestInfo, &guestInfo->guestInfo, sizeof (guestInfo->guestInfo)) != 0) 487 487 { 488 488 /* make a copy of supplied information */ 489 p Data->guestInfo = guestInfo->guestInfo;489 pThis->guestInfo = guestInfo->guestInfo; 490 490 491 491 /* Check additions version */ 492 p Data->fu32AdditionsOk = VBOX_GUEST_ADDITIONS_VERSION_OK(pData->guestInfo.additionsVersion);492 pThis->fu32AdditionsOk = VBOX_GUEST_ADDITIONS_VERSION_OK(pThis->guestInfo.additionsVersion); 493 493 494 494 LogRel(("Guest Additions information report: additionsVersion = 0x%08X osType = 0x%08X\n", 495 p Data->guestInfo.additionsVersion,496 p Data->guestInfo.osType));497 p Data->pDrv->pfnUpdateGuestVersion(pData->pDrv, &pData->guestInfo);498 } 499 500 if (p Data->fu32AdditionsOk)495 pThis->guestInfo.additionsVersion, 496 pThis->guestInfo.osType)); 497 pThis->pDrv->pfnUpdateGuestVersion(pThis->pDrv, &pThis->guestInfo); 498 } 499 500 if (pThis->fu32AdditionsOk) 501 501 { 502 502 pRequestHeader->rc = VINF_SUCCESS; … … 526 526 /** @todo change this when we next bump the interface version */ 527 527 guestCaps->caps |= VMMDEV_GUEST_SUPPORTS_GRAPHICS; 528 if (p Data->guestCaps != guestCaps->caps)528 if (pThis->guestCaps != guestCaps->caps) 529 529 { 530 530 /* make a copy of supplied information */ 531 p Data->guestCaps = guestCaps->caps;531 pThis->guestCaps = guestCaps->caps; 532 532 533 533 LogRel(("Guest Additions capability report: (0x%x) " … … 540 540 guestCaps->caps & VMMDEV_GUEST_SUPPORTS_GRAPHICS ? "yes" : "no")); 541 541 542 p Data->pDrv->pfnUpdateGuestCapabilities(pData->pDrv, guestCaps->caps);542 pThis->pDrv->pfnUpdateGuestCapabilities(pThis->pDrv, guestCaps->caps); 543 543 } 544 544 pRequestHeader->rc = VINF_SUCCESS; … … 559 559 VMMDevReqGuestCapabilities2 *guestCaps = (VMMDevReqGuestCapabilities2*)pRequestHeader; 560 560 561 p Data->guestCaps |= guestCaps->u32OrMask;562 p Data->guestCaps &= ~guestCaps->u32NotMask;561 pThis->guestCaps |= guestCaps->u32OrMask; 562 pThis->guestCaps &= ~guestCaps->u32NotMask; 563 563 564 564 LogRel(("Guest Additions capability report: (0x%x) " … … 566 566 "hostWindowMapping: %s, " 567 567 "graphics: %s\n", 568 p Data->guestCaps,569 p Data->guestCaps & VMMDEV_GUEST_SUPPORTS_SEAMLESS ? "yes" : "no",570 p Data->guestCaps & VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING ? "yes" : "no",571 p Data->guestCaps & VMMDEV_GUEST_SUPPORTS_GRAPHICS ? "yes" : "no"));572 573 p Data->pDrv->pfnUpdateGuestCapabilities(pData->pDrv, pData->guestCaps);568 pThis->guestCaps, 569 pThis->guestCaps & VMMDEV_GUEST_SUPPORTS_SEAMLESS ? "yes" : "no", 570 pThis->guestCaps & VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING ? "yes" : "no", 571 pThis->guestCaps & VMMDEV_GUEST_SUPPORTS_GRAPHICS ? "yes" : "no")); 572 573 pThis->pDrv->pfnUpdateGuestCapabilities(pThis->pDrv, pThis->guestCaps); 574 574 pRequestHeader->rc = VINF_SUCCESS; 575 575 } … … 591 591 VMMDevReqMouseStatus *mouseStatus = (VMMDevReqMouseStatus*)pRequestHeader; 592 592 mouseStatus->mouseFeatures = 0; 593 if (p Data->mouseCapabilities & VMMDEV_MOUSEHOSTWANTSABS)593 if (pThis->mouseCapabilities & VMMDEV_MOUSEHOSTWANTSABS) 594 594 { 595 595 mouseStatus->mouseFeatures |= VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE; 596 596 } 597 if (p Data->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS)597 if (pThis->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS) 598 598 { 599 599 mouseStatus->mouseFeatures |= VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE; 600 600 } 601 if (p Data->mouseCapabilities & VMMDEV_MOUSEHOSTCANNOTHWPOINTER)601 if (pThis->mouseCapabilities & VMMDEV_MOUSEHOSTCANNOTHWPOINTER) 602 602 { 603 603 mouseStatus->mouseFeatures |= VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER; 604 604 } 605 mouseStatus->pointerXPos = p Data->mouseXAbs;606 mouseStatus->pointerYPos = p Data->mouseYAbs;605 mouseStatus->pointerXPos = pThis->mouseXAbs; 606 mouseStatus->pointerYPos = pThis->mouseYAbs; 607 607 Log2(("returning mouse status: features = %d, absX = %d, absY = %d\n", mouseStatus->mouseFeatures, 608 608 mouseStatus->pointerXPos, mouseStatus->pointerYPos)); … … 633 633 { 634 634 /* set the capability flag and the changed flag if it's actually a change */ 635 if (!(p Data->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS))635 if (!(pThis->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS)) 636 636 { 637 p Data->mouseCapabilities |= VMMDEV_MOUSEGUESTWANTSABS;637 pThis->mouseCapabilities |= VMMDEV_MOUSEGUESTWANTSABS; 638 638 bCapsChanged = true; 639 639 LogRel(("Guest requests mouse pointer integration\n")); … … 641 641 } else 642 642 { 643 if (p Data->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS)643 if (pThis->mouseCapabilities & VMMDEV_MOUSEGUESTWANTSABS) 644 644 { 645 p Data->mouseCapabilities &= ~VMMDEV_MOUSEGUESTWANTSABS;645 pThis->mouseCapabilities &= ~VMMDEV_MOUSEGUESTWANTSABS; 646 646 bCapsChanged = true; 647 647 LogRel(("Guest disables mouse pointer integration\n")); … … 649 649 } 650 650 if (mouseStatus->mouseFeatures & VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR) 651 p Data->mouseCapabilities |= VMMDEV_MOUSEGUESTNEEDSHOSTCUR;651 pThis->mouseCapabilities |= VMMDEV_MOUSEGUESTNEEDSHOSTCUR; 652 652 else 653 p Data->mouseCapabilities &= ~VMMDEV_MOUSEGUESTNEEDSHOSTCUR;653 pThis->mouseCapabilities &= ~VMMDEV_MOUSEGUESTNEEDSHOSTCUR; 654 654 655 655 /* … … 658 658 if (bCapsChanged) 659 659 { 660 Log(("VMMDevReq_SetMouseStatus: capabilities changed (%x), informing connector\n", p Data->mouseCapabilities));661 p Data->pDrv->pfnUpdateMouseCapabilities(pData->pDrv, pData->mouseCapabilities);660 Log(("VMMDevReq_SetMouseStatus: capabilities changed (%x), informing connector\n", pThis->mouseCapabilities)); 661 pThis->pDrv->pfnUpdateMouseCapabilities(pThis->pDrv, pThis->mouseCapabilities); 662 662 } 663 663 pRequestHeader->rc = VINF_SUCCESS; … … 699 699 if (fShape) 700 700 { 701 p Data->pDrv->pfnUpdatePointerShape(pData->pDrv,701 pThis->pDrv->pfnUpdatePointerShape(pThis->pDrv, 702 702 fVisible, 703 703 fAlpha, … … 708 708 else 709 709 { 710 p Data->pDrv->pfnUpdatePointerShape(pData->pDrv,710 pThis->pDrv->pfnUpdatePointerShape(pThis->pDrv, 711 711 fVisible, 712 712 0, … … 730 730 pRequestHeader->rc = VERR_INVALID_PARAMETER; 731 731 } 732 else if (RT_UNLIKELY(p Data->fGetHostTimeDisabled))732 else if (RT_UNLIKELY(pThis->fGetHostTimeDisabled)) 733 733 pRequestHeader->rc = VERR_NOT_SUPPORTED; 734 734 else … … 863 863 { 864 864 /* Remember which resolution the client has queried, subsequent reads will return the same values. */ 865 p Data->lastReadDisplayChangeRequest = pData->displayChangeRequest;865 pThis->lastReadDisplayChangeRequest = pThis->displayChangeRequest; 866 866 } 867 867 868 868 /* just pass on the information */ 869 869 Log(("VMMDev: returning display change request xres = %d, yres = %d, bpp = %d\n", 870 p Data->displayChangeRequest.xres, pData->displayChangeRequest.yres, pData->displayChangeRequest.bpp));871 displayChangeRequest->xres = p Data->lastReadDisplayChangeRequest.xres;872 displayChangeRequest->yres = p Data->lastReadDisplayChangeRequest.yres;873 displayChangeRequest->bpp = p Data->lastReadDisplayChangeRequest.bpp;870 pThis->displayChangeRequest.xres, pThis->displayChangeRequest.yres, pThis->displayChangeRequest.bpp)); 871 displayChangeRequest->xres = pThis->lastReadDisplayChangeRequest.xres; 872 displayChangeRequest->yres = pThis->lastReadDisplayChangeRequest.yres; 873 displayChangeRequest->bpp = pThis->lastReadDisplayChangeRequest.bpp; 874 874 875 875 pRequestHeader->rc = VINF_SUCCESS; … … 891 891 { 892 892 /* Remember which resolution the client has queried, subsequent reads will return the same values. */ 893 p Data->lastReadDisplayChangeRequest = pData->displayChangeRequest;893 pThis->lastReadDisplayChangeRequest = pThis->displayChangeRequest; 894 894 } 895 895 896 896 /* just pass on the information */ 897 897 Log(("VMMDev: returning display change request xres = %d, yres = %d, bpp = %d at %d\n", 898 p Data->displayChangeRequest.xres, pData->displayChangeRequest.yres, pData->displayChangeRequest.bpp, pData->displayChangeRequest.display));899 displayChangeRequest->xres = p Data->lastReadDisplayChangeRequest.xres;900 displayChangeRequest->yres = p Data->lastReadDisplayChangeRequest.yres;901 displayChangeRequest->bpp = p Data->lastReadDisplayChangeRequest.bpp;902 displayChangeRequest->display = p Data->lastReadDisplayChangeRequest.display;898 pThis->displayChangeRequest.xres, pThis->displayChangeRequest.yres, pThis->displayChangeRequest.bpp, pThis->displayChangeRequest.display)); 899 displayChangeRequest->xres = pThis->lastReadDisplayChangeRequest.xres; 900 displayChangeRequest->yres = pThis->lastReadDisplayChangeRequest.yres; 901 displayChangeRequest->bpp = pThis->lastReadDisplayChangeRequest.bpp; 902 displayChangeRequest->display = pThis->lastReadDisplayChangeRequest.display; 903 903 904 904 pRequestHeader->rc = VINF_SUCCESS; … … 921 921 VMMDevVideoModeSupportedRequest *videoModeSupportedRequest = (VMMDevVideoModeSupportedRequest*)pRequestHeader; 922 922 /* forward the call */ 923 pRequestHeader->rc = p Data->pDrv->pfnVideoModeSupported(pData->pDrv,923 pRequestHeader->rc = pThis->pDrv->pfnVideoModeSupported(pThis->pDrv, 924 924 videoModeSupportedRequest->width, 925 925 videoModeSupportedRequest->height, … … 944 944 VMMDevGetHeightReductionRequest *heightReductionRequest = (VMMDevGetHeightReductionRequest*)pRequestHeader; 945 945 /* forward the call */ 946 pRequestHeader->rc = p Data->pDrv->pfnGetHeightReduction(pData->pDrv,946 pRequestHeader->rc = pThis->pDrv->pfnGetHeightReduction(pThis->pDrv, 947 947 &heightReductionRequest->heightReduction); 948 948 } … … 962 962 else 963 963 { 964 if (VBOX_GUEST_ADDITIONS_VERSION_1_03 (p Data))965 { 966 vmmdevSetIRQ_Legacy_EMT (p Data);964 if (VBOX_GUEST_ADDITIONS_VERSION_1_03 (pThis)) 965 { 966 vmmdevSetIRQ_Legacy_EMT (pThis); 967 967 } 968 968 else … … 970 970 VMMDevEvents *pAckRequest; 971 971 972 if (p Data->fNewGuestFilterMask)972 if (pThis->fNewGuestFilterMask) 973 973 { 974 p Data->fNewGuestFilterMask = false;975 p Data->u32GuestFilterMask = pData->u32NewGuestFilterMask;974 pThis->fNewGuestFilterMask = false; 975 pThis->u32GuestFilterMask = pThis->u32NewGuestFilterMask; 976 976 } 977 977 978 978 pAckRequest = (VMMDevEvents *)pRequestHeader; 979 979 pAckRequest->events = 980 p Data->u32HostEventFlags & pData->u32GuestFilterMask;981 982 p Data->u32HostEventFlags &= ~pData->u32GuestFilterMask;983 p Data->pVMMDevRAMHC->V.V1_04.fHaveEvents = false;984 PDMDevHlpPCISetIrqNoWait (p Data->pDevIns, 0, 0);980 pThis->u32HostEventFlags & pThis->u32GuestFilterMask; 981 982 pThis->u32HostEventFlags &= ~pThis->u32GuestFilterMask; 983 pThis->pVMMDevRAMHC->V.V1_04.fHaveEvents = false; 984 PDMDevHlpPCISetIrqNoWait (pThis->pDevIns, 0, 0); 985 985 } 986 986 pRequestHeader->rc = VINF_SUCCESS; … … 1007 1007 * HGCM command is issued. The guest then can not disable these events. 1008 1008 */ 1009 vmmdevCtlGuestFilterMask_EMT (p Data,1009 vmmdevCtlGuestFilterMask_EMT (pThis, 1010 1010 pCtlMaskRequest->u32OrMask, 1011 1011 pCtlMaskRequest->u32NotMask & ~VMMDEV_EVENT_HGCM); … … 1027 1027 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1028 1028 } 1029 else if (!p Data->pHGCMDrv)1029 else if (!pThis->pHGCMDrv) 1030 1030 { 1031 1031 Log(("VMMDevReq_HGCMConnect HGCM Connector is NULL!\n")); … … 1038 1038 Log(("VMMDevReq_HGCMConnect\n")); 1039 1039 1040 pRequestHeader->rc = vmmdevHGCMConnect (p Data, pHGCMConnect, (RTGCPHYS)u32);1040 pRequestHeader->rc = vmmdevHGCMConnect (pThis, pHGCMConnect, (RTGCPHYS)u32); 1041 1041 } 1042 1042 break; … … 1050 1050 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1051 1051 } 1052 else if (!p Data->pHGCMDrv)1052 else if (!pThis->pHGCMDrv) 1053 1053 { 1054 1054 Log(("VMMDevReq_HGCMDisconnect HGCM Connector is NULL!\n")); … … 1060 1060 1061 1061 Log(("VMMDevReq_VMMDevHGCMDisconnect\n")); 1062 pRequestHeader->rc = vmmdevHGCMDisconnect (p Data, pHGCMDisconnect, (RTGCPHYS)u32);1062 pRequestHeader->rc = vmmdevHGCMDisconnect (pThis, pHGCMDisconnect, (RTGCPHYS)u32); 1063 1063 } 1064 1064 break; … … 1077 1077 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1078 1078 } 1079 else if (!p Data->pHGCMDrv)1079 else if (!pThis->pHGCMDrv) 1080 1080 { 1081 1081 Log(("VMMDevReq_HGCMCall HGCM Connector is NULL!\n")); … … 1095 1095 #endif /* VBOX_WITH_64_BITS_GUESTS */ 1096 1096 1097 pRequestHeader->rc = vmmdevHGCMCall (p Data, pHGCMCall, (RTGCPHYS)u32, f64Bits);1097 pRequestHeader->rc = vmmdevHGCMCall (pThis, pHGCMCall, (RTGCPHYS)u32, f64Bits); 1098 1098 } 1099 1099 break; … … 1108 1108 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1109 1109 } 1110 else if (!p Data->pHGCMDrv)1110 else if (!pThis->pHGCMDrv) 1111 1111 { 1112 1112 Log(("VMMDevReq_HGCMCancel HGCM Connector is NULL!\n")); … … 1118 1118 1119 1119 Log(("VMMDevReq_VMMDevHGCMCancel\n")); 1120 pRequestHeader->rc = vmmdevHGCMCancel (p Data, pHGCMCancel, (RTGCPHYS)u32);1120 pRequestHeader->rc = vmmdevHGCMCancel (pThis, pHGCMCancel, (RTGCPHYS)u32); 1121 1121 } 1122 1122 break; … … 1130 1130 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1131 1131 } 1132 else if (!p Data->pDrv)1132 else if (!pThis->pDrv) 1133 1133 { 1134 1134 Log(("VMMDevReq_VideoAccelEnable Connector is NULL!!!\n")); … … 1153 1153 1154 1154 pRequestHeader->rc = ptr->u32Enable? 1155 p Data->pDrv->pfnVideoAccelEnable (pData->pDrv, true, &pData->pVMMDevRAMHC->vbvaMemory):1156 p Data->pDrv->pfnVideoAccelEnable (pData->pDrv, false, NULL);1155 pThis->pDrv->pfnVideoAccelEnable (pThis->pDrv, true, &pThis->pVMMDevRAMHC->vbvaMemory): 1156 pThis->pDrv->pfnVideoAccelEnable (pThis->pDrv, false, NULL); 1157 1157 1158 1158 if ( ptr->u32Enable … … 1164 1164 * We need to reestablish it on restoring the VM from saved state. 1165 1165 */ 1166 p Data->u32VideoAccelEnabled = 1;1166 pThis->u32VideoAccelEnabled = 1; 1167 1167 } 1168 1168 else 1169 1169 { 1170 1170 /* The acceleration was not enabled. Remember that. */ 1171 p Data->u32VideoAccelEnabled = 0;1171 pThis->u32VideoAccelEnabled = 0; 1172 1172 } 1173 1173 } … … 1183 1183 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1184 1184 } 1185 else if (!p Data->pDrv)1185 else if (!pThis->pDrv) 1186 1186 { 1187 1187 Log(("VMMDevReq_VideoAccelFlush Connector is NULL!\n")); … … 1190 1190 else 1191 1191 { 1192 p Data->pDrv->pfnVideoAccelFlush (pData->pDrv);1192 pThis->pDrv->pfnVideoAccelFlush (pThis->pDrv); 1193 1193 1194 1194 pRequestHeader->rc = VINF_SUCCESS; … … 1204 1204 pRequestHeader->rc = VERR_INVALID_PARAMETER; 1205 1205 } 1206 else if (!p Data->pDrv)1206 else if (!pThis->pDrv) 1207 1207 { 1208 1208 Log(("VMMDevReq_VideoSetVisibleRegion Connector is NULL!!!\n")); … … 1228 1228 Log(("VMMDevReq_VideoSetVisibleRegion %d rectangles\n", ptr->cRect)); 1229 1229 /* forward the call */ 1230 pRequestHeader->rc = p Data->pDrv->pfnSetVisibleRegion(pData->pDrv, ptr->cRect, &ptr->Rect);1230 pRequestHeader->rc = pThis->pDrv->pfnSetVisibleRegion(pThis->pDrv, ptr->cRect, &ptr->Rect); 1231 1231 } 1232 1232 } … … 1244 1244 VMMDevSeamlessChangeRequest *seamlessChangeRequest = (VMMDevSeamlessChangeRequest*)pRequestHeader; 1245 1245 /* just pass on the information */ 1246 Log(("VMMDev: returning seamless change request mode=%d\n", p Data->fSeamlessEnabled));1247 if (p Data->fSeamlessEnabled)1246 Log(("VMMDev: returning seamless change request mode=%d\n", pThis->fSeamlessEnabled)); 1247 if (pThis->fSeamlessEnabled) 1248 1248 seamlessChangeRequest->mode = VMMDev_Seamless_Visible_Region; 1249 1249 else … … 1253 1253 { 1254 1254 /* Remember which mode the client has queried. */ 1255 p Data->fLastSeamlessEnabled = pData->fSeamlessEnabled;1255 pThis->fLastSeamlessEnabled = pThis->fSeamlessEnabled; 1256 1256 } 1257 1257 … … 1271 1271 VMMDevVRDPChangeRequest *vrdpChangeRequest = (VMMDevVRDPChangeRequest*)pRequestHeader; 1272 1272 /* just pass on the information */ 1273 Log(("VMMDev: returning VRDP status %d level %d\n", p Data->fVRDPEnabled, pData->u32VRDPExperienceLevel));1274 1275 vrdpChangeRequest->u8VRDPActive = p Data->fVRDPEnabled;1276 vrdpChangeRequest->u32VRDPExperienceLevel = p Data->u32VRDPExperienceLevel;1273 Log(("VMMDev: returning VRDP status %d level %d\n", pThis->fVRDPEnabled, pThis->u32VRDPExperienceLevel)); 1274 1275 vrdpChangeRequest->u8VRDPActive = pThis->fVRDPEnabled; 1276 vrdpChangeRequest->u32VRDPExperienceLevel = pThis->u32VRDPExperienceLevel; 1277 1277 1278 1278 pRequestHeader->rc = VINF_SUCCESS; … … 1293 1293 VMMDevGetMemBalloonChangeRequest *memBalloonChangeRequest = (VMMDevGetMemBalloonChangeRequest*)pRequestHeader; 1294 1294 /* just pass on the information */ 1295 Log(("VMMDev: returning memory balloon size =%d\n", p Data->u32MemoryBalloonSize));1296 memBalloonChangeRequest->u32BalloonSize = p Data->u32MemoryBalloonSize;1297 memBalloonChangeRequest->u32PhysMemSize = p Data->cbGuestRAM / (uint64_t)_1M;1295 Log(("VMMDev: returning memory balloon size =%d\n", pThis->u32MemoryBalloonSize)); 1296 memBalloonChangeRequest->u32BalloonSize = pThis->u32MemoryBalloonSize; 1297 memBalloonChangeRequest->u32PhysMemSize = pThis->cbGuestRAM / (uint64_t)_1M; 1298 1298 1299 1299 if (memBalloonChangeRequest->eventAck == VMMDEV_EVENT_BALLOON_CHANGE_REQUEST) 1300 1300 { 1301 1301 /* Remember which mode the client has queried. */ 1302 p Data->u32LastMemoryBalloonSize = pData->u32MemoryBalloonSize;1302 pThis->u32LastMemoryBalloonSize = pThis->u32MemoryBalloonSize; 1303 1303 } 1304 1304 … … 1322 1322 else 1323 1323 { 1324 pRequestHeader->rc = p Data->pDrv->pfnChangeMemoryBalloon(pData->pDrv, !!memBalloonChange->fInflate, memBalloonChange->cPages, memBalloonChange->aPhysPage);1324 pRequestHeader->rc = pThis->pDrv->pfnChangeMemoryBalloon(pThis->pDrv, !!memBalloonChange->fInflate, memBalloonChange->cPages, memBalloonChange->aPhysPage); 1325 1325 } 1326 1326 break; … … 1339 1339 VMMDevGetStatisticsChangeRequest *statIntervalChangeRequest = (VMMDevGetStatisticsChangeRequest*)pRequestHeader; 1340 1340 /* just pass on the information */ 1341 Log(("VMMDev: returning statistics interval %d seconds\n", p Data->u32StatIntervalSize));1342 statIntervalChangeRequest->u32StatInterval = p Data->u32StatIntervalSize;1341 Log(("VMMDev: returning statistics interval %d seconds\n", pThis->u32StatIntervalSize)); 1342 statIntervalChangeRequest->u32StatInterval = pThis->u32StatIntervalSize; 1343 1343 1344 1344 if (statIntervalChangeRequest->eventAck == VMMDEV_EVENT_STATISTICS_INTERVAL_CHANGE_REQUEST) 1345 1345 { 1346 1346 /* Remember which mode the client has queried. */ 1347 p Data->u32LastStatIntervalSize= pData->u32StatIntervalSize;1347 pThis->u32LastStatIntervalSize= pThis->u32StatIntervalSize; 1348 1348 } 1349 1349 … … 1424 1424 1425 1425 /* forward the call */ 1426 pRequestHeader->rc = p Data->pDrv->pfnReportStatistics(pData->pDrv, &stats->guestStats);1426 pRequestHeader->rc = pThis->pDrv->pfnReportStatistics(pThis->pDrv, &stats->guestStats); 1427 1427 } 1428 1428 break; … … 1448 1448 if (credentials->u32Flags & VMMDEV_CREDENTIALS_QUERYPRESENCE) 1449 1449 { 1450 if ( p Data->credentialsLogon.szUserName[0]1451 || p Data->credentialsLogon.szPassword[0]1452 || p Data->credentialsLogon.szDomain[0])1450 if ( pThis->credentialsLogon.szUserName[0] 1451 || pThis->credentialsLogon.szPassword[0] 1452 || pThis->credentialsLogon.szDomain[0]) 1453 1453 { 1454 1454 credentials->u32Flags |= VMMDEV_CREDENTIALS_PRESENT; … … 1463 1463 if (credentials->u32Flags & VMMDEV_CREDENTIALS_READ) 1464 1464 { 1465 if (p Data->credentialsLogon.szUserName[0])1466 strcpy(credentials->szUserName, p Data->credentialsLogon.szUserName);1467 if (p Data->credentialsLogon.szPassword[0])1468 strcpy(credentials->szPassword, p Data->credentialsLogon.szPassword);1469 if (p Data->credentialsLogon.szDomain[0])1470 strcpy(credentials->szDomain, p Data->credentialsLogon.szDomain);1471 if (!p Data->credentialsLogon.fAllowInteractiveLogon)1465 if (pThis->credentialsLogon.szUserName[0]) 1466 strcpy(credentials->szUserName, pThis->credentialsLogon.szUserName); 1467 if (pThis->credentialsLogon.szPassword[0]) 1468 strcpy(credentials->szPassword, pThis->credentialsLogon.szPassword); 1469 if (pThis->credentialsLogon.szDomain[0]) 1470 strcpy(credentials->szDomain, pThis->credentialsLogon.szDomain); 1471 if (!pThis->credentialsLogon.fAllowInteractiveLogon) 1472 1472 credentials->u32Flags |= VMMDEV_CREDENTIALS_NOLOCALLOGON; 1473 1473 else … … 1475 1475 } 1476 1476 1477 if (!p Data->fKeepCredentials)1477 if (!pThis->fKeepCredentials) 1478 1478 { 1479 1479 /* does the caller want us to destroy the logon credentials? */ 1480 1480 if (credentials->u32Flags & VMMDEV_CREDENTIALS_CLEAR) 1481 1481 { 1482 memset(p Data->credentialsLogon.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN);1483 memset(p Data->credentialsLogon.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN);1484 memset(p Data->credentialsLogon.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN);1482 memset(pThis->credentialsLogon.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN); 1483 memset(pThis->credentialsLogon.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN); 1484 memset(pThis->credentialsLogon.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN); 1485 1485 } 1486 1486 } … … 1489 1489 if (credentials->u32Flags & VMMDEV_CREDENTIALS_READJUDGE) 1490 1490 { 1491 if (p Data->credentialsJudge.szUserName[0])1492 strcpy(credentials->szUserName, p Data->credentialsJudge.szUserName);1493 if (p Data->credentialsJudge.szPassword[0])1494 strcpy(credentials->szPassword, p Data->credentialsJudge.szPassword);1495 if (p Data->credentialsJudge.szDomain[0])1496 strcpy(credentials->szDomain, p Data->credentialsJudge.szDomain);1491 if (pThis->credentialsJudge.szUserName[0]) 1492 strcpy(credentials->szUserName, pThis->credentialsJudge.szUserName); 1493 if (pThis->credentialsJudge.szPassword[0]) 1494 strcpy(credentials->szPassword, pThis->credentialsJudge.szPassword); 1495 if (pThis->credentialsJudge.szDomain[0]) 1496 strcpy(credentials->szDomain, pThis->credentialsJudge.szDomain); 1497 1497 } 1498 1498 … … 1500 1500 if (credentials->u32Flags & VMMDEV_CREDENTIALS_CLEARJUDGE) 1501 1501 { 1502 memset(p Data->credentialsJudge.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN);1503 memset(p Data->credentialsJudge.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN);1504 memset(p Data->credentialsJudge.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN);1502 memset(pThis->credentialsJudge.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN); 1503 memset(pThis->credentialsJudge.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN); 1504 memset(pThis->credentialsJudge.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN); 1505 1505 } 1506 1506 … … 1524 1524 if (credentials->u32Flags & VMMDEV_CREDENTIALS_JUDGE_DENY) 1525 1525 { 1526 p Data->pDrv->pfnSetCredentialsJudgementResult(pData->pDrv, VMMDEV_CREDENTIALS_JUDGE_DENY);1526 pThis->pDrv->pfnSetCredentialsJudgementResult(pThis->pDrv, VMMDEV_CREDENTIALS_JUDGE_DENY); 1527 1527 } 1528 1528 else if (credentials->u32Flags & VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT) 1529 1529 { 1530 p Data->pDrv->pfnSetCredentialsJudgementResult(pData->pDrv, VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT);1530 pThis->pDrv->pfnSetCredentialsJudgementResult(pThis->pDrv, VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT); 1531 1531 } 1532 1532 else if (credentials->u32Flags & VMMDEV_CREDENTIALS_JUDGE_OK) 1533 1533 { 1534 p Data->pDrv->pfnSetCredentialsJudgementResult(pData->pDrv, VMMDEV_CREDENTIALS_JUDGE_OK);1534 pThis->pDrv->pfnSetCredentialsJudgementResult(pThis->pDrv, VMMDEV_CREDENTIALS_JUDGE_OK); 1535 1535 } 1536 1536 else … … 1604 1604 { 1605 1605 LogFlow(("vmmdevR3IORAMRegionMap: iRegion=%d GCPhysAddress=%VGp cb=%#x enmType=%d\n", iRegion, GCPhysAddress, cb, enmType)); 1606 VMMDevState *p Data= PCIDEV_2_VMMDEVSTATE(pPciDev);1606 VMMDevState *pThis = PCIDEV_2_VMMDEVSTATE(pPciDev); 1607 1607 int rc; 1608 1608 1609 1609 AssertReturn(iRegion == 1 && enmType == PCI_ADDRESS_SPACE_MEM, VERR_INTERNAL_ERROR); 1610 Assert(p Data->pVMMDevRAMHC != NULL);1610 Assert(pThis->pVMMDevRAMHC != NULL); 1611 1611 1612 1612 if (GCPhysAddress != NIL_RTGCPHYS) … … 1615 1615 * Map the MMIO2 memory. 1616 1616 */ 1617 p Data->GCPhysVMMDevRAM = GCPhysAddress;1618 Assert(p Data->GCPhysVMMDevRAM == GCPhysAddress);1617 pThis->GCPhysVMMDevRAM = GCPhysAddress; 1618 Assert(pThis->GCPhysVMMDevRAM == GCPhysAddress); 1619 1619 rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress); 1620 1620 } … … 1624 1624 * It is about to be unmapped, just clean up. 1625 1625 */ 1626 p Data->GCPhysVMMDevRAM = NIL_RTGCPHYS32;1626 pThis->GCPhysVMMDevRAM = NIL_RTGCPHYS32; 1627 1627 rc = VINF_SUCCESS; 1628 1628 } … … 1645 1645 static DECLCALLBACK(int) vmmdevIOPortRegionMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 1646 1646 { 1647 VMMDevState *p Data= PCIDEV_2_VMMDEVSTATE(pPciDev);1647 VMMDevState *pThis = PCIDEV_2_VMMDEVSTATE(pPciDev); 1648 1648 int rc = VINF_SUCCESS; 1649 1649 … … 1655 1655 * Save the base port address to simplify Port offset calculations. 1656 1656 */ 1657 p Data->PortBase = (RTIOPORT)GCPhysAddress;1657 pThis->PortBase = (RTIOPORT)GCPhysAddress; 1658 1658 1659 1659 /* … … 1662 1662 rc = PDMDevHlpIOPortRegister(pPciDev->pDevIns, 1663 1663 (RTIOPORT)GCPhysAddress + PORT_VMMDEV_REQUEST_OFFSET, 1, 1664 (void*)p Data, vmmdevRequestHandler,1664 (void*)pThis, vmmdevRequestHandler, 1665 1665 NULL, NULL, NULL, "VMMDev Request Handler"); 1666 1666 AssertRC(rc); … … 1679 1679 static DECLCALLBACK(void *) vmmdevPortQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface) 1680 1680 { 1681 VMMDevState *p Data= (VMMDevState*)((uintptr_t)pInterface - RT_OFFSETOF(VMMDevState, Base));1681 VMMDevState *pThis = (VMMDevState*)((uintptr_t)pInterface - RT_OFFSETOF(VMMDevState, Base)); 1682 1682 switch (enmInterface) 1683 1683 { 1684 1684 case PDMINTERFACE_BASE: 1685 return &p Data->Base;1685 return &pThis->Base; 1686 1686 case PDMINTERFACE_VMMDEV_PORT: 1687 return &p Data->Port;1687 return &pThis->Port; 1688 1688 #ifdef VBOX_HGCM 1689 1689 case PDMINTERFACE_HGCM_PORT: 1690 return &p Data->HGCMPort;1690 return &pThis->HGCMPort; 1691 1691 #endif 1692 1692 case PDMINTERFACE_LED_PORTS: 1693 1693 /* Currently only for shared folders */ 1694 return &p Data->SharedFolders.ILeds;1694 return &pThis->SharedFolders.ILeds; 1695 1695 default: 1696 1696 return NULL; … … 1708 1708 static DECLCALLBACK(int) vmmdevQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 1709 1709 { 1710 VMMDevState *p Data= (VMMDevState *)( (uintptr_t)pInterface - RT_OFFSETOF(VMMDevState, SharedFolders.ILeds) );1710 VMMDevState *pThis = (VMMDevState *)( (uintptr_t)pInterface - RT_OFFSETOF(VMMDevState, SharedFolders.ILeds) ); 1711 1711 if (iLUN == 0) /* LUN 0 is shared folders */ 1712 1712 { 1713 *ppLed = &p Data->SharedFolders.Led;1713 *ppLed = &pThis->SharedFolders.Led; 1714 1714 return VINF_SUCCESS; 1715 1715 } … … 1732 1732 static DECLCALLBACK(int) vmmdevQueryAbsoluteMouse(PPDMIVMMDEVPORT pInterface, uint32_t *pAbsX, uint32_t *pAbsY) 1733 1733 { 1734 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1734 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1735 1735 if (pAbsX) 1736 *pAbsX = p Data->mouseXAbs;1736 *pAbsX = pThis->mouseXAbs; 1737 1737 if (pAbsY) 1738 *pAbsY = p Data->mouseYAbs;1738 *pAbsY = pThis->mouseYAbs; 1739 1739 return VINF_SUCCESS; 1740 1740 } … … 1749 1749 static DECLCALLBACK(int) vmmdevSetAbsoluteMouse(PPDMIVMMDEVPORT pInterface, uint32_t absX, uint32_t absY) 1750 1750 { 1751 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1751 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1752 1752 Log2(("vmmdevSetAbsoluteMouse: settings absolute position to x = %d, y = %d\n", absX, absY)); 1753 p Data->mouseXAbs = absX;1754 p Data->mouseYAbs = absY;1753 pThis->mouseXAbs = absX; 1754 pThis->mouseYAbs = absY; 1755 1755 return VINF_SUCCESS; 1756 1756 } … … 1764 1764 static DECLCALLBACK(int) vmmdevQueryMouseCapabilities(PPDMIVMMDEVPORT pInterface, uint32_t *pCapabilities) 1765 1765 { 1766 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1766 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1767 1767 if (!pCapabilities) 1768 1768 return VERR_INVALID_PARAMETER; 1769 *pCapabilities = p Data->mouseCapabilities;1769 *pCapabilities = pThis->mouseCapabilities; 1770 1770 return VINF_SUCCESS; 1771 1771 } … … 1779 1779 static DECLCALLBACK(int) vmmdevSetMouseCapabilities(PPDMIVMMDEVPORT pInterface, uint32_t capabilities) 1780 1780 { 1781 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1781 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1782 1782 1783 1783 bool bCapsChanged = ((capabilities & VMMDEV_MOUSEHOSTWANTSABS) 1784 != (p Data->mouseCapabilities & VMMDEV_MOUSEHOSTWANTSABS));1784 != (pThis->mouseCapabilities & VMMDEV_MOUSEHOSTWANTSABS)); 1785 1785 1786 1786 Log(("vmmdevSetMouseCapabilities: bCapsChanged %d\n", bCapsChanged)); 1787 1787 1788 1788 if (capabilities & VMMDEV_MOUSEHOSTCANNOTHWPOINTER) 1789 p Data->mouseCapabilities |= VMMDEV_MOUSEHOSTCANNOTHWPOINTER;1789 pThis->mouseCapabilities |= VMMDEV_MOUSEHOSTCANNOTHWPOINTER; 1790 1790 else 1791 p Data->mouseCapabilities &= ~VMMDEV_MOUSEHOSTCANNOTHWPOINTER;1791 pThis->mouseCapabilities &= ~VMMDEV_MOUSEHOSTCANNOTHWPOINTER; 1792 1792 1793 1793 if (capabilities & VMMDEV_MOUSEHOSTWANTSABS) 1794 p Data->mouseCapabilities |= VMMDEV_MOUSEHOSTWANTSABS;1794 pThis->mouseCapabilities |= VMMDEV_MOUSEHOSTWANTSABS; 1795 1795 else 1796 p Data->mouseCapabilities &= ~VMMDEV_MOUSEHOSTWANTSABS;1796 pThis->mouseCapabilities &= ~VMMDEV_MOUSEHOSTWANTSABS; 1797 1797 1798 1798 if (bCapsChanged) 1799 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED);1799 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED); 1800 1800 1801 1801 return VINF_SUCCESS; … … 1805 1805 static DECLCALLBACK(int) vmmdevRequestDisplayChange(PPDMIVMMDEVPORT pInterface, uint32_t xres, uint32_t yres, uint32_t bpp, uint32_t display) 1806 1806 { 1807 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1807 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1808 1808 1809 1809 /* Verify that the new resolution is different and that guest does not yet know about it. */ 1810 bool fSameResolution = (!xres || (p Data->lastReadDisplayChangeRequest.xres == xres)) &&1811 (!yres || (p Data->lastReadDisplayChangeRequest.yres == yres)) &&1812 (!bpp || (p Data->lastReadDisplayChangeRequest.bpp == bpp)) &&1813 p Data->lastReadDisplayChangeRequest.display == display;1810 bool fSameResolution = (!xres || (pThis->lastReadDisplayChangeRequest.xres == xres)) && 1811 (!yres || (pThis->lastReadDisplayChangeRequest.yres == yres)) && 1812 (!bpp || (pThis->lastReadDisplayChangeRequest.bpp == bpp)) && 1813 pThis->lastReadDisplayChangeRequest.display == display; 1814 1814 1815 1815 if (!xres && !yres && !bpp) … … 1820 1820 1821 1821 Log3(("vmmdevRequestDisplayChange: same=%d. new: xres=%d, yres=%d, bpp=%d, display=%d. old: xres=%d, yres=%d, bpp=%d, display=%d.\n", 1822 fSameResolution, xres, yres, bpp, display, p Data->lastReadDisplayChangeRequest.xres, pData->lastReadDisplayChangeRequest.yres, pData->lastReadDisplayChangeRequest.bpp, pData->lastReadDisplayChangeRequest.display));1822 fSameResolution, xres, yres, bpp, display, pThis->lastReadDisplayChangeRequest.xres, pThis->lastReadDisplayChangeRequest.yres, pThis->lastReadDisplayChangeRequest.bpp, pThis->lastReadDisplayChangeRequest.display)); 1823 1823 1824 1824 if (!fSameResolution) … … 1828 1828 1829 1829 /* we could validate the information here but hey, the guest can do that as well! */ 1830 p Data->displayChangeRequest.xres = xres;1831 p Data->displayChangeRequest.yres = yres;1832 p Data->displayChangeRequest.bpp = bpp;1833 p Data->displayChangeRequest.display = display;1830 pThis->displayChangeRequest.xres = xres; 1831 pThis->displayChangeRequest.yres = yres; 1832 pThis->displayChangeRequest.bpp = bpp; 1833 pThis->displayChangeRequest.display = display; 1834 1834 1835 1835 /* IRQ so the guest knows what's going on */ 1836 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST);1836 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST); 1837 1837 } 1838 1838 … … 1842 1842 static DECLCALLBACK(int) vmmdevRequestSeamlessChange(PPDMIVMMDEVPORT pInterface, bool fEnabled) 1843 1843 { 1844 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1844 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1845 1845 1846 1846 /* Verify that the new resolution is different and that guest does not yet know about it. */ 1847 bool fSameMode = (p Data->fLastSeamlessEnabled == fEnabled);1847 bool fSameMode = (pThis->fLastSeamlessEnabled == fEnabled); 1848 1848 1849 1849 Log(("vmmdevRequestSeamlessChange: same=%d. new=%d\n", fSameMode, fEnabled)); … … 1852 1852 { 1853 1853 /* we could validate the information here but hey, the guest can do that as well! */ 1854 p Data->fSeamlessEnabled = fEnabled;1854 pThis->fSeamlessEnabled = fEnabled; 1855 1855 1856 1856 /* IRQ so the guest knows what's going on */ 1857 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST);1857 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST); 1858 1858 } 1859 1859 … … 1863 1863 static DECLCALLBACK(int) vmmdevSetMemoryBalloon(PPDMIVMMDEVPORT pInterface, uint32_t ulBalloonSize) 1864 1864 { 1865 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1865 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1866 1866 1867 1867 /* Verify that the new resolution is different and that guest does not yet know about it. */ 1868 bool fSame = (p Data->u32LastMemoryBalloonSize == ulBalloonSize);1869 1870 Log(("vmmdevSetMemoryBalloon: old=%d. new=%d\n", p Data->u32LastMemoryBalloonSize, ulBalloonSize));1868 bool fSame = (pThis->u32LastMemoryBalloonSize == ulBalloonSize); 1869 1870 Log(("vmmdevSetMemoryBalloon: old=%d. new=%d\n", pThis->u32LastMemoryBalloonSize, ulBalloonSize)); 1871 1871 1872 1872 if (!fSame) 1873 1873 { 1874 1874 /* we could validate the information here but hey, the guest can do that as well! */ 1875 p Data->u32MemoryBalloonSize = ulBalloonSize;1875 pThis->u32MemoryBalloonSize = ulBalloonSize; 1876 1876 1877 1877 /* IRQ so the guest knows what's going on */ 1878 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_BALLOON_CHANGE_REQUEST);1878 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_BALLOON_CHANGE_REQUEST); 1879 1879 } 1880 1880 … … 1884 1884 static DECLCALLBACK(int) vmmdevVRDPChange(PPDMIVMMDEVPORT pInterface, bool fVRDPEnabled, uint32_t u32VRDPExperienceLevel) 1885 1885 { 1886 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1887 1888 bool fSame = (p Data->fVRDPEnabled == fVRDPEnabled);1889 1890 Log(("vmmdevVRDPChange: old=%d. new=%d\n", p Data->fVRDPEnabled, fVRDPEnabled));1886 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1887 1888 bool fSame = (pThis->fVRDPEnabled == fVRDPEnabled); 1889 1890 Log(("vmmdevVRDPChange: old=%d. new=%d\n", pThis->fVRDPEnabled, fVRDPEnabled)); 1891 1891 1892 1892 if (!fSame) 1893 1893 { 1894 p Data->fVRDPEnabled = fVRDPEnabled;1895 p Data->u32VRDPExperienceLevel = u32VRDPExperienceLevel;1896 1897 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_VRDP);1894 pThis->fVRDPEnabled = fVRDPEnabled; 1895 pThis->u32VRDPExperienceLevel = u32VRDPExperienceLevel; 1896 1897 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_VRDP); 1898 1898 } 1899 1899 … … 1903 1903 static DECLCALLBACK(int) vmmdevSetStatisticsInterval(PPDMIVMMDEVPORT pInterface, uint32_t ulStatInterval) 1904 1904 { 1905 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1905 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1906 1906 1907 1907 /* Verify that the new resolution is different and that guest does not yet know about it. */ 1908 bool fSame = (p Data->u32LastStatIntervalSize == ulStatInterval);1909 1910 Log(("vmmdevSetStatisticsInterval: old=%d. new=%d\n", p Data->u32LastStatIntervalSize, ulStatInterval));1908 bool fSame = (pThis->u32LastStatIntervalSize == ulStatInterval); 1909 1910 Log(("vmmdevSetStatisticsInterval: old=%d. new=%d\n", pThis->u32LastStatIntervalSize, ulStatInterval)); 1911 1911 1912 1912 if (!fSame) 1913 1913 { 1914 1914 /* we could validate the information here but hey, the guest can do that as well! */ 1915 p Data->u32StatIntervalSize = ulStatInterval;1915 pThis->u32StatIntervalSize = ulStatInterval; 1916 1916 1917 1917 /* IRQ so the guest knows what's going on */ 1918 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_STATISTICS_INTERVAL_CHANGE_REQUEST);1918 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_STATISTICS_INTERVAL_CHANGE_REQUEST); 1919 1919 } 1920 1920 … … 1927 1927 uint32_t u32Flags) 1928 1928 { 1929 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1929 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1930 1930 1931 1931 /* logon mode? */ … … 1933 1933 { 1934 1934 /* memorize the data */ 1935 strcpy(p Data->credentialsLogon.szUserName, pszUsername);1936 strcpy(p Data->credentialsLogon.szPassword, pszPassword);1937 strcpy(p Data->credentialsLogon.szDomain, pszDomain);1938 p Data->credentialsLogon.fAllowInteractiveLogon = !(u32Flags & VMMDEV_SETCREDENTIALS_NOLOCALLOGON);1935 strcpy(pThis->credentialsLogon.szUserName, pszUsername); 1936 strcpy(pThis->credentialsLogon.szPassword, pszPassword); 1937 strcpy(pThis->credentialsLogon.szDomain, pszDomain); 1938 pThis->credentialsLogon.fAllowInteractiveLogon = !(u32Flags & VMMDEV_SETCREDENTIALS_NOLOCALLOGON); 1939 1939 } 1940 1940 /* credentials verification mode? */ … … 1942 1942 { 1943 1943 /* memorize the data */ 1944 strcpy(p Data->credentialsJudge.szUserName, pszUsername);1945 strcpy(p Data->credentialsJudge.szPassword, pszPassword);1946 strcpy(p Data->credentialsJudge.szDomain, pszDomain);1947 1948 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_JUDGE_CREDENTIALS);1944 strcpy(pThis->credentialsJudge.szUserName, pszUsername); 1945 strcpy(pThis->credentialsJudge.szPassword, pszPassword); 1946 strcpy(pThis->credentialsJudge.szDomain, pszDomain); 1947 1948 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_JUDGE_CREDENTIALS); 1949 1949 } 1950 1950 else … … 1962 1962 static DECLCALLBACK(void) vmmdevVBVAChange(PPDMIVMMDEVPORT pInterface, bool fEnabled) 1963 1963 { 1964 VMMDevState *p Data= IVMMDEVPORT_2_VMMDEVSTATE(pInterface);1964 VMMDevState *pThis = IVMMDEVPORT_2_VMMDEVSTATE(pInterface); 1965 1965 1966 1966 Log(("vmmdevVBVAChange: fEnabled = %d\n", fEnabled)); 1967 1967 1968 if (p Data)1969 { 1970 p Data->u32VideoAccelEnabled = fEnabled;1968 if (pThis) 1969 { 1970 pThis->u32VideoAccelEnabled = fEnabled; 1971 1971 } 1972 1972 … … 1993 1993 static DECLCALLBACK(int) vmmdevSaveState(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 1994 1994 { 1995 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState*);1996 SSMR3PutU32(pSSMHandle, p Data->hypervisorSize);1997 SSMR3PutU32(pSSMHandle, p Data->mouseCapabilities);1998 SSMR3PutU32(pSSMHandle, p Data->mouseXAbs);1999 SSMR3PutU32(pSSMHandle, p Data->mouseYAbs);2000 2001 SSMR3PutBool(pSSMHandle, p Data->fNewGuestFilterMask);2002 SSMR3PutU32(pSSMHandle, p Data->u32NewGuestFilterMask);2003 SSMR3PutU32(pSSMHandle, p Data->u32GuestFilterMask);2004 SSMR3PutU32(pSSMHandle, p Data->u32HostEventFlags);1995 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState*); 1996 SSMR3PutU32(pSSMHandle, pThis->hypervisorSize); 1997 SSMR3PutU32(pSSMHandle, pThis->mouseCapabilities); 1998 SSMR3PutU32(pSSMHandle, pThis->mouseXAbs); 1999 SSMR3PutU32(pSSMHandle, pThis->mouseYAbs); 2000 2001 SSMR3PutBool(pSSMHandle, pThis->fNewGuestFilterMask); 2002 SSMR3PutU32(pSSMHandle, pThis->u32NewGuestFilterMask); 2003 SSMR3PutU32(pSSMHandle, pThis->u32GuestFilterMask); 2004 SSMR3PutU32(pSSMHandle, pThis->u32HostEventFlags); 2005 2005 // here be dragons (probably) 2006 // SSMR3PutBool(pSSMHandle, p Data->pVMMDevRAMHC->V.V1_04.fHaveEvents);2007 SSMR3PutMem(pSSMHandle, &p Data->pVMMDevRAMHC->V, sizeof (pData->pVMMDevRAMHC->V));2008 2009 SSMR3PutMem(pSSMHandle, &p Data->guestInfo, sizeof (pData->guestInfo));2010 SSMR3PutU32(pSSMHandle, p Data->fu32AdditionsOk);2011 SSMR3PutU32(pSSMHandle, p Data->u32VideoAccelEnabled);2012 2013 SSMR3PutU32(pSSMHandle, p Data->guestCaps);2006 // SSMR3PutBool(pSSMHandle, pThis->pVMMDevRAMHC->V.V1_04.fHaveEvents); 2007 SSMR3PutMem(pSSMHandle, &pThis->pVMMDevRAMHC->V, sizeof (pThis->pVMMDevRAMHC->V)); 2008 2009 SSMR3PutMem(pSSMHandle, &pThis->guestInfo, sizeof (pThis->guestInfo)); 2010 SSMR3PutU32(pSSMHandle, pThis->fu32AdditionsOk); 2011 SSMR3PutU32(pSSMHandle, pThis->u32VideoAccelEnabled); 2012 2013 SSMR3PutU32(pSSMHandle, pThis->guestCaps); 2014 2014 2015 2015 #ifdef VBOX_HGCM 2016 vmmdevHGCMSaveState (p Data, pSSMHandle);2016 vmmdevHGCMSaveState (pThis, pSSMHandle); 2017 2017 #endif /* VBOX_HGCM */ 2018 2018 … … 2031 2031 { 2032 2032 /** @todo The code load code is assuming we're always loaded into a fresh VM. */ 2033 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState*);2033 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState*); 2034 2034 if ( SSM_VERSION_MAJOR_CHANGED(u32Version, VMMDEV_SSM_VERSION) 2035 2035 || (SSM_VERSION_MINOR(u32Version) < 6)) 2036 2036 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION; 2037 2037 2038 SSMR3GetU32(pSSMHandle, &p Data->hypervisorSize);2039 SSMR3GetU32(pSSMHandle, &p Data->mouseCapabilities);2040 SSMR3GetU32(pSSMHandle, &p Data->mouseXAbs);2041 SSMR3GetU32(pSSMHandle, &p Data->mouseYAbs);2042 2043 SSMR3GetBool(pSSMHandle, &p Data->fNewGuestFilterMask);2044 SSMR3GetU32(pSSMHandle, &p Data->u32NewGuestFilterMask);2045 SSMR3GetU32(pSSMHandle, &p Data->u32GuestFilterMask);2046 SSMR3GetU32(pSSMHandle, &p Data->u32HostEventFlags);2047 // SSMR3GetBool(pSSMHandle, &p Data->pVMMDevRAMHC->fHaveEvents);2038 SSMR3GetU32(pSSMHandle, &pThis->hypervisorSize); 2039 SSMR3GetU32(pSSMHandle, &pThis->mouseCapabilities); 2040 SSMR3GetU32(pSSMHandle, &pThis->mouseXAbs); 2041 SSMR3GetU32(pSSMHandle, &pThis->mouseYAbs); 2042 2043 SSMR3GetBool(pSSMHandle, &pThis->fNewGuestFilterMask); 2044 SSMR3GetU32(pSSMHandle, &pThis->u32NewGuestFilterMask); 2045 SSMR3GetU32(pSSMHandle, &pThis->u32GuestFilterMask); 2046 SSMR3GetU32(pSSMHandle, &pThis->u32HostEventFlags); 2047 // SSMR3GetBool(pSSMHandle, &pThis->pVMMDevRAMHC->fHaveEvents); 2048 2048 // here be dragons (probably) 2049 SSMR3GetMem(pSSMHandle, &p Data->pVMMDevRAMHC->V, sizeof (pData->pVMMDevRAMHC->V));2050 2051 SSMR3GetMem(pSSMHandle, &p Data->guestInfo, sizeof (pData->guestInfo));2052 SSMR3GetU32(pSSMHandle, &p Data->fu32AdditionsOk);2053 SSMR3GetU32(pSSMHandle, &p Data->u32VideoAccelEnabled);2054 2055 SSMR3GetU32(pSSMHandle, &p Data->guestCaps);2049 SSMR3GetMem(pSSMHandle, &pThis->pVMMDevRAMHC->V, sizeof (pThis->pVMMDevRAMHC->V)); 2050 2051 SSMR3GetMem(pSSMHandle, &pThis->guestInfo, sizeof (pThis->guestInfo)); 2052 SSMR3GetU32(pSSMHandle, &pThis->fu32AdditionsOk); 2053 SSMR3GetU32(pSSMHandle, &pThis->u32VideoAccelEnabled); 2054 2055 SSMR3GetU32(pSSMHandle, &pThis->guestCaps); 2056 2056 2057 2057 /* Attributes which were temporarily introduced in r30072 */ … … 2065 2065 2066 2066 #ifdef VBOX_HGCM 2067 vmmdevHGCMLoadState (p Data, pSSMHandle);2067 vmmdevHGCMLoadState (pThis, pSSMHandle); 2068 2068 #endif /* VBOX_HGCM */ 2069 2069 … … 2072 2072 * that listeners can sync their state again 2073 2073 */ 2074 Log(("vmmdevLoadState: capabilities changed (%x), informing connector\n", p Data->mouseCapabilities));2075 if (p Data->pDrv)2076 p Data->pDrv->pfnUpdateMouseCapabilities(pData->pDrv, pData->mouseCapabilities);2074 Log(("vmmdevLoadState: capabilities changed (%x), informing connector\n", pThis->mouseCapabilities)); 2075 if (pThis->pDrv) 2076 pThis->pDrv->pfnUpdateMouseCapabilities(pThis->pDrv, pThis->mouseCapabilities); 2077 2077 2078 2078 /* Reestablish the acceleration status. */ 2079 if ( p Data->u32VideoAccelEnabled2080 && p Data->pDrv)2081 { 2082 p Data->pDrv->pfnVideoAccelEnable (pData->pDrv, !!pData->u32VideoAccelEnabled, &pData->pVMMDevRAMHC->vbvaMemory);2083 } 2084 2085 if (p Data->fu32AdditionsOk)2079 if ( pThis->u32VideoAccelEnabled 2080 && pThis->pDrv) 2081 { 2082 pThis->pDrv->pfnVideoAccelEnable (pThis->pDrv, !!pThis->u32VideoAccelEnabled, &pThis->pVMMDevRAMHC->vbvaMemory); 2083 } 2084 2085 if (pThis->fu32AdditionsOk) 2086 2086 { 2087 2087 LogRel(("Guest Additions information report: additionsVersion = 0x%08X, osType = 0x%08X\n", 2088 p Data->guestInfo.additionsVersion,2089 p Data->guestInfo.osType));2090 if (p Data->pDrv)2091 p Data->pDrv->pfnUpdateGuestVersion(pData->pDrv, &pData->guestInfo);2092 } 2093 if (p Data->pDrv)2094 p Data->pDrv->pfnUpdateGuestCapabilities(pData->pDrv, pData->guestCaps);2088 pThis->guestInfo.additionsVersion, 2089 pThis->guestInfo.osType)); 2090 if (pThis->pDrv) 2091 pThis->pDrv->pfnUpdateGuestVersion(pThis->pDrv, &pThis->guestInfo); 2092 } 2093 if (pThis->pDrv) 2094 pThis->pDrv->pfnUpdateGuestCapabilities(pThis->pDrv, pThis->guestCaps); 2095 2095 2096 2096 return VINF_SUCCESS; … … 2106 2106 static DECLCALLBACK(int) vmmdevLoadStateDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 2107 2107 { 2108 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState*);2108 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState*); 2109 2109 2110 2110 #ifdef VBOX_HGCM 2111 vmmdevHGCMLoadStateDone (p Data, pSSMHandle);2111 vmmdevHGCMLoadStateDone (pThis, pSSMHandle); 2112 2112 #endif /* VBOX_HGCM */ 2113 2113 2114 VMMDevNotifyGuest (p Data, VMMDEV_EVENT_RESTORED);2114 VMMDevNotifyGuest (pThis, VMMDEV_EVENT_RESTORED); 2115 2115 2116 2116 return VINF_SUCCESS; … … 2120 2120 * (Re-)initializes the MMIO2 data. 2121 2121 * 2122 * @param p DataPointer to the VMMDev instance data.2122 * @param pThis Pointer to the VMMDev instance data. 2123 2123 */ 2124 static void vmmdevInitRam(VMMDevState *p Data)2125 { 2126 memset(p Data->pVMMDevRAMHC, 0, sizeof(VMMDevMemory));2127 p Data->pVMMDevRAMHC->u32Size = sizeof(VMMDevMemory);2128 p Data->pVMMDevRAMHC->u32Version = VMMDEV_MEMORY_VERSION;2124 static void vmmdevInitRam(VMMDevState *pThis) 2125 { 2126 memset(pThis->pVMMDevRAMHC, 0, sizeof(VMMDevMemory)); 2127 pThis->pVMMDevRAMHC->u32Size = sizeof(VMMDevMemory); 2128 pThis->pVMMDevRAMHC->u32Version = VMMDEV_MEMORY_VERSION; 2129 2129 } 2130 2130 … … 2145 2145 { 2146 2146 int rc; 2147 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState *);2147 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState *); 2148 2148 2149 2149 Assert(iInstance == 0); … … 2155 2155 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES; 2156 2156 2157 rc = CFGMR3QueryBool(pCfgHandle, "GetHostTimeDisabled", &p Data->fGetHostTimeDisabled);2157 rc = CFGMR3QueryBool(pCfgHandle, "GetHostTimeDisabled", &pThis->fGetHostTimeDisabled); 2158 2158 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 2159 p Data->fGetHostTimeDisabled = false;2159 pThis->fGetHostTimeDisabled = false; 2160 2160 else if (RT_FAILURE(rc)) 2161 2161 return PDMDEV_SET_ERROR(pDevIns, rc, 2162 2162 N_("Configuration error: Failed querying \"GetHostTimeDisabled\" as a boolean")); 2163 2163 2164 rc = CFGMR3QueryBool(pCfgHandle, "BackdoorLogDisabled", &p Data->fBackdoorLogDisabled);2164 rc = CFGMR3QueryBool(pCfgHandle, "BackdoorLogDisabled", &pThis->fBackdoorLogDisabled); 2165 2165 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 2166 p Data->fBackdoorLogDisabled = false;2166 pThis->fBackdoorLogDisabled = false; 2167 2167 else if (RT_FAILURE(rc)) 2168 2168 return PDMDEV_SET_ERROR(pDevIns, rc, 2169 2169 N_("Configuration error: Failed querying \"BackdoorLogDisabled\" as a boolean")); 2170 2170 2171 rc = CFGMR3QueryBool(pCfgHandle, "KeepCredentials", &p Data->fKeepCredentials);2171 rc = CFGMR3QueryBool(pCfgHandle, "KeepCredentials", &pThis->fKeepCredentials); 2172 2172 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 2173 p Data->fKeepCredentials = false;2173 pThis->fKeepCredentials = false; 2174 2174 else if (RT_FAILURE(rc)) 2175 2175 return PDMDEV_SET_ERROR(pDevIns, rc, … … 2180 2180 */ 2181 2181 /* Save PDM device instance data for future reference. */ 2182 p Data->pDevIns = pDevIns;2182 pThis->pDevIns = pDevIns; 2183 2183 2184 2184 /* PCI vendor, just a free bogus value */ 2185 p Data->dev.config[0x00] = 0xee;2186 p Data->dev.config[0x01] = 0x80;2185 pThis->dev.config[0x00] = 0xee; 2186 pThis->dev.config[0x01] = 0x80; 2187 2187 /* device ID */ 2188 p Data->dev.config[0x02] = 0xfe;2189 p Data->dev.config[0x03] = 0xca;2188 pThis->dev.config[0x02] = 0xfe; 2189 pThis->dev.config[0x03] = 0xca; 2190 2190 /* class sub code (other type of system peripheral) */ 2191 p Data->dev.config[0x0a] = 0x80;2191 pThis->dev.config[0x0a] = 0x80; 2192 2192 /* class base code (base system peripheral) */ 2193 p Data->dev.config[0x0b] = 0x08;2193 pThis->dev.config[0x0b] = 0x08; 2194 2194 /* header type */ 2195 p Data->dev.config[0x0e] = 0x00;2195 pThis->dev.config[0x0e] = 0x00; 2196 2196 /* interrupt on pin 0 */ 2197 p Data->dev.config[0x3d] = 0x01;2197 pThis->dev.config[0x3d] = 0x01; 2198 2198 2199 2199 /* … … 2201 2201 */ 2202 2202 /* Base */ 2203 p Data->Base.pfnQueryInterface = vmmdevPortQueryInterface;2203 pThis->Base.pfnQueryInterface = vmmdevPortQueryInterface; 2204 2204 2205 2205 /* VMMDev port */ 2206 p Data->Port.pfnQueryAbsoluteMouse = vmmdevQueryAbsoluteMouse;2207 p Data->Port.pfnSetAbsoluteMouse = vmmdevSetAbsoluteMouse;2208 p Data->Port.pfnQueryMouseCapabilities = vmmdevQueryMouseCapabilities;2209 p Data->Port.pfnSetMouseCapabilities = vmmdevSetMouseCapabilities;2210 p Data->Port.pfnRequestDisplayChange = vmmdevRequestDisplayChange;2211 p Data->Port.pfnSetCredentials = vmmdevSetCredentials;2212 p Data->Port.pfnVBVAChange = vmmdevVBVAChange;2213 p Data->Port.pfnRequestSeamlessChange = vmmdevRequestSeamlessChange;2214 p Data->Port.pfnSetMemoryBalloon = vmmdevSetMemoryBalloon;2215 p Data->Port.pfnSetStatisticsInterval = vmmdevSetStatisticsInterval;2216 p Data->Port.pfnVRDPChange = vmmdevVRDPChange;2206 pThis->Port.pfnQueryAbsoluteMouse = vmmdevQueryAbsoluteMouse; 2207 pThis->Port.pfnSetAbsoluteMouse = vmmdevSetAbsoluteMouse; 2208 pThis->Port.pfnQueryMouseCapabilities = vmmdevQueryMouseCapabilities; 2209 pThis->Port.pfnSetMouseCapabilities = vmmdevSetMouseCapabilities; 2210 pThis->Port.pfnRequestDisplayChange = vmmdevRequestDisplayChange; 2211 pThis->Port.pfnSetCredentials = vmmdevSetCredentials; 2212 pThis->Port.pfnVBVAChange = vmmdevVBVAChange; 2213 pThis->Port.pfnRequestSeamlessChange = vmmdevRequestSeamlessChange; 2214 pThis->Port.pfnSetMemoryBalloon = vmmdevSetMemoryBalloon; 2215 pThis->Port.pfnSetStatisticsInterval = vmmdevSetStatisticsInterval; 2216 pThis->Port.pfnVRDPChange = vmmdevVRDPChange; 2217 2217 2218 2218 /* Shared folder LED */ 2219 p Data->SharedFolders.Led.u32Magic = PDMLED_MAGIC;2220 p Data->SharedFolders.ILeds.pfnQueryStatusLed = vmmdevQueryStatusLed;2219 pThis->SharedFolders.Led.u32Magic = PDMLED_MAGIC; 2220 pThis->SharedFolders.ILeds.pfnQueryStatusLed = vmmdevQueryStatusLed; 2221 2221 2222 2222 #ifdef VBOX_HGCM 2223 2223 /* HGCM port */ 2224 p Data->HGCMPort.pfnCompleted = hgcmCompleted;2224 pThis->HGCMPort.pfnCompleted = hgcmCompleted; 2225 2225 #endif 2226 2226 2227 2227 /** @todo convert this into a config parameter like we do everywhere else.*/ 2228 p Data->cbGuestRAM = MMR3PhysGetRamSize(PDMDevHlpGetVM(pDevIns));2228 pThis->cbGuestRAM = MMR3PhysGetRamSize(PDMDevHlpGetVM(pDevIns)); 2229 2229 2230 2230 /* … … 2245 2245 * Allocate and initialize the MMIO2 memory. 2246 2246 */ 2247 rc = PDMDevHlpMMIO2Register(pDevIns, 1 /*iRegion*/, VMMDEV_RAM_SIZE, 0, (void **)&p Data->pVMMDevRAMHC, "VMMDev");2247 rc = PDMDevHlpMMIO2Register(pDevIns, 1 /*iRegion*/, VMMDEV_RAM_SIZE, 0, (void **)&pThis->pVMMDevRAMHC, "VMMDev"); 2248 2248 if (RT_FAILURE(rc)) 2249 2249 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 2250 2250 N_("Failed to allocate %u bytes of memory for the VMM device"), VMMDEV_RAM_SIZE); 2251 vmmdevInitRam(p Data);2251 vmmdevInitRam(pThis); 2252 2252 2253 2253 /* 2254 2254 * Register the PCI device. 2255 2255 */ 2256 rc = PDMDevHlpPCIRegister(pDevIns, &p Data->dev);2256 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev); 2257 2257 if (RT_FAILURE(rc)) 2258 2258 return rc; 2259 if (p Data->dev.devfn == 32 || iInstance != 0)2260 Log(("!!WARNING!!: p Data->dev.devfn=%d (ignore if testcase or no started by Main)\n", pData->dev.devfn));2259 if (pThis->dev.devfn == 32 || iInstance != 0) 2260 Log(("!!WARNING!!: pThis->dev.devfn=%d (ignore if testcase or no started by Main)\n", pThis->dev.devfn)); 2261 2261 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 0x20, PCI_ADDRESS_SPACE_IO, vmmdevIOPortRegionMap); 2262 2262 if (RT_FAILURE(rc)) … … 2269 2269 * Get the corresponding connector interface 2270 2270 */ 2271 rc = PDMDevHlpDriverAttach(pDevIns, 0, &p Data->Base, &pData->pDrvBase, "VMM Driver Port");2271 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->Base, &pThis->pDrvBase, "VMM Driver Port"); 2272 2272 if (RT_SUCCESS(rc)) 2273 2273 { 2274 p Data->pDrv = (PPDMIVMMDEVCONNECTOR)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_VMMDEV_CONNECTOR);2275 if (!p Data->pDrv)2274 pThis->pDrv = (PPDMIVMMDEVCONNECTOR)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_VMMDEV_CONNECTOR); 2275 if (!pThis->pDrv) 2276 2276 AssertMsgFailedReturn(("LUN #0 doesn't have a VMMDev connector interface!\n"), VERR_PDM_MISSING_INTERFACE); 2277 2277 #ifdef VBOX_HGCM 2278 p Data->pHGCMDrv = (PPDMIHGCMCONNECTOR)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_HGCM_CONNECTOR);2279 if (!p Data->pHGCMDrv)2278 pThis->pHGCMDrv = (PPDMIHGCMCONNECTOR)pThis->pDrvBase->pfnQueryInterface(pThis->pDrvBase, PDMINTERFACE_HGCM_CONNECTOR); 2279 if (!pThis->pHGCMDrv) 2280 2280 { 2281 2281 Log(("LUN #0 doesn't have a HGCM connector interface, HGCM is not supported. rc=%Vrc\n", rc)); … … 2296 2296 */ 2297 2297 PPDMIBASE pBase; 2298 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &p Data->Base, &pBase, "Status Port");2298 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->Base, &pBase, "Status Port"); 2299 2299 if (RT_SUCCESS(rc)) 2300 p Data->SharedFolders.pLedsConnector = (PPDMILEDCONNECTORS)2300 pThis->SharedFolders.pLedsConnector = (PPDMILEDCONNECTORS) 2301 2301 pBase->pfnQueryInterface(pBase, PDMINTERFACE_LED_CONNECTORS); 2302 2302 else if (rc != VERR_PDM_NO_ATTACHED_DRIVER) … … 2309 2309 * Register saved state and init the HGCM CmdList critsect. 2310 2310 */ 2311 rc = PDMDevHlpSSMRegister(pDevIns, "VMMDev", iInstance, VMMDEV_SSM_VERSION, sizeof(*p Data),2311 rc = PDMDevHlpSSMRegister(pDevIns, "VMMDev", iInstance, VMMDEV_SSM_VERSION, sizeof(*pThis), 2312 2312 NULL, vmmdevSaveState, NULL, 2313 2313 NULL, vmmdevLoadState, vmmdevLoadStateDone); … … 2315 2315 2316 2316 #ifdef VBOX_HGCM 2317 p Data->pHGCMCmdList = NULL;2318 rc = RTCritSectInit(&p Data->critsectHGCMCmdList);2317 pThis->pHGCMCmdList = NULL; 2318 rc = RTCritSectInit(&pThis->critsectHGCMCmdList); 2319 2319 AssertRCReturn(rc, rc); 2320 p Data->u32HGCMEnabled = 0;2320 pThis->u32HGCMEnabled = 0; 2321 2321 #endif /* VBOX_HGCM */ 2322 2322 … … 2332 2332 static DECLCALLBACK(void) vmmdevReset(PPDMDEVINS pDevIns) 2333 2333 { 2334 VMMDevState *p Data= PDMINS_2_DATA(pDevIns, VMMDevState*);2334 VMMDevState *pThis = PDMINS_2_DATA(pDevIns, VMMDevState*); 2335 2335 2336 2336 /* 2337 2337 * Reset the mouse integration feature bit 2338 2338 */ 2339 if (p Data->mouseCapabilities & (VMMDEV_MOUSEGUESTWANTSABS|VMMDEV_MOUSEGUESTNEEDSHOSTCUR))2340 { 2341 p Data->mouseCapabilities &= ~VMMDEV_MOUSEGUESTWANTSABS;2339 if (pThis->mouseCapabilities & (VMMDEV_MOUSEGUESTWANTSABS|VMMDEV_MOUSEGUESTNEEDSHOSTCUR)) 2340 { 2341 pThis->mouseCapabilities &= ~VMMDEV_MOUSEGUESTWANTSABS; 2342 2342 /* notify the connector */ 2343 Log(("vmmdevReset: capabilities changed (%x), informing connector\n", p Data->mouseCapabilities));2344 p Data->pDrv->pfnUpdateMouseCapabilities(pData->pDrv, pData->mouseCapabilities);2345 } 2346 2347 p Data->hypervisorSize = 0;2348 2349 p Data->u32HostEventFlags = 0;2343 Log(("vmmdevReset: capabilities changed (%x), informing connector\n", pThis->mouseCapabilities)); 2344 pThis->pDrv->pfnUpdateMouseCapabilities(pThis->pDrv, pThis->mouseCapabilities); 2345 } 2346 2347 pThis->hypervisorSize = 0; 2348 2349 pThis->u32HostEventFlags = 0; 2350 2350 2351 2351 /* re-initialize the VMMDev memory */ 2352 if (p Data->pVMMDevRAMHC)2353 vmmdevInitRam(p Data);2352 if (pThis->pVMMDevRAMHC) 2353 vmmdevInitRam(pThis); 2354 2354 2355 2355 /* credentials have to go away (by default) */ 2356 if (!p Data->fKeepCredentials)2357 { 2358 memset(p Data->credentialsLogon.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN);2359 memset(p Data->credentialsLogon.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN);2360 memset(p Data->credentialsLogon.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN);2361 } 2362 memset(p Data->credentialsJudge.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN);2363 memset(p Data->credentialsJudge.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN);2364 memset(p Data->credentialsJudge.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN);2356 if (!pThis->fKeepCredentials) 2357 { 2358 memset(pThis->credentialsLogon.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN); 2359 memset(pThis->credentialsLogon.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN); 2360 memset(pThis->credentialsLogon.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN); 2361 } 2362 memset(pThis->credentialsJudge.szUserName, '\0', VMMDEV_CREDENTIALS_STRLEN); 2363 memset(pThis->credentialsJudge.szPassword, '\0', VMMDEV_CREDENTIALS_STRLEN); 2364 memset(pThis->credentialsJudge.szDomain, '\0', VMMDEV_CREDENTIALS_STRLEN); 2365 2365 2366 2366 /* Reset means that additions will report again. */ 2367 const bool fVersionChanged = p Data->fu32AdditionsOk2368 || p Data->guestInfo.additionsVersion2369 || p Data->guestInfo.osType != VBOXOSTYPE_Unknown;2367 const bool fVersionChanged = pThis->fu32AdditionsOk 2368 || pThis->guestInfo.additionsVersion 2369 || pThis->guestInfo.osType != VBOXOSTYPE_Unknown; 2370 2370 if (fVersionChanged) 2371 2371 Log(("vmmdevReset: fu32AdditionsOk=%d additionsVersion=%x osType=%#x\n", 2372 p Data->fu32AdditionsOk, pData->guestInfo.additionsVersion, pData->guestInfo.osType));2373 p Data->fu32AdditionsOk = false;2374 memset (&p Data->guestInfo, 0, sizeof (pData->guestInfo));2372 pThis->fu32AdditionsOk, pThis->guestInfo.additionsVersion, pThis->guestInfo.osType)); 2373 pThis->fu32AdditionsOk = false; 2374 memset (&pThis->guestInfo, 0, sizeof (pThis->guestInfo)); 2375 2375 2376 2376 /* clear pending display change request. */ 2377 memset (&p Data->lastReadDisplayChangeRequest, 0, sizeof (pData->lastReadDisplayChangeRequest));2377 memset (&pThis->lastReadDisplayChangeRequest, 0, sizeof (pThis->lastReadDisplayChangeRequest)); 2378 2378 2379 2379 /* disable seamless mode */ 2380 p Data->fLastSeamlessEnabled = false;2380 pThis->fLastSeamlessEnabled = false; 2381 2381 2382 2382 /* disabled memory ballooning */ 2383 p Data->u32LastMemoryBalloonSize = 0;2383 pThis->u32LastMemoryBalloonSize = 0; 2384 2384 2385 2385 /* disabled statistics updating */ 2386 p Data->u32LastStatIntervalSize = 0;2386 pThis->u32LastStatIntervalSize = 0; 2387 2387 2388 2388 /* 2389 2389 * Clear the event variables. 2390 2390 * 2391 * Note: The p Data->u32HostEventFlags is not cleared.2391 * Note: The pThis->u32HostEventFlags is not cleared. 2392 2392 * It is designed that way so host events do not 2393 2393 * depend on guest resets. 2394 2394 */ 2395 p Data->u32GuestFilterMask = 0;2396 p Data->u32NewGuestFilterMask = 0;2397 p Data->fNewGuestFilterMask = 0;2395 pThis->u32GuestFilterMask = 0; 2396 pThis->u32NewGuestFilterMask = 0; 2397 pThis->fNewGuestFilterMask = 0; 2398 2398 2399 2399 /* This is the default, as Windows and OS/2 guests take this for granted. (Actually, neither does...) */ 2400 2400 /** @todo change this when we next bump the interface version */ 2401 const bool fCapsChanged = p Data->guestCaps != VMMDEV_GUEST_SUPPORTS_GRAPHICS;2401 const bool fCapsChanged = pThis->guestCaps != VMMDEV_GUEST_SUPPORTS_GRAPHICS; 2402 2402 if (fCapsChanged) 2403 Log(("vmmdevReset: fCapsChanged=%#x -> %#x\n", p Data->guestCaps, VMMDEV_GUEST_SUPPORTS_GRAPHICS));2404 p Data->guestCaps = VMMDEV_GUEST_SUPPORTS_GRAPHICS; /** @todo r=bird: why? I cannot see this being done at construction?*/2403 Log(("vmmdevReset: fCapsChanged=%#x -> %#x\n", pThis->guestCaps, VMMDEV_GUEST_SUPPORTS_GRAPHICS)); 2404 pThis->guestCaps = VMMDEV_GUEST_SUPPORTS_GRAPHICS; /** @todo r=bird: why? I cannot see this being done at construction?*/ 2405 2405 2406 2406 /* … … 2408 2408 */ 2409 2409 if (fVersionChanged) 2410 p Data->pDrv->pfnUpdateGuestVersion(pData->pDrv, &pData->guestInfo);2410 pThis->pDrv->pfnUpdateGuestVersion(pThis->pDrv, &pThis->guestInfo); 2411 2411 if (fCapsChanged) 2412 p Data->pDrv->pfnUpdateGuestCapabilities(pData->pDrv, pData->guestCaps);2412 pThis->pDrv->pfnUpdateGuestCapabilities(pThis->pDrv, pThis->guestCaps); 2413 2413 } 2414 2414
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