Changeset 11526 in vbox for trunk/src/VBox

Timestamp:

Aug 21, 2008 9:49:44 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

35089

Message:

Moved GCPhys4MBPSEMask init

File:

• trunk/src/VBox/VMM/PGM.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/PGM.cpp

@@ -1128 +1128 @@
     pVM->pgm.s.GCPhysGstCR3Monitored = NIL_RTGCPHYS;
     pVM->pgm.s.fA20Enabled      = true;
+    pVM->pgm.s.GCPhys4MBPSEMask = RT_BIT_64(32) - 1; /* default; checked later */
     pVM->pgm.s.pGstPaePDPTHC    = NULL;
     pVM->pgm.s.pGstPaePDPTGC    = 0;
@@ -1805 +1806 @@
     }
 
-    return rc;
-}
-
-
-/**
- * Applies relocations to data and code managed by this
- * component. This function will be called at init and
- * whenever the VMM need to relocate it self inside the GC.
- *
- * @param   pVM     The VM.
- * @param   offDelta    Relocation delta relative to old location.
- */
-PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
-{
-    LogFlow(("PGMR3Relocate\n"));
-
     /* Note that AMD uses all the 8 reserved bits for the address (so 40 bits in total); Intel only goes up to 36 bits, so
      * we stick to 36 as well.
@@ -1834 +1819 @@
         pVM->pgm.s.GCPhys4MBPSEMask = RT_BIT_64(32) - 1;
 
-    LogRel(("PGMR3Relocate: 4 MB PSE mask %VGp\n", pVM->pgm.s.GCPhys4MBPSEMask));
-
+    LogRel(("PGMR3InitFinalize: 4 MB PSE mask %VGp\n", pVM->pgm.s.GCPhys4MBPSEMask));
+
+    return rc;
+}
+
+
+/**
+ * Applies relocations to data and code managed by this
+ * component. This function will be called at init and
+ * whenever the VMM need to relocate it self inside the GC.
+ *
+ * @param   pVM     The VM.
+ * @param   offDelta    Relocation delta relative to old location.
+ */
+PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
+{
+    LogFlow(("PGMR3Relocate\n"));
 
     /*