Changeset 11798 in vbox for trunk/include

Timestamp:

Aug 29, 2008 9:48:49 AM (16 years ago)

Author:

vboxsync

Message:

Fixing backwards compatibility for CPUMCTX.

Location:

trunk/include/VBox

Files:

• cpum.h (modified) (1 diff)
• types.h (modified) (2 diffs)

trunk/include/VBox/cpum.h

@@ -363 +363 @@
  */
 #define CPUMCTX2CORE(pCtx) ((PCPUMCTXCORE)(void *)&(pCtx)->edi)
+
+
+/**
+ * Selector hidden registers. (version 1.6)
+ */
+typedef struct CPUMSELREGHID_VER1_6
+{
+    /** Base register. */
+    uint32_t    u32Base;
+    /** Limit (expanded). */
+    uint32_t    u32Limit;
+    /** Flags.
+     * This is the high 32-bit word of the descriptor entry.
+     * Only the flags, dpl and type are used. */
+    X86DESCATTR Attr;
+} CPUMSELREGHID_VER1_6;
+
+/**
+ * CPU context. (Version 1.6)
+ */
+#pragma pack(1)
+typedef struct CPUMCTX_VER1_6
+{
+    /** FPU state. (16-byte alignment)
+     * @todo This doesn't have to be in X86FXSTATE on CPUs without fxsr - we need a type for the
+     *       actual format or convert it (waste of time).  */
+    X86FXSTATE      fpu;
+
+    /** CPUMCTXCORE Part.
+     * @{ */
+    union
+    {
+        uint32_t        edi;
+        uint64_t        rdi;
+    };
+    union
+    {
+        uint32_t        esi;
+        uint64_t        rsi;
+    };
+    union
+    {
+        uint32_t        ebp;
+        uint64_t        rbp;
+    };
+    union
+    {
+        uint32_t        eax;
+        uint64_t        rax;
+    };
+    union
+    {
+        uint32_t        ebx;
+        uint64_t        rbx;
+    };
+    union
+    {
+        uint32_t        edx;
+        uint64_t        rdx;
+    };
+    union
+    {
+        uint32_t        ecx;
+        uint64_t        rcx;
+    };
+    /* Note: we rely on the exact layout, because we use lss esp, [] in the switcher */
+    uint32_t        esp;
+    RTSEL           ss;
+    RTSEL           ssPadding;
+    /* Note: no overlap with esp here. */
+    uint64_t        rsp;
+
+    RTSEL           gs;
+    RTSEL           gsPadding;
+    RTSEL           fs;
+    RTSEL           fsPadding;
+    RTSEL           es;
+    RTSEL           esPadding;
+    RTSEL           ds;
+    RTSEL           dsPadding;
+    RTSEL           cs;
+    RTSEL           csPadding[3];  /* 3 words to force 8 byte alignment for the remainder */
+
+    union
+    {
+        X86EFLAGS       eflags;
+        X86RFLAGS       rflags;
+    };
+    union
+    {
+        uint32_t        eip;
+        uint64_t        rip;
+    };
+
+    uint64_t            r8;
+    uint64_t            r9;
+    uint64_t            r10;
+    uint64_t            r11;
+    uint64_t            r12;
+    uint64_t            r13;
+    uint64_t            r14;
+    uint64_t            r15;
+
+    /** Hidden selector registers.
+     * @{ */
+    CPUMSELREGHID_VER1_6   esHid;
+    CPUMSELREGHID_VER1_6   csHid;
+    CPUMSELREGHID_VER1_6   ssHid;
+    CPUMSELREGHID_VER1_6   dsHid;
+    CPUMSELREGHID_VER1_6   fsHid;
+    CPUMSELREGHID_VER1_6   gsHid;
+    /** @} */
+
+    /** @} */
+
+    /** Control registers.
+     * @{ */
+    uint64_t        cr0;
+    uint64_t        cr2;
+    uint64_t        cr3;
+    uint64_t        cr4;
+    uint64_t        cr8;
+    /** @} */
+
+    /** Debug registers.
+     * @{ */
+    uint64_t        dr0;
+    uint64_t        dr1;
+    uint64_t        dr2;
+    uint64_t        dr3;
+    uint64_t        dr4; /**< @todo remove dr4 and dr5. */
+    uint64_t        dr5;
+    uint64_t        dr6;
+    uint64_t        dr7;
+    /* DR8-15 are currently not supported */
+    /** @} */
+
+    /** Global Descriptor Table register. */
+    VBOXGDTR_VER1_6 gdtr;
+    uint16_t        gdtrPadding;
+    uint32_t        gdtrPadding64;/** @todo fix this hack */
+    /** Interrupt Descriptor Table register. */
+    VBOXIDTR_VER1_6 idtr;
+    uint16_t        idtrPadding;
+    uint32_t        idtrPadding64;/** @todo fix this hack */
+    /** The task register.
+     * Only the guest context uses all the members. */
+    RTSEL           ldtr;
+    RTSEL           ldtrPadding;
+    /** The task register.
+     * Only the guest context uses all the members. */
+    RTSEL           tr;
+    RTSEL           trPadding;
+
+    /** The sysenter msr registers.
+     * This member is not used by the hypervisor context. */
+    CPUMSYSENTER    SysEnter;
+
+    /** System MSRs.
+     * @{ */
+    uint64_t        msrEFER;
+    uint64_t        msrSTAR;
+    uint64_t        msrPAT;
+    uint64_t        msrLSTAR;
+    uint64_t        msrCSTAR;
+    uint64_t        msrSFMASK;
+    uint64_t        msrFSBASE;
+    uint64_t        msrGSBASE;
+    uint64_t        msrKERNELGSBASE;
+    /** @} */
+
+    /** Hidden selector registers.
+     * @{ */
+    CPUMSELREGHID_VER1_6   ldtrHid;
+    CPUMSELREGHID_VER1_6   trHid;
+    /** @} */
+
+    /* padding to get 32byte aligned size */
+    uint32_t        padding[2];
+} CPUMCTX_VER1_6;
+#pragma pack()
 
 /**

trunk/include/VBox/types.h

@@ -375 +375 @@
 } VBOXIDTR, *PVBOXIDTR;
 #pragma pack()
+
+#pragma pack(1)
+/** IDTR from version 1.6 */
+typedef struct VBOXIDTR_VER1_6
+{
+    /** Size of the IDT. */
+    uint16_t    cbIdt;
+    /** Address of the IDT. */
+    uint32_t     pIdt;
+} VBOXIDTR_VER1_6, *PVBOXIDTR_VER1_6;
+#pragma pack()
+
 /** @} */
 
@@ -397 +409 @@
 /** Pointer to GDTR. */
 typedef VBOXGDTR *PVBOXGDTR;
+
+#pragma pack(1)
+/** GDTR from version 1.6 */
+typedef struct VBOXGDTR_VER1_6
+{
+    /** Size of the GDT. */
+    uint16_t    cbGdt;
+    /** Address of the GDT. */
+    uint32_t    pGdt;
+} VBOXGDTR_VER1_6;
+#pragma pack()
 
 /** @} */