- Timestamp:
- Sep 20, 2008 1:52:37 PM (16 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r12612 r12615 203 203 QEMUTimer *timer; 204 204 struct APICState *next_apic; 205 #else 206 /** The APIC timer - R3 Ptr. */ 207 PTMTIMERR3 pTimerR3; 208 209 /** The APIC timer - R0 Ptr. */ 210 PTMTIMERR0 pTimerR0; 211 212 /** The APIC timer - RC Ptr. */ 213 PTMTIMERRC pTimerRC; 214 215 /** Alignment */ 216 uint32_t Alignment1; 205 217 #endif /* VBOX */ 206 218 } APICState; … … 245 257 typedef struct 246 258 { 247 /** @todo: APIC timer must be per-APIC */248 259 /** The device instance - R3 Ptr. */ 249 260 PPDMDEVINSR3 pDevInsR3; 250 261 /** The APIC helpers - R3 Ptr. */ 251 262 PCPDMAPICHLPR3 pApicHlpR3; 252 /** The APIC timer - R3 Ptr. */253 PTMTIMERR3 pTimerR3;254 263 /** LAPICs states - R3 Ptr */ 255 264 RTR3PTR pLapicsR3; … … 259 268 /** The APIC helpers - R0 Ptr. */ 260 269 PCPDMAPICHLPR0 pApicHlpR0; 261 /** The APIC timer - R0 Ptr. */262 PTMTIMERR0 pTimerR0;263 270 /** LAPICs states - R0 Ptr */ 264 271 RTR0PTR pLapicsR0; … … 268 275 /** The APIC helpers - RC Ptr. */ 269 276 PCPDMAPICHLPRC pApicHlpRC; 270 /** The APIC timer - RC Ptr. */ 271 PTMTIMERRC pTimerRC; 272 /** LAPICs states - RC Ptr */ 277 /** LAPICs states - RC Ptr */ 273 278 RTRCPTR pLapicsRC; 279 280 /** Alignment */ 281 uint32_t Alignment0; 274 282 275 283 /** Number of attempts made to optimize TPR accesses. */ … … 318 326 319 327 #ifdef VBOX 320 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo* dev, APICState *s,uint8_t dest, uint8_t dest_mode);328 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo* dev, uint8_t dest, uint8_t dest_mode); 321 329 __BEGIN_DECLS 322 330 PDMBOTHCBDECL(int) apicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb); … … 347 355 #else /* VBOX */ 348 356 static void apic_bus_deliver(APICDeviceInfo* dev, 349 APICState *s,uint32_t deliver_bitmask, uint8_t delivery_mode,357 uint32_t deliver_bitmask, uint8_t delivery_mode, 350 358 uint8_t vector_num, uint8_t polarity, 351 359 uint8_t trigger_mode) … … 550 558 { 551 559 APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 552 APICState *s = getLapic(dev); 553 LogFlow(("apicBusDeliverCallback: s=%p pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x\n", 554 s, pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode)); 555 apic_bus_deliver(dev, s, apic_get_delivery_bitmask(dev, s, u8Dest, u8DestMode), 560 LogFlow(("apicBusDeliverCallback: pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x\n", 561 pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode)); 562 apic_bus_deliver(dev, apic_get_delivery_bitmask(dev, u8Dest, u8DestMode), 556 563 u8DeliveryMode, iVector, u8Polarity, u8TriggerMode); 557 564 } … … 699 706 static uint32_t apic_get_delivery_bitmask(uint8_t dest, uint8_t dest_mode) 700 707 #else /* VBOX */ 701 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo *dev, APICState *s,uint8_t dest, uint8_t dest_mode)708 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo *dev, uint8_t dest, uint8_t dest_mode) 702 709 #endif /* VBOX */ 703 710 { … … 799 806 deliver_bitmask = apic_get_delivery_bitmask(dest, dest_mode); 800 807 #else /* VBOX */ 801 deliver_bitmask = apic_get_delivery_bitmask(dev, s,dest, dest_mode);808 deliver_bitmask = apic_get_delivery_bitmask(dev, dest, dest_mode); 802 809 #endif /* !VBOX */ 803 810 break; … … 859 866 trigger_mode); 860 867 #else /* VBOX */ 861 apic_bus_deliver(dev, s,deliver_bitmask, delivery_mode, vector_num, polarity,868 apic_bus_deliver(dev, deliver_bitmask, delivery_mode, vector_num, polarity, 862 869 trigger_mode); 863 870 #endif /* VBOX */ … … 912 919 s->count_shift; 913 920 #else /* VBOX */ 914 d = (TMTimerGet( dev->CTX_SUFF(pTimer)) - s->initial_count_load_time) >>921 d = (TMTimerGet(s->CTX_SUFF(pTimer)) - s->initial_count_load_time) >> 915 922 s->count_shift; 916 923 #endif /* VBOX */ … … 945 952 qemu_mod_timer(s->timer, next_time); 946 953 #else 947 TMTimerSet( dev->CTX_SUFF(pTimer), next_time);954 TMTimerSet(s->CTX_SUFF(pTimer), next_time); 948 955 #endif 949 956 s->next_time = next_time; … … 953 960 qemu_del_timer(s->timer); 954 961 #else 955 TMTimerStop( dev->CTX_SUFF(pTimer));962 TMTimerStop(s->CTX_SUFF(pTimer)); 956 963 #endif 957 964 } … … 1204 1211 apic_timer_update(s, qemu_get_clock(vm_clock)); 1205 1212 #else /* VBOX */ 1206 apic_timer_update(dev, s, TMTimerGet( dev->CTX_SUFF(pTimer)));1213 apic_timer_update(dev, s, TMTimerGet(s->CTX_SUFF(pTimer))); 1207 1214 #endif /* VBOX*/ 1208 1215 } … … 1213 1220 s->initial_count_load_time = qemu_get_clock(vm_clock); 1214 1221 #else /* VBOX */ 1215 s->initial_count_load_time = TMTimerGet( dev->CTX_SUFF(pTimer));1222 s->initial_count_load_time = TMTimerGet(s->CTX_SUFF(pTimer)); 1216 1223 #endif /* VBOX*/ 1217 1224 apic_timer_update(dev, s, s->initial_count_load_time); … … 1272 1279 qemu_put_be64s(f, &s->initial_count_load_time); 1273 1280 qemu_put_be64s(f, &s->next_time); 1281 1282 #ifdef VBOX 1283 TMR3TimerSave(s->CTX_SUFF(pTimer), f); 1284 #endif 1274 1285 } 1275 1286 … … 1310 1321 qemu_get_be64s(f, (uint64_t *)&s->initial_count_load_time); 1311 1322 qemu_get_be64s(f, (uint64_t *)&s->next_time); 1312 return 0; 1323 1324 #ifdef VBOX 1325 TMR3TimerLoad(s->CTX_SUFF(pTimer), f); 1326 #endif 1327 1328 return VINF_SUCCESS; 1313 1329 } 1314 1330 #ifndef VBOX … … 1728 1744 foreach_apic(dev, 0xffffffff, apic_save(pSSMHandle, apic)); 1729 1745 1730 return TMR3TimerSave(dev->CTX_SUFF(pTimer), pSSMHandle);1746 return VINF_SUCCESS; 1731 1747 } 1732 1748 … … 1745 1761 } 1746 1762 ); 1747 return TMR3TimerLoad(dev->CTX_SUFF(pTimer), pSSMHandle);1763 return VINF_SUCCESS; 1748 1764 } 1749 1765 … … 1754 1770 { 1755 1771 APICDeviceInfo* dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 1772 APICState *s = getLapic(dev); 1773 1756 1774 dev->pApicHlpR3->pfnLock(pDevIns, VERR_INTERNAL_ERROR); 1757 1775 1758 TMTimerStop(dev->CTX_SUFF(pTimer)); 1759 1760 /* @todo: process all LAPICS? Or only one? */ 1761 APICState* s = LAPIC_BASE(dev); 1776 TMTimerStop(s->CTX_SUFF(pTimer)); 1762 1777 1763 1778 apic_init_ipi(s); … … 1778 1793 static DECLCALLBACK(void) apicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 1779 1794 { 1780 APICDeviceInfo * pThis= PDMINS_2_DATA(pDevIns, APICDeviceInfo *);1795 APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 1781 1796 1782 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1783 pThis->pApicHlpRC = pThis->pApicHlpR3->pfnGetRCHelpers(pDevIns); 1784 pThis->pTimerRC = TMTimerRCPtr(pThis->CTX_SUFF(pTimer)); 1797 dev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1798 dev->pApicHlpRC = dev->pApicHlpR3->pfnGetRCHelpers(pDevIns); 1799 /** @todo: check if relocated pLapicsRC right */ 1800 dev->pLapicsRC = MMHyperR3ToR0(PDMDevHlpGetVM(pDevIns), dev->pLapicsR3); 1801 foreach_apic(dev, 0xffffffff, 1802 apic->pTimerRC = TMTimerRCPtr(apic->CTX_SUFF(pTimer))); 1785 1803 } 1786 1804 … … 1809 1827 APICDeviceInfo *pThis = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 1810 1828 uint32_t cCpus; 1829 APICState *apic; 1811 1830 1812 1831 /* … … 1865 1884 pThis->pLapicsRC = MMHyperR3ToRC(pVM, pThis->pLapicsR3); 1866 1885 1867 for (i = 0 ; i < cCpus; i++)1886 for (i = 0, apic = LAPIC_BASE(pThis); i < cCpus; i++) 1868 1887 { 1869 initApicData((APICState*)pThis->pLapicsR3 + i, i); 1888 initApicData(apic, i); 1889 apic++; 1870 1890 } 1871 1891 … … 1973 1993 1974 1994 /* 1975 * Create the APIC timer .1995 * Create the APIC timers. 1976 1996 */ 1977 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, apicTimer, 1978 "APIC Timer", &pThis->CTX_SUFF(pTimer)); 1979 if (RT_FAILURE(rc)) 1980 return rc; 1981 pThis->pTimerR0 = TMTimerR0Ptr(pThis->CTX_SUFF(pTimer)); 1982 pThis->pTimerRC = TMTimerRCPtr(pThis->CTX_SUFF(pTimer)); 1997 for (i = 0, apic = LAPIC_BASE(pThis); i < cCpus; i++) 1998 { 1999 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, apicTimer, 2000 "APIC Timer", &apic->pTimerR3); 2001 if (RT_FAILURE(rc)) 2002 return rc; 2003 apic->pTimerR0 = TMTimerR0Ptr(apic->pTimerR3); 2004 apic->pTimerRC = TMTimerRCPtr(apic->pTimerR3); 2005 apic++; 2006 } 1983 2007 1984 2008 /* -
trunk/src/VBox/Devices/testcase/tstDeviceStructSizeGC.cpp
r12588 r12615 567 567 GEN_CHECK_OFF(APICState, initial_count_load_time); 568 568 GEN_CHECK_OFF(APICState, next_time); 569 GEN_CHECK_OFF(APICState, pTimerR3); 570 GEN_CHECK_OFF(APICState, pTimerR0); 571 GEN_CHECK_OFF(APICState, pTimerRC); 569 572 570 573 GEN_CHECK_SIZE(APICDeviceInfo); 571 574 GEN_CHECK_OFF(APICDeviceInfo, pDevInsR3); 572 575 GEN_CHECK_OFF(APICDeviceInfo, pApicHlpR3); 573 GEN_CHECK_OFF(APICDeviceInfo, pTimerR3);574 576 GEN_CHECK_OFF(APICDeviceInfo, pDevInsR0); 575 577 GEN_CHECK_OFF(APICDeviceInfo, pApicHlpR0); 576 GEN_CHECK_OFF(APICDeviceInfo, pTimerR0);577 578 GEN_CHECK_OFF(APICDeviceInfo, pDevInsRC); 578 579 GEN_CHECK_OFF(APICDeviceInfo, pApicHlpRC); 579 GEN_CHECK_OFF(APICDeviceInfo, pTimerRC);580 580 GEN_CHECK_OFF(APICDeviceInfo, ulTPRPatchAttempts); 581 581 #ifdef VBOX_WITH_STATISTICS
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