- Timestamp:
- Sep 24, 2008 2:07:47 PM (16 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/VMMDev/VBoxDev.cpp
r12409 r12687 1606 1606 int rc; 1607 1607 1608 AssertReturn(iRegion == 1&& enmType == PCI_ADDRESS_SPACE_MEM, VERR_INTERNAL_ERROR);1608 AssertReturn(iRegion <= 2 && enmType == PCI_ADDRESS_SPACE_MEM, VERR_INTERNAL_ERROR); 1609 1609 Assert(pThis->pVMMDevRAMR3 != NULL); 1610 1611 if (GCPhysAddress != NIL_RTGCPHYS) 1612 { 1613 /* 1614 * Map the MMIO2 memory. 1615 */ 1616 pThis->GCPhysVMMDevRAM = GCPhysAddress; 1617 Assert(pThis->GCPhysVMMDevRAM == GCPhysAddress); 1618 rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress); 1610 Assert(pThis->pVMMDevHeapR3 != NULL); 1611 1612 if (iRegion == 1) 1613 { 1614 if (GCPhysAddress != NIL_RTGCPHYS) 1615 { 1616 /* 1617 * Map the MMIO2 memory. 1618 */ 1619 pThis->GCPhysVMMDevRAM = GCPhysAddress; 1620 Assert(pThis->GCPhysVMMDevRAM == GCPhysAddress); 1621 rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress); 1622 } 1623 else 1624 { 1625 /* 1626 * It is about to be unmapped, just clean up. 1627 */ 1628 pThis->GCPhysVMMDevRAM = NIL_RTGCPHYS32; 1629 rc = VINF_SUCCESS; 1630 } 1619 1631 } 1620 1632 else 1621 { 1622 /* 1623 * It is about to be unmapped, just clean up. 1624 */ 1625 pThis->GCPhysVMMDevRAM = NIL_RTGCPHYS32; 1626 rc = VINF_SUCCESS; 1633 if (iRegion == 2) 1634 { 1635 if (GCPhysAddress != NIL_RTGCPHYS) 1636 { 1637 /* 1638 * Map the MMIO2 memory. 1639 */ 1640 pThis->GCPhysVMMDevHeap = GCPhysAddress; 1641 Assert(pThis->GCPhysVMMDevHeap == GCPhysAddress); 1642 rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress); 1643 if (VBOX_SUCCESS(rc)) 1644 rc = PDMDevHlpRegisterVMMDevHeap(pPciDev->pDevIns, GCPhysAddress, pThis->pVMMDevHeapR3, VMMDEV_HEAP_SIZE); 1645 } 1646 else 1647 { 1648 /* 1649 * It is about to be unmapped, just clean up. 1650 */ 1651 PDMDevHlpUnregisterVMMDevHeap(pPciDev->pDevIns, GCPhysAddress); 1652 pThis->GCPhysVMMDevHeap = NIL_RTGCPHYS32; 1653 rc = VINF_SUCCESS; 1654 } 1627 1655 } 1628 1656 … … 2245 2273 vmmdevInitRam(pThis); 2246 2274 2275 rc = PDMDevHlpMMIO2Register(pDevIns, 2 /*iRegion*/, VMMDEV_HEAP_SIZE, 0, (void **)&pThis->pVMMDevHeapR3, "VMMDev Heap"); 2276 if (RT_FAILURE(rc)) 2277 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 2278 N_("Failed to allocate %u bytes of memory for the VMM device"), PAGE_SIZE); 2279 2247 2280 /* 2248 2281 * Register the PCI device. … … 2257 2290 return rc; 2258 2291 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, VMMDEV_RAM_SIZE, PCI_ADDRESS_SPACE_MEM, vmmdevIORAMRegionMap); 2292 if (RT_FAILURE(rc)) 2293 return rc; 2294 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, VMMDEV_HEAP_SIZE, PCI_ADDRESS_SPACE_MEM, vmmdevIORAMRegionMap); 2259 2295 if (RT_FAILURE(rc)) 2260 2296 return rc; -
trunk/src/VBox/Devices/VMMDev/VMMDevState.h
r11820 r12687 91 91 RTGCPHYS32 GCPhysVMMDevRAM; 92 92 93 /** R3 pointer to VMMDev Heap RAM area 94 */ 95 R3PTRTYPE(VMMDevMemory *) pVMMDevHeapR3; 96 /** GC physical address of VMMDev Heap RAM area */ 97 RTGCPHYS32 GCPhysVMMDevHeap; 98 93 99 /** Information reported by guest via VMMDevReportGuestInfo generic request. 94 100 * Until this information is reported the VMMDev refuses any other requests. -
trunk/src/VBox/VMM/HWACCM.cpp
r12610 r12687 517 517 518 518 LogRel(("HWACCM: VMCS physaddr = %VHp\n", pVM->hwaccm.s.vmx.pVMCSPhys)); 519 LogRel(("HWACCM: Real mode TSS physaddr = %VHp\n", pVM->hwaccm.s.vmx.pRealModeTSSPhys));520 519 LogRel(("HWACCM: TPR shadow physaddr = %VHp\n", pVM->hwaccm.s.vmx.pAPICPhys)); 521 520 LogRel(("HWACCM: MSR bitmap physaddr = %VHp\n", pVM->hwaccm.s.vmx.pMSRBitmapPhys)); … … 523 522 /* Only try once. */ 524 523 pVM->hwaccm.s.fInitialized = true; 524 525 /* Allocate one page for the TSS we need for real mode emulation. */ 526 rc = PDMR3VMMDevHeapAlloc(pVM, sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS), (RTR3PTR *)&pVM->hwaccm.s.vmx.pRealModeTSS); 527 AssertRC(rc); 528 if (RT_FAILURE(rc)) 529 return rc; 530 531 /* The I/O bitmap starts right after the virtual interrupt redirection bitmap. Outside the TSS on purpose; the CPU will not check it 532 * for I/O operations. */ 533 ASMMemZero32(pVM->hwaccm.s.vmx.pRealModeTSS, sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS)); 534 pVM->hwaccm.s.vmx.pRealModeTSS->offIoBitmap = sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS); 535 /* Bit set to 0 means redirection enabled. */ 536 memset(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap, 0x0, sizeof(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap)); 525 537 526 538 rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_HWACC_SETUP_VM, 0, NULL); … … 689 701 HWACCMR3DECL(int) HWACCMR3Term(PVM pVM) 690 702 { 703 if (pVM->hwaccm.s.vmx.pRealModeTSS) 704 { 705 PDMR3VMMDevHeapFree(pVM, pVM->hwaccm.s.vmx.pRealModeTSS); 706 pVM->hwaccm.s.vmx.pRealModeTSS = 0; 707 } 708 691 709 if (pVM->hwaccm.s.pStatExitReason) 692 710 { -
trunk/src/VBox/VMM/HWACCMInternal.h
r12610 r12687 205 205 R0PTRTYPE(void *) pVMCS; 206 206 207 /** R0 memory object for the TSS page used for real mode emulation. */208 RTR0MEMOBJ pMemObjRealModeTSS;209 /** Physical address of the TSS page used for real mode emulation. */210 RTHCPHYS pRealModeTSSPhys;211 207 /** Virtual address of the TSS page used for real mode emulation. */ 212 R 0PTRTYPE(PVBOXTSS) pRealModeTSS;208 R3PTRTYPE(PVBOXTSS) pRealModeTSS; 213 209 214 210 /** R0 memory object for the virtual APIC mmio cache. */ -
trunk/src/VBox/VMM/PDM.cpp
r11792 r12687 1188 1188 } 1189 1189 1190 /** 1191 * Registers the VMM device heap 1192 * 1193 * @returns VBox status code. 1194 * @param pVM VM handle. 1195 * @param GCPhys The physical address. 1196 * @param pvHeap Ring-3 pointer. 1197 * @param cbSize Size of the heap. 1198 */ 1199 PDMR3DECL(int) PDMR3RegisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize) 1200 { 1201 Assert(pVM->pdm.s.pvVMMDevHeap == NULL); 1202 1203 pVM->pdm.s.pvVMMDevHeap = pvHeap; 1204 pVM->pdm.s.GCPhysVMMDevHeap = GCPhys; 1205 pVM->pdm.s.cbVMMDevHeap = cbSize; 1206 pVM->pdm.s.cbVMMDevHeapLeft = cbSize; 1207 return VINF_SUCCESS; 1208 } 1209 1210 /** 1211 * Unregisters the VMM device heap 1212 * 1213 * @returns VBox status code. 1214 * @param pVM VM handle. 1215 * @param GCPhys The physical address. 1216 */ 1217 PDMR3DECL(int) PDMR3UnregisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys) 1218 { 1219 Assert(pVM->pdm.s.GCPhysVMMDevHeap == GCPhys); 1220 1221 pVM->pdm.s.pvVMMDevHeap = NULL; 1222 pVM->pdm.s.GCPhysVMMDevHeap = NIL_RTGCPHYS; 1223 pVM->pdm.s.cbVMMDevHeap = 0; 1224 pVM->pdm.s.cbVMMDevHeapLeft = 0; 1225 return VINF_SUCCESS; 1226 } 1227 1228 /** 1229 * Allocates memory from the VMM device heap 1230 * 1231 * @returns VBox status code. 1232 * @param pVM VM handle. 1233 * @param cbSize Allocation size. 1234 * @param pv Ring-3 pointer. (out) 1235 */ 1236 PDMR3DECL(int) PDMR3VMMDevHeapAlloc(PVM pVM, unsigned cbSize, RTR3PTR *ppv) 1237 { 1238 AssertReturn(cbSize && cbSize <= pVM->pdm.s.cbVMMDevHeapLeft, VERR_NO_MEMORY); 1239 1240 /* @todo not a real heap as there's currently only one user. */ 1241 *ppv = pVM->pdm.s.pvVMMDevHeap; 1242 pVM->pdm.s.cbVMMDevHeapLeft = 0; 1243 return VINF_SUCCESS; 1244 } 1245 1246 /** 1247 * Frees memory from the VMM device heap 1248 * 1249 * @returns VBox status code. 1250 * @param pVM VM handle. 1251 * @param pv Ring-3 pointer. 1252 */ 1253 PDMR3DECL(int) PDMR3VMMDevHeapFree(PVM pVM, RTR3PTR pv) 1254 { 1255 Assert(pVM->pdm.s.cbVMMDevHeapLeft == 0); 1256 pVM->pdm.s.cbVMMDevHeapLeft = pVM->pdm.s.cbVMMDevHeap; 1257 return VINF_SUCCESS; 1258 } -
trunk/src/VBox/VMM/PDMDevice.cpp
r12684 r12687 173 173 static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys); 174 174 static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr); 175 static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize); 176 static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys); 175 177 176 178 static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns); … … 212 214 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys); 213 215 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr); 216 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize); 217 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys); 214 218 /** @} */ 215 219 … … 381 385 pdmR3DevHlp_MMIO2Unmap, 382 386 pdmR3DevHlp_MMHyperMapMMIO2, 387 pdmR3DevHlp_RegisterVMMDevHeap, 388 pdmR3DevHlp_UnregisterVMMDevHeap, 383 389 PDM_DEVHLP_VERSION /* the end */ 384 390 }; … … 475 481 pdmR3DevHlp_Untrusted_MMIO2Unmap, 476 482 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2, 483 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap, 484 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap, 477 485 PDM_DEVHLP_VERSION /* the end */ 478 486 }; … … 3643 3651 3644 3652 3645 3653 /** 3654 * @copydoc PDMDEVHLP::pfnRegisterVMMDevHeap 3655 */ 3656 static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize) 3657 { 3658 PDMDEV_ASSERT_DEVINS(pDevIns); 3659 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC); 3660 3661 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMHC, GCPhys, pvHeap, cbSize); 3662 return rc; 3663 } 3664 3665 3666 /** 3667 * @copydoc PDMDEVHLP::pfnUnregisterVMMDevHeap 3668 */ 3669 static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys) 3670 { 3671 PDMDEV_ASSERT_DEVINS(pDevIns); 3672 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC); 3673 3674 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMHC, GCPhys); 3675 return rc; 3676 } 3646 3677 3647 3678 … … 3999 4030 } 4000 4031 4032 /** 4033 * @copydoc PDMDEVHLP::pfnRegisterVMMDevHeap 4034 */ 4035 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize) 4036 { 4037 PDMDEV_ASSERT_DEVINS(pDevIns); 4038 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance)); 4039 return VERR_ACCESS_DENIED; 4040 } 4041 4042 /** 4043 * @copydoc PDMDEVHLP::pfnUnregisterVMMDevHeap 4044 */ 4045 static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys) 4046 { 4047 PDMDEV_ASSERT_DEVINS(pDevIns); 4048 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance)); 4049 return VERR_ACCESS_DENIED; 4050 } 4001 4051 4002 4052 -
trunk/src/VBox/VMM/PDMInternal.h
r12653 r12687 844 844 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates; 845 845 846 /** PDM VMM device heap 847 * @{ */ 848 RTR3PTR pvVMMDevHeap; 849 RTUINT cbVMMDevHeap; 850 RTUINT cbVMMDevHeapLeft; 851 RTGCPHYS GCPhysVMMDevHeap; 852 /** @} */ 853 846 854 /** TEMPORARY HACKS FOR NETWORK POLLING. 847 855 * @todo fix NAT and kill this! -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r11261 r12687 303 303 } 304 304 305 306 /** 307 * Converts ring 3 VMM heap pointer to a guest physical address 308 * 309 * @returns VBox status code. 310 * @param pVM VM handle. 311 * @param pv Ring-3 pointer. 312 * @param pGCPhys GC phys address (out). 313 */ 314 PDMDECL(int) PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys) 315 { 316 AssertReturn(pv >= pVM->pdm.s.pvVMMDevHeap && (RTR3UINTPTR)pv < (RTR3UINTPTR)pVM->pdm.s.pvVMMDevHeap + pVM->pdm.s.cbVMMDevHeap, VERR_INVALID_PARAMETER); 317 318 *pGCPhys = (pVM->pdm.s.GCPhysVMMDevHeap + ((RTR3UINTPTR)pv - (RTR3UINTPTR)pVM->pdm.s.pvVMMDevHeap)); 319 return VINF_SUCCESS; 320 } -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r12681 r12687 141 141 pVM->hwaccm.s.vmx.pMemObjVMCS = NIL_RTR0MEMOBJ; 142 142 pVM->hwaccm.s.vmx.pMemObjAPIC = NIL_RTR0MEMOBJ; 143 pVM->hwaccm.s.vmx.pMemObjRealModeTSS = NIL_RTR0MEMOBJ;144 143 145 144 … … 154 153 ASMMemZero32(pVM->hwaccm.s.vmx.pVMCS, PAGE_SIZE); 155 154 156 /* Allocate one page for the TSS we need for real mode emulation. */157 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.vmx.pMemObjRealModeTSS, 1 << PAGE_SHIFT, true /* executable R0 mapping */);158 AssertRC(rc);159 if (RT_FAILURE(rc))160 return rc;161 162 pVM->hwaccm.s.vmx.pRealModeTSS = (PVBOXTSS)RTR0MemObjAddress(pVM->hwaccm.s.vmx.pMemObjRealModeTSS);163 pVM->hwaccm.s.vmx.pRealModeTSSPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.vmx.pMemObjRealModeTSS, 0);164 165 /* The I/O bitmap starts right after the virtual interrupt redirection bitmap. Outside the TSS on purpose; the CPU will not check it166 * for I/O operations. */167 ASMMemZero32(pVM->hwaccm.s.vmx.pRealModeTSS, PAGE_SIZE);168 pVM->hwaccm.s.vmx.pRealModeTSS->offIoBitmap = sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS);169 /* Bit set to 0 means redirection enabled. */170 memset(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap, 0x0, sizeof(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap));171 172 155 if (pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW) 173 156 { … … 203 186 204 187 #ifdef LOG_ENABLED 205 SUPR0Printf("VMXR0InitVM %x VMCS=%x (%x) RealModeTSS=%x (%x)\n", pVM, pVM->hwaccm.s.vmx.pVMCS, (uint32_t)pVM->hwaccm.s.vmx.pVMCSPhys, pVM->hwaccm.s.vmx.pRealModeTSS, (uint32_t)pVM->hwaccm.s.vmx.pRealModeTSSPhys);188 SUPR0Printf("VMXR0InitVM %x VMCS=%x (%x)\n", pVM, pVM->hwaccm.s.vmx.pVMCS, (uint32_t)pVM->hwaccm.s.vmx.pVMCSPhys); 206 189 #endif 207 190 return VINF_SUCCESS; … … 222 205 pVM->hwaccm.s.vmx.pVMCS = 0; 223 206 pVM->hwaccm.s.vmx.pVMCSPhys = 0; 224 }225 if (pVM->hwaccm.s.vmx.pMemObjRealModeTSS != NIL_RTR0MEMOBJ)226 {227 RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjRealModeTSS, false);228 pVM->hwaccm.s.vmx.pMemObjRealModeTSS = NIL_RTR0MEMOBJ;229 pVM->hwaccm.s.vmx.pRealModeTSS = 0;230 pVM->hwaccm.s.vmx.pRealModeTSSPhys = 0;231 207 } 232 208 if (pVM->hwaccm.s.vmx.pMemObjAPIC != NIL_RTR0MEMOBJ) … … 803 779 if (!(pCtx->cr0 & X86_CR0_PROTECTION_ENABLE)) 804 780 { 781 RTGCPHYS GCPhys; 782 783 /* We convert it here every time as pci regions could be reconfigured. */ 784 rc = PDMVMMDevHeapR3ToGCPhys(pVM, pVM->hwaccm.s.vmx.pRealModeTSS, &GCPhys); 785 AssertRC(rc); 786 805 787 Assert(pCtx->tr == 0); 806 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_LIMIT, sizeof( *pVM->hwaccm.s.vmx.pRealModeTSS));807 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE, 0);788 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_LIMIT, sizeof(VBOXTSS)); 789 rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE, GCPhys /* phys = virt in this mode */); 808 790 809 791 val = X86_DESC_P | X86_SEL_TYPE_SYS_386_TSS_BUSY;
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