Changeset 12989 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Oct 6, 2008 2:15:39 AM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 111 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/CFGM.cpp
r12635 r12989 96 96 * @thread EMT. 97 97 */ 98 CFGMR3DECL(int) CFGMR3Init(PVM pVM, PFNCFGMCONSTRUCTOR pfnCFGMConstructor, void *pvUser)98 VMMR3DECL(int) CFGMR3Init(PVM pVM, PFNCFGMCONSTRUCTOR pfnCFGMConstructor, void *pvUser) 99 99 { 100 100 LogFlow(("CFGMR3Init: pfnCFGMConstructor=%p pvUser=%p\n", pfnCFGMConstructor, pvUser)); … … 151 151 * @param pVM VM handle. 152 152 */ 153 CFGMR3DECL(int) CFGMR3Term(PVM pVM)153 VMMR3DECL(int) CFGMR3Term(PVM pVM) 154 154 { 155 155 CFGMR3RemoveNode(pVM->cfgm.s.pRoot); … … 165 165 * @param pVM VM handle. 166 166 */ 167 CFGMR3DECL(PCFGMNODE) CFGMR3GetRoot(PVM pVM)167 VMMR3DECL(PCFGMNODE) CFGMR3GetRoot(PVM pVM) 168 168 { 169 169 return pVM->cfgm.s.pRoot; … … 180 180 * @param pNode The node which parent we query. 181 181 */ 182 CFGMR3DECL(PCFGMNODE) CFGMR3GetParent(PCFGMNODE pNode)182 VMMR3DECL(PCFGMNODE) CFGMR3GetParent(PCFGMNODE pNode) 183 183 { 184 184 if (pNode && !pNode->fRestrictedRoot) … … 197 197 * @param pNode The node which parent we query. 198 198 */ 199 CFGMR3DECL(PCFGMNODE) CFGMR3GetParentEx(PVM pVM, PCFGMNODE pNode)199 VMMR3DECL(PCFGMNODE) CFGMR3GetParentEx(PVM pVM, PCFGMNODE pNode) 200 200 { 201 201 if (pNode && pNode->pVM == pVM) … … 214 214 * It's good style to end this with '/'. 215 215 */ 216 CFGMR3DECL(PCFGMNODE) CFGMR3GetChild(PCFGMNODE pNode, const char *pszPath)216 VMMR3DECL(PCFGMNODE) CFGMR3GetChild(PCFGMNODE pNode, const char *pszPath) 217 217 { 218 218 PCFGMNODE pChild; … … 234 234 * @param ... Arguments to pszPathFormat. 235 235 */ 236 CFGMR3DECL(PCFGMNODE) CFGMR3GetChildF(PCFGMNODE pNode, const char *pszPathFormat, ...)236 VMMR3DECL(PCFGMNODE) CFGMR3GetChildF(PCFGMNODE pNode, const char *pszPathFormat, ...) 237 237 { 238 238 va_list Args; … … 254 254 * @param Args Arguments to pszPathFormat. 255 255 */ 256 CFGMR3DECL(PCFGMNODE) CFGMR3GetChildFV(PCFGMNODE pNode, const char *pszPathFormat, va_list Args)256 VMMR3DECL(PCFGMNODE) CFGMR3GetChildFV(PCFGMNODE pNode, const char *pszPathFormat, va_list Args) 257 257 { 258 258 char *pszPath; … … 278 278 * @param pNode Node to enumerate children for. 279 279 */ 280 CFGMR3DECL(PCFGMNODE) CFGMR3GetFirstChild(PCFGMNODE pNode)280 VMMR3DECL(PCFGMNODE) CFGMR3GetFirstChild(PCFGMNODE pNode) 281 281 { 282 282 return pNode ? pNode->pFirstChild : NULL; … … 293 293 * or successive calls to this function. 294 294 */ 295 CFGMR3DECL(PCFGMNODE) CFGMR3GetNextChild(PCFGMNODE pCur)295 VMMR3DECL(PCFGMNODE) CFGMR3GetNextChild(PCFGMNODE pCur) 296 296 { 297 297 return pCur ? pCur->pNext : NULL; … … 309 309 * @param cchName Size of the buffer pointed to by pszName (with terminator). 310 310 */ 311 CFGMR3DECL(int) CFGMR3GetName(PCFGMNODE pCur, char *pszName, size_t cchName)311 VMMR3DECL(int) CFGMR3GetName(PCFGMNODE pCur, char *pszName, size_t cchName) 312 312 { 313 313 int rc; … … 337 337 * or successive calls to CFGMR3GetNextChild(). 338 338 */ 339 CFGMR3DECL(int) CFGMR3GetNameLen(PCFGMNODE pCur)339 VMMR3DECL(int) CFGMR3GetNameLen(PCFGMNODE pCur) 340 340 { 341 341 return pCur ? pCur->cchName + 1 : 0; … … 352 352 * a double '\\0'. 353 353 */ 354 CFGMR3DECL(bool) CFGMR3AreChildrenValid(PCFGMNODE pNode, const char *pszzValid)354 VMMR3DECL(bool) CFGMR3AreChildrenValid(PCFGMNODE pNode, const char *pszzValid) 355 355 { 356 356 if (pNode) … … 392 392 * @param pCur The node (Key) which values to enumerate. 393 393 */ 394 CFGMR3DECL(PCFGMLEAF) CFGMR3GetFirstValue(PCFGMNODE pCur)394 VMMR3DECL(PCFGMLEAF) CFGMR3GetFirstValue(PCFGMNODE pCur) 395 395 { 396 396 return pCur ? pCur->pFirstLeaf : NULL; … … 403 403 * @param pCur The current value as returned by this function or CFGMR3GetFirstValue(). 404 404 */ 405 CFGMR3DECL(PCFGMLEAF) CFGMR3GetNextValue(PCFGMLEAF pCur)405 VMMR3DECL(PCFGMLEAF) CFGMR3GetNextValue(PCFGMLEAF pCur) 406 406 { 407 407 return pCur ? pCur->pNext : NULL; … … 418 418 * @param cchName Size of the buffer pointed to by pszName (with terminator). 419 419 */ 420 CFGMR3DECL(int) CFGMR3GetValueName(PCFGMLEAF pCur, char *pszName, size_t cchName)420 VMMR3DECL(int) CFGMR3GetValueName(PCFGMLEAF pCur, char *pszName, size_t cchName) 421 421 { 422 422 int rc; … … 446 446 * or successive calls to CFGMR3GetNextValue(). 447 447 */ 448 CFGMR3DECL(int) CFGMR3GetValueNameLen(PCFGMLEAF pCur)448 VMMR3DECL(int) CFGMR3GetValueNameLen(PCFGMLEAF pCur) 449 449 { 450 450 return pCur ? pCur->cchName + 1 : 0; … … 459 459 * or successive calls to CFGMR3GetNextValue(). 460 460 */ 461 CFGMR3DECL(CFGMVALUETYPE) CFGMR3GetValueType(PCFGMLEAF pCur)461 VMMR3DECL(CFGMVALUETYPE) CFGMR3GetValueType(PCFGMLEAF pCur) 462 462 { 463 463 Assert(pCur); … … 475 475 * a double '\\0'. 476 476 */ 477 CFGMR3DECL(bool) CFGMR3AreValuesValid(PCFGMNODE pNode, const char *pszzValid)477 VMMR3DECL(bool) CFGMR3AreValuesValid(PCFGMNODE pNode, const char *pszzValid) 478 478 { 479 479 if (pNode) … … 517 517 * @param penmType Where to store the type. 518 518 */ 519 CFGMR3DECL(int) CFGMR3QueryType(PCFGMNODE pNode, const char *pszName, PCFGMVALUETYPE penmType)519 VMMR3DECL(int) CFGMR3QueryType(PCFGMNODE pNode, const char *pszName, PCFGMVALUETYPE penmType) 520 520 { 521 521 PCFGMLEAF pLeaf; … … 539 539 * @param pcb Where to store the value size. 540 540 */ 541 CFGMR3DECL(int) CFGMR3QuerySize(PCFGMNODE pNode, const char *pszName, size_t *pcb)541 VMMR3DECL(int) CFGMR3QuerySize(PCFGMNODE pNode, const char *pszName, size_t *pcb) 542 542 { 543 543 PCFGMLEAF pLeaf; … … 577 577 * @param pu64 Where to store the integer value. 578 578 */ 579 CFGMR3DECL(int) CFGMR3QueryInteger(PCFGMNODE pNode, const char *pszName, uint64_t *pu64)579 VMMR3DECL(int) CFGMR3QueryInteger(PCFGMNODE pNode, const char *pszName, uint64_t *pu64) 580 580 { 581 581 PCFGMLEAF pLeaf; … … 601 601 * @param u64Def The default value. 602 602 */ 603 CFGMR3DECL(int) CFGMR3QueryIntegerDef(PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def)603 VMMR3DECL(int) CFGMR3QueryIntegerDef(PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def) 604 604 { 605 605 PCFGMLEAF pLeaf; … … 633 633 * @param cchString Size of the string buffer. (Includes terminator.) 634 634 */ 635 CFGMR3DECL(int) CFGMR3QueryString(PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString)635 VMMR3DECL(int) CFGMR3QueryString(PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString) 636 636 { 637 637 PCFGMLEAF pLeaf; … … 666 666 * @param pszDef The default value. 667 667 */ 668 CFGMR3DECL(int) CFGMR3QueryStringDef(PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString, const char *pszDef)668 VMMR3DECL(int) CFGMR3QueryStringDef(PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString, const char *pszDef) 669 669 { 670 670 PCFGMLEAF pLeaf; … … 713 713 * @param cbData Size of buffer pvData points too. 714 714 */ 715 CFGMR3DECL(int) CFGMR3QueryBytes(PCFGMNODE pNode, const char *pszName, void *pvData, size_t cbData)715 VMMR3DECL(int) CFGMR3QueryBytes(PCFGMNODE pNode, const char *pszName, void *pvData, size_t cbData) 716 716 { 717 717 PCFGMLEAF pLeaf; … … 1104 1104 * @param pVM The VM handle. 1105 1105 */ 1106 CFGMR3DECL(PCFGMNODE) CFGMR3CreateTree(PVM pVM)1106 VMMR3DECL(PCFGMNODE) CFGMR3CreateTree(PVM pVM) 1107 1107 { 1108 1108 PCFGMNODE pNew = (PCFGMNODE)MMR3HeapAlloc(pVM, MM_TAG_CFGM, sizeof(*pNew)); … … 1141 1141 * @param ppChild Where to store the address of the new child node. (optional) 1142 1142 */ 1143 CFGMR3DECL(int) CFGMR3InsertSubTree(PCFGMNODE pNode, const char *pszName, PCFGMNODE pSubTree, PCFGMNODE *ppChild)1143 VMMR3DECL(int) CFGMR3InsertSubTree(PCFGMNODE pNode, const char *pszName, PCFGMNODE pSubTree, PCFGMNODE *ppChild) 1144 1144 { 1145 1145 /* … … 1187 1187 * @param ppChild Where to store the address of the new child node. (optional) 1188 1188 */ 1189 CFGMR3DECL(int) CFGMR3InsertNode(PCFGMNODE pNode, const char *pszName, PCFGMNODE *ppChild)1189 VMMR3DECL(int) CFGMR3InsertNode(PCFGMNODE pNode, const char *pszName, PCFGMNODE *ppChild) 1190 1190 { 1191 1191 int rc; … … 1325 1325 * @param ... Name format arguments. 1326 1326 */ 1327 CFGMR3DECL(int) CFGMR3InsertNodeF(PCFGMNODE pNode, PCFGMNODE *ppChild, const char *pszNameFormat, ...)1327 VMMR3DECL(int) CFGMR3InsertNodeF(PCFGMNODE pNode, PCFGMNODE *ppChild, const char *pszNameFormat, ...) 1328 1328 { 1329 1329 va_list Args; … … 1344 1344 * @param Args Name format arguments. 1345 1345 */ 1346 CFGMR3DECL(int) CFGMR3InsertNodeFV(PCFGMNODE pNode, PCFGMNODE *ppChild, const char *pszNameFormat, va_list Args)1346 VMMR3DECL(int) CFGMR3InsertNodeFV(PCFGMNODE pNode, PCFGMNODE *ppChild, const char *pszNameFormat, va_list Args) 1347 1347 { 1348 1348 int rc; … … 1366 1366 * @param pNode The node to mark. 1367 1367 */ 1368 CFGMR3DECL(void) CFGMR3SetRestrictedRoot(PCFGMNODE pNode)1368 VMMR3DECL(void) CFGMR3SetRestrictedRoot(PCFGMNODE pNode) 1369 1369 { 1370 1370 if (pNode) … … 1444 1444 * @param pNode Parent node. 1445 1445 */ 1446 CFGMR3DECL(void) CFGMR3RemoveNode(PCFGMNODE pNode)1446 VMMR3DECL(void) CFGMR3RemoveNode(PCFGMNODE pNode) 1447 1447 { 1448 1448 if (pNode) … … 1560 1560 * @param u64Integer The value. 1561 1561 */ 1562 CFGMR3DECL(int) CFGMR3InsertInteger(PCFGMNODE pNode, const char *pszName, uint64_t u64Integer)1562 VMMR3DECL(int) CFGMR3InsertInteger(PCFGMNODE pNode, const char *pszName, uint64_t u64Integer) 1563 1563 { 1564 1564 PCFGMLEAF pLeaf; … … 1581 1581 * @param pszString The value. 1582 1582 */ 1583 CFGMR3DECL(int) CFGMR3InsertString(PCFGMNODE pNode, const char *pszName, const char *pszString)1583 VMMR3DECL(int) CFGMR3InsertString(PCFGMNODE pNode, const char *pszName, const char *pszString) 1584 1584 { 1585 1585 int rc; … … 1627 1627 * @param cbBytes The value size. 1628 1628 */ 1629 CFGMR3DECL(int) CFGMR3InsertBytes(PCFGMNODE pNode, const char *pszName, const void *pvBytes, size_t cbBytes)1629 VMMR3DECL(int) CFGMR3InsertBytes(PCFGMNODE pNode, const char *pszName, const void *pvBytes, size_t cbBytes) 1630 1630 { 1631 1631 int rc; … … 1674 1674 * @param pszName Name of the new child node. 1675 1675 */ 1676 CFGMR3DECL(int) CFGMR3RemoveValue(PCFGMNODE pNode, const char *pszName)1676 VMMR3DECL(int) CFGMR3RemoveValue(PCFGMNODE pNode, const char *pszName) 1677 1677 { 1678 1678 PCFGMLEAF pLeaf; … … 1698 1698 * @param pu64 Where to store the integer value. 1699 1699 */ 1700 CFGMR3DECL(int) CFGMR3QueryU64(PCFGMNODE pNode, const char *pszName, uint64_t *pu64)1700 VMMR3DECL(int) CFGMR3QueryU64(PCFGMNODE pNode, const char *pszName, uint64_t *pu64) 1701 1701 { 1702 1702 return CFGMR3QueryInteger(pNode, pszName, pu64); … … 1713 1713 * @param u64Def The default value. 1714 1714 */ 1715 CFGMR3DECL(int) CFGMR3QueryU64Def(PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def)1715 VMMR3DECL(int) CFGMR3QueryU64Def(PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def) 1716 1716 { 1717 1717 return CFGMR3QueryIntegerDef(pNode, pszName, pu64, u64Def); … … 1727 1727 * @param pi64 Where to store the value. 1728 1728 */ 1729 CFGMR3DECL(int) CFGMR3QueryS64(PCFGMNODE pNode, const char *pszName, int64_t *pi64)1729 VMMR3DECL(int) CFGMR3QueryS64(PCFGMNODE pNode, const char *pszName, int64_t *pi64) 1730 1730 { 1731 1731 uint64_t u64; … … 1746 1746 * @param i64Def The default value. 1747 1747 */ 1748 CFGMR3DECL(int) CFGMR3QueryS64Def(PCFGMNODE pNode, const char *pszName, int64_t *pi64, int64_t i64Def)1748 VMMR3DECL(int) CFGMR3QueryS64Def(PCFGMNODE pNode, const char *pszName, int64_t *pi64, int64_t i64Def) 1749 1749 { 1750 1750 uint64_t u64; … … 1764 1764 * @param pu32 Where to store the value. 1765 1765 */ 1766 CFGMR3DECL(int) CFGMR3QueryU32(PCFGMNODE pNode, const char *pszName, uint32_t *pu32)1766 VMMR3DECL(int) CFGMR3QueryU32(PCFGMNODE pNode, const char *pszName, uint32_t *pu32) 1767 1767 { 1768 1768 uint64_t u64; … … 1788 1788 * @param u32Def The default value. 1789 1789 */ 1790 CFGMR3DECL(int) CFGMR3QueryU32Def(PCFGMNODE pNode, const char *pszName, uint32_t *pu32, uint32_t u32Def)1790 VMMR3DECL(int) CFGMR3QueryU32Def(PCFGMNODE pNode, const char *pszName, uint32_t *pu32, uint32_t u32Def) 1791 1791 { 1792 1792 uint64_t u64; … … 1811 1811 * @param pi32 Where to store the value. 1812 1812 */ 1813 CFGMR3DECL(int) CFGMR3QueryS32(PCFGMNODE pNode, const char *pszName, int32_t *pi32)1813 VMMR3DECL(int) CFGMR3QueryS32(PCFGMNODE pNode, const char *pszName, int32_t *pi32) 1814 1814 { 1815 1815 uint64_t u64; … … 1836 1836 * @param i32Def The default value. 1837 1837 */ 1838 CFGMR3DECL(int) CFGMR3QueryS32Def(PCFGMNODE pNode, const char *pszName, int32_t *pi32, int32_t i32Def)1838 VMMR3DECL(int) CFGMR3QueryS32Def(PCFGMNODE pNode, const char *pszName, int32_t *pi32, int32_t i32Def) 1839 1839 { 1840 1840 uint64_t u64; … … 1860 1860 * @param pu16 Where to store the value. 1861 1861 */ 1862 CFGMR3DECL(int) CFGMR3QueryU16(PCFGMNODE pNode, const char *pszName, uint16_t *pu16)1862 VMMR3DECL(int) CFGMR3QueryU16(PCFGMNODE pNode, const char *pszName, uint16_t *pu16) 1863 1863 { 1864 1864 uint64_t u64; … … 1884 1884 * @param i16Def The default value. 1885 1885 */ 1886 CFGMR3DECL(int) CFGMR3QueryU16Def(PCFGMNODE pNode, const char *pszName, uint16_t *pu16, uint16_t u16Def)1886 VMMR3DECL(int) CFGMR3QueryU16Def(PCFGMNODE pNode, const char *pszName, uint16_t *pu16, uint16_t u16Def) 1887 1887 { 1888 1888 uint64_t u64; … … 1907 1907 * @param pi16 Where to store the value. 1908 1908 */ 1909 CFGMR3DECL(int) CFGMR3QueryS16(PCFGMNODE pNode, const char *pszName, int16_t *pi16)1909 VMMR3DECL(int) CFGMR3QueryS16(PCFGMNODE pNode, const char *pszName, int16_t *pi16) 1910 1910 { 1911 1911 uint64_t u64; … … 1932 1932 * @param i16Def The default value. 1933 1933 */ 1934 CFGMR3DECL(int) CFGMR3QueryS16Def(PCFGMNODE pNode, const char *pszName, int16_t *pi16, int16_t i16Def)1934 VMMR3DECL(int) CFGMR3QueryS16Def(PCFGMNODE pNode, const char *pszName, int16_t *pi16, int16_t i16Def) 1935 1935 { 1936 1936 uint64_t u64; … … 1956 1956 * @param pu8 Where to store the value. 1957 1957 */ 1958 CFGMR3DECL(int) CFGMR3QueryU8(PCFGMNODE pNode, const char *pszName, uint8_t *pu8)1958 VMMR3DECL(int) CFGMR3QueryU8(PCFGMNODE pNode, const char *pszName, uint8_t *pu8) 1959 1959 { 1960 1960 uint64_t u64; … … 1980 1980 * @param u8Def The default value. 1981 1981 */ 1982 CFGMR3DECL(int) CFGMR3QueryU8Def(PCFGMNODE pNode, const char *pszName, uint8_t *pu8, uint8_t u8Def)1982 VMMR3DECL(int) CFGMR3QueryU8Def(PCFGMNODE pNode, const char *pszName, uint8_t *pu8, uint8_t u8Def) 1983 1983 { 1984 1984 uint64_t u64; … … 2003 2003 * @param pi8 Where to store the value. 2004 2004 */ 2005 CFGMR3DECL(int) CFGMR3QueryS8(PCFGMNODE pNode, const char *pszName, int8_t *pi8)2005 VMMR3DECL(int) CFGMR3QueryS8(PCFGMNODE pNode, const char *pszName, int8_t *pi8) 2006 2006 { 2007 2007 uint64_t u64; … … 2028 2028 * @param i8Def The default value. 2029 2029 */ 2030 CFGMR3DECL(int) CFGMR3QueryS8Def(PCFGMNODE pNode, const char *pszName, int8_t *pi8, int8_t i8Def)2030 VMMR3DECL(int) CFGMR3QueryS8Def(PCFGMNODE pNode, const char *pszName, int8_t *pi8, int8_t i8Def) 2031 2031 { 2032 2032 uint64_t u64; … … 2053 2053 * @remark This function will interpret any non-zero value as true. 2054 2054 */ 2055 CFGMR3DECL(int) CFGMR3QueryBool(PCFGMNODE pNode, const char *pszName, bool *pf)2055 VMMR3DECL(int) CFGMR3QueryBool(PCFGMNODE pNode, const char *pszName, bool *pf) 2056 2056 { 2057 2057 uint64_t u64; … … 2073 2073 * @remark This function will interpret any non-zero value as true. 2074 2074 */ 2075 CFGMR3DECL(int) CFGMR3QueryBoolDef(PCFGMNODE pNode, const char *pszName, bool *pf, bool fDef)2075 VMMR3DECL(int) CFGMR3QueryBoolDef(PCFGMNODE pNode, const char *pszName, bool *pf, bool fDef) 2076 2076 { 2077 2077 uint64_t u64; … … 2091 2091 * @param pPort Where to store the value. 2092 2092 */ 2093 CFGMR3DECL(int) CFGMR3QueryPort(PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort)2093 VMMR3DECL(int) CFGMR3QueryPort(PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort) 2094 2094 { 2095 2095 AssertCompileSize(RTIOPORT, 2); … … 2107 2107 * @param PortDef The default value. 2108 2108 */ 2109 CFGMR3DECL(int) CFGMR3QueryPortDef(PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort, RTIOPORT PortDef)2109 VMMR3DECL(int) CFGMR3QueryPortDef(PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort, RTIOPORT PortDef) 2110 2110 { 2111 2111 AssertCompileSize(RTIOPORT, 2); … … 2122 2122 * @param pu Where to store the value. 2123 2123 */ 2124 CFGMR3DECL(int) CFGMR3QueryUInt(PCFGMNODE pNode, const char *pszName, unsigned int *pu)2124 VMMR3DECL(int) CFGMR3QueryUInt(PCFGMNODE pNode, const char *pszName, unsigned int *pu) 2125 2125 { 2126 2126 AssertCompileSize(unsigned int, 4); … … 2138 2138 * @param uDef The default value. 2139 2139 */ 2140 CFGMR3DECL(int) CFGMR3QueryUIntDef(PCFGMNODE pNode, const char *pszName, unsigned int *pu, unsigned int uDef)2140 VMMR3DECL(int) CFGMR3QueryUIntDef(PCFGMNODE pNode, const char *pszName, unsigned int *pu, unsigned int uDef) 2141 2141 { 2142 2142 AssertCompileSize(unsigned int, 4); … … 2153 2153 * @param pi Where to store the value. 2154 2154 */ 2155 CFGMR3DECL(int) CFGMR3QuerySInt(PCFGMNODE pNode, const char *pszName, signed int *pi)2155 VMMR3DECL(int) CFGMR3QuerySInt(PCFGMNODE pNode, const char *pszName, signed int *pi) 2156 2156 { 2157 2157 AssertCompileSize(signed int, 4); … … 2169 2169 * @param iDef The default value. 2170 2170 */ 2171 CFGMR3DECL(int) CFGMR3QuerySIntDef(PCFGMNODE pNode, const char *pszName, signed int *pi, signed int iDef)2171 VMMR3DECL(int) CFGMR3QuerySIntDef(PCFGMNODE pNode, const char *pszName, signed int *pi, signed int iDef) 2172 2172 { 2173 2173 AssertCompileSize(signed int, 4); … … 2184 2184 * @param ppv Where to store the value. 2185 2185 */ 2186 CFGMR3DECL(int) CFGMR3QueryPtr(PCFGMNODE pNode, const char *pszName, void **ppv)2186 VMMR3DECL(int) CFGMR3QueryPtr(PCFGMNODE pNode, const char *pszName, void **ppv) 2187 2187 { 2188 2188 uint64_t u64; … … 2209 2209 * @param pvDef The default value. 2210 2210 */ 2211 CFGMR3DECL(int) CFGMR3QueryPtrDef(PCFGMNODE pNode, const char *pszName, void **ppv, void *pvDef)2211 VMMR3DECL(int) CFGMR3QueryPtrDef(PCFGMNODE pNode, const char *pszName, void **ppv, void *pvDef) 2212 2212 { 2213 2213 uint64_t u64; … … 2233 2233 * @param pGCPtr Where to store the value. 2234 2234 */ 2235 CFGMR3DECL(int) CFGMR3QueryGCPtr(PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr)2235 VMMR3DECL(int) CFGMR3QueryGCPtr(PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr) 2236 2236 { 2237 2237 uint64_t u64; … … 2258 2258 * @param GCPtrDef The default value. 2259 2259 */ 2260 CFGMR3DECL(int) CFGMR3QueryGCPtrDef(PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr, RTGCPTR GCPtrDef)2260 VMMR3DECL(int) CFGMR3QueryGCPtrDef(PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr, RTGCPTR GCPtrDef) 2261 2261 { 2262 2262 uint64_t u64; … … 2282 2282 * @param pGCPtr Where to store the value. 2283 2283 */ 2284 CFGMR3DECL(int) CFGMR3QueryGCPtrU(PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr)2284 VMMR3DECL(int) CFGMR3QueryGCPtrU(PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr) 2285 2285 { 2286 2286 uint64_t u64; … … 2307 2307 * @param GCPtrDef The default value. 2308 2308 */ 2309 CFGMR3DECL(int) CFGMR3QueryGCPtrUDef(PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr, RTGCUINTPTR GCPtrDef)2309 VMMR3DECL(int) CFGMR3QueryGCPtrUDef(PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr, RTGCUINTPTR GCPtrDef) 2310 2310 { 2311 2311 uint64_t u64; … … 2331 2331 * @param pGCPtr Where to store the value. 2332 2332 */ 2333 CFGMR3DECL(int) CFGMR3QueryGCPtrS(PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr)2333 VMMR3DECL(int) CFGMR3QueryGCPtrS(PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr) 2334 2334 { 2335 2335 uint64_t u64; … … 2356 2356 * @param GCPtrDef The default value. 2357 2357 */ 2358 CFGMR3DECL(int) CFGMR3QueryGCPtrSDef(PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr, RTGCINTPTR GCPtrDef)2358 VMMR3DECL(int) CFGMR3QueryGCPtrSDef(PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr, RTGCINTPTR GCPtrDef) 2359 2359 { 2360 2360 uint64_t u64; … … 2382 2382 * Free this using MMR3HeapFree(). 2383 2383 */ 2384 CFGMR3DECL(int) CFGMR3QueryStringAlloc(PCFGMNODE pNode, const char *pszName, char **ppszString)2384 VMMR3DECL(int) CFGMR3QueryStringAlloc(PCFGMNODE pNode, const char *pszName, char **ppszString) 2385 2385 { 2386 2386 size_t cch; … … 2414 2414 * Free this using MMR3HeapFree(). 2415 2415 */ 2416 CFGMR3DECL(int) CFGMR3QueryStringAllocDef(PCFGMNODE pNode, const char *pszName, char **ppszString, const char *pszDef)2416 VMMR3DECL(int) CFGMR3QueryStringAllocDef(PCFGMNODE pNode, const char *pszName, char **ppszString, const char *pszDef) 2417 2417 { 2418 2418 size_t cch; … … 2446 2446 * @param pRoot The root node of the dump. 2447 2447 */ 2448 CFGMR3DECL(void) CFGMR3Dump(PCFGMNODE pRoot)2448 VMMR3DECL(void) CFGMR3Dump(PCFGMNODE pRoot) 2449 2449 { 2450 2450 LogRel(("************************* CFGM dump *************************\n")); -
trunk/src/VBox/VMM/CPUM.cpp
r12971 r12989 108 108 * @param pVM The VM to operate on. 109 109 */ 110 CPUMR3DECL(int) CPUMR3Init(PVM pVM)110 VMMR3DECL(int) CPUMR3Init(PVM pVM) 111 111 { 112 112 LogFlow(("CPUMR3Init\n")); … … 600 600 * @param pVM The VM. 601 601 */ 602 CPUMR3DECL(void) CPUMR3Relocate(PVM pVM)602 VMMR3DECL(void) CPUMR3Relocate(PVM pVM) 603 603 { 604 604 LogFlow(("CPUMR3Relocate\n")); … … 618 618 * @param ppCtx Receives the CPUMCTX GC pointer when successful. 619 619 */ 620 CPUMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, RCPTRTYPE(PCPUMCTX) *ppCtx)620 VMMR3DECL(int) CPUMR3QueryGuestCtxGCPtr(PVM pVM, RCPTRTYPE(PCPUMCTX) *ppCtx) 621 621 { 622 622 LogFlow(("CPUMR3QueryGuestCtxGCPtr\n")); … … 638 638 * @param pVM The VM to operate on. 639 639 */ 640 CPUMR3DECL(int) CPUMR3Term(PVM pVM)640 VMMR3DECL(int) CPUMR3Term(PVM pVM) 641 641 { 642 642 /** @todo ? */ … … 651 651 * @param pVM The VM handle. 652 652 */ 653 CPUMR3DECL(void) CPUMR3Reset(PVM pVM)653 VMMR3DECL(void) CPUMR3Reset(PVM pVM) 654 654 { 655 655 PCPUMCTX pCtx = &pVM->cpum.s.Guest; … … 2150 2150 * 2151 2151 */ 2152 CPUMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISCPUSTATE pCpu, const char *pszPrefix)2152 VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISCPUSTATE pCpu, const char *pszPrefix) 2153 2153 { 2154 2154 CPUMDISASSTATE State; … … 2263 2263 * @deprecated Use DBGFR3DisasInstrCurrentLog(). 2264 2264 */ 2265 CPUMR3DECL(void) CPUMR3DisasmInstr(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix)2265 VMMR3DECL(void) CPUMR3DisasmInstr(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix) 2266 2266 { 2267 2267 DISCPUSTATE Cpu; … … 2282 2282 * @deprecated Create new DBGFR3Disas function to do this. 2283 2283 */ 2284 CPUMR3DECL(void) CPUMR3DisasmBlock(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix, int nrInstructions)2284 VMMR3DECL(void) CPUMR3DisasmBlock(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix, int nrInstructions) 2285 2285 { 2286 2286 for (int i = 0; i < nrInstructions; i++) … … 2299 2299 * @internal 2300 2300 */ 2301 CPUMR3DECL(void) CPUMR3SaveEntryCtx(PVM pVM)2301 VMMR3DECL(void) CPUMR3SaveEntryCtx(PVM pVM) 2302 2302 { 2303 2303 pVM->cpum.s.GuestEntry = pVM->cpum.s.Guest; … … 2317 2317 * @param fAnd The CR4 AND mask. 2318 2318 */ 2319 CPUMR3DECL(int) CPUMR3SetCR4Feature(PVM pVM, RTHCUINTREG fOr, RTHCUINTREG fAnd)2319 VMMR3DECL(int) CPUMR3SetCR4Feature(PVM pVM, RTHCUINTREG fOr, RTHCUINTREG fAnd) 2320 2320 { 2321 2321 AssertMsgReturn(!(fOr & ~(X86_CR4_TSD)), ("%#x\n", fOr), VERR_INVALID_PARAMETER); -
trunk/src/VBox/VMM/CPUMInternal.h
r12659 r12989 27 27 #include <VBox/x86.h> 28 28 29 30 #if !defined(IN_CPUM_R3) && !defined(IN_CPUM_R0) && !defined(IN_CPUM_GC)31 # error "Not in CPUM! This is an internal header!"32 #endif33 29 34 30 -
trunk/src/VBox/VMM/CPUMStack.cpp
r12897 r12989 35 35 36 36 37 CPUMDECL(void) CPUMPushHyper(PVM pVM, uint32_t u32)37 VMMDECL(void) CPUMPushHyper(PVM pVM, uint32_t u32) 38 38 { 39 39 /* ASSUME always on flat stack within hypervisor memory for now */ -
trunk/src/VBox/VMM/DBGF.cpp
r12896 r12989 132 132 * @param pVM VM handle. 133 133 */ 134 DBGFR3DECL(int) DBGFR3Init(PVM pVM)134 VMMR3DECL(int) DBGFR3Init(PVM pVM) 135 135 { 136 136 int rc = dbgfR3InfoInit(pVM); … … 149 149 * @param pVM VM Handle. 150 150 */ 151 DBGFR3DECL(int) DBGFR3Term(PVM pVM)151 VMMR3DECL(int) DBGFR3Term(PVM pVM) 152 152 { 153 153 int rc; … … 218 218 * @param offDelta Relocation delta relative to old location. 219 219 */ 220 DBGFR3DECL(void) DBGFR3Relocate(PVM pVM, RTGCINTPTR offDelta)220 VMMR3DECL(void) DBGFR3Relocate(PVM pVM, RTGCINTPTR offDelta) 221 221 { 222 222 } … … 281 281 * @param pVM VM Handle. 282 282 */ 283 DBGFR3DECL(int) DBGFR3VMMForcedAction(PVM pVM)283 VMMR3DECL(int) DBGFR3VMMForcedAction(PVM pVM) 284 284 { 285 285 /* … … 424 424 * @param enmEvent The event to send. 425 425 */ 426 DBGFR3DECL(int) DBGFR3Event(PVM pVM, DBGFEVENTTYPE enmEvent)426 VMMR3DECL(int) DBGFR3Event(PVM pVM, DBGFEVENTTYPE enmEvent) 427 427 { 428 428 int rc = dbgfR3EventPrologue(pVM, enmEvent); … … 451 451 * @param ... Message arguments. 452 452 */ 453 DBGFR3DECL(int) DBGFR3EventSrc(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszFile, unsigned uLine, const char *pszFunction, const char *pszFormat, ...)453 VMMR3DECL(int) DBGFR3EventSrc(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszFile, unsigned uLine, const char *pszFunction, const char *pszFormat, ...) 454 454 { 455 455 va_list args; … … 473 473 * @param args Message arguments. 474 474 */ 475 DBGFR3DECL(int) DBGFR3EventSrcV(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszFile, unsigned uLine, const char *pszFunction, const char *pszFormat, va_list args)475 VMMR3DECL(int) DBGFR3EventSrcV(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszFile, unsigned uLine, const char *pszFunction, const char *pszFormat, va_list args) 476 476 { 477 477 int rc = dbgfR3EventPrologue(pVM, enmEvent); … … 512 512 * @param pszMsg2 Second assertion message. 513 513 */ 514 DBGFR3DECL(int) DBGFR3EventAssertion(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszMsg1, const char *pszMsg2)514 VMMR3DECL(int) DBGFR3EventAssertion(PVM pVM, DBGFEVENTTYPE enmEvent, const char *pszMsg1, const char *pszMsg2) 515 515 { 516 516 int rc = dbgfR3EventPrologue(pVM, enmEvent); … … 537 537 * @param enmEvent DBGFEVENT_BREAKPOINT_HYPER or DBGFEVENT_BREAKPOINT. 538 538 */ 539 DBGFR3DECL(int) DBGFR3EventBreakpoint(PVM pVM, DBGFEVENTTYPE enmEvent)539 VMMR3DECL(int) DBGFR3EventBreakpoint(PVM pVM, DBGFEVENTTYPE enmEvent) 540 540 { 541 541 int rc = dbgfR3EventPrologue(pVM, enmEvent); … … 801 801 * @param pVM VM Handle. 802 802 */ 803 DBGFR3DECL(int) DBGFR3Attach(PVM pVM)803 VMMR3DECL(int) DBGFR3Attach(PVM pVM) 804 804 { 805 805 /* … … 868 868 * @param pVM VM Handle. 869 869 */ 870 DBGFR3DECL(int) DBGFR3Detach(PVM pVM)870 VMMR3DECL(int) DBGFR3Detach(PVM pVM) 871 871 { 872 872 LogFlow(("DBGFR3Detach:\n")); … … 916 916 * @param ppEvent Where to store the event pointer. 917 917 */ 918 DBGFR3DECL(int) DBGFR3EventWait(PVM pVM, unsigned cMillies, PCDBGFEVENT *ppEvent)918 VMMR3DECL(int) DBGFR3EventWait(PVM pVM, unsigned cMillies, PCDBGFEVENT *ppEvent) 919 919 { 920 920 /* … … 948 948 * @param pVM VM handle. 949 949 */ 950 DBGFR3DECL(int) DBGFR3Halt(PVM pVM)950 VMMR3DECL(int) DBGFR3Halt(PVM pVM) 951 951 { 952 952 /* … … 975 975 * @param pVM VM handle. 976 976 */ 977 DBGFR3DECL(bool) DBGFR3IsHalted(PVM pVM)977 VMMR3DECL(bool) DBGFR3IsHalted(PVM pVM) 978 978 { 979 979 AssertReturn(pVM->dbgf.s.fAttached, false); … … 993 993 * @param pVM VM handle. 994 994 */ 995 DBGFR3DECL(bool) DBGFR3CanWait(PVM pVM)995 VMMR3DECL(bool) DBGFR3CanWait(PVM pVM) 996 996 { 997 997 AssertReturn(pVM->dbgf.s.fAttached, false); … … 1008 1008 * @param pVM VM handle. 1009 1009 */ 1010 DBGFR3DECL(int) DBGFR3Resume(PVM pVM)1010 VMMR3DECL(int) DBGFR3Resume(PVM pVM) 1011 1011 { 1012 1012 /* … … 1036 1036 * @param pVM VM handle. 1037 1037 */ 1038 DBGFR3DECL(int) DBGFR3Step(PVM pVM)1038 VMMR3DECL(int) DBGFR3Step(PVM pVM) 1039 1039 { 1040 1040 /* … … 1064 1064 * @thread EMT 1065 1065 */ 1066 DBGFR3DECL(int) DBGFR3PrgStep(PVM pVM)1066 VMMR3DECL(int) DBGFR3PrgStep(PVM pVM) 1067 1067 { 1068 1068 VM_ASSERT_EMT(pVM); -
trunk/src/VBox/VMM/DBGFAddr.cpp
r12677 r12989 57 57 * @param off The offset part. 58 58 */ 59 DBGFR3DECL(int) DBGFR3AddrFromSelOff(PVM pVM, PDBGFADDRESS pAddress, RTSEL Sel, RTUINTPTR off)59 VMMR3DECL(int) DBGFR3AddrFromSelOff(PVM pVM, PDBGFADDRESS pAddress, RTSEL Sel, RTUINTPTR off) 60 60 { 61 61 pAddress->Sel = Sel; … … 113 113 * @param FlatPtr The flat pointer. 114 114 */ 115 DBGFR3DECL(PDBGFADDRESS) DBGFR3AddrFromFlat(PVM pVM, PDBGFADDRESS pAddress, RTGCUINTPTR FlatPtr)115 VMMR3DECL(PDBGFADDRESS) DBGFR3AddrFromFlat(PVM pVM, PDBGFADDRESS pAddress, RTGCUINTPTR FlatPtr) 116 116 { 117 117 pAddress->Sel = DBGF_SEL_FLAT; … … 132 132 * @param PhysAddr The guest physical address. 133 133 */ 134 DBGFR3DECL(void) DBGFR3AddrFromPhys(PVM pVM, PDBGFADDRESS pAddress, RTGCPHYS PhysAddr)134 VMMR3DECL(void) DBGFR3AddrFromPhys(PVM pVM, PDBGFADDRESS pAddress, RTGCPHYS PhysAddr) 135 135 { 136 136 pAddress->Sel = DBGF_SEL_FLAT; … … 149 149 * @param pAddress The address to validate. 150 150 */ 151 DBGFR3DECL(bool) DBGFR3AddrIsValid(PVM pVM, PCDBGFADDRESS pAddress)151 VMMR3DECL(bool) DBGFR3AddrIsValid(PVM pVM, PCDBGFADDRESS pAddress) 152 152 { 153 153 if (!VALID_PTR(pAddress)) -
trunk/src/VBox/VMM/DBGFBp.cpp
r12677 r12989 282 282 * @thread Any thread. 283 283 */ 284 DBGFR3DECL(int) DBGFR3BpSet(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, PRTUINT piBp)284 VMMR3DECL(int) DBGFR3BpSet(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, PRTUINT piBp) 285 285 { 286 286 /* … … 430 430 * @thread Any thread. 431 431 */ 432 DBGFR3DECL(int) DBGFR3BpSetReg(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable,432 VMMR3DECL(int) DBGFR3BpSetReg(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, 433 433 uint8_t fType, uint8_t cb, PRTUINT piBp) 434 434 { … … 596 596 * @thread Any thread. 597 597 */ 598 DBGFR3DECL(int) DBGFR3BpSetREM(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, PRTUINT piBp)598 VMMR3DECL(int) DBGFR3BpSetREM(PVM pVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, PRTUINT piBp) 599 599 { 600 600 /* … … 692 692 * @thread Any thread. 693 693 */ 694 DBGFR3DECL(int) DBGFR3BpClear(PVM pVM, RTUINT iBp)694 VMMR3DECL(int) DBGFR3BpClear(PVM pVM, RTUINT iBp) 695 695 { 696 696 /* … … 769 769 * @thread Any thread. 770 770 */ 771 DBGFR3DECL(int) DBGFR3BpEnable(PVM pVM, RTUINT iBp)771 VMMR3DECL(int) DBGFR3BpEnable(PVM pVM, RTUINT iBp) 772 772 { 773 773 /* … … 846 846 * @thread Any thread. 847 847 */ 848 DBGFR3DECL(int) DBGFR3BpDisable(PVM pVM, RTUINT iBp)848 VMMR3DECL(int) DBGFR3BpDisable(PVM pVM, RTUINT iBp) 849 849 { 850 850 /* … … 922 922 * @thread Any thread but the callback will be called from EMT. 923 923 */ 924 DBGFR3DECL(int) DBGFR3BpEnum(PVM pVM, PFNDBGFBPENUM pfnCallback, void *pvUser)924 VMMR3DECL(int) DBGFR3BpEnum(PVM pVM, PFNDBGFBPENUM pfnCallback, void *pvUser) 925 925 { 926 926 /* -
trunk/src/VBox/VMM/DBGFDisas.cpp
r12677 r12989 301 301 * @param pcbInstr Where to return the size of the instruction. 302 302 */ 303 DBGFR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr)303 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr) 304 304 { 305 305 /* … … 516 516 * @param cchOutput Size of the output buffer. 517 517 */ 518 DBGFR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)518 VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput) 519 519 { 520 520 return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL); … … 531 531 * @param cchOutput Size of the output buffer. 532 532 */ 533 DBGFR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)533 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput) 534 534 { 535 535 return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL); … … 545 545 * @param pszPrefix Short prefix string to the dissassembly string. (optional) 546 546 */ 547 DBGFR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)547 VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix) 548 548 { 549 549 char szBuf[256]; … … 571 571 * @param GCPtr The code address relative to the base of Sel. 572 572 */ 573 DBGFR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)573 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr) 574 574 { 575 575 char szBuf[256]; -
trunk/src/VBox/VMM/DBGFInfo.cpp
r12677 r12989 138 138 * @returns Pointer to the logger info helper. 139 139 */ 140 DBGFR3DECL(PCDBGFINFOHLP) DBGFR3InfoLogHlp(void)140 VMMR3DECL(PCDBGFINFOHLP) DBGFR3InfoLogHlp(void) 141 141 { 142 142 return &g_dbgfR3InfoLogHlp; … … 168 168 * @returns Pointer to the release logger info helper. 169 169 */ 170 DBGFR3DECL(PCDBGFINFOHLP) DBGFR3InfoLogRelHlp(void)170 VMMR3DECL(PCDBGFINFOHLP) DBGFR3InfoLogRelHlp(void) 171 171 { 172 172 return &g_dbgfR3InfoLogRelHlp; … … 253 253 * @param pDevIns The device instance owning the info. 254 254 */ 255 DBGFR3DECL(int) DBGFR3InfoRegisterDevice(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler, PPDMDEVINS pDevIns)255 VMMR3DECL(int) DBGFR3InfoRegisterDevice(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler, PPDMDEVINS pDevIns) 256 256 { 257 257 LogFlow(("DBGFR3InfoRegisterDevice: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p pDevIns=%p\n", … … 299 299 * @param pDrvIns The driver instance owning the info. 300 300 */ 301 DBGFR3DECL(int) DBGFR3InfoRegisterDriver(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDRV pfnHandler, PPDMDRVINS pDrvIns)301 VMMR3DECL(int) DBGFR3InfoRegisterDriver(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDRV pfnHandler, PPDMDRVINS pDrvIns) 302 302 { 303 303 LogFlow(("DBGFR3InfoRegisterDriver: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p pDrvIns=%p\n", … … 344 344 * @param pfnHandler The handler function to be called to display the info. 345 345 */ 346 DBGFR3DECL(int) DBGFR3InfoRegisterInternal(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERINT pfnHandler)346 VMMR3DECL(int) DBGFR3InfoRegisterInternal(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERINT pfnHandler) 347 347 { 348 348 return DBGFR3InfoRegisterInternalEx(pVM, pszName, pszDesc, pfnHandler, 0); … … 360 360 * @param fFlags Flags, see the DBGFINFO_FLAGS_*. 361 361 */ 362 DBGFR3DECL(int) DBGFR3InfoRegisterInternalEx(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERINT pfnHandler, uint32_t fFlags)362 VMMR3DECL(int) DBGFR3InfoRegisterInternalEx(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLERINT pfnHandler, uint32_t fFlags) 363 363 { 364 364 LogFlow(("DBGFR3InfoRegisterInternal: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p fFlags=%x\n", … … 400 400 * @param pvUser User argument to be passed to the handler. 401 401 */ 402 DBGFR3DECL(int) DBGFR3InfoRegisterExternal(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLEREXT pfnHandler, void *pvUser)402 VMMR3DECL(int) DBGFR3InfoRegisterExternal(PVM pVM, const char *pszName, const char *pszDesc, PFNDBGFHANDLEREXT pfnHandler, void *pvUser) 403 403 { 404 404 LogFlow(("DBGFR3InfoRegisterExternal: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p pvUser=%p\n", … … 439 439 * @param pszName The identifier of the info. If NULL all owned by the device. 440 440 */ 441 DBGFR3DECL(int) DBGFR3InfoDeregisterDevice(PVM pVM, PPDMDEVINS pDevIns, const char *pszName)441 VMMR3DECL(int) DBGFR3InfoDeregisterDevice(PVM pVM, PPDMDEVINS pDevIns, const char *pszName) 442 442 { 443 443 LogFlow(("DBGFR3InfoDeregisterDevice: pDevIns=%p pszName=%p:{%s}\n", pDevIns, pszName, pszName)); … … 514 514 * @param pszName The identifier of the info. If NULL all owned by the driver. 515 515 */ 516 DBGFR3DECL(int) DBGFR3InfoDeregisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName)516 VMMR3DECL(int) DBGFR3InfoDeregisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName) 517 517 { 518 518 LogFlow(("DBGFR3InfoDeregisterDriver: pDrvIns=%p pszName=%p:{%s}\n", pDrvIns, pszName, pszName)); … … 638 638 * @param pszName The identifier of the info. If NULL all owned by the device. 639 639 */ 640 DBGFR3DECL(int) DBGFR3InfoDeregisterInternal(PVM pVM, const char *pszName)640 VMMR3DECL(int) DBGFR3InfoDeregisterInternal(PVM pVM, const char *pszName) 641 641 { 642 642 LogFlow(("DBGFR3InfoDeregisterInternal: pszName=%p:{%s}\n", pszName, pszName)); … … 652 652 * @param pszName The identifier of the info. If NULL all owned by the device. 653 653 */ 654 DBGFR3DECL(int) DBGFR3InfoDeregisterExternal(PVM pVM, const char *pszName)654 VMMR3DECL(int) DBGFR3InfoDeregisterExternal(PVM pVM, const char *pszName) 655 655 { 656 656 LogFlow(("DBGFR3InfoDeregisterExternal: pszName=%p:{%s}\n", pszName, pszName)); … … 668 668 * @param pHlp The output helper functions. If NULL the logger will be used. 669 669 */ 670 DBGFR3DECL(int) DBGFR3Info(PVM pVM, const char *pszName, const char *pszArgs, PCDBGFINFOHLP pHlp)670 VMMR3DECL(int) DBGFR3Info(PVM pVM, const char *pszName, const char *pszArgs, PCDBGFINFOHLP pHlp) 671 671 { 672 672 /* … … 768 768 * @param pvUser User argument to pass to the callback. 769 769 */ 770 DBGFR3DECL(int) DBGFR3InfoEnum(PVM pVM, PFNDBGFINFOENUM pfnCallback, void *pvUser)770 VMMR3DECL(int) DBGFR3InfoEnum(PVM pVM, PFNDBGFINFOENUM pfnCallback, void *pvUser) 771 771 { 772 772 LogFlow(("DBGFR3InfoLog: pfnCallback=%p pvUser=%p\n", pfnCallback, pvUser)); -
trunk/src/VBox/VMM/DBGFInternal.h
r12875 r12989 31 31 #include <VBox/dbgf.h> 32 32 33 34 #if !defined(IN_DBGF_R3) && !defined(IN_DBGF_R0) && !defined(IN_DBGF_GC)35 # error "Not in DBGF! This is an internal header!"36 #endif37 33 38 34 -
trunk/src/VBox/VMM/DBGFLog.cpp
r12677 r12989 47 47 * @param pszGroupSettings The group settings string. (VBOX_LOG) 48 48 */ 49 DBGFR3DECL(int) DBGFR3LogModifyGroups(PVM pVM, const char *pszGroupSettings)49 VMMR3DECL(int) DBGFR3LogModifyGroups(PVM pVM, const char *pszGroupSettings) 50 50 { 51 51 AssertReturn(VALID_PTR(pVM), VERR_INVALID_POINTER); … … 84 84 * @param pszFlagSettings The group settings string. (VBOX_LOG_FLAGS) 85 85 */ 86 DBGFR3DECL(int) DBGFR3LogModifyFlags(PVM pVM, const char *pszFlagSettings)86 VMMR3DECL(int) DBGFR3LogModifyFlags(PVM pVM, const char *pszFlagSettings) 87 87 { 88 88 AssertReturn(VALID_PTR(pVM), VERR_INVALID_POINTER); … … 121 121 * @param pszDestSettings The destination settings string. (VBOX_LOG_DEST) 122 122 */ 123 DBGFR3DECL(int) DBGFR3LogModifyDestinations(PVM pVM, const char *pszDestSettings)123 VMMR3DECL(int) DBGFR3LogModifyDestinations(PVM pVM, const char *pszDestSettings) 124 124 { 125 125 AssertReturn(VALID_PTR(pVM), VERR_INVALID_POINTER); -
trunk/src/VBox/VMM/DBGFMem.cpp
r12677 r12989 103 103 * @thread Any thread. 104 104 */ 105 DBGFR3DECL(int) DBGFR3MemScan(PVM pVM, PCDBGFADDRESS pAddress, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PDBGFADDRESS pHitAddress)105 VMMR3DECL(int) DBGFR3MemScan(PVM pVM, PCDBGFADDRESS pAddress, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PDBGFADDRESS pHitAddress) 106 106 { 107 107 PVMREQ pReq; … … 161 161 * @param cbRead The number of bytes to read. 162 162 */ 163 DBGFR3DECL(int) DBGFR3MemRead(PVM pVM, PCDBGFADDRESS pAddress, void *pvBuf, size_t cbRead)163 VMMR3DECL(int) DBGFR3MemRead(PVM pVM, PCDBGFADDRESS pAddress, void *pvBuf, size_t cbRead) 164 164 { 165 165 PVMREQ pReq; … … 237 237 * @param cchBuf The size of the buffer. 238 238 */ 239 DBGFR3DECL(int) DBGFR3MemReadString(PVM pVM, PCDBGFADDRESS pAddress, char *pszBuf, size_t cchBuf)239 VMMR3DECL(int) DBGFR3MemReadString(PVM pVM, PCDBGFADDRESS pAddress, char *pszBuf, size_t cchBuf) 240 240 { 241 241 /* -
trunk/src/VBox/VMM/DBGFOS.cpp
r12898 r12989 90 90 * @thread Any. 91 91 */ 92 DBGFR3DECL(int) DBGFR3OSRegister(PVM pVM, PCDBGFOSREG pReg)92 VMMR3DECL(int) DBGFR3OSRegister(PVM pVM, PCDBGFOSREG pReg) 93 93 { 94 94 /* … … 213 213 * @thread Any. 214 214 */ 215 DBGFR3DECL(int) DBGFR3OSDetect(PVM pVM, char *pszName, size_t cchName)215 VMMR3DECL(int) DBGFR3OSDetect(PVM pVM, char *pszName, size_t cchName) 216 216 { 217 217 AssertPtrNullReturn(pszName, VERR_INVALID_POINTER); … … 290 290 * @thread Any. 291 291 */ 292 DBGFR3DECL(int) DBGFR3OSQueryNameAndVersion(PVM pVM, char *pszName, size_t cchName, char *pszVersion, size_t cchVersion)292 VMMR3DECL(int) DBGFR3OSQueryNameAndVersion(PVM pVM, char *pszName, size_t cchName, char *pszVersion, size_t cchVersion) 293 293 { 294 294 AssertPtrNullReturn(pszName, VERR_INVALID_POINTER); … … 349 349 * @thread Any. 350 350 */ 351 DBGFR3DECL(void *) DBGFR3OSQueryInterface(PVM pVM, DBGFOSINTERFACE enmIf)351 VMMR3DECL(void *) DBGFR3OSQueryInterface(PVM pVM, DBGFOSINTERFACE enmIf) 352 352 { 353 353 AssertMsgReturn(enmIf > DBGFOSINTERFACE_INVALID && enmIf < DBGFOSINTERFACE_END, ("%d\n", enmIf), NULL); -
trunk/src/VBox/VMM/DBGFStack.cpp
r12677 r12989 351 351 * obtain about the stack frame. 352 352 */ 353 DBGFR3DECL(int) DBGFR3StackWalkBeginGuest(PVM pVM, PDBGFSTACKFRAME pFrame)353 VMMR3DECL(int) DBGFR3StackWalkBeginGuest(PVM pVM, PDBGFSTACKFRAME pFrame) 354 354 { 355 355 pFrame->pFirst = NULL; … … 382 382 * obtain about the stack frame. 383 383 */ 384 DBGFR3DECL(int) DBGFR3StackWalkBeginHyper(PVM pVM, PDBGFSTACKFRAME pFrame)384 VMMR3DECL(int) DBGFR3StackWalkBeginHyper(PVM pVM, PDBGFSTACKFRAME pFrame) 385 385 { 386 386 pFrame->pFirst = NULL; … … 406 406 * @param pFrame Pointer to the current frame on input, content is replaced with the next frame on successful return. 407 407 */ 408 DBGFR3DECL(int) DBGFR3StackWalkNext(PVM pVM, PDBGFSTACKFRAME pFrame)408 VMMR3DECL(int) DBGFR3StackWalkNext(PVM pVM, PDBGFSTACKFRAME pFrame) 409 409 { 410 410 if (pFrame->pNext) … … 426 426 * @param pFrame The stackframe as returned by the last stack walk call. 427 427 */ 428 DBGFR3DECL(void) DBGFR3StackWalkEnd(PVM pVM, PDBGFSTACKFRAME pFrame)428 VMMR3DECL(void) DBGFR3StackWalkEnd(PVM pVM, PDBGFSTACKFRAME pFrame) 429 429 { 430 430 if (!pFrame || !pFrame->pFirst) -
trunk/src/VBox/VMM/DBGFSym.cpp
r12975 r12989 533 533 * Ignored when pszName is NULL. 534 534 */ 535 DBGFR3DECL(int) DBGFR3ModuleLoad(PVM pVM, const char *pszFilename, RTGCUINTPTR AddressDelta, const char *pszName, RTGCUINTPTR ModuleAddress, unsigned cbImage)535 VMMR3DECL(int) DBGFR3ModuleLoad(PVM pVM, const char *pszFilename, RTGCUINTPTR AddressDelta, const char *pszName, RTGCUINTPTR ModuleAddress, unsigned cbImage) 536 536 { 537 537 /* … … 638 638 * @param pszName The module name. 639 639 */ 640 DBGFR3DECL(void) DBGFR3ModuleRelocate(PVM pVM, RTGCUINTPTR OldImageBase, RTGCUINTPTR NewImageBase, unsigned cbImage,640 VMMR3DECL(void) DBGFR3ModuleRelocate(PVM pVM, RTGCUINTPTR OldImageBase, RTGCUINTPTR NewImageBase, unsigned cbImage, 641 641 const char *pszFilename, const char *pszName) 642 642 { … … 669 669 * @param pszSymbol Symbol name. 670 670 */ 671 DBGFR3DECL(int) DBGFR3SymbolAdd(PVM pVM, RTGCUINTPTR ModuleAddress, RTGCUINTPTR SymbolAddress, RTUINT cbSymbol, const char *pszSymbol)671 VMMR3DECL(int) DBGFR3SymbolAdd(PVM pVM, RTGCUINTPTR ModuleAddress, RTGCUINTPTR SymbolAddress, RTUINT cbSymbol, const char *pszSymbol) 672 672 { 673 673 /* … … 710 710 * @param pSymbol Where to store the symbol info. 711 711 */ 712 DBGFR3DECL(int) DBGFR3SymbolByAddr(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement, PDBGFSYMBOL pSymbol)712 VMMR3DECL(int) DBGFR3SymbolByAddr(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement, PDBGFSYMBOL pSymbol) 713 713 { 714 714 /* … … 798 798 * @param pSymbol Where to store the symbol info. 799 799 */ 800 DBGFR3DECL(int) DBGFR3SymbolByName(PVM pVM, const char *pszSymbol, PDBGFSYMBOL pSymbol)800 VMMR3DECL(int) DBGFR3SymbolByName(PVM pVM, const char *pszSymbol, PDBGFSYMBOL pSymbol) 801 801 { 802 802 /* … … 872 872 * @param poffDisplacement Where to store the symbol displacement from Address. 873 873 */ 874 DBGFR3DECL(PDBGFSYMBOL) DBGFR3SymbolByAddrAlloc(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement)874 VMMR3DECL(PDBGFSYMBOL) DBGFR3SymbolByAddrAlloc(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement) 875 875 { 876 876 DBGFSYMBOL Symbol; … … 890 890 * @param pszSymbol Symbol name. 891 891 */ 892 DBGFR3DECL(PDBGFSYMBOL) DBGFR3SymbolByNameAlloc(PVM pVM, const char *pszSymbol)892 VMMR3DECL(PDBGFSYMBOL) DBGFR3SymbolByNameAlloc(PVM pVM, const char *pszSymbol) 893 893 { 894 894 DBGFSYMBOL Symbol; … … 905 905 * @param pSymbol Pointer to the symbol. 906 906 */ 907 DBGFR3DECL(void) DBGFR3SymbolFree(PDBGFSYMBOL pSymbol)907 VMMR3DECL(void) DBGFR3SymbolFree(PDBGFSYMBOL pSymbol) 908 908 { 909 909 if (pSymbol) … … 921 921 * @param pLine Where to store the line info. 922 922 */ 923 DBGFR3DECL(int) DBGFR3LineByAddr(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement, PDBGFLINE pLine)923 VMMR3DECL(int) DBGFR3LineByAddr(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement, PDBGFLINE pLine) 924 924 { 925 925 /* … … 983 983 * @param poffDisplacement Where to store the line displacement from Address. 984 984 */ 985 DBGFR3DECL(PDBGFLINE) DBGFR3LineByAddrAlloc(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement)985 VMMR3DECL(PDBGFLINE) DBGFR3LineByAddrAlloc(PVM pVM, RTGCUINTPTR Address, PRTGCINTPTR poffDisplacement) 986 986 { 987 987 DBGFLINE Line; … … 998 998 * @param pLine Pointer to the line. 999 999 */ 1000 DBGFR3DECL(void) DBGFR3LineFree(PDBGFLINE pLine)1000 VMMR3DECL(void) DBGFR3LineFree(PDBGFLINE pLine) 1001 1001 { 1002 1002 if (pLine) -
trunk/src/VBox/VMM/EM.cpp
r12831 r12989 101 101 * @param pVM The VM to operate on. 102 102 */ 103 EMR3DECL(int) EMR3Init(PVM pVM)103 VMMR3DECL(int) EMR3Init(PVM pVM) 104 104 { 105 105 LogFlow(("EMR3Init\n")); … … 371 371 * @param pVM The VM. 372 372 */ 373 EMR3DECL(void) EMR3Relocate(PVM pVM)373 VMMR3DECL(void) EMR3Relocate(PVM pVM) 374 374 { 375 375 LogFlow(("EMR3Relocate\n")); … … 384 384 * @param pVM 385 385 */ 386 EMR3DECL(void) EMR3Reset(PVM pVM)386 VMMR3DECL(void) EMR3Reset(PVM pVM) 387 387 { 388 388 LogFlow(("EMR3Reset: \n")); … … 400 400 * @param pVM The VM to operate on. 401 401 */ 402 EMR3DECL(int) EMR3Term(PVM pVM)402 VMMR3DECL(int) EMR3Term(PVM pVM) 403 403 { 404 404 AssertMsg(pVM->em.s.offVM, ("bad init order!\n")); … … 463 463 * @thread The emulation thread. 464 464 */ 465 EMR3DECL(int) EMR3RawSetMode(PVM pVM, EMRAWMODE enmMode)465 VMMR3DECL(int) EMR3RawSetMode(PVM pVM, EMRAWMODE enmMode) 466 466 { 467 467 switch (enmMode) … … 502 502 * @param rc VBox status code. 503 503 */ 504 EMR3DECL(void) EMR3FatalError(PVM pVM, int rc)504 VMMR3DECL(void) EMR3FatalError(PVM pVM, int rc) 505 505 { 506 506 longjmp(pVM->em.s.u.FatalLongJump, rc); … … 515 515 * @param enmState The state. 516 516 */ 517 EMR3DECL(const char *) EMR3GetStateName(EMSTATE enmState)517 VMMR3DECL(const char *) EMR3GetStateName(EMSTATE enmState) 518 518 { 519 519 switch (enmState) … … 2357 2357 * @param pVM The VM to operate on. 2358 2358 */ 2359 EMR3DECL(int) EMR3CheckRawForcedActions(PVM pVM)2359 VMMR3DECL(int) EMR3CheckRawForcedActions(PVM pVM) 2360 2360 { 2361 2361 return emR3RawForcedActions(pVM, pVM->em.s.pCtx); … … 3220 3220 * @param pVM The VM to operate on. 3221 3221 */ 3222 EMR3DECL(int) EMR3ExecuteVM(PVM pVM)3222 VMMR3DECL(int) EMR3ExecuteVM(PVM pVM) 3223 3223 { 3224 3224 LogFlow(("EMR3ExecuteVM: pVM=%p enmVMState=%d enmState=%d (%s) fForceRAW=%d\n", pVM, pVM->enmVMState, -
trunk/src/VBox/VMM/HWACCM.cpp
r12894 r12989 60 60 * @param pVM The VM to operate on. 61 61 */ 62 HWACCMR3DECL(int) HWACCMR3Init(PVM pVM)62 VMMR3DECL(int) HWACCMR3Init(PVM pVM) 63 63 { 64 64 LogFlow(("HWACCMR3Init\n")); … … 244 244 * @param pVM The VM handle. 245 245 */ 246 HWACCMR3DECL(int) HWACCMR3InitFinalizeR0(PVM pVM)246 VMMR3DECL(int) HWACCMR3InitFinalizeR0(PVM pVM) 247 247 { 248 248 int rc; … … 665 665 * @param pVM The VM. 666 666 */ 667 HWACCMR3DECL(void) HWACCMR3Relocate(PVM pVM)667 VMMR3DECL(void) HWACCMR3Relocate(PVM pVM) 668 668 { 669 669 Log(("HWACCMR3Relocate to %VGv\n", MMHyperGetArea(pVM, 0))); … … 677 677 * @param pVM The VM to operate on. 678 678 */ 679 HWACCMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM)679 VMMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM) 680 680 { 681 681 return pVM->hwaccm.s.fAllowed; … … 691 691 * @param enmShadowMode New paging mode. 692 692 */ 693 HWACCMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PGMMODE enmShadowMode)693 VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PGMMODE enmShadowMode) 694 694 { 695 695 pVM->hwaccm.s.enmShadowMode = enmShadowMode; … … 705 705 * @param pVM The VM to operate on. 706 706 */ 707 HWACCMR3DECL(int) HWACCMR3Term(PVM pVM)707 VMMR3DECL(int) HWACCMR3Term(PVM pVM) 708 708 { 709 709 if (pVM->hwaccm.s.vmx.pRealModeTSS) … … 729 729 * @param pVM VM handle. 730 730 */ 731 HWACCMR3DECL(void) HWACCMR3Reset(PVM pVM)731 VMMR3DECL(void) HWACCMR3Reset(PVM pVM) 732 732 { 733 733 LogFlow(("HWACCMR3Reset:\n")); … … 757 757 * @param pCtx Partial VM execution context 758 758 */ 759 HWACCMR3DECL(bool) HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx)759 VMMR3DECL(bool) HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx) 760 760 { 761 761 Assert(pVM->fHWACCMEnabled); … … 846 846 * @param pVM The VM to operate on. 847 847 */ 848 HWACCMR3DECL(bool) HWACCMR3IsActive(PVM pVM)848 VMMR3DECL(bool) HWACCMR3IsActive(PVM pVM) 849 849 { 850 850 return pVM->hwaccm.s.fActive; … … 857 857 * @param pVM The VM to operate on. 858 858 */ 859 HWACCMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM)859 VMMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM) 860 860 { 861 861 return pVM->hwaccm.s.fNestedPaging; … … 868 868 * @param pVM The VM to operate on. 869 869 */ 870 HWACCMR3DECL(bool) HWACCMR3IsEventPending(PVM pVM)870 VMMR3DECL(bool) HWACCMR3IsEventPending(PVM pVM) 871 871 { 872 872 return HWACCMIsEnabled(pVM) && pVM->hwaccm.s.Event.fPending; … … 880 880 * @param iStatusCode VBox status code 881 881 */ 882 HWACCMR3DECL(void) HWACCMR3CheckError(PVM pVM, int iStatusCode)882 VMMR3DECL(void) HWACCMR3CheckError(PVM pVM, int iStatusCode) 883 883 { 884 884 switch(iStatusCode) -
trunk/src/VBox/VMM/HWACCMInternal.h
r12824 r12989 497 497 #ifdef IN_RING0 498 498 499 HWACCMR0DECL(PHWACCM_CPUINFO) HWACCMR0GetCurrentCpu();499 VMMR0DECL(PHWACCM_CPUINFO) HWACCMR0GetCurrentCpu(); 500 500 501 501 #ifdef VBOX_STRICT 502 HWACCMR0DECL(void) HWACCMDumpRegs(PVM pVM, PCPUMCTX pCtx);503 HWACCMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC Desc, RTSEL Sel, const char *pszMsg);502 VMMR0DECL(void) HWACCMDumpRegs(PVM pVM, PCPUMCTX pCtx); 503 VMMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC Desc, RTSEL Sel, const char *pszMsg); 504 504 #else 505 505 #define HWACCMDumpRegs(a, b) do { } while (0) … … 508 508 509 509 /* Dummy callback handlers. */ 510 HWACCMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu);511 HWACCMR0DECL(int) HWACCMR0DummyLeave(PVM pVM, CPUMCTX *pCtx);512 HWACCMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);513 HWACCMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);514 HWACCMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM);515 HWACCMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM);516 HWACCMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM);517 HWACCMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx);518 HWACCMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM);519 HWACCMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx);510 VMMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu); 511 VMMR0DECL(int) HWACCMR0DummyLeave(PVM pVM, CPUMCTX *pCtx); 512 VMMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 513 VMMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 514 VMMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM); 515 VMMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM); 516 VMMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM); 517 VMMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx); 518 VMMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM); 519 VMMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx); 520 520 521 521 #endif /* IN_RING0 */ -
trunk/src/VBox/VMM/IOM.cpp
r12975 r12989 139 139 * @param pVM The VM to operate on. 140 140 */ 141 IOMR3DECL(int) IOMR3Init(PVM pVM)141 VMMR3DECL(int) IOMR3Init(PVM pVM) 142 142 { 143 143 LogFlow(("IOMR3Init:\n")); … … 250 250 * @param pVM VM handle. 251 251 */ 252 IOMR3DECL(void) IOMR3Reset(PVM pVM)252 VMMR3DECL(void) IOMR3Reset(PVM pVM) 253 253 { 254 254 iomR3FlushCache(pVM); … … 266 266 * @param offDelta Relocation delta relative to old location. 267 267 */ 268 IOMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)268 VMMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 269 269 { 270 270 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta)); … … 364 364 * @param pVM The VM to operate on. 365 365 */ 366 IOMR3DECL(int) IOMR3Term(PVM pVM)366 VMMR3DECL(int) IOMR3Term(PVM pVM) 367 367 { 368 368 /* … … 500 500 * @param pszDesc Pointer to description string. This must not be freed. 501 501 */ 502 IOMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,502 VMMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser, 503 503 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 504 504 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc) … … 595 595 * @param pszDesc Pointer to description string. This must not be freed. 596 596 */ 597 IOMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,597 VMMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser, 598 598 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 599 599 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc) … … 702 702 * @param pszDesc Pointer to description string. This must not be freed. 703 703 */ 704 IOMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,704 VMMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser, 705 705 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 706 706 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, … … 809 809 * all the checks you might expect it to do. 810 810 */ 811 IOMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)811 VMMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts) 812 812 { 813 813 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts)); … … 1357 1357 * @param pszDesc Pointer to description string. This must not be freed. 1358 1358 */ 1359 IOMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,1359 VMMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser, 1360 1360 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, 1361 1361 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc) … … 1457 1457 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations. 1458 1458 */ 1459 IOMR3DECL(int) IOMR3MMIORegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,1459 VMMR3DECL(int) IOMR3MMIORegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser, 1460 1460 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, 1461 1461 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback) … … 1510 1510 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations. 1511 1511 */ 1512 IOMR3DECL(int) IOMR3MMIORegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,1512 VMMR3DECL(int) IOMR3MMIORegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser, 1513 1513 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, 1514 1514 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, … … 1561 1561 * all the checks you might expect it to do. 1562 1562 */ 1563 IOMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)1563 VMMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange) 1564 1564 { 1565 1565 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=%VGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange)); -
trunk/src/VBox/VMM/IOMInternal.h
r12772 r12989 31 31 #include <iprt/avl.h> 32 32 33 #if !defined(IN_IOM_R3) && !defined(IN_IOM_R0) && !defined(IN_IOM_GC)34 # error "Not in IOM! This is an internal header!"35 #endif36 33 37 34 … … 403 400 __BEGIN_DECLS 404 401 405 #ifdef IN_ IOM_R3402 #ifdef IN_RING3 406 403 PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc); 407 PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc);408 #endif /* IN_ IOM_R3 */404 PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc); 405 #endif /* IN_RING3 */ 409 406 410 407 /** … … 420 417 * @param pvUser Pointer to the MMIO range entry. 421 418 */ 422 IOMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);419 VMMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser); 423 420 424 421 #ifdef IN_RING3 -
trunk/src/VBox/VMM/MM.cpp
r12968 r12989 188 188 * @param pUVM Pointer to the user mode VM structure. 189 189 */ 190 MMR3DECL(int) MMR3InitUVM(PUVM pUVM)190 VMMR3DECL(int) MMR3InitUVM(PUVM pUVM) 191 191 { 192 192 /* … … 222 222 * @param pVM The VM to operate on. 223 223 */ 224 MMR3DECL(int) MMR3Init(PVM pVM)224 VMMR3DECL(int) MMR3Init(PVM pVM) 225 225 { 226 226 LogFlow(("MMR3Init\n")); … … 275 275 * @remark No cleanup necessary since MMR3Term() will be called on failure. 276 276 */ 277 MMR3DECL(int) MMR3InitPaging(PVM pVM)277 VMMR3DECL(int) MMR3InitPaging(PVM pVM) 278 278 { 279 279 LogFlow(("MMR3InitPaging:\n")); … … 423 423 * @param pVM The VM to operate on. 424 424 */ 425 MMR3DECL(int) MMR3Term(PVM pVM)425 VMMR3DECL(int) MMR3Term(PVM pVM) 426 426 { 427 427 /* … … 478 478 * @param pUVM Pointer to the user mode VM structure. 479 479 */ 480 MMR3DECL(void) MMR3TermUVM(PUVM pUVM)480 VMMR3DECL(void) MMR3TermUVM(PUVM pUVM) 481 481 { 482 482 /* … … 496 496 * @param pVM The VM handle. 497 497 */ 498 MMR3DECL(void) MMR3Reset(PVM pVM)498 VMMR3DECL(void) MMR3Reset(PVM pVM) 499 499 { 500 500 mmR3PhysRomReset(pVM); … … 615 615 * @param cAddBasePages The number of pages to add. 616 616 */ 617 MMR3DECL(int) MMR3IncreaseBaseReservation(PVM pVM, uint64_t cAddBasePages)617 VMMR3DECL(int) MMR3IncreaseBaseReservation(PVM pVM, uint64_t cAddBasePages) 618 618 { 619 619 uint64_t cOld = pVM->mm.s.cBasePages; … … 640 640 * @param pszDesc Some description associated with the reservation. 641 641 */ 642 MMR3DECL(int) MMR3AdjustFixedReservation(PVM pVM, int32_t cDeltaFixedPages, const char *pszDesc)642 VMMR3DECL(int) MMR3AdjustFixedReservation(PVM pVM, int32_t cDeltaFixedPages, const char *pszDesc) 643 643 { 644 644 const uint32_t cOld = pVM->mm.s.cFixedPages; … … 665 665 * @param cShadowPages The new page count. 666 666 */ 667 MMR3DECL(int) MMR3UpdateShadowReservation(PVM pVM, uint32_t cShadowPages)667 VMMR3DECL(int) MMR3UpdateShadowReservation(PVM pVM, uint32_t cShadowPages) 668 668 { 669 669 const uint32_t cOld = pVM->mm.s.cShadowPages; … … 815 815 * @todo Rename to indicate the special usage. 816 816 */ 817 MMR3DECL(int) MMR3HCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys, void **ppv)817 VMMR3DECL(int) MMR3HCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys, void **ppv) 818 818 { 819 819 /* … … 856 856 * @todo Move to DBGF, it's only selecting which functions to use! 857 857 */ 858 MMR3DECL(int) MMR3ReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb)858 VMMR3DECL(int) MMR3ReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb) 859 859 { 860 860 if (GCPtr - pVM->mm.s.pvHyperAreaGC < pVM->mm.s.cbHyperArea) … … 876 876 * @todo Move to DBGF, it's only selecting which functions to use! 877 877 */ 878 MMR3DECL(int) MMR3WriteGCVirt(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)878 VMMR3DECL(int) MMR3WriteGCVirt(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb) 879 879 { 880 880 if (GCPtrDst - pVM->mm.s.pvHyperAreaGC < pVM->mm.s.cbHyperArea) -
trunk/src/VBox/VMM/MMHeap.cpp
r12967 r12989 138 138 * @param cbSize Size of the block. 139 139 */ 140 MMR3DECL(void *) MMR3HeapAllocU(PUVM pUVM, MMTAG enmTag, size_t cbSize)140 VMMR3DECL(void *) MMR3HeapAllocU(PUVM pUVM, MMTAG enmTag, size_t cbSize) 141 141 { 142 142 Assert(pUVM->mm.s.pHeap); … … 162 162 * @param cbSize Size of the block. 163 163 */ 164 MMR3DECL(void *) MMR3HeapAlloc(PVM pVM, MMTAG enmTag, size_t cbSize)164 VMMR3DECL(void *) MMR3HeapAlloc(PVM pVM, MMTAG enmTag, size_t cbSize) 165 165 { 166 166 return mmR3HeapAlloc(pVM->pUVM->mm.s.pHeap, enmTag, cbSize, false); … … 179 179 * @param ppv Where to store the pointer to the allocated memory on success. 180 180 */ 181 MMR3DECL(int) MMR3HeapAllocExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv)181 VMMR3DECL(int) MMR3HeapAllocExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv) 182 182 { 183 183 Assert(pUVM->mm.s.pHeap); … … 203 203 * @param ppv Where to store the pointer to the allocated memory on success. 204 204 */ 205 MMR3DECL(int) MMR3HeapAllocEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv)205 VMMR3DECL(int) MMR3HeapAllocEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv) 206 206 { 207 207 void *pv = mmR3HeapAlloc(pVM->pUVM->mm.s.pHeap, enmTag, cbSize, false); … … 225 225 * @param cbSize Size of the block. 226 226 */ 227 MMR3DECL(void *) MMR3HeapAllocZU(PUVM pUVM, MMTAG enmTag, size_t cbSize)227 VMMR3DECL(void *) MMR3HeapAllocZU(PUVM pUVM, MMTAG enmTag, size_t cbSize) 228 228 { 229 229 return mmR3HeapAlloc(pUVM->mm.s.pHeap, enmTag, cbSize, true); … … 241 241 * @param cbSize Size of the block. 242 242 */ 243 MMR3DECL(void *) MMR3HeapAllocZ(PVM pVM, MMTAG enmTag, size_t cbSize)243 VMMR3DECL(void *) MMR3HeapAllocZ(PVM pVM, MMTAG enmTag, size_t cbSize) 244 244 { 245 245 return mmR3HeapAlloc(pVM->pUVM->mm.s.pHeap, enmTag, cbSize, true); … … 258 258 * @param ppv Where to store the pointer to the allocated memory on success. 259 259 */ 260 MMR3DECL(int) MMR3HeapAllocZExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv)260 VMMR3DECL(int) MMR3HeapAllocZExU(PUVM pUVM, MMTAG enmTag, size_t cbSize, void **ppv) 261 261 { 262 262 Assert(pUVM->mm.s.pHeap); … … 282 282 * @param ppv Where to store the pointer to the allocated memory on success. 283 283 */ 284 MMR3DECL(int) MMR3HeapAllocZEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv)284 VMMR3DECL(int) MMR3HeapAllocZEx(PVM pVM, MMTAG enmTag, size_t cbSize, void **ppv) 285 285 { 286 286 void *pv = mmR3HeapAlloc(pVM->pUVM->mm.s.pHeap, enmTag, cbSize, true); … … 440 440 * @param cbNewSize New block size. 441 441 */ 442 MMR3DECL(void *) MMR3HeapRealloc(void *pv, size_t cbNewSize)442 VMMR3DECL(void *) MMR3HeapRealloc(void *pv, size_t cbNewSize) 443 443 { 444 444 AssertMsg(pv, ("Invalid pointer pv=%p\n", pv)); … … 539 539 * @param psz The string to duplicate. NULL is allowed. 540 540 */ 541 MMR3DECL(char *) MMR3HeapStrDupU(PUVM pUVM, MMTAG enmTag, const char *psz)541 VMMR3DECL(char *) MMR3HeapStrDupU(PUVM pUVM, MMTAG enmTag, const char *psz) 542 542 { 543 543 if (!psz) … … 564 564 * @param psz The string to duplicate. NULL is allowed. 565 565 */ 566 MMR3DECL(char *) MMR3HeapStrDup(PVM pVM, MMTAG enmTag, const char *psz)566 VMMR3DECL(char *) MMR3HeapStrDup(PVM pVM, MMTAG enmTag, const char *psz) 567 567 { 568 568 return MMR3HeapStrDupU(pVM->pUVM, enmTag, psz); … … 579 579 * @param ... Format arguments. 580 580 */ 581 MMR3DECL(char *) MMR3HeapAPrintf(PVM pVM, MMTAG enmTag, const char *pszFormat, ...)581 VMMR3DECL(char *) MMR3HeapAPrintf(PVM pVM, MMTAG enmTag, const char *pszFormat, ...) 582 582 { 583 583 va_list va; … … 598 598 * @param ... Format arguments. 599 599 */ 600 MMR3DECL(char *) MMR3HeapAPrintfU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, ...)600 VMMR3DECL(char *) MMR3HeapAPrintfU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, ...) 601 601 { 602 602 va_list va; … … 617 617 * @param va Format arguments. 618 618 */ 619 MMR3DECL(char *) MMR3HeapAPrintfV(PVM pVM, MMTAG enmTag, const char *pszFormat, va_list va)619 VMMR3DECL(char *) MMR3HeapAPrintfV(PVM pVM, MMTAG enmTag, const char *pszFormat, va_list va) 620 620 { 621 621 return MMR3HeapAPrintfVU(pVM->pUVM, enmTag, pszFormat, va); … … 632 632 * @param va Format arguments. 633 633 */ 634 MMR3DECL(char *) MMR3HeapAPrintfVU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, va_list va)634 VMMR3DECL(char *) MMR3HeapAPrintfVU(PUVM pUVM, MMTAG enmTag, const char *pszFormat, va_list va) 635 635 { 636 636 /* … … 655 655 * @param pv Pointer to the memory block to free. 656 656 */ 657 MMR3DECL(void) MMR3HeapFree(void *pv)657 VMMR3DECL(void) MMR3HeapFree(void *pv) 658 658 { 659 659 /* Ignore NULL pointers. */ -
trunk/src/VBox/VMM/MMHyper.cpp
r12968 r12989 151 151 * @returns VBox status. 152 152 */ 153 MMR3DECL(int) MMR3HyperInitFinalize(PVM pVM)153 VMMR3DECL(int) MMR3HyperInitFinalize(PVM pVM) 154 154 { 155 155 LogFlow(("MMR3HyperInitFinalize:\n")); … … 328 328 * @param pGCPtr Where to store the GC address. 329 329 */ 330 MMR3DECL(int) MMR3HyperMapHCPhys(PVM pVM, void *pvR3, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr)330 VMMR3DECL(int) MMR3HyperMapHCPhys(PVM pVM, void *pvR3, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr) 331 331 { 332 332 LogFlow(("MMR3HyperMapHCPhys: pvR3=%p HCPhys=%RHp cb=%d pszDesc=%p:{%s} pGCPtr=%p\n", pvR3, HCPhys, (int)cb, pszDesc, pszDesc, pGCPtr)); … … 376 376 * @param pGCPtr Where to store the GC address. 377 377 */ 378 MMR3DECL(int) MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr)378 VMMR3DECL(int) MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr) 379 379 { 380 380 LogFlow(("MMR3HyperMapGCPhys: GCPhys=%VGp cb=%d pszDesc=%p:{%s} pGCPtr=%p\n", GCPhys, (int)cb, pszDesc, pszDesc, pGCPtr)); … … 447 447 * @param pRCPtr Where to store the RC address. 448 448 */ 449 MMR3DECL(int) MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,449 VMMR3DECL(int) MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, 450 450 const char *pszDesc, PRTRCPTR pRCPtr) 451 451 { … … 529 529 * @param pGCPtr Where to store the GC address corresponding to pvR3. 530 530 */ 531 MMR3DECL(int) MMR3HyperMapHCRam(PVM pVM, void *pvR3, size_t cb, bool fFree, const char *pszDesc, PRTGCPTR pGCPtr)531 VMMR3DECL(int) MMR3HyperMapHCRam(PVM pVM, void *pvR3, size_t cb, bool fFree, const char *pszDesc, PRTGCPTR pGCPtr) 532 532 { 533 533 LogFlow(("MMR3HyperMapHCRam: pvR3=%p cb=%d fFree=%d pszDesc=%p:{%s} pGCPtr=%p\n", pvR3, (int)cb, fFree, pszDesc, pszDesc, pGCPtr)); … … 603 603 * @param pGCPtr Where to store the GC address corresponding to pvR3. 604 604 */ 605 MMR3DECL(int) MMR3HyperMapPages(PVM pVM, void *pvR3, RTR0PTR pvR0, size_t cPages, PCSUPPAGE paPages, const char *pszDesc, PRTGCPTR pGCPtr)605 VMMR3DECL(int) MMR3HyperMapPages(PVM pVM, void *pvR3, RTR0PTR pvR0, size_t cPages, PCSUPPAGE paPages, const char *pszDesc, PRTGCPTR pGCPtr) 606 606 { 607 607 LogFlow(("MMR3HyperMapPages: pvR3=%p pvR0=%p cPages=%zu paPages=%p pszDesc=%p:{%s} pGCPtr=%p\n", … … 677 677 * @param pGCPtr Where to store the assigned GC address. Optional. 678 678 */ 679 MMR3DECL(int) MMR3HyperReserve(PVM pVM, unsigned cb, const char *pszDesc, PRTGCPTR pGCPtr)679 VMMR3DECL(int) MMR3HyperReserve(PVM pVM, unsigned cb, const char *pszDesc, PRTGCPTR pGCPtr) 680 680 { 681 681 LogFlow(("MMR3HyperMapHCRam: cb=%d pszDesc=%p:{%s} pGCPtr=%p\n", (int)cb, pszDesc, pszDesc, pGCPtr)); … … 876 876 * @remark This is assumed not to be used at times when serialization is required. 877 877 */ 878 MMDECL(int) MMR3HyperAllocOnceNoRel(PVM pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv)878 VMMDECL(int) MMR3HyperAllocOnceNoRel(PVM pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv) 879 879 { 880 880 AssertMsg(cb >= 8, ("Hey! Do you really mean to allocate less than 8 bytes?! cb=%d\n", cb)); … … 967 967 * @param pvR3 Host context virtual address. 968 968 */ 969 MMR3DECL(RTHCPHYS) MMR3HyperHCVirt2HCPhys(PVM pVM, void *pvR3)969 VMMR3DECL(RTHCPHYS) MMR3HyperHCVirt2HCPhys(PVM pVM, void *pvR3) 970 970 { 971 971 PMMLOOKUPHYPER pLookup = (PMMLOOKUPHYPER)((uint8_t *)pVM->mm.s.pHyperHeapR3 + pVM->mm.s.offLookupHyper); … … 1020 1020 * @param HCPhys Host context physical address. 1021 1021 */ 1022 MMR3DECL(void *) MMR3HyperHCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys)1022 VMMR3DECL(void *) MMR3HyperHCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys) 1023 1023 { 1024 1024 void *pv; … … 1039 1039 * @param ppv Where to store the HC virtual address. 1040 1040 */ 1041 MMR3DECL(int) MMR3HyperHCPhys2HCVirtEx(PVM pVM, RTHCPHYS HCPhys, void **ppv)1041 VMMR3DECL(int) MMR3HyperHCPhys2HCVirtEx(PVM pVM, RTHCPHYS HCPhys, void **ppv) 1042 1042 { 1043 1043 /* … … 1061 1061 * @remarks For DBGF only. 1062 1062 */ 1063 MMR3DECL(int) MMR3HyperReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb)1063 VMMR3DECL(int) MMR3HyperReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb) 1064 1064 { 1065 1065 if (GCPtr - pVM->mm.s.pvHyperAreaGC >= pVM->mm.s.cbHyperArea) -
trunk/src/VBox/VMM/MMInternal.h
r12968 r12989 30 30 #include <iprt/critsect.h> 31 31 32 33 #if !defined(IN_MM_R3) && !defined(IN_MM_R0) && !defined(IN_MM_GC)34 # error "Not in MM! This is an internal header!"35 #endif36 32 37 33 … … 775 771 * @thread The Emulation Thread. 776 772 */ 777 MMDECL(RTHCPHYS) mmPagePoolPtr2Phys(PMMPAGEPOOL pPool, void *pv);773 VMMDECL(RTHCPHYS) mmPagePoolPtr2Phys(PMMPAGEPOOL pPool, void *pv); 778 774 779 775 /** … … 787 783 * @thread The Emulation Thread. 788 784 */ 789 MMDECL(void *) mmPagePoolPhys2Ptr(PMMPAGEPOOL pPool, RTHCPHYS HCPhys);785 VMMDECL(void *) mmPagePoolPhys2Ptr(PMMPAGEPOOL pPool, RTHCPHYS HCPhys); 790 786 791 787 __END_DECLS -
trunk/src/VBox/VMM/MMPagePool.cpp
r12967 r12989 398 398 * @thread The Emulation Thread. 399 399 */ 400 MMR3DECL(void *) MMR3PageAlloc(PVM pVM)400 VMMR3DECL(void *) MMR3PageAlloc(PVM pVM) 401 401 { 402 402 return mmR3PagePoolAlloc(pVM->mm.s.pPagePoolR3); … … 416 416 * @thread The Emulation Thread. 417 417 */ 418 MMR3DECL(RTHCPHYS) MMR3PageAllocPhys(PVM pVM)418 VMMR3DECL(RTHCPHYS) MMR3PageAllocPhys(PVM pVM) 419 419 { 420 420 /** @todo optimize this, it's the most common case now. */ … … 434 434 * @thread The Emulation Thread. 435 435 */ 436 MMR3DECL(void) MMR3PageFree(PVM pVM, void *pvPage)436 VMMR3DECL(void) MMR3PageFree(PVM pVM, void *pvPage) 437 437 { 438 438 mmR3PagePoolFree(pVM->mm.s.pPagePoolR3, pvPage); … … 448 448 * @thread The Emulation Thread. 449 449 */ 450 MMR3DECL(void *) MMR3PageAllocLow(PVM pVM)450 VMMR3DECL(void *) MMR3PageAllocLow(PVM pVM) 451 451 { 452 452 return mmR3PagePoolAlloc(pVM->mm.s.pPagePoolLowR3); … … 461 461 * @thread The Emulation Thread. 462 462 */ 463 MMR3DECL(void) MMR3PageFreeLow(PVM pVM, void *pvPage)463 VMMR3DECL(void) MMR3PageFreeLow(PVM pVM, void *pvPage) 464 464 { 465 465 mmR3PagePoolFree(pVM->mm.s.pPagePoolLowR3, pvPage); … … 476 476 * @thread The Emulation Thread. 477 477 */ 478 MMR3DECL(void) MMR3PageFreeByPhys(PVM pVM, RTHCPHYS HCPhysPage)478 VMMR3DECL(void) MMR3PageFreeByPhys(PVM pVM, RTHCPHYS HCPhysPage) 479 479 { 480 480 void *pvPage = mmPagePoolPhys2Ptr(pVM->mm.s.pPagePoolR3, HCPhysPage); … … 498 498 * @thread The Emulation Thread. 499 499 */ 500 MMR3DECL(void *) MMR3PageDummyHCPtr(PVM pVM)500 VMMR3DECL(void *) MMR3PageDummyHCPtr(PVM pVM) 501 501 { 502 502 VM_ASSERT_EMT(pVM); … … 522 522 * @thread The Emulation Thread. 523 523 */ 524 MMR3DECL(RTHCPHYS) MMR3PageDummyHCPhys(PVM pVM)524 VMMR3DECL(RTHCPHYS) MMR3PageDummyHCPhys(PVM pVM) 525 525 { 526 526 VM_ASSERT_EMT(pVM); -
trunk/src/VBox/VMM/MMPhys.cpp
r12967 r12989 56 56 * @param pszDesc Description of the memory. 57 57 */ 58 MMR3DECL(int) MMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, const char *pszDesc)58 VMMR3DECL(int) MMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, const char *pszDesc) 59 59 { 60 60 return MMR3PhysRegisterEx(pVM, pvRam, GCPhys, cb, fFlags, MM_PHYS_TYPE_NORMAL, pszDesc); … … 81 81 */ 82 82 /** @todo this function description is not longer up-to-date */ 83 MMR3DECL(int) MMR3PhysRegisterEx(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, MMPHYSREG enmType, const char *pszDesc)83 VMMR3DECL(int) MMR3PhysRegisterEx(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, MMPHYSREG enmType, const char *pszDesc) 84 84 { 85 85 int rc = VINF_SUCCESS; … … 220 220 * manually from the device yet. At present I doubt we need such features... 221 221 */ 222 MMR3DECL(int) MMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const void *pvBinary,222 VMMR3DECL(int) MMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const void *pvBinary, 223 223 bool fShadow, const char *pszDesc) 224 224 { … … 350 350 * @param pszDesc Description string. 351 351 */ 352 MMR3DECL(int) MMR3PhysReserve(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)352 VMMR3DECL(int) MMR3PhysReserve(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc) 353 353 { 354 354 /* … … 414 414 * @thread Any. 415 415 */ 416 MMR3DECL(uint64_t) MMR3PhysGetRamSize(PVM pVM)416 VMMR3DECL(uint64_t) MMR3PhysGetRamSize(PVM pVM) 417 417 { 418 418 return pVM->mm.s.cbRamBase; … … 460 460 * This can be NULL (not sure about the BIOS interface yet). 461 461 */ 462 MMR3DECL(int) MMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)462 VMMR3DECL(int) MMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange) 463 463 { 464 464 for (PMMROMRANGE pCur = pVM->mm.s.pRomHead; pCur; pCur = pCur->pNext) -
trunk/src/VBox/VMM/Makefile.kmk
r12980 r12989 33 33 34 34 VMMR3_TEMPLATE = VBOXR3 35 VMMR3_DEFS = IN_VMM_R3 IN_PDM_R3 IN_CFGM_R3 IN_IOM_R3 IN_VM_R3 IN_CPUM_R3 IN_SELM_R3 IN_PGM_R3 IN_TRPM_R3 IN_MM_R3 IN_DBG_R3 \36 IN_DBGF_R3 IN_PATM_R3 IN_DIS_R3 IN_STAM_R3 IN_CSAM_R3 IN_EM_R3 IN_TM_R3 IN_SSM_R3 IN_HWACCM_R3IN_GMM_R335 VMMR3_DEFS = IN_VMM_R3 IN_DIS IN_GMM_R3 36 ## @todo eliminate IN_GMM_R3 37 37 ifdef VBOX_WITH_IDT_PATCHING 38 38 VMMR3_DEFS += VBOX_WITH_IDT_PATCHING … … 264 264 VMMGC \ 265 265 PATM 266 VMMGC_DEFS = IN_VMM_ GC IN_PDM_GC IN_CFGM_GC IN_IOM_GC IN_MM_GC IN_RT_GC IN_TRPM_GC IN_SELM_GC IN_VM_GC IN_IOM_GC IN_DIS_GC DIS_CORE_ONLY IN_PGM_GC IN_CPUM_GC IN_EM_GC IN_TM_GC IN_PATM_GC IN_CSAM_GC IN_REM_GC IN_DBGF_GC266 VMMGC_DEFS = IN_VMM_RC IN_RT_GC IN_RT_RC IN_DIS DIS_CORE_ONLY 267 267 ifdef VBOX_WITH_IDT_PATCHING 268 268 VMMGC_DEFS += VBOX_WITH_IDT_PATCHING … … 349 349 $(PATH_SUB_CURRENT) \ 350 350 PATM 351 VMMR0_DEFS = IN_VMM_R0 IN_RT_R0 IN_TRPM_R0 IN_CPUM_R0 IN_VM_R0 IN_TM_R0 IN_INTNET_R0 IN_HWACCM_R0 IN_EM_R0 IN_PDM_R0 IN_PGM_R0 IN_DIS_R0 IN_MM_R0 IN_SELM_R0 IN_CSAM_R0 IN_PATM_R0 IN_DBGF_R0 IN_REM_R0 IN_IOM_R0 IN_GVMM_R0 IN_GMM_R0 DIS_CORE_ONLY 351 VMMR0_DEFS = IN_VMM_R0 IN_RT_R0 IN_DIS DIS_CORE_ONLY IN_GVMM_R0 IN_GMM_R0 352 ## @todo eliminate IN_GVMM_R0 IN_GMM_R0 352 353 ifdef VBOX_WITH_IDT_PATCHING 353 354 VMMR0_DEFS += VBOX_WITH_IDT_PATCHING -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r11792 r12989 109 109 * @param pVM The VM to operate on. 110 110 */ 111 CSAMR3DECL(int) CSAMR3Init(PVM pVM)111 VMMR3DECL(int) CSAMR3Init(PVM pVM) 112 112 { 113 113 int rc; … … 255 255 * @param offDelta Relocation delta. 256 256 */ 257 CSAMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)257 VMMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 258 258 { 259 259 if (offDelta) … … 283 283 * @param pVM The VM to operate on. 284 284 */ 285 CSAMR3DECL(int) CSAMR3Term(PVM pVM)285 VMMR3DECL(int) CSAMR3Term(PVM pVM) 286 286 { 287 287 int rc; … … 308 308 * @param pVM The VM which is reset. 309 309 */ 310 CSAMR3DECL(int) CSAMR3Reset(PVM pVM)310 VMMR3DECL(int) CSAMR3Reset(PVM pVM) 311 311 { 312 312 /* Clear page bitmaps. */ … … 1521 1521 * @param addr GC address of the page to flush 1522 1522 */ 1523 CSAMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)1523 VMMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr) 1524 1524 { 1525 1525 return csamFlushPage(pVM, addr, true /* remove page record */); … … 1533 1533 * @param addr GC address of the page to flush 1534 1534 */ 1535 CSAMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)1535 VMMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr) 1536 1536 { 1537 1537 PCSAMPAGEREC pPageRec; … … 1706 1706 * @param enmTag Monitor tag 1707 1707 */ 1708 CSAMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)1708 VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag) 1709 1709 { 1710 1710 PCSAMPAGEREC pPageRec = NULL; … … 1828 1828 * @param enmTag Monitor tag 1829 1829 */ 1830 CSAMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)1830 VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag) 1831 1831 { 1832 1832 pPageAddrGC &= PAGE_BASE_GC_MASK; … … 2078 2078 * @param fScanned Mark as scanned or not 2079 2079 */ 2080 CSAMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned)2080 VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned) 2081 2081 { 2082 2082 PCSAMPAGE pPage = 0; … … 2105 2105 * @param pInstrGC Instruction pointer 2106 2106 */ 2107 CSAMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)2107 VMMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC) 2108 2108 { 2109 2109 if (EMIsRawRing0Enabled(pVM) == false || PATMIsPatchGCAddr(pVM, pInstrGC) == true) … … 2131 2131 * @param pInstrGC Instruction pointer (0:32 virtual address) 2132 2132 */ 2133 CSAMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)2133 VMMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC) 2134 2134 { 2135 2135 int rc; … … 2236 2236 * @param pVM The VM to operate on. 2237 2237 */ 2238 CSAMR3DECL(int) CSAMR3DoPendingAction(PVM pVM)2238 VMMR3DECL(int) CSAMR3DoPendingAction(PVM pVM) 2239 2239 { 2240 2240 csamR3FlushDirtyPages(pVM); … … 2253 2253 * @param cGates Number of gates to check 2254 2254 */ 2255 CSAMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)2255 VMMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates) 2256 2256 { 2257 2257 uint16_t cbIDT; … … 2473 2473 * @param GCPtrCall Call address 2474 2474 */ 2475 CSAMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)2475 VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall) 2476 2476 { 2477 2477 for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++) … … 2497 2497 * @param pVM The VM to operate on. 2498 2498 */ 2499 CSAMR3DECL(int) CSAMR3IsEnabled(PVM pVM)2499 VMMR3DECL(int) CSAMR3IsEnabled(PVM pVM) 2500 2500 { 2501 2501 return pVM->fCSAMEnabled; -
trunk/src/VBox/VMM/PATM/CSAMInternal.h
r9344 r12989 29 29 #include <VBox/log.h> 30 30 31 #if !defined(IN_CSAM_R3) && !defined(IN_CSAM_R0) && !defined(IN_CSAM_GC) 32 # error "Not in CSAM! This is an internal header!" 33 #endif 34 35 /** Page flags. 31 32 33 /** @name Page flags. 36 34 * These are placed in the three bits available for system programs in 37 35 * the page entries. … … 282 280 283 281 __BEGIN_DECLS 284 CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);282 VMMRCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 285 283 __END_DECLS 286 284 -
trunk/src/VBox/VMM/PATM/PATM.cpp
r12855 r12989 106 106 * @param pVM The VM to operate on. 107 107 */ 108 PATMR3DECL(int) PATMR3Init(PVM pVM)108 VMMR3DECL(int) PATMR3Init(PVM pVM) 109 109 { 110 110 int rc; … … 279 279 * @param pVM The VM handle. 280 280 */ 281 PATMR3DECL(int) PATMR3InitFinalize(PVM pVM)281 VMMR3DECL(int) PATMR3InitFinalize(PVM pVM) 282 282 { 283 283 /* The GC state, stack and statistics must be read/write for the guest (supervisor only of course). */ … … 410 410 * @param pVM The VM. 411 411 */ 412 PATMR3DECL(void) PATMR3Relocate(PVM pVM)412 VMMR3DECL(void) PATMR3Relocate(PVM pVM) 413 413 { 414 414 RTRCPTR GCPtrNew = MMHyperHC2GC(pVM, pVM->patm.s.pGCStateHC); … … 467 467 * @param pVM The VM to operate on. 468 468 */ 469 PATMR3DECL(int) PATMR3Term(PVM pVM)469 VMMR3DECL(int) PATMR3Term(PVM pVM) 470 470 { 471 471 /* Memory was all allocated from the two MM heaps and requires no freeing. */ … … 480 480 * @param pVM The VM which is reset. 481 481 */ 482 PATMR3DECL(int) PATMR3Reset(PVM pVM)482 VMMR3DECL(int) PATMR3Reset(PVM pVM) 483 483 { 484 484 Log(("PATMR3Reset\n")); … … 877 877 * @param pcb Size of the patch memory block 878 878 */ 879 PATMR3DECL(void *) PATMR3QueryPatchMemHC(PVM pVM, uint32_t *pcb)879 VMMR3DECL(void *) PATMR3QueryPatchMemHC(PVM pVM, uint32_t *pcb) 880 880 { 881 881 if (pcb) … … 894 894 * @param pcb Size of the patch memory block 895 895 */ 896 PATMR3DECL(RTRCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb)896 VMMR3DECL(RTRCPTR) PATMR3QueryPatchMemGC(PVM pVM, uint32_t *pcb) 897 897 { 898 898 if (pcb) … … 910 910 * @param pVM The VM to operate on. 911 911 */ 912 PATMR3DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM)912 VMMR3DECL(PPATMGCSTATE) PATMR3QueryGCStateHC(PVM pVM) 913 913 { 914 914 return pVM->patm.s.pGCStateHC; … … 923 923 * @param pAddrGC Guest context address 924 924 */ 925 PATMR3DECL(bool) PATMR3IsPatchHCAddr(PVM pVM, R3PTRTYPE(uint8_t *) pAddrHC)925 VMMR3DECL(bool) PATMR3IsPatchHCAddr(PVM pVM, R3PTRTYPE(uint8_t *) pAddrHC) 926 926 { 927 927 return (pAddrHC >= pVM->patm.s.pPatchMemHC && pAddrHC < pVM->patm.s.pPatchMemHC + pVM->patm.s.cbPatchMem) ? true : false; … … 936 936 * @param fAllowPatching Allow/disallow patching 937 937 */ 938 PATMR3DECL(int) PATMR3AllowPatching(PVM pVM, uint32_t fAllowPatching)938 VMMR3DECL(int) PATMR3AllowPatching(PVM pVM, uint32_t fAllowPatching) 939 939 { 940 940 pVM->fPATMEnabled = (fAllowPatching) ? true : false; … … 949 949 * @param pAddrGC GC pointer 950 950 */ 951 PATMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC)951 VMMR3DECL(R3PTRTYPE(void *)) PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC) 952 952 { 953 953 if (pVM->patm.s.pPatchMemGC <= pAddrGC && pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem > pAddrGC) … … 964 964 * @param pVM The VM to operate on. 965 965 */ 966 PATMR3DECL(int) PATMR3IsEnabled(PVM pVM)966 VMMR3DECL(int) PATMR3IsEnabled(PVM pVM) 967 967 { 968 968 return pVM->fPATMEnabled; … … 2241 2241 * 2242 2242 */ 2243 PATMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC)2243 VMMR3DECL(int) PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC) 2244 2244 { 2245 2245 PPATCHINFO pTargetPatch = PATMFindActivePatchByEntrypoint(pVM, pConflictGC, true /* include patch hints */); … … 2650 2650 * 2651 2651 */ 2652 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,2652 VMMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, 2653 2653 uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec) 2654 2654 { … … 3375 3375 * 3376 3376 */ 3377 PATMR3DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx)3377 VMMR3DECL(int) PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx) 3378 3378 { 3379 3379 RTRCPTR pBranchTarget, pPage; … … 3758 3758 * 3759 3759 */ 3760 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch)3760 VMMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch) 3761 3761 { 3762 3762 uint8_t ASMInt3 = 0xCC; … … 3934 3934 * @param flags Patch flags 3935 3935 */ 3936 PATMR3DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags)3936 VMMR3DECL(int) PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags) 3937 3937 { 3938 3938 Assert(pInstrGC); … … 3953 3953 * @note returns failure if patching is not allowed or possible 3954 3954 */ 3955 PATMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags)3955 VMMR3DECL(int) PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags) 3956 3956 { 3957 3957 DISCPUSTATE cpu; … … 4680 4680 * 4681 4681 */ 4682 PATMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite)4682 VMMR3DECL(int) PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite) 4683 4683 { 4684 4684 RTRCUINTPTR pWritePageStart, pWritePageEnd, pPage; … … 4854 4854 /** @note Currently only called by CSAMR3FlushPage; optimization to avoid having to double check if the physical address has changed 4855 4855 */ 4856 PATMR3DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr)4856 VMMR3DECL(int) PATMR3FlushPage(PVM pVM, RTRCPTR addr) 4857 4857 { 4858 4858 addr &= PAGE_BASE_GC_MASK; … … 4886 4886 * @param pInstrGC Guest context pointer to instruction 4887 4887 */ 4888 PATMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC)4888 VMMR3DECL(bool) PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC) 4889 4889 { 4890 4890 PPATMPATCHREC pPatchRec; … … 4904 4904 * 4905 4905 */ 4906 PATMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte)4906 VMMR3DECL(int) PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte) 4907 4907 { 4908 4908 PPATMPATCHREC pPatchRec; … … 4948 4948 * 4949 4949 */ 4950 PATMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC)4950 VMMR3DECL(int) PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC) 4951 4951 { 4952 4952 PPATMPATCHREC pPatchRec; … … 5202 5202 * 5203 5203 */ 5204 PATMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC)5204 VMMR3DECL(int) PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC) 5205 5205 { 5206 5206 PPATMPATCHREC pPatchRec; … … 5552 5552 * @param pPatchAddr Guest context patch address (if true) 5553 5553 */ 5554 PATMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr)5554 VMMR3DECL(bool) PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr) 5555 5555 { 5556 5556 RTRCPTR addr; … … 5583 5583 * 5584 5584 */ 5585 PATMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC)5585 VMMR3DECL(int) PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC) 5586 5586 { 5587 5587 PPATMPATCHREC pPatchRec; … … 5609 5609 * 5610 5610 */ 5611 PATMR3DECL(int) PATMR3MarkDirtyPatch(PVM pVM, PPATCHINFO pPatch)5611 VMMR3DECL(int) PATMR3MarkDirtyPatch(PVM pVM, PPATCHINFO pPatch) 5612 5612 { 5613 5613 if (pPatch->pPatchBlockOffset) … … 5704 5704 * 5705 5705 */ 5706 PATMR3DECL(RTRCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC)5706 VMMR3DECL(RTRCPTR) PATMR3GuestGCPtrToPatchGCPtr(PVM pVM, RCPTRTYPE(uint8_t*) pInstrGC) 5707 5707 { 5708 5708 PPATMPATCHREC pPatchRec = (PPATMPATCHREC)RTAvloU32GetBestFit(&pVM->patm.s.PatchLookupTreeHC->PatchTree, pInstrGC, false); … … 5723 5723 * 5724 5724 */ 5725 PATMR3DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState)5725 VMMR3DECL(RTRCPTR) PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState) 5726 5726 { 5727 5727 PPATMPATCHREC pPatchRec; … … 5789 5789 * @param pAddrGC Guest context address 5790 5790 */ 5791 PATMR3DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC)5791 VMMR3DECL(RTRCPTR) PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC) 5792 5792 { 5793 5793 PPATMPATCHREC pPatchRec; … … 5983 5983 * @param ppNewEip GC pointer to new instruction 5984 5984 */ 5985 PATMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip)5985 VMMR3DECL(int) PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip) 5986 5986 { 5987 5987 PPATMPATCHREC pPatch = 0; … … 6105 6105 { 6106 6106 /* Invalidated patch or first instruction overwritten. 6107 * We can ignore the fPIF state in this case. 6107 * We can ignore the fPIF state in this case. 6108 6108 */ 6109 6109 /* Reset the PATM stack. */ … … 6113 6113 6114 6114 pVM->patm.s.pGCStateHC->fPIF = 1; 6115 6115 6116 6116 /* continue at the original instruction */ 6117 6117 *ppNewEip = pNewEip - SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), 0); … … 6264 6264 * @param pVM The VM to operate on. 6265 6265 */ 6266 PATMR3DECL(int) PATMR3HandleMonitoredPage(PVM pVM)6266 VMMR3DECL(int) PATMR3HandleMonitoredPage(PVM pVM) 6267 6267 { 6268 6268 RTRCPTR addr = pVM->patm.s.pvFaultMonitor; -
trunk/src/VBox/VMM/PATM/PATMInternal.h
r12855 r12989 33 33 #include <VBox/log.h> 34 34 35 #if !defined(IN_PATM_R3) && !defined(IN_PATM_R0) && !defined(IN_PATM_GC)36 # error "Not in PATM! This is an internal header!"37 #endif38 35 39 36 … … 639 636 * 640 637 */ 641 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC);638 VMMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC); 642 639 643 640 … … 668 665 * @param fPatchFlags Patch flags 669 666 */ 670 PATMDECL(const char *) patmGetInstructionString(uint32_t opcode, uint32_t fPatchFlags);667 VMMDECL(const char *) patmGetInstructionString(uint32_t opcode, uint32_t fPatchFlags); 671 668 672 669 … … 731 728 * (If it's a EIP range this's the EIP, if not it's pvFault.) 732 729 */ 733 PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);730 VMMRCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 734 731 735 732 /** … … 758 755 * 759 756 */ 760 PATMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC,757 VMMR3DECL(int) PATMR3PatchBlock(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, 761 758 uint32_t uOpcode, uint32_t uOpSize, PPATMPATCHREC pPatchRec); 762 759 … … 775 772 * 776 773 */ 777 PATMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch);774 VMMR3DECL(int) PATMR3PatchInstrInt3(PVM pVM, RTRCPTR pInstrGC, R3PTRTYPE(uint8_t *) pInstrHC, DISCPUSTATE *pCpu, PPATCHINFO pPatch); 778 775 779 776 /** … … 787 784 * 788 785 */ 789 PATMR3DECL(int) PATMR3MarkDirtyPatch(PVM pVM, PPATCHINFO pPatch);786 VMMR3DECL(int) PATMR3MarkDirtyPatch(PVM pVM, PPATCHINFO pPatch); 790 787 791 788 /** -
trunk/src/VBox/VMM/PATM/VMMAll/CSAMAll.cpp
r9344 r12989 53 53 * @param pvFault Fault address 54 54 */ 55 CSAMDECL(int) CSAMExecFault(PVM pVM, RTRCPTR pvFault)55 VMMDECL(int) CSAMExecFault(PVM pVM, RTRCPTR pvFault) 56 56 { 57 57 if(!CSAMIsEnabled(pVM)) … … 80 80 * @param pPage GC page address 81 81 */ 82 CSAMDECL(bool) CSAMIsPageScanned(PVM pVM, RTRCPTR pPage)82 VMMDECL(bool) CSAMIsPageScanned(PVM pVM, RTRCPTR pPage) 83 83 { 84 84 int pgdir, bit; … … 108 108 * 109 109 */ 110 CSAMDECL(int) CSAMMarkPage(PVM pVM, RTRCPTR pPage, bool fScanned)110 VMMDECL(int) CSAMMarkPage(PVM pVM, RTRCPTR pPage, bool fScanned) 111 111 { 112 112 int pgdir, bit; … … 177 177 * @param GCPtr GC pointer of page 178 178 */ 179 CSAMDECL(bool) CSAMDoesPageNeedScanning(PVM pVM, RTRCPTR GCPtr)179 VMMDECL(bool) CSAMDoesPageNeedScanning(PVM pVM, RTRCPTR GCPtr) 180 180 { 181 181 if(!CSAMIsEnabled(pVM)) … … 200 200 * @param GCPtr GC pointer of page 201 201 */ 202 CSAMDECL(void) CSAMMarkPossibleCodePage(PVM pVM, RTRCPTR GCPtr)202 VMMDECL(void) CSAMMarkPossibleCodePage(PVM pVM, RTRCPTR GCPtr) 203 203 { 204 204 if (pVM->csam.s.cPossibleCodePages < RT_ELEMENTS(pVM->csam.s.pvPossibleCodePage)) … … 217 217 * @param pVM The VM to operate on. 218 218 */ 219 CSAMDECL(int) CSAMEnableScanning(PVM pVM)219 VMMDECL(int) CSAMEnableScanning(PVM pVM) 220 220 { 221 221 pVM->fCSAMEnabled = true; … … 229 229 * @param pVM The VM to operate on. 230 230 */ 231 CSAMDECL(int) CSAMDisableScanning(PVM pVM)231 VMMDECL(int) CSAMDisableScanning(PVM pVM) 232 232 { 233 233 pVM->fCSAMEnabled = false; … … 247 247 * @param GCPtr GC pointer of page table entry 248 248 */ 249 CSAMDECL(bool) CSAMIsKnownDangerousInstr(PVM pVM, RTRCPTR GCPtr)249 VMMDECL(bool) CSAMIsKnownDangerousInstr(PVM pVM, RTRCPTR GCPtr) 250 250 { 251 251 for (uint32_t i=0;i<pVM->csam.s.cDangerousInstr;i++) -
trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp
r9344 r12989 50 50 * @see pg_raw 51 51 */ 52 PATMDECL(void) PATMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore)52 VMMDECL(void) PATMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore) 53 53 { 54 54 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTRCPTR)pCtxCore->eip); … … 124 124 * @see @ref pg_raw 125 125 */ 126 PATMDECL(void) PATMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rawRC)126 VMMDECL(void) PATMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rawRC) 127 127 { 128 128 bool fPatchCode = PATMIsPatchGCAddr(pVM, (RTRCPTR)pCtxCore->eip); … … 216 216 * @param pCtxCore The context core. 217 217 */ 218 PATMDECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTXCORE pCtxCore)218 VMMDECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTXCORE pCtxCore) 219 219 { 220 220 uint32_t efl = pCtxCore->eflags.u32; … … 232 232 * @param efl The new EFLAGS value. 233 233 */ 234 PATMDECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t efl)234 VMMDECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t efl) 235 235 { 236 236 pVM->patm.s.CTXSUFF(pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK; … … 246 246 * @param pAddrGC Guest context address 247 247 */ 248 PATMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC)248 VMMDECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC) 249 249 { 250 250 return ( PATMIsEnabled(pVM) … … 258 258 * @param pVM The VM to operate on. 259 259 */ 260 PATMDECL(RCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM)260 VMMDECL(RCPTRTYPE(PPATMGCSTATE)) PATMQueryGCState(PVM pVM) 261 261 { 262 262 return pVM->patm.s.pGCStateGC; … … 270 270 * @param pAddrGC Guest context address 271 271 */ 272 PATMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCPTR pAddrGC)272 VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCPTR pAddrGC) 273 273 { 274 274 return (PATMIsEnabled(pVM) && pAddrGC >= pVM->patm.s.pPatchMemGC && pAddrGC < (RTRCPTR)((RTRCUINTPTR)pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)) ? true : false; … … 283 283 * @param pCachedData GC pointer to cached data 284 284 */ 285 PATMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData)285 VMMDECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData) 286 286 { 287 287 pVM->patm.s.mmio.GCPhys = GCPhys; … … 299 299 * @param pVM The VM handle. 300 300 */ 301 PATMDECL(bool) PATMAreInterruptsEnabled(PVM pVM)301 VMMDECL(bool) PATMAreInterruptsEnabled(PVM pVM) 302 302 { 303 303 PCPUMCTX pCtx = 0; … … 319 319 * @param pCtxCore CPU context 320 320 */ 321 PATMDECL(bool) PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore)321 VMMDECL(bool) PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore) 322 322 { 323 323 if (PATMIsEnabled(pVM)) … … 337 337 * 338 338 */ 339 PATMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC)339 VMMDECL(PPATMPATCHREC) PATMQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC) 340 340 { 341 341 PPATMPATCHREC pRec; … … 361 361 * @param pSize Original instruction size (out, optional) 362 362 */ 363 PATMDECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize)363 VMMDECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize) 364 364 { 365 365 PPATMPATCHREC pRec; … … 387 387 * @param pCpu Disassembly context 388 388 */ 389 PATMDECL(int) PATMSysCall(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)389 VMMDECL(int) PATMSysCall(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 390 390 { 391 391 PCPUMCTX pCtx; … … 466 466 * @param pRelBranchPatch Relative duplicated function address 467 467 */ 468 PATMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTRCUINTPTR pRelBranchPatch)468 VMMDECL(int) PATMAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTRCUINTPTR pRelBranchPatch) 469 469 { 470 470 PPATCHJUMPTABLE pJumpTable; … … 532 532 * @param fPatchFlags Patch flags 533 533 */ 534 PATMDECL(const char *) patmGetInstructionString(uint32_t opcode, uint32_t fPatchFlags)534 VMMDECL(const char *) patmGetInstructionString(uint32_t opcode, uint32_t fPatchFlags) 535 535 { 536 536 const char *pszInstr = NULL; -
trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp
r12305 r12989 63 63 * (If it's a EIP range this's the EIP, if not it's pvFault.) 64 64 */ 65 CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)65 VMMRCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 66 66 { 67 67 PPATMGCSTATE pPATMGCState; … … 79 79 Assert(pPATMGCState->fPIF || fPatchCode); 80 80 /** When patch code is executing instructions that must complete, then we must *never* interrupt it. */ 81 if (!pPATMGCState->fPIF && fPatchCode) 81 if (!pPATMGCState->fPIF && fPatchCode) 82 82 { 83 83 Log(("CSAMGCCodePageWriteHandler: fPIF=0 -> stack fault in patch generated code at %VGv!\n", pRegFrame->eip)); … … 95 95 96 96 uint32_t cpl; 97 97 98 98 if (pRegFrame->eflags.Bits.u1VM) 99 99 cpl = 3; -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r12855 r12989 63 63 * (If it's a EIP range this's the EIP, if not it's pvFault.) 64 64 */ 65 PATMGCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)65 VMMRCDECL(int) PATMGCMonitorPage(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 66 66 { 67 67 pVM->patm.s.pvFaultMonitor = (RTRCPTR)pvFault; … … 81 81 * 82 82 */ 83 PATMGCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite)83 VMMRCDECL(int) PATMGCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite) 84 84 { 85 85 RTGCUINTPTR pWritePageStart, pWritePageEnd; … … 155 155 * @param pCtxCore The relevant core context. 156 156 */ 157 PATMDECL(int) PATMGCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame)157 VMMDECL(int) PATMGCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame) 158 158 { 159 159 PPATMPATCHREC pRec; … … 286 286 if (VBOX_SUCCESS(rc)) 287 287 { 288 STAM_COUNTER_INC(&pVM->patm.s.StatEmulIret); 288 STAM_COUNTER_INC(&pVM->patm.s.StatEmulIret); 289 289 290 290 /* We are no longer executing PATM code; set PIF again. */ … … 293 293 /* does not return */ 294 294 } 295 else 296 STAM_COUNTER_INC(&pVM->patm.s.StatEmulIretFailed); 295 else 296 STAM_COUNTER_INC(&pVM->patm.s.StatEmulIretFailed); 297 297 return rc; 298 298 } … … 443 443 * @param pCtxCore The relevant core context. 444 444 */ 445 PATMDECL(int) PATMHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame)445 VMMDECL(int) PATMHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame) 446 446 { 447 447 PPATMPATCHREC pRec; -
trunk/src/VBox/VMM/PDM.cpp
r12988 r12989 279 279 * @param pUVM Pointer to the user mode VM structure. 280 280 */ 281 PDMR3DECL(int) PDMR3InitUVM(PUVM pUVM)281 VMMR3DECL(int) PDMR3InitUVM(PUVM pUVM) 282 282 { 283 283 AssertCompile(sizeof(pUVM->pdm.s) <= sizeof(pUVM->pdm.padding)); … … 294 294 * @param pVM The VM to operate on. 295 295 */ 296 PDMR3DECL(int) PDMR3Init(PVM pVM)296 VMMR3DECL(int) PDMR3Init(PVM pVM) 297 297 { 298 298 LogFlow(("PDMR3Init\n")); … … 372 372 * early in the relocation phase. 373 373 */ 374 PDMR3DECL(void) PDMR3Relocate(PVM pVM, RTGCINTPTR offDelta)374 VMMR3DECL(void) PDMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 375 375 { 376 376 LogFlow(("PDMR3Relocate\n")); … … 509 509 * @param pVM The VM to operate on. 510 510 */ 511 PDMR3DECL(int) PDMR3Term(PVM pVM)511 VMMR3DECL(int) PDMR3Term(PVM pVM) 512 512 { 513 513 LogFlow(("PDMR3Term:\n")); … … 592 592 * @param pUVM Pointer to the user mode VM structure. 593 593 */ 594 PDMR3DECL(void) PDMR3TermUVM(PUVM pUVM)594 VMMR3DECL(void) PDMR3TermUVM(PUVM pUVM) 595 595 { 596 596 /* … … 809 809 * @param pVM VM Handle. 810 810 */ 811 PDMR3DECL(void) PDMR3PowerOn(PVM pVM)811 VMMR3DECL(void) PDMR3PowerOn(PVM pVM) 812 812 { 813 813 LogFlow(("PDMR3PowerOn:\n")); … … 875 875 * @param pVM VM Handle. 876 876 */ 877 PDMR3DECL(void) PDMR3Reset(PVM pVM)877 VMMR3DECL(void) PDMR3Reset(PVM pVM) 878 878 { 879 879 LogFlow(("PDMR3Reset:\n")); … … 941 941 * @param pVM VM Handle. 942 942 */ 943 PDMR3DECL(void) PDMR3Suspend(PVM pVM)943 VMMR3DECL(void) PDMR3Suspend(PVM pVM) 944 944 { 945 945 LogFlow(("PDMR3Suspend:\n")); … … 1004 1004 * @param pVM VM Handle. 1005 1005 */ 1006 PDMR3DECL(void) PDMR3Resume(PVM pVM)1006 VMMR3DECL(void) PDMR3Resume(PVM pVM) 1007 1007 { 1008 1008 LogFlow(("PDMR3Resume:\n")); … … 1067 1067 * @param pVM VM Handle. 1068 1068 */ 1069 PDMR3DECL(void) PDMR3PowerOff(PVM pVM)1069 VMMR3DECL(void) PDMR3PowerOff(PVM pVM) 1070 1070 { 1071 1071 LogFlow(("PDMR3PowerOff:\n")); … … 1138 1138 * device chain is known to be updated. 1139 1139 */ 1140 PDMR3DECL(int) PDMR3QueryDevice(PVM pVM, const char *pszDevice, unsigned iInstance, PPDMIBASE *ppBase)1140 VMMR3DECL(int) PDMR3QueryDevice(PVM pVM, const char *pszDevice, unsigned iInstance, PPDMIBASE *ppBase) 1141 1141 { 1142 1142 LogFlow(("PDMR3DeviceQuery: pszDevice=%p:{%s} iInstance=%u ppBase=%p\n", pszDevice, pszDevice, iInstance, ppBase)); … … 1195 1195 * device chain is known to be updated. 1196 1196 */ 1197 PDMR3DECL(int) PDMR3QueryDeviceLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)1197 VMMR3DECL(int) PDMR3QueryDeviceLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase) 1198 1198 { 1199 1199 LogFlow(("PDMR3QueryLun: pszDevice=%p:{%s} iInstance=%u iLun=%u ppBase=%p\n", … … 1228 1228 * device chain is known to be updated. 1229 1229 */ 1230 PDMR3DECL(int) PDMR3QueryLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)1230 VMMR3DECL(int) PDMR3QueryLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase) 1231 1231 { 1232 1232 LogFlow(("PDMR3QueryLun: pszDevice=%p:{%s} iInstance=%u iLun=%u ppBase=%p\n", … … 1258 1258 * @param pVM VM handle. 1259 1259 */ 1260 PDMR3DECL(void) PDMR3DmaRun(PVM pVM)1260 VMMR3DECL(void) PDMR3DmaRun(PVM pVM) 1261 1261 { 1262 1262 VM_FF_CLEAR(pVM, VM_FF_PDM_DMA); … … 1275 1275 * @param pVM VM handle. 1276 1276 */ 1277 PDMR3DECL(void) PDMR3Poll(PVM pVM)1277 VMMR3DECL(void) PDMR3Poll(PVM pVM) 1278 1278 { 1279 1279 /* This is temporary hack and shall be removed ASAP! */ … … 1307 1307 * @param pVM The VM handle. 1308 1308 */ 1309 PDMR3DECL(int) PDMR3LockCall(PVM pVM)1309 VMMR3DECL(int) PDMR3LockCall(PVM pVM) 1310 1310 { 1311 1311 return PDMR3CritSectEnterEx(&pVM->pdm.s.CritSect, true /* fHostCall */); … … 1322 1322 * @param cbSize Size of the heap. 1323 1323 */ 1324 PDMR3DECL(int) PDMR3RegisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)1324 VMMR3DECL(int) PDMR3RegisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize) 1325 1325 { 1326 1326 Assert(pVM->pdm.s.pvVMMDevHeap == NULL); … … 1342 1342 * @param GCPhys The physical address. 1343 1343 */ 1344 PDMR3DECL(int) PDMR3UnregisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys)1344 VMMR3DECL(int) PDMR3UnregisterVMMDevHeap(PVM pVM, RTGCPHYS GCPhys) 1345 1345 { 1346 1346 Assert(pVM->pdm.s.GCPhysVMMDevHeap == GCPhys); … … 1363 1363 * @param pv Ring-3 pointer. (out) 1364 1364 */ 1365 PDMR3DECL(int) PDMR3VMMDevHeapAlloc(PVM pVM, unsigned cbSize, RTR3PTR *ppv)1365 VMMR3DECL(int) PDMR3VMMDevHeapAlloc(PVM pVM, unsigned cbSize, RTR3PTR *ppv) 1366 1366 { 1367 1367 AssertReturn(cbSize && cbSize <= pVM->pdm.s.cbVMMDevHeapLeft, VERR_NO_MEMORY); … … 1383 1383 * @param pv Ring-3 pointer. 1384 1384 */ 1385 PDMR3DECL(int) PDMR3VMMDevHeapFree(PVM pVM, RTR3PTR pv)1385 VMMR3DECL(int) PDMR3VMMDevHeapFree(PVM pVM, RTR3PTR pv) 1386 1386 { 1387 1387 Log(("PDMR3VMMDevHeapFree %VHv\n", pv)); -
trunk/src/VBox/VMM/PDMCritSect.cpp
r12983 r12989 84 84 * @remark Don't confuse this with PDMR3CritSectDelete. 85 85 */ 86 PDMDECL(int) PDMR3CritSectTerm(PVM pVM)86 VMMDECL(int) PDMR3CritSectTerm(PVM pVM) 87 87 { 88 88 int rc = VINF_SUCCESS; … … 144 144 * @param pszName The name of the critical section (for statistics). 145 145 */ 146 PDMR3DECL(int) PDMR3CritSectInit(PVM pVM, PPDMCRITSECT pCritSect, const char *pszName)146 VMMR3DECL(int) PDMR3CritSectInit(PVM pVM, PPDMCRITSECT pCritSect, const char *pszName) 147 147 { 148 148 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 … … 262 262 * @param pCritSect The PDM critical section to destroy. 263 263 */ 264 PDMR3DECL(int) PDMR3CritSectDelete(PPDMCRITSECT pCritSect)264 VMMR3DECL(int) PDMR3CritSectDelete(PPDMCRITSECT pCritSect) 265 265 { 266 266 if (!RTCritSectIsInitialized(&pCritSect->s.Core)) … … 293 293 * @param pVM The VM handle. 294 294 */ 295 PDMR3DECL(void) PDMR3CritSectFF(PVM pVM)295 VMMR3DECL(void) PDMR3CritSectFF(PVM pVM) 296 296 { 297 297 Assert(pVM->pdm.s.cQueuedCritSectLeaves > 0); … … 320 320 * @param pCritSect The critical section. 321 321 */ 322 PDMR3DECL(int) PDMR3CritSectTryEnter(PPDMCRITSECT pCritSect)322 VMMR3DECL(int) PDMR3CritSectTryEnter(PPDMCRITSECT pCritSect) 323 323 { 324 324 return RTCritSectTryEnter(&pCritSect->s.Core); … … 336 336 * @param EventToSignal The semapore that should be signalled. 337 337 */ 338 PDMR3DECL(int) PDMR3CritSectScheduleExitEvent(PPDMCRITSECT pCritSect, RTSEMEVENT EventToSignal)338 VMMR3DECL(int) PDMR3CritSectScheduleExitEvent(PPDMCRITSECT pCritSect, RTSEMEVENT EventToSignal) 339 339 { 340 340 Assert(EventToSignal != NIL_RTSEMEVENT); -
trunk/src/VBox/VMM/PDMDevice.cpp
r12984 r12989 788 788 * @thread EMT 789 789 */ 790 PDMR3DECL(int) PDMR3DeviceAttach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)790 VMMR3DECL(int) PDMR3DeviceAttach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase) 791 791 { 792 792 VM_ASSERT_EMT(pVM); … … 844 844 * @thread EMT 845 845 */ 846 PDMR3DECL(int) PDMR3DeviceDetach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun)846 VMMR3DECL(int) PDMR3DeviceDetach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun) 847 847 { 848 848 VM_ASSERT_EMT(pVM); -
trunk/src/VBox/VMM/PDMDriver.cpp
r12986 r12989 95 95 * @param pfnCallback Driver registration callback 96 96 */ 97 PDMR3DECL(int) PDMR3RegisterDrivers(PVM pVM, FNPDMVBOXDRIVERSREGISTER pfnCallback)97 VMMR3DECL(int) PDMR3RegisterDrivers(PVM pVM, FNPDMVBOXDRIVERSREGISTER pfnCallback) 98 98 { 99 99 /* -
trunk/src/VBox/VMM/PDMLdr.cpp
r12975 r12989 79 79 * @param pUVM Pointer to the user mode VM structure. 80 80 */ 81 PDMR3DECL(int) PDMR3LdrLoadVMMR0U(PUVM pUVM)81 VMMR3DECL(int) PDMR3LdrLoadVMMR0U(PUVM pUVM) 82 82 { 83 83 return pdmR3LoadR0U(pUVM, NULL, VMMR0_MAIN_MODULE_NAME); … … 175 175 * @param offDelta Relocation delta relative to old location. 176 176 */ 177 PDMR3DECL(void) PDMR3LdrRelocateU(PUVM pUVM, RTGCINTPTR offDelta)177 VMMR3DECL(void) PDMR3LdrRelocateU(PUVM pUVM, RTGCINTPTR offDelta) 178 178 { 179 179 LogFlow(("PDMR3LdrRelocate: offDelta=%VGv\n", offDelta)); … … 408 408 * @param pszName Module name. Case sensitive and the length is limited! 409 409 */ 410 PDMR3DECL(int) PDMR3LdrLoadRC(PVM pVM, const char *pszFilename, const char *pszName)410 VMMR3DECL(int) PDMR3LdrLoadRC(PVM pVM, const char *pszFilename, const char *pszName) 411 411 { 412 412 /* … … 619 619 * @param ppvValue Where to store the symbol value. 620 620 */ 621 PDMR3DECL(int) PDMR3LdrGetSymbolR3(PVM pVM, const char *pszModule, const char *pszSymbol, void **ppvValue)621 VMMR3DECL(int) PDMR3LdrGetSymbolR3(PVM pVM, const char *pszModule, const char *pszSymbol, void **ppvValue) 622 622 { 623 623 /* … … 667 667 * @param ppvValue Where to store the symbol value. 668 668 */ 669 PDMR3DECL(int) PDMR3LdrGetSymbolR0(PVM pVM, const char *pszModule, const char *pszSymbol, PRTR0PTR ppvValue)669 VMMR3DECL(int) PDMR3LdrGetSymbolR0(PVM pVM, const char *pszModule, const char *pszSymbol, PRTR0PTR ppvValue) 670 670 { 671 671 #ifdef PDMLDR_FAKE_MODE … … 715 715 * @param ppvValue Where to store the symbol value. 716 716 */ 717 PDMR3DECL(int) PDMR3LdrGetSymbolR0Lazy(PVM pVM, const char *pszModule, const char *pszSymbol, PRTR0PTR ppvValue)717 VMMR3DECL(int) PDMR3LdrGetSymbolR0Lazy(PVM pVM, const char *pszModule, const char *pszSymbol, PRTR0PTR ppvValue) 718 718 { 719 719 #ifdef PDMLDR_FAKE_MODE … … 756 756 * @param pRCPtrValue Where to store the symbol value. 757 757 */ 758 PDMR3DECL(int) PDMR3LdrGetSymbolRC(PVM pVM, const char *pszModule, const char *pszSymbol, PRTGCPTR32 pRCPtrValue)758 VMMR3DECL(int) PDMR3LdrGetSymbolRC(PVM pVM, const char *pszModule, const char *pszSymbol, PRTGCPTR32 pRCPtrValue) 759 759 { 760 760 #ifdef PDMLDR_FAKE_MODE … … 812 812 * @param pRCPtrValue Where to store the symbol value. 813 813 */ 814 PDMR3DECL(int) PDMR3LdrGetSymbolRCLazy(PVM pVM, const char *pszModule, const char *pszSymbol, PRTGCPTR32 pRCPtrValue)814 VMMR3DECL(int) PDMR3LdrGetSymbolRCLazy(PVM pVM, const char *pszModule, const char *pszSymbol, PRTGCPTR32 pRCPtrValue) 815 815 { 816 816 #ifdef PDMLDR_FAKE_MODE … … 1010 1010 * @param pNearSym2 The address of pszNearSym2. 1011 1011 */ 1012 PDMR3DECL(int) PDMR3LdrQueryRCModFromPC(PVM pVM, RTRCPTR uPC,1012 VMMR3DECL(int) PDMR3LdrQueryRCModFromPC(PVM pVM, RTRCPTR uPC, 1013 1013 char *pszModName, size_t cchModName, PRTRCPTR pMod, 1014 1014 char *pszNearSym1, size_t cchNearSym1, PRTRCPTR pNearSym1, … … 1131 1131 * @param pvArg User argument. 1132 1132 */ 1133 PDMR3DECL(int) PDMR3LdrEnumModules(PVM pVM, PFNPDMR3ENUM pfnCallback, void *pvArg)1133 VMMR3DECL(int) PDMR3LdrEnumModules(PVM pVM, PFNPDMR3ENUM pfnCallback, void *pvArg) 1134 1134 { 1135 1135 PPDMMOD pCur; -
trunk/src/VBox/VMM/PDMQueue.cpp
r12986 r12989 190 190 * @thread Emulation thread only. 191 191 */ 192 PDMR3DECL(int) PDMR3QueueCreateDevice(PVM pVM, PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,192 VMMR3DECL(int) PDMR3QueueCreateDevice(PVM pVM, PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, 193 193 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, PPDMQUEUE *ppQueue) 194 194 { … … 239 239 * @thread Emulation thread only. 240 240 */ 241 PDMR3DECL(int) PDMR3QueueCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,241 VMMR3DECL(int) PDMR3QueueCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, 242 242 PFNPDMQUEUEDRV pfnCallback, PPDMQUEUE *ppQueue) 243 243 { … … 288 288 * @thread Emulation thread only. 289 289 */ 290 PDMR3DECL(int) PDMR3QueueCreateInternal(PVM pVM, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,290 VMMR3DECL(int) PDMR3QueueCreateInternal(PVM pVM, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, 291 291 PFNPDMQUEUEINT pfnCallback, bool fRZEnabled, PPDMQUEUE *ppQueue) 292 292 { … … 336 336 * @thread Emulation thread only. 337 337 */ 338 PDMR3DECL(int) PDMR3QueueCreateExternal(PVM pVM, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, PFNPDMQUEUEEXT pfnCallback, void *pvUser, PPDMQUEUE *ppQueue)338 VMMR3DECL(int) PDMR3QueueCreateExternal(PVM pVM, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, PFNPDMQUEUEEXT pfnCallback, void *pvUser, PPDMQUEUE *ppQueue) 339 339 { 340 340 LogFlow(("PDMR3QueueCreateExternal: cbItem=%d cItems=%d cMilliesInterval=%d pfnCallback=%p\n", cbItem, cItems, cMilliesInterval, pfnCallback)); … … 376 376 * @thread Emulation thread only. 377 377 */ 378 PDMR3DECL(int) PDMR3QueueDestroy(PPDMQUEUE pQueue)378 VMMR3DECL(int) PDMR3QueueDestroy(PPDMQUEUE pQueue) 379 379 { 380 380 LogFlow(("PDMR3QueueDestroy: pQueue=%p\n", pQueue)); … … 462 462 * @thread Emulation thread only. 463 463 */ 464 PDMR3DECL(int) PDMR3QueueDestroyDevice(PVM pVM, PPDMDEVINS pDevIns)464 VMMR3DECL(int) PDMR3QueueDestroyDevice(PVM pVM, PPDMDEVINS pDevIns) 465 465 { 466 466 LogFlow(("PDMR3QueueDestroyDevice: pDevIns=%p\n", pDevIns)); … … 511 511 * @thread Emulation thread only. 512 512 */ 513 PDMR3DECL(int) PDMR3QueueDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns)513 VMMR3DECL(int) PDMR3QueueDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns) 514 514 { 515 515 LogFlow(("PDMR3QueueDestroyDriver: pDrvIns=%p\n", pDrvIns)); … … 612 612 * @thread Emulation thread only. 613 613 */ 614 PDMR3DECL(void) PDMR3QueueFlushAll(PVM pVM)614 VMMR3DECL(void) PDMR3QueueFlushAll(PVM pVM) 615 615 { 616 616 VM_ASSERT_EMT(pVM); … … 795 795 * @param pQueue The queue to flush. Only used in Ring-3. 796 796 */ 797 PDMR3DECL(void) PDMR3QueueFlushWorker(PVM pVM, PPDMQUEUE pQueue)797 VMMR3DECL(void) PDMR3QueueFlushWorker(PVM pVM, PPDMQUEUE pQueue) 798 798 { 799 799 Assert(pVM->pdm.s.pQueueFlushR0 || pVM->pdm.s.pQueueFlushRC || pQueue); -
trunk/src/VBox/VMM/PDMThread.cpp
r12986 r12989 305 305 * @param pszName See RTThreadCreate. 306 306 */ 307 PDMR3DECL(int) PDMR3ThreadCreate(PVM pVM, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADINT pfnThread,307 VMMR3DECL(int) PDMR3ThreadCreate(PVM pVM, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADINT pfnThread, 308 308 PFNPDMTHREADWAKEUPINT pfnWakeUp, size_t cbStack, RTTHREADTYPE enmType, const char *pszName) 309 309 { … … 336 336 * @param pszName See RTThreadCreate. 337 337 */ 338 PDMR3DECL(int) PDMR3ThreadCreateExternal(PVM pVM, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADEXT pfnThread,338 VMMR3DECL(int) PDMR3ThreadCreateExternal(PVM pVM, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADEXT pfnThread, 339 339 PFNPDMTHREADWAKEUPEXT pfnWakeUp, size_t cbStack, RTTHREADTYPE enmType, const char *pszName) 340 340 { … … 365 365 * @thread The emulation thread (EMT). 366 366 */ 367 PDMR3DECL(int) PDMR3ThreadDestroy(PPDMTHREAD pThread, int *pRcThread)367 VMMR3DECL(int) PDMR3ThreadDestroy(PPDMTHREAD pThread, int *pRcThread) 368 368 { 369 369 /* … … 626 626 * @param pThread The PDM thread. 627 627 */ 628 PDMR3DECL(int) PDMR3ThreadIAmSuspending(PPDMTHREAD pThread)628 VMMR3DECL(int) PDMR3ThreadIAmSuspending(PPDMTHREAD pThread) 629 629 { 630 630 /* … … 674 674 * @param pThread The PDM thread. 675 675 */ 676 PDMR3DECL(int) PDMR3ThreadIAmRunning(PPDMTHREAD pThread)676 VMMR3DECL(int) PDMR3ThreadIAmRunning(PPDMTHREAD pThread) 677 677 { 678 678 /* … … 712 712 * @param cMillies The number of milliseconds to sleep. 713 713 */ 714 PDMR3DECL(int) PDMR3ThreadSleep(PPDMTHREAD pThread, unsigned cMillies)714 VMMR3DECL(int) PDMR3ThreadSleep(PPDMTHREAD pThread, unsigned cMillies) 715 715 { 716 716 /* … … 884 884 * @param pThread The PDM thread. 885 885 */ 886 PDMR3DECL(int) PDMR3ThreadSuspend(PPDMTHREAD pThread)886 VMMR3DECL(int) PDMR3ThreadSuspend(PPDMTHREAD pThread) 887 887 { 888 888 /* … … 978 978 * @param pThread The PDM thread. 979 979 */ 980 PDMR3DECL(int) PDMR3ThreadResume(PPDMTHREAD pThread)980 VMMR3DECL(int) PDMR3ThreadResume(PPDMTHREAD pThread) 981 981 { 982 982 /* -
trunk/src/VBox/VMM/PGM.cpp
r12964 r12989 1106 1106 * @param pVM Pointer to VM structure. 1107 1107 */ 1108 PGMR3DECL(int) PGMR3Init(PVM pVM)1108 VMMR3DECL(int) PGMR3Init(PVM pVM) 1109 1109 { 1110 1110 LogFlow(("PGMR3Init:\n")); … … 1704 1704 * @param pVM VM handle. 1705 1705 */ 1706 PGMR3DECL(int) PGMR3InitDynMap(PVM pVM)1706 VMMR3DECL(int) PGMR3InitDynMap(PVM pVM) 1707 1707 { 1708 1708 RTGCPTR GCPtr; … … 1745 1745 * @param pVM The VM handle. 1746 1746 */ 1747 PGMR3DECL(int) PGMR3InitFinalize(PVM pVM)1747 VMMR3DECL(int) PGMR3InitFinalize(PVM pVM) 1748 1748 { 1749 1749 /* … … 1830 1830 * @param offDelta Relocation delta relative to old location. 1831 1831 */ 1832 PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta)1832 VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 1833 1833 { 1834 1834 LogFlow(("PGMR3Relocate\n")); … … 1993 1993 * @param pVM VM handle. 1994 1994 */ 1995 PGMR3DECL(void) PGMR3Reset(PVM pVM)1995 VMMR3DECL(void) PGMR3Reset(PVM pVM) 1996 1996 { 1997 1997 LogFlow(("PGMR3Reset:\n")); … … 2080 2080 * @param pVM Pointer to VM structure. 2081 2081 */ 2082 PGMR3DECL(int) PGMR3Term(PVM pVM)2082 VMMR3DECL(int) PGMR3Term(PVM pVM) 2083 2083 { 2084 2084 return PDMR3CritSectDelete(&pVM->pgm.s.CritSect); … … 2584 2584 * @param pVM The VM handle. 2585 2585 */ 2586 PDMR3DECL(int) PGMR3LockCall(PVM pVM)2586 VMMR3DECL(int) PGMR3LockCall(PVM pVM) 2587 2587 { 2588 2588 int rc = PDMR3CritSectEnterEx(&pVM->pgm.s.CritSect, true /* fHostCall */); … … 3134 3134 * the current mode. 3135 3135 */ 3136 PGMR3DECL(int) PGMR3ChangeMode(PVM pVM, PGMMODE enmGuestMode)3136 VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PGMMODE enmGuestMode) 3137 3137 { 3138 3138 Log(("PGMR3ChangeMode: Guest mode: %s -> %s\n", PGMGetModeName(pVM->pgm.s.enmGuestMode), PGMGetModeName(enmGuestMode))); … … 3885 3885 * @param PhysSearch Address to search for. 3886 3886 */ 3887 PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPHYS PhysSearch)3887 VMMR3DECL(int) PGMR3DumpHierarchyGC(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPHYS PhysSearch) 3888 3888 { 3889 3889 bool fLongMode = false; … … 3994 3994 * @param pHlp Pointer to the output functions. 3995 3995 */ 3996 PGMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp)3996 VMMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp) 3997 3997 { 3998 3998 if (!pHlp) … … 4350 4350 * @param pVM The VM handle. 4351 4351 */ 4352 PDMR3DECL(int) PGMR3CheckIntegrity(PVM pVM)4352 VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM) 4353 4353 { 4354 4354 AssertReleaseReturn(pVM->pgm.s.offVM, VERR_INTERNAL_ERROR); … … 4388 4388 * @param fEnable Enable or disable shadow mappings 4389 4389 */ 4390 PGMR3DECL(int) PGMR3ChangeShwPDMappings(PVM pVM, bool fEnable)4390 VMMR3DECL(int) PGMR3ChangeShwPDMappings(PVM pVM, bool fEnable) 4391 4391 { 4392 4392 pVM->pgm.s.fDisableMappings = !fEnable; -
trunk/src/VBox/VMM/PGMDbg.cpp
r8155 r12989 53 53 * @param pGCPhys Where to store the GC physical address on success. 54 54 */ 55 PGMR3DECL(int) PGMR3DbgHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys)55 VMMR3DECL(int) PGMR3DbgHCPtr2GCPhys(PVM pVM, RTHCPTR HCPtr, PRTGCPHYS pGCPhys) 56 56 { 57 57 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 106 106 * @param pHCPhys Where to store the HC physical address on success. 107 107 */ 108 PGMR3DECL(int) PGMR3DbgHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys)108 VMMR3DECL(int) PGMR3DbgHCPtr2HCPhys(PVM pVM, RTHCPTR HCPtr, PRTHCPHYS pHCPhys) 109 109 { 110 110 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 168 168 * @param pGCPhys Where to store the GC physical address on success. 169 169 */ 170 PGMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys)170 VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PVM pVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys) 171 171 { 172 172 /* … … 316 316 * @param pGCPhysHit Where to store the address of the first occurence on success. 317 317 */ 318 PDMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit)318 VMMR3DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit) 319 319 { 320 320 /* … … 429 429 * @param pGCPtrHit Where to store the address of the first occurence on success. 430 430 */ 431 PDMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, RTGCUINTPTR GCPtr, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPtrHit)431 VMMR3DECL(int) PGMR3DbgScanVirtual(PVM pVM, RTGCUINTPTR GCPtr, RTGCUINTPTR cbRange, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPtrHit) 432 432 { 433 433 /* -
trunk/src/VBox/VMM/PGMHandler.cpp
r12975 r12989 83 83 * @param pszDesc Pointer to description string. This must not be freed. 84 84 */ 85 PGMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,85 VMMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 86 86 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3, 87 87 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0, … … 227 227 */ 228 228 /** @todo rename this function to PGMR3HandlerVirtualRegister */ 229 PGMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,229 VMMR3DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast, 230 230 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC, 231 231 PFNPGMHCVIRTHANDLER pfnHandlerHC, … … 277 277 /** @todo create a template for virtual handlers (see async i/o), we're wasting space 278 278 * duplicating the function pointers now. (Or we will once we add the missing callbacks.) */ 279 PGMDECL(int) PGMHandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast,279 VMMDECL(int) PGMHandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast, 280 280 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC, 281 281 PFNPGMHCVIRTHANDLER pfnHandlerHC, RTGCPTR pfnHandlerGC, … … 418 418 * @remarks Doesn't work with the hypervisor access handler type. 419 419 */ 420 PGMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, PFNPGMHCVIRTINVALIDATE pfnInvalidateHC)420 VMMDECL(int) PGMHandlerVirtualChangeInvalidateCallback(PVM pVM, RTGCPTR GCPtr, PFNPGMHCVIRTINVALIDATE pfnInvalidateHC) 421 421 { 422 422 pgmLock(pVM); … … 442 442 * @thread EMT 443 443 */ 444 PGMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr)444 VMMDECL(int) PGMHandlerVirtualDeregister(PVM pVM, RTGCPTR GCPtr) 445 445 { 446 446 pgmLock(pVM); -
trunk/src/VBox/VMM/PGMInternal.h
r12932 r12989 41 41 #include <iprt/critsect.h> 42 42 43 #if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)44 # error "Not in PGM! This is an internal header!"45 #endif46 43 47 44 … … 1699 1696 # define PGM_CTX(a,b) a##GC##b 1700 1697 # define PGM_CTX_STR(a,b) a "GC" b 1701 # define PGM_CTX_DECL(type) PGMGCDECL(type)1698 # define PGM_CTX_DECL(type) VMMRCDECL(type) 1702 1699 #else 1703 1700 # ifdef IN_RING3 … … 1708 1705 # define PGM_CTX(a,b) a##R0##b 1709 1706 # define PGM_CTX_STR(a,b) a "R0" b 1710 # define PGM_CTX_DECL(type) PGMDECL(type)1707 # define PGM_CTX_DECL(type) VMMDECL(type) 1711 1708 # endif 1712 1709 #endif … … 2636 2633 void pgmUnlock(PVM pVM); 2637 2634 2638 PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);2639 PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);2635 VMMRCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser); 2636 VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser); 2640 2637 2641 2638 int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PX86PD pPDSrc, RTGCPTR GCPtrOldMapping); -
trunk/src/VBox/VMM/PGMMap.cpp
r12968 r12989 58 58 * @param pszDesc Pointer to description string. This must not be freed. 59 59 */ 60 PGMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc)60 VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc) 61 61 { 62 62 LogFlow(("PGMR3MapPT: GCPtr=%#x cb=%d pfnRelocate=%p pvUser=%p pszDesc=%s\n", GCPtr, cb, pfnRelocate, pvUser, pszDesc)); … … 216 216 * @param GCPtr Virtual Address. (Page table aligned!) 217 217 */ 218 PGMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr)218 VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr) 219 219 { 220 220 LogFlow(("PGMR3UnmapPT: GCPtr=%#x\n", GCPtr)); … … 279 279 * @param pcb Where to store the size. 280 280 */ 281 PGMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb)281 VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb) 282 282 { 283 283 RTGCUINTPTR cb = 0; … … 300 300 * @param cb The size of the range starting at GCPtrBase. 301 301 */ 302 PGMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb)302 VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb) 303 303 { 304 304 Log(("PGMR3MappingsFix: GCPtrBase=%#x cb=%#x\n", GCPtrBase, cb)); … … 437 437 * @param pVM The VM. 438 438 */ 439 PGMR3DECL(int) PGMR3MappingsUnfix(PVM pVM)439 VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM) 440 440 { 441 441 Log(("PGMR3MappingsUnfix: fMappingsFixed=%d\n", pVM->pgm.s.fMappingsFixed)); … … 484 484 * @remark This API shall not be used to anything but mapping the switcher code. 485 485 */ 486 PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages)486 VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages) 487 487 { 488 488 LogFlow(("PGMR3MapIntermediate: Addr=%RTptr HCPhys=%VHp cbPages=%#x\n", Addr, HCPhys, cbPages)); … … 1036 1036 * @param fRawR0 Whether RawR0 is enabled or not. 1037 1037 */ 1038 PGMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint64_t cr3, bool fRawR0) /** @todo how many HasConflict constructs do we really need? */1038 VMMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint64_t cr3, bool fRawR0) /** @todo how many HasConflict constructs do we really need? */ 1039 1039 { 1040 1040 /* … … 1127 1127 * reimplement it in MMR3HyperReadGCVirt. 1128 1128 */ 1129 PGMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)1129 VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb) 1130 1130 { 1131 1131 /** @todo remove this simplicity hack */ -
trunk/src/VBox/VMM/PGMPhys.cpp
r12967 r12989 185 185 * @param pszDesc The description - not copied, so, don't free or change it. 186 186 */ 187 PGMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc)187 VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc) 188 188 { 189 189 /* … … 406 406 * @param pszDesc The description of the MMIO region. 407 407 */ 408 PDMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb,408 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, 409 409 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 410 410 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, … … 533 533 * @param cb The size of the MMIO region. 534 534 */ 535 PDMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb)535 VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb) 536 536 { 537 537 VM_ASSERT_EMT(pVM); … … 646 646 * @param pszDesc The description. 647 647 */ 648 PDMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)648 VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc) 649 649 { 650 650 /* … … 744 744 * @param iRegion The region. If it's UINT32_MAX it'll be a wildcard match. 745 745 */ 746 PDMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion)746 VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion) 747 747 { 748 748 /* … … 833 833 * @param pDevIns The 834 834 */ 835 PDMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)835 VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys) 836 836 { 837 837 /* … … 947 947 * as during registration, of course. 948 948 */ 949 PDMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)949 VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys) 950 950 { 951 951 /* … … 1020 1020 * @param GCPhys The address to check. 1021 1021 */ 1022 PDMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys)1022 VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys) 1023 1023 { 1024 1024 /* … … 1057 1057 * @param pHCPhys Where to store the result. 1058 1058 */ 1059 PDMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys)1059 VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys) 1060 1060 { 1061 1061 /* … … 1106 1106 * just not something we expect to be necessary for a while. 1107 1107 */ 1108 PGMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,1108 VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb, 1109 1109 const void *pvBinary, uint32_t fFlags, const char *pszDesc) 1110 1110 { … … 1589 1589 * @param enmProt The new ROM protection. 1590 1590 */ 1591 PGMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt)1591 VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt) 1592 1592 { 1593 1593 /* … … 1678 1678 * @param pszDesc Description string. 1679 1679 */ 1680 PGMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc)1680 VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc) 1681 1681 { 1682 1682 /* … … 1856 1856 * @param pszDesc Description string. 1857 1857 */ 1858 PGMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc)1858 VMMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc) 1859 1859 { 1860 1860 NOREF(pszDesc); … … 1924 1924 * @param GCPhys GC physical address of the RAM range. (page aligned) 1925 1925 */ 1926 PGMR3DECL(int) PGM3PhysGrowRange(PVM pVM, PCRTGCPHYS pGCPhys)1926 VMMR3DECL(int) PGM3PhysGrowRange(PVM pVM, PCRTGCPHYS pGCPhys) 1927 1927 { 1928 1928 RTGCPHYS GCPhys = *pGCPhys; … … 2051 2051 * @param fMask The and mask for the flags. 2052 2052 */ 2053 PGMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask)2053 VMMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask) 2054 2054 { 2055 2055 Log(("PGMR3PhysSetFlags %08X %x %x %x\n", GCPhys, cb, fFlags, fMask)); … … 2100 2100 * False if the gate should be disabled. 2101 2101 */ 2102 PGMDECL(void) PGMR3PhysSetA20(PVM pVM, bool fEnable)2102 VMMDECL(void) PGMR3PhysSetA20(PVM pVM, bool fEnable) 2103 2103 { 2104 2104 LogFlow(("PGMR3PhysSetA20 %d (was %d)\n", fEnable, pVM->pgm.s.fA20Enabled)); … … 2163 2163 * @param pVM The VM handle. 2164 2164 */ 2165 PGMR3DECL(void) PGMR3PhysChunkAgeing(PVM pVM)2165 VMMR3DECL(void) PGMR3PhysChunkAgeing(PVM pVM) 2166 2166 { 2167 2167 pVM->pgm.s.ChunkR3Map.AgeingCountdown = RT_MIN(pVM->pgm.s.ChunkR3Map.cMax / 4, 1024); … … 2358 2358 * @param idChunk The chunk to map. 2359 2359 */ 2360 PDMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk)2360 VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk) 2361 2361 { 2362 2362 PPGMCHUNKR3MAP pChunk; … … 2370 2370 * @param pVM The VM handle. 2371 2371 */ 2372 PGMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM)2372 VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM) 2373 2373 { 2374 2374 pgmLock(pVM); … … 2391 2391 * @param pVM The VM handle. 2392 2392 */ 2393 PDMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM)2393 VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM) 2394 2394 { 2395 2395 pgmLock(pVM); -
trunk/src/VBox/VMM/PGMPhysRWTmpl.h
r8635 r12989 30 30 * @param GCPhys Physical address start reading from. 31 31 */ 32 PGMDECL(PGMPHYS_DATATYPE) PGMPHYSFN_READNAME(PVM pVM, RTGCPHYS GCPhys)32 VMMDECL(PGMPHYS_DATATYPE) PGMPHYSFN_READNAME(PVM pVM, RTGCPHYS GCPhys) 33 33 { 34 34 uint32_t iCacheIndex; … … 72 72 * @param val What to write. 73 73 */ 74 PGMDECL(void) PGMPHYSFN_WRITENAME(PVM pVM, RTGCPHYS GCPhys, PGMPHYS_DATATYPE val)74 VMMDECL(void) PGMPHYSFN_WRITENAME(PVM pVM, RTGCPHYS GCPhys, PGMPHYS_DATATYPE val) 75 75 { 76 76 uint32_t iCacheIndex; -
trunk/src/VBox/VMM/PGMPool.cpp
r12975 r12989 421 421 * @param pVM The VM handle. 422 422 */ 423 PDMR3DECL(int) PGMR3PoolGrow(PVM pVM)423 VMMR3DECL(int) PGMR3PoolGrow(PVM pVM) 424 424 { 425 425 PPGMPOOL pPool = pVM->pgm.s.pPoolHC; -
trunk/src/VBox/VMM/REMInternal.h
r12653 r12989 33 33 34 34 35 #if !defined(IN_REM_R3) && !defined(IN_REM_R0) && !defined(IN_REM_GC)36 # error "Not in REM! This is an internal header!"37 #endif38 35 39 36 /** @defgroup grp_rem_int Internals -
trunk/src/VBox/VMM/SELM.cpp
r11792 r12989 91 91 * @param pVM The VM to operate on. 92 92 */ 93 SELMR3DECL(int) SELMR3Init(PVM pVM)93 VMMR3DECL(int) SELMR3Init(PVM pVM) 94 94 { 95 95 LogFlow(("SELMR3Init\n")); … … 206 206 * @param pVM The VM handle. 207 207 */ 208 SELMR3DECL(int) SELMR3InitFinalize(PVM pVM)208 VMMR3DECL(int) SELMR3InitFinalize(PVM pVM) 209 209 { 210 210 /* … … 347 347 * @param pVM The VM. 348 348 */ 349 SELMR3DECL(void) SELMR3Relocate(PVM pVM)349 VMMR3DECL(void) SELMR3Relocate(PVM pVM) 350 350 { 351 351 PX86DESC paGdt = pVM->selm.s.paGdtHC; … … 462 462 * @param pVM The VM handle 463 463 */ 464 SELMR3DECL(void) SELMR3PagingModeChanged(PVM pVM)464 VMMR3DECL(void) SELMR3PagingModeChanged(PVM pVM) 465 465 { 466 466 pVM->selm.s.Tss.cr3 = PGMGetHyperCR3(pVM); … … 478 478 * @param pVM The VM to operate on. 479 479 */ 480 SELMR3DECL(int) SELMR3Term(PVM pVM)480 VMMR3DECL(int) SELMR3Term(PVM pVM) 481 481 { 482 482 return 0; … … 492 492 * @param pVM VM handle. 493 493 */ 494 SELMR3DECL(void) SELMR3Reset(PVM pVM)494 VMMR3DECL(void) SELMR3Reset(PVM pVM) 495 495 { 496 496 LogFlow(("SELMR3Reset:\n")); … … 551 551 * @param pVM The VM to operate on. 552 552 */ 553 SELMR3DECL(void) SELMR3DisableMonitoring(PVM pVM)553 VMMR3DECL(void) SELMR3DisableMonitoring(PVM pVM) 554 554 { 555 555 /* … … 756 756 * @param pVM The VM to operate on. 757 757 */ 758 SELMR3DECL(int) SELMR3UpdateFromCPUM(PVM pVM)758 VMMR3DECL(int) SELMR3UpdateFromCPUM(PVM pVM) 759 759 { 760 760 int rc = VINF_SUCCESS; … … 1385 1385 * @param pVM The VM to operate on. 1386 1386 */ 1387 SELMR3DECL(int) SELMR3SyncTSS(PVM pVM)1387 VMMR3DECL(int) SELMR3SyncTSS(PVM pVM) 1388 1388 { 1389 1389 int rc; … … 1555 1555 * @param pVM The VM Handle. 1556 1556 */ 1557 SELMR3DECL(int) SELMR3DebugCheck(PVM pVM)1557 VMMR3DECL(int) SELMR3DebugCheck(PVM pVM) 1558 1558 { 1559 1559 #ifdef VBOX_STRICT … … 1691 1691 * @param pVM VM Handle. 1692 1692 */ 1693 SELMR3DECL(bool) SELMR3CheckTSS(PVM pVM)1693 VMMR3DECL(bool) SELMR3CheckTSS(PVM pVM) 1694 1694 { 1695 1695 #ifdef VBOX_STRICT … … 1783 1783 * @param pcbLimit Where to store LDT limit. 1784 1784 */ 1785 SELMDECL(int) SELMGetLDTFromSel(PVM pVM, RTSEL SelLdt, PRTGCPTR ppvLdt, unsigned *pcbLimit)1785 VMMDECL(int) SELMGetLDTFromSel(PVM pVM, RTSEL SelLdt, PRTGCPTR ppvLdt, unsigned *pcbLimit) 1786 1786 { 1787 1787 /* Get guest GDTR. */ … … 1927 1927 * @param pSelInfo Where to store the information. 1928 1928 */ 1929 SELMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo)1929 VMMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo) 1930 1930 { 1931 1931 Assert(pSelInfo); … … 2052 2052 * @param pSelInfo Where to store the information. 2053 2053 */ 2054 SELMR3DECL(int) SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo)2054 VMMR3DECL(int) SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo) 2055 2055 { 2056 2056 Assert(pSelInfo); … … 2196 2196 * @param pszMsg Message to prepend the log entry with. 2197 2197 */ 2198 SELMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg)2198 VMMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg) 2199 2199 { 2200 2200 char szOutput[128]; … … 2357 2357 * @param pVM VM handle. 2358 2358 */ 2359 SELMR3DECL(void) SELMR3DumpHyperGDT(PVM pVM)2359 VMMR3DECL(void) SELMR3DumpHyperGDT(PVM pVM) 2360 2360 { 2361 2361 DBGFR3Info(pVM, "gdt", NULL, NULL); … … 2367 2367 * @param pVM VM handle. 2368 2368 */ 2369 SELMR3DECL(void) SELMR3DumpHyperLDT(PVM pVM)2369 VMMR3DECL(void) SELMR3DumpHyperLDT(PVM pVM) 2370 2370 { 2371 2371 DBGFR3Info(pVM, "ldt", NULL, NULL); … … 2377 2377 * @param pVM VM handle. 2378 2378 */ 2379 SELMR3DECL(void) SELMR3DumpGuestGDT(PVM pVM)2379 VMMR3DECL(void) SELMR3DumpGuestGDT(PVM pVM) 2380 2380 { 2381 2381 DBGFR3Info(pVM, "gdtguest", NULL, NULL); … … 2387 2387 * @param pVM VM handle. 2388 2388 */ 2389 SELMR3DECL(void) SELMR3DumpGuestLDT(PVM pVM)2389 VMMR3DECL(void) SELMR3DumpGuestLDT(PVM pVM) 2390 2390 { 2391 2391 DBGFR3Info(pVM, "ldtguest", NULL, NULL); -
trunk/src/VBox/VMM/SELMInternal.h
r10087 r12989 29 29 30 30 31 #if !defined(IN_SELM_R3) && !defined(IN_SELM_R0) && !defined(IN_SELM_GC)32 # error "Not in SELM! This is an internal header!"33 #endif34 31 35 32 /** @defgroup grp_selm_int Internals … … 178 175 __BEGIN_DECLS 179 176 180 SELMGCDECL(int) selmgcGuestGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);181 SELMGCDECL(int) selmgcGuestLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);182 SELMGCDECL(int) selmgcGuestTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);177 VMMRCDECL(int) selmgcGuestGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 178 VMMRCDECL(int) selmgcGuestLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 179 VMMRCDECL(int) selmgcGuestTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 183 180 184 SELMGCDECL(int) selmgcShadowGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);185 SELMGCDECL(int) selmgcShadowLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);186 SELMGCDECL(int) selmgcShadowTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);181 VMMRCDECL(int) selmgcShadowGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 182 VMMRCDECL(int) selmgcShadowLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 183 VMMRCDECL(int) selmgcShadowTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 187 184 188 185 __END_DECLS -
trunk/src/VBox/VMM/SSM.cpp
r12441 r12989 417 417 * @param pfnLoadDone Done load callback, optional. 418 418 */ 419 SSMR3DECL(int) SSMR3Register(PVM pVM, PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,419 VMMR3DECL(int) SSMR3Register(PVM pVM, PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess, 420 420 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone, 421 421 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone) … … 457 457 * @param pfnLoadDone Done load callback, optional. 458 458 */ 459 SSMR3DECL(int) SSMR3RegisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,459 VMMR3DECL(int) SSMR3RegisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess, 460 460 PFNSSMDRVSAVEPREP pfnSavePrep, PFNSSMDRVSAVEEXEC pfnSaveExec, PFNSSMDRVSAVEDONE pfnSaveDone, 461 461 PFNSSMDRVLOADPREP pfnLoadPrep, PFNSSMDRVLOADEXEC pfnLoadExec, PFNSSMDRVLOADDONE pfnLoadDone) … … 496 496 * @param pfnLoadDone Done load callback, optional. 497 497 */ 498 SSMR3DECL(int) SSMR3RegisterInternal(PVM pVM, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,498 VMMR3DECL(int) SSMR3RegisterInternal(PVM pVM, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess, 499 499 PFNSSMINTSAVEPREP pfnSavePrep, PFNSSMINTSAVEEXEC pfnSaveExec, PFNSSMINTSAVEDONE pfnSaveDone, 500 500 PFNSSMINTLOADPREP pfnLoadPrep, PFNSSMINTLOADEXEC pfnLoadExec, PFNSSMINTLOADDONE pfnLoadDone) … … 535 535 * @param pvUser User argument. 536 536 */ 537 SSMR3DECL(int) SSMR3RegisterExternal(PVM pVM, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,537 VMMR3DECL(int) SSMR3RegisterExternal(PVM pVM, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess, 538 538 PFNSSMEXTSAVEPREP pfnSavePrep, PFNSSMEXTSAVEEXEC pfnSaveExec, PFNSSMEXTSAVEDONE pfnSaveDone, 539 539 PFNSSMEXTLOADPREP pfnLoadPrep, PFNSSMEXTLOADEXEC pfnLoadExec, PFNSSMEXTLOADDONE pfnLoadDone, void *pvUser) … … 568 568 * @remark Only for dynmaic data units and dynamic unloaded modules. 569 569 */ 570 SSMR3DECL(int) SSMR3Deregister(PVM pVM, PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance)570 VMMR3DECL(int) SSMR3Deregister(PVM pVM, PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance) 571 571 { 572 572 /* … … 642 642 * @remark Only for dynmaic data units and dynamic unloaded modules. 643 643 */ 644 SSMR3DECL(int) SSMR3DeregisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName, uint32_t u32Instance)644 VMMR3DECL(int) SSMR3DeregisterDriver(PVM pVM, PPDMDRVINS pDrvIns, const char *pszName, uint32_t u32Instance) 645 645 { 646 646 /* … … 767 767 * @remark Only for dynmaic data units. 768 768 */ 769 SSMR3DECL(int) SSMR3DeregisterInternal(PVM pVM, const char *pszName)769 VMMR3DECL(int) SSMR3DeregisterInternal(PVM pVM, const char *pszName) 770 770 { 771 771 return ssmR3DeregisterByNameAndType(pVM, pszName, SSMUNITTYPE_INTERNAL); … … 781 781 * @remark Only for dynmaic data units. 782 782 */ 783 SSMR3DECL(int) SSMR3DeregisterExternal(PVM pVM, const char *pszName)783 VMMR3DECL(int) SSMR3DeregisterExternal(PVM pVM, const char *pszName) 784 784 { 785 785 return ssmR3DeregisterByNameAndType(pVM, pszName, SSMUNITTYPE_EXTERNAL); … … 879 879 * @param pvUser User argument for the progress callback. 880 880 */ 881 SSMR3DECL(int) SSMR3Save(PVM pVM, const char *pszFilename, SSMAFTER enmAfter, PFNVMPROGRESS pfnProgress, void *pvUser)881 VMMR3DECL(int) SSMR3Save(PVM pVM, const char *pszFilename, SSMAFTER enmAfter, PFNVMPROGRESS pfnProgress, void *pvUser) 882 882 { 883 883 LogFlow(("SSMR3Save: pszFilename=%p:{%s} enmAfter=%d pfnProgress=%p pvUser=%p\n", pszFilename, pszFilename, enmAfter, pfnProgress, pvUser)); … … 1363 1363 * @param pvUser User argument for the progress callback. 1364 1364 */ 1365 SSMR3DECL(int) SSMR3Load(PVM pVM, const char *pszFilename, SSMAFTER enmAfter, PFNVMPROGRESS pfnProgress, void *pvUser)1365 VMMR3DECL(int) SSMR3Load(PVM pVM, const char *pszFilename, SSMAFTER enmAfter, PFNVMPROGRESS pfnProgress, void *pvUser) 1366 1366 { 1367 1367 LogFlow(("SSMR3Load: pszFilename=%p:{%s} enmAfter=%d pfnProgress=%p pvUser=%p\n", pszFilename, pszFilename, enmAfter, pfnProgress, pvUser)); … … 1752 1752 * @param pszFilename The path to the file to validate. 1753 1753 */ 1754 SSMR3DECL(int) SSMR3ValidateFile(const char *pszFilename)1754 VMMR3DECL(int) SSMR3ValidateFile(const char *pszFilename) 1755 1755 { 1756 1756 LogFlow(("SSMR3ValidateFile: pszFilename=%p:{%s}\n", pszFilename, pszFilename)); … … 1782 1782 * @param ppSSM Where to store the SSM handle. 1783 1783 */ 1784 SSMR3DECL(int) SSMR3Open(const char *pszFilename, unsigned fFlags, PSSMHANDLE *ppSSM)1784 VMMR3DECL(int) SSMR3Open(const char *pszFilename, unsigned fFlags, PSSMHANDLE *ppSSM) 1785 1785 { 1786 1786 LogFlow(("SSMR3Open: pszFilename=%p:{%s} fFlags=%#x ppSSM=%p\n", pszFilename, pszFilename, fFlags, ppSSM)); … … 1848 1848 * @param pSSM The SSM handle returned by SSMR3Open(). 1849 1849 */ 1850 SSMR3DECL(int) SSMR3Close(PSSMHANDLE pSSM)1850 VMMR3DECL(int) SSMR3Close(PSSMHANDLE pSSM) 1851 1851 { 1852 1852 LogFlow(("SSMR3Close: pSSM=%p\n", pSSM)); … … 1882 1882 * @param piVersion Where to store the version number. (Optional) 1883 1883 */ 1884 SSMR3DECL(int) SSMR3Seek(PSSMHANDLE pSSM, const char *pszUnit, uint32_t iInstance, uint32_t *piVersion)1884 VMMR3DECL(int) SSMR3Seek(PSSMHANDLE pSSM, const char *pszUnit, uint32_t iInstance, uint32_t *piVersion) 1885 1885 { 1886 1886 LogFlow(("SSMR3Seek: pSSM=%p pszUnit=%p:{%s} iInstance=%RU32 piVersion=%p\n", … … 2099 2099 * The array must be terminated by a SSMFIELD_ENTRY_TERM(). 2100 2100 */ 2101 SSMR3DECL(int) SSMR3PutStruct(PSSMHANDLE pSSM, const void *pvStruct, PCSSMFIELD paFields)2101 VMMR3DECL(int) SSMR3PutStruct(PSSMHANDLE pSSM, const void *pvStruct, PCSSMFIELD paFields) 2102 2102 { 2103 2103 /* begin marker. */ … … 2128 2128 * @param fBool Item to save. 2129 2129 */ 2130 SSMR3DECL(int) SSMR3PutBool(PSSMHANDLE pSSM, bool fBool)2130 VMMR3DECL(int) SSMR3PutBool(PSSMHANDLE pSSM, bool fBool) 2131 2131 { 2132 2132 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2146 2146 * @param u8 Item to save. 2147 2147 */ 2148 SSMR3DECL(int) SSMR3PutU8(PSSMHANDLE pSSM, uint8_t u8)2148 VMMR3DECL(int) SSMR3PutU8(PSSMHANDLE pSSM, uint8_t u8) 2149 2149 { 2150 2150 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2161 2161 * @param i8 Item to save. 2162 2162 */ 2163 SSMR3DECL(int) SSMR3PutS8(PSSMHANDLE pSSM, int8_t i8)2163 VMMR3DECL(int) SSMR3PutS8(PSSMHANDLE pSSM, int8_t i8) 2164 2164 { 2165 2165 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2176 2176 * @param u16 Item to save. 2177 2177 */ 2178 SSMR3DECL(int) SSMR3PutU16(PSSMHANDLE pSSM, uint16_t u16)2178 VMMR3DECL(int) SSMR3PutU16(PSSMHANDLE pSSM, uint16_t u16) 2179 2179 { 2180 2180 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2191 2191 * @param i16 Item to save. 2192 2192 */ 2193 SSMR3DECL(int) SSMR3PutS16(PSSMHANDLE pSSM, int16_t i16)2193 VMMR3DECL(int) SSMR3PutS16(PSSMHANDLE pSSM, int16_t i16) 2194 2194 { 2195 2195 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2206 2206 * @param u32 Item to save. 2207 2207 */ 2208 SSMR3DECL(int) SSMR3PutU32(PSSMHANDLE pSSM, uint32_t u32)2208 VMMR3DECL(int) SSMR3PutU32(PSSMHANDLE pSSM, uint32_t u32) 2209 2209 { 2210 2210 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2221 2221 * @param i32 Item to save. 2222 2222 */ 2223 SSMR3DECL(int) SSMR3PutS32(PSSMHANDLE pSSM, int32_t i32)2223 VMMR3DECL(int) SSMR3PutS32(PSSMHANDLE pSSM, int32_t i32) 2224 2224 { 2225 2225 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2236 2236 * @param u64 Item to save. 2237 2237 */ 2238 SSMR3DECL(int) SSMR3PutU64(PSSMHANDLE pSSM, uint64_t u64)2238 VMMR3DECL(int) SSMR3PutU64(PSSMHANDLE pSSM, uint64_t u64) 2239 2239 { 2240 2240 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2251 2251 * @param i64 Item to save. 2252 2252 */ 2253 SSMR3DECL(int) SSMR3PutS64(PSSMHANDLE pSSM, int64_t i64)2253 VMMR3DECL(int) SSMR3PutS64(PSSMHANDLE pSSM, int64_t i64) 2254 2254 { 2255 2255 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2266 2266 * @param u128 Item to save. 2267 2267 */ 2268 SSMR3DECL(int) SSMR3PutU128(PSSMHANDLE pSSM, uint128_t u128)2268 VMMR3DECL(int) SSMR3PutU128(PSSMHANDLE pSSM, uint128_t u128) 2269 2269 { 2270 2270 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2281 2281 * @param i128 Item to save. 2282 2282 */ 2283 SSMR3DECL(int) SSMR3PutS128(PSSMHANDLE pSSM, int128_t i128)2283 VMMR3DECL(int) SSMR3PutS128(PSSMHANDLE pSSM, int128_t i128) 2284 2284 { 2285 2285 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2296 2296 * @param u Item to save. 2297 2297 */ 2298 SSMR3DECL(int) SSMR3PutUInt(PSSMHANDLE pSSM, RTUINT u)2298 VMMR3DECL(int) SSMR3PutUInt(PSSMHANDLE pSSM, RTUINT u) 2299 2299 { 2300 2300 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2312 2312 * @param i Item to save. 2313 2313 */ 2314 SSMR3DECL(int) SSMR3PutSInt(PSSMHANDLE pSSM, RTINT i)2314 VMMR3DECL(int) SSMR3PutSInt(PSSMHANDLE pSSM, RTINT i) 2315 2315 { 2316 2316 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2328 2328 * @param u Item to save. 2329 2329 */ 2330 SSMR3DECL(int) SSMR3PutGCUInt(PSSMHANDLE pSSM, RTGCUINT u)2330 VMMR3DECL(int) SSMR3PutGCUInt(PSSMHANDLE pSSM, RTGCUINT u) 2331 2331 { 2332 2332 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2344 2344 * @param i Item to save. 2345 2345 */ 2346 SSMR3DECL(int) SSMR3PutGCSInt(PSSMHANDLE pSSM, RTGCINT i)2346 VMMR3DECL(int) SSMR3PutGCSInt(PSSMHANDLE pSSM, RTGCINT i) 2347 2347 { 2348 2348 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2360 2360 * @param GCPhys The item to save 2361 2361 */ 2362 SSMR3DECL(int) SSMR3PutGCPhys32(PSSMHANDLE pSSM, RTGCPHYS32 GCPhys)2362 VMMR3DECL(int) SSMR3PutGCPhys32(PSSMHANDLE pSSM, RTGCPHYS32 GCPhys) 2363 2363 { 2364 2364 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2376 2376 * @param GCPhys The item to save 2377 2377 */ 2378 SSMR3DECL(int) SSMR3PutGCPhys64(PSSMHANDLE pSSM, RTGCPHYS64 GCPhys)2378 VMMR3DECL(int) SSMR3PutGCPhys64(PSSMHANDLE pSSM, RTGCPHYS64 GCPhys) 2379 2379 { 2380 2380 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2392 2392 * @param GCPhys The item to save 2393 2393 */ 2394 SSMR3DECL(int) SSMR3PutGCPhys(PSSMHANDLE pSSM, RTGCPHYS GCPhys)2394 VMMR3DECL(int) SSMR3PutGCPhys(PSSMHANDLE pSSM, RTGCPHYS GCPhys) 2395 2395 { 2396 2396 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2408 2408 * @param GCPtr The item to save. 2409 2409 */ 2410 SSMR3DECL(int) SSMR3PutGCPtr(PSSMHANDLE pSSM, RTGCPTR GCPtr)2410 VMMR3DECL(int) SSMR3PutGCPtr(PSSMHANDLE pSSM, RTGCPTR GCPtr) 2411 2411 { 2412 2412 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2424 2424 * @param RCPtr The item to save. 2425 2425 */ 2426 SSMR3DECL(int) SSMR3PutRCPtr(PSSMHANDLE pSSM, RTRCPTR RCPtr)2426 VMMR3DECL(int) SSMR3PutRCPtr(PSSMHANDLE pSSM, RTRCPTR RCPtr) 2427 2427 { 2428 2428 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2440 2440 * @param GCPtr The item to save. 2441 2441 */ 2442 SSMR3DECL(int) SSMR3PutGCUIntPtr(PSSMHANDLE pSSM, RTGCUINTPTR GCPtr)2442 VMMR3DECL(int) SSMR3PutGCUIntPtr(PSSMHANDLE pSSM, RTGCUINTPTR GCPtr) 2443 2443 { 2444 2444 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2456 2456 * @param u Item to save. 2457 2457 */ 2458 SSMR3DECL(int) SSMR3PutHCUInt(PSSMHANDLE pSSM, RTHCUINT u)2458 VMMR3DECL(int) SSMR3PutHCUInt(PSSMHANDLE pSSM, RTHCUINT u) 2459 2459 { 2460 2460 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2472 2472 * @param i Item to save. 2473 2473 */ 2474 SSMR3DECL(int) SSMR3PutHCSInt(PSSMHANDLE pSSM, RTHCINT i)2474 VMMR3DECL(int) SSMR3PutHCSInt(PSSMHANDLE pSSM, RTHCINT i) 2475 2475 { 2476 2476 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2488 2488 * @param IOPort The item to save. 2489 2489 */ 2490 SSMR3DECL(int) SSMR3PutIOPort(PSSMHANDLE pSSM, RTIOPORT IOPort)2490 VMMR3DECL(int) SSMR3PutIOPort(PSSMHANDLE pSSM, RTIOPORT IOPort) 2491 2491 { 2492 2492 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2504 2504 * @param Sel The item to save. 2505 2505 */ 2506 SSMR3DECL(int) SSMR3PutSel(PSSMHANDLE pSSM, RTSEL Sel)2506 VMMR3DECL(int) SSMR3PutSel(PSSMHANDLE pSSM, RTSEL Sel) 2507 2507 { 2508 2508 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2521 2521 * @param cb Size of the item. 2522 2522 */ 2523 SSMR3DECL(int) SSMR3PutMem(PSSMHANDLE pSSM, const void *pv, size_t cb)2523 VMMR3DECL(int) SSMR3PutMem(PSSMHANDLE pSSM, const void *pv, size_t cb) 2524 2524 { 2525 2525 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2536 2536 * @param psz Item to save. 2537 2537 */ 2538 SSMR3DECL(int) SSMR3PutStrZ(PSSMHANDLE pSSM, const char *psz)2538 VMMR3DECL(int) SSMR3PutStrZ(PSSMHANDLE pSSM, const char *psz) 2539 2539 { 2540 2540 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) … … 2658 2658 * The array must be terminated by a SSMFIELD_ENTRY_TERM(). 2659 2659 */ 2660 SSMR3DECL(int) SSMR3GetStruct(PSSMHANDLE pSSM, void *pvStruct, PCSSMFIELD paFields)2660 VMMR3DECL(int) SSMR3GetStruct(PSSMHANDLE pSSM, void *pvStruct, PCSSMFIELD paFields) 2661 2661 { 2662 2662 /* begin marker. */ … … 2695 2695 * @param pfBool Where to store the item. 2696 2696 */ 2697 SSMR3DECL(int) SSMR3GetBool(PSSMHANDLE pSSM, bool *pfBool)2697 VMMR3DECL(int) SSMR3GetBool(PSSMHANDLE pSSM, bool *pfBool) 2698 2698 { 2699 2699 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2719 2719 * @param pu8 Where to store the item. 2720 2720 */ 2721 SSMR3DECL(int) SSMR3GetU8(PSSMHANDLE pSSM, uint8_t *pu8)2721 VMMR3DECL(int) SSMR3GetU8(PSSMHANDLE pSSM, uint8_t *pu8) 2722 2722 { 2723 2723 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2734 2734 * @param pi8 Where to store the item. 2735 2735 */ 2736 SSMR3DECL(int) SSMR3GetS8(PSSMHANDLE pSSM, int8_t *pi8)2736 VMMR3DECL(int) SSMR3GetS8(PSSMHANDLE pSSM, int8_t *pi8) 2737 2737 { 2738 2738 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2749 2749 * @param pu16 Where to store the item. 2750 2750 */ 2751 SSMR3DECL(int) SSMR3GetU16(PSSMHANDLE pSSM, uint16_t *pu16)2751 VMMR3DECL(int) SSMR3GetU16(PSSMHANDLE pSSM, uint16_t *pu16) 2752 2752 { 2753 2753 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2764 2764 * @param pi16 Where to store the item. 2765 2765 */ 2766 SSMR3DECL(int) SSMR3GetS16(PSSMHANDLE pSSM, int16_t *pi16)2766 VMMR3DECL(int) SSMR3GetS16(PSSMHANDLE pSSM, int16_t *pi16) 2767 2767 { 2768 2768 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2779 2779 * @param pu32 Where to store the item. 2780 2780 */ 2781 SSMR3DECL(int) SSMR3GetU32(PSSMHANDLE pSSM, uint32_t *pu32)2781 VMMR3DECL(int) SSMR3GetU32(PSSMHANDLE pSSM, uint32_t *pu32) 2782 2782 { 2783 2783 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2794 2794 * @param pi32 Where to store the item. 2795 2795 */ 2796 SSMR3DECL(int) SSMR3GetS32(PSSMHANDLE pSSM, int32_t *pi32)2796 VMMR3DECL(int) SSMR3GetS32(PSSMHANDLE pSSM, int32_t *pi32) 2797 2797 { 2798 2798 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2809 2809 * @param pu64 Where to store the item. 2810 2810 */ 2811 SSMR3DECL(int) SSMR3GetU64(PSSMHANDLE pSSM, uint64_t *pu64)2811 VMMR3DECL(int) SSMR3GetU64(PSSMHANDLE pSSM, uint64_t *pu64) 2812 2812 { 2813 2813 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2824 2824 * @param pi64 Where to store the item. 2825 2825 */ 2826 SSMR3DECL(int) SSMR3GetS64(PSSMHANDLE pSSM, int64_t *pi64)2826 VMMR3DECL(int) SSMR3GetS64(PSSMHANDLE pSSM, int64_t *pi64) 2827 2827 { 2828 2828 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2839 2839 * @param pu128 Where to store the item. 2840 2840 */ 2841 SSMR3DECL(int) SSMR3GetU128(PSSMHANDLE pSSM, uint128_t *pu128)2841 VMMR3DECL(int) SSMR3GetU128(PSSMHANDLE pSSM, uint128_t *pu128) 2842 2842 { 2843 2843 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2855 2855 * @param pi128 Where to store the item. 2856 2856 */ 2857 SSMR3DECL(int) SSMR3GetS128(PSSMHANDLE pSSM, int128_t *pi128)2857 VMMR3DECL(int) SSMR3GetS128(PSSMHANDLE pSSM, int128_t *pi128) 2858 2858 { 2859 2859 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2871 2871 * @param pu Where to store the integer. 2872 2872 */ 2873 SSMR3DECL(int) SSMR3GetUInt(PSSMHANDLE pSSM, PRTUINT pu)2873 VMMR3DECL(int) SSMR3GetUInt(PSSMHANDLE pSSM, PRTUINT pu) 2874 2874 { 2875 2875 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2887 2887 * @param pi Where to store the integer. 2888 2888 */ 2889 SSMR3DECL(int) SSMR3GetSInt(PSSMHANDLE pSSM, PRTINT pi)2889 VMMR3DECL(int) SSMR3GetSInt(PSSMHANDLE pSSM, PRTINT pi) 2890 2890 { 2891 2891 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2903 2903 * @param pu Where to store the integer. 2904 2904 */ 2905 SSMR3DECL(int) SSMR3GetGCUInt(PSSMHANDLE pSSM, PRTGCUINT pu)2905 VMMR3DECL(int) SSMR3GetGCUInt(PSSMHANDLE pSSM, PRTGCUINT pu) 2906 2906 { 2907 2907 Assert(pSSM->cbGCPtr == sizeof(RTGCPTR32) || pSSM->cbGCPtr == sizeof(RTGCPTR64)); … … 2931 2931 * @param pi Where to store the integer. 2932 2932 */ 2933 SSMR3DECL(int) SSMR3GetGCSInt(PSSMHANDLE pSSM, PRTGCINT pi)2933 VMMR3DECL(int) SSMR3GetGCSInt(PSSMHANDLE pSSM, PRTGCINT pi) 2934 2934 { 2935 2935 Assert(pSSM->cbGCPtr == sizeof(RTGCPTR32) || pSSM->cbGCPtr == sizeof(RTGCPTR64)); … … 2959 2959 * @param pGCPhys Where to store the GC physical address. 2960 2960 */ 2961 SSMR3DECL(int) SSMR3GetGCPhys32(PSSMHANDLE pSSM, PRTGCPHYS32 pGCPhys)2961 VMMR3DECL(int) SSMR3GetGCPhys32(PSSMHANDLE pSSM, PRTGCPHYS32 pGCPhys) 2962 2962 { 2963 2963 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2975 2975 * @param pGCPhys Where to store the GC physical address. 2976 2976 */ 2977 SSMR3DECL(int) SSMR3GetGCPhys64(PSSMHANDLE pSSM, PRTGCPHYS64 pGCPhys)2977 VMMR3DECL(int) SSMR3GetGCPhys64(PSSMHANDLE pSSM, PRTGCPHYS64 pGCPhys) 2978 2978 { 2979 2979 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 2991 2991 * @param pGCPhys Where to store the GC physical address. 2992 2992 */ 2993 SSMR3DECL(int) SSMR3GetGCPhys(PSSMHANDLE pSSM, PRTGCPHYS pGCPhys)2993 VMMR3DECL(int) SSMR3GetGCPhys(PSSMHANDLE pSSM, PRTGCPHYS pGCPhys) 2994 2994 { 2995 2995 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3015 3015 * @param cbGCPtr Size of RTGCPTR 3016 3016 */ 3017 SSMR3DECL(int) SSMR3SetGCPtrSize(PSSMHANDLE pSSM, unsigned cbGCPtr)3017 VMMR3DECL(int) SSMR3SetGCPtrSize(PSSMHANDLE pSSM, unsigned cbGCPtr) 3018 3018 { 3019 3019 Assert(cbGCPtr == sizeof(RTGCPTR32) || cbGCPtr == sizeof(RTGCPTR64)); … … 3030 3030 * @param pGCPtr Where to store the GC virtual address. 3031 3031 */ 3032 SSMR3DECL(int) SSMR3GetGCPtr(PSSMHANDLE pSSM, PRTGCPTR pGCPtr)3032 VMMR3DECL(int) SSMR3GetGCPtr(PSSMHANDLE pSSM, PRTGCPTR pGCPtr) 3033 3033 { 3034 3034 Assert(pSSM->cbGCPtr == sizeof(RTGCPTR32) || pSSM->cbGCPtr == sizeof(RTGCPTR64)); … … 3057 3057 * @param pRCPtr Where to store the RC virtual address. 3058 3058 */ 3059 SSMR3DECL(int) SSMR3GetRCPtr(PSSMHANDLE pSSM, PRTRCPTR pRCPtr)3059 VMMR3DECL(int) SSMR3GetRCPtr(PSSMHANDLE pSSM, PRTRCPTR pRCPtr) 3060 3060 { 3061 3061 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3073 3073 * @param pGCPtr Where to store the GC virtual address. 3074 3074 */ 3075 SSMR3DECL(int) SSMR3GetGCUIntPtr(PSSMHANDLE pSSM, PRTGCUINTPTR pGCPtr)3075 VMMR3DECL(int) SSMR3GetGCUIntPtr(PSSMHANDLE pSSM, PRTGCUINTPTR pGCPtr) 3076 3076 { 3077 3077 Assert(pSSM->cbGCPtr == sizeof(RTGCPTR32) || pSSM->cbGCPtr == sizeof(RTGCPTR64)); … … 3101 3101 * @param pIOPort Where to store the I/O port address. 3102 3102 */ 3103 SSMR3DECL(int) SSMR3GetIOPort(PSSMHANDLE pSSM, PRTIOPORT pIOPort)3103 VMMR3DECL(int) SSMR3GetIOPort(PSSMHANDLE pSSM, PRTIOPORT pIOPort) 3104 3104 { 3105 3105 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3117 3117 * @param pSel Where to store the selector. 3118 3118 */ 3119 SSMR3DECL(int) SSMR3GetSel(PSSMHANDLE pSSM, PRTSEL pSel)3119 VMMR3DECL(int) SSMR3GetSel(PSSMHANDLE pSSM, PRTSEL pSel) 3120 3120 { 3121 3121 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3134 3134 * @param cb Size of the item. 3135 3135 */ 3136 SSMR3DECL(int) SSMR3GetMem(PSSMHANDLE pSSM, void *pv, size_t cb)3136 VMMR3DECL(int) SSMR3GetMem(PSSMHANDLE pSSM, void *pv, size_t cb) 3137 3137 { 3138 3138 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3151 3151 * @param cbMax Max size of the item (including '\\0'). 3152 3152 */ 3153 SSMR3DECL(int) SSMR3GetStrZ(PSSMHANDLE pSSM, char *psz, size_t cbMax)3153 VMMR3DECL(int) SSMR3GetStrZ(PSSMHANDLE pSSM, char *psz, size_t cbMax) 3154 3154 { 3155 3155 return SSMR3GetStrZEx(pSSM, psz, cbMax, NULL); … … 3166 3166 * @param pcbStr The length of the loaded string excluding the '\\0'. (optional) 3167 3167 */ 3168 SSMR3DECL(int) SSMR3GetStrZEx(PSSMHANDLE pSSM, char *psz, size_t cbMax, size_t *pcbStr)3168 VMMR3DECL(int) SSMR3GetStrZEx(PSSMHANDLE pSSM, char *psz, size_t cbMax, size_t *pcbStr) 3169 3169 { 3170 3170 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) … … 3203 3203 * @param pSSM SSM operation handle. 3204 3204 */ 3205 SSMR3DECL(int) SSMR3HandleGetStatus(PSSMHANDLE pSSM)3205 VMMR3DECL(int) SSMR3HandleGetStatus(PSSMHANDLE pSSM) 3206 3206 { 3207 3207 return pSSM->rc; … … 3219 3219 * @param iStatus Failure status code. This MUST be a VERR_*. 3220 3220 */ 3221 SSMR3DECL(int) SSMR3HandleSetStatus(PSSMHANDLE pSSM, int iStatus)3221 VMMR3DECL(int) SSMR3HandleSetStatus(PSSMHANDLE pSSM, int iStatus) 3222 3222 { 3223 3223 if (VBOX_FAILURE(iStatus)) … … 3238 3238 * @param pSSM SSM operation handle. 3239 3239 */ 3240 SSMR3DECL(SSMAFTER) SSMR3HandleGetAfter(PSSMHANDLE pSSM)3240 VMMR3DECL(SSMAFTER) SSMR3HandleGetAfter(PSSMHANDLE pSSM) 3241 3241 { 3242 3242 return pSSM->enmAfter; -
trunk/src/VBox/VMM/STAM.cpp
r12818 r12989 193 193 * @param pVM The VM to operate on. 194 194 */ 195 STAMR3DECL(int) STAMR3InitUVM(PUVM pUVM)195 VMMR3DECL(int) STAMR3InitUVM(PUVM pUVM) 196 196 { 197 197 LogFlow(("STAMR3Init\n")); … … 236 236 * @param pUVM Pointer to the user mode VM structure. 237 237 */ 238 STAMR3DECL(void) STAMR3TermUVM(PUVM pUVM)238 VMMR3DECL(void) STAMR3TermUVM(PUVM pUVM) 239 239 { 240 240 /* … … 278 278 * @param pszDesc Sample description. 279 279 */ 280 STAMR3DECL(int) STAMR3RegisterU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)280 VMMR3DECL(int) STAMR3RegisterU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, const char *pszName, STAMUNIT enmUnit, const char *pszDesc) 281 281 { 282 282 AssertReturn(enmType != STAMTYPE_CALLBACK, VERR_INVALID_PARAMETER); … … 307 307 * @param pszDesc Sample description. 308 308 */ 309 STAMR3DECL(int) STAMR3Register(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)309 VMMR3DECL(int) STAMR3Register(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, const char *pszName, STAMUNIT enmUnit, const char *pszDesc) 310 310 { 311 311 AssertReturn(enmType != STAMTYPE_CALLBACK, VERR_INVALID_PARAMETER); … … 328 328 * @param ... Arguments to the format string. 329 329 */ 330 STAMR3DECL(int) STAMR3RegisterFU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,331 330 VMMR3DECL(int) STAMR3RegisterFU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 331 const char *pszDesc, const char *pszName, ...) 332 332 { 333 333 va_list args; … … 353 353 * @param ... Arguments to the format string. 354 354 */ 355 STAMR3DECL(int) STAMR3RegisterF(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,356 355 VMMR3DECL(int) STAMR3RegisterF(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 356 const char *pszDesc, const char *pszName, ...) 357 357 { 358 358 va_list args; … … 378 378 * @param args Arguments to the format string. 379 379 */ 380 STAMR3DECL(int) STAMR3RegisterVU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,381 380 VMMR3DECL(int) STAMR3RegisterVU(PUVM pUVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 381 const char *pszDesc, const char *pszName, va_list args) 382 382 { 383 383 AssertReturn(enmType != STAMTYPE_CALLBACK, VERR_INVALID_PARAMETER); … … 408 408 * @param args Arguments to the format string. 409 409 */ 410 STAMR3DECL(int) STAMR3RegisterV(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,411 410 VMMR3DECL(int) STAMR3RegisterV(PVM pVM, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 411 const char *pszDesc, const char *pszName, va_list args) 412 412 { 413 413 return STAMR3RegisterVU(pVM->pUVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args); … … 431 431 * @remark There is currently no device or driver variant of this API. Add one if it should become necessary! 432 432 */ 433 STAMR3DECL(int) STAMR3RegisterCallback(PVM pVM, void *pvSample, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,434 435 433 VMMR3DECL(int) STAMR3RegisterCallback(PVM pVM, void *pvSample, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 434 PFNSTAMR3CALLBACKRESET pfnReset, PFNSTAMR3CALLBACKPRINT pfnPrint, 435 const char *pszDesc, const char *pszName, ...) 436 436 { 437 437 va_list args; … … 458 458 * @remark There is currently no device or driver variant of this API. Add one if it should become necessary! 459 459 */ 460 STAMR3DECL(int) STAMR3RegisterCallbackV(PVM pVM, void *pvSample, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,461 462 460 VMMR3DECL(int) STAMR3RegisterCallbackV(PVM pVM, void *pvSample, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, 461 PFNSTAMR3CALLBACKRESET pfnReset, PFNSTAMR3CALLBACKPRINT pfnPrint, 462 const char *pszDesc, const char *pszName, va_list args) 463 463 { 464 464 char *pszFormattedName; … … 616 616 * @param pvSample Pointer to the sample registered with STAMR3Register(). 617 617 */ 618 STAMR3DECL(int) STAMR3DeregisterU(PUVM pUVM, void *pvSample)618 VMMR3DECL(int) STAMR3DeregisterU(PUVM pUVM, void *pvSample) 619 619 { 620 620 STAM_LOCK_WR(pUVM); … … 662 662 * @param pvSample Pointer to the sample registered with STAMR3Register(). 663 663 */ 664 STAMR3DECL(int) STAMR3Deregister(PVM pVM, void *pvSample)664 VMMR3DECL(int) STAMR3Deregister(PVM pVM, void *pvSample) 665 665 { 666 666 return STAMR3DeregisterU(pVM->pUVM, pvSample); … … 678 678 * @remarks Don't confuse this with the other 'XYZR3Reset' methods, it's not called at VM reset. 679 679 */ 680 STAMR3DECL(int) STAMR3ResetU(PUVM pUVM, const char *pszPat)680 VMMR3DECL(int) STAMR3ResetU(PUVM pUVM, const char *pszPat) 681 681 { 682 682 int rc = VINF_SUCCESS; … … 755 755 * @remarks Don't confuse this with the other 'XYZR3Reset' methods, it's not called at VM reset. 756 756 */ 757 STAMR3DECL(int) STAMR3Reset(PVM pVM, const char *pszPat)757 VMMR3DECL(int) STAMR3Reset(PVM pVM, const char *pszPat) 758 758 { 759 759 return STAMR3ResetU(pVM->pUVM, pszPat); … … 852 852 * @param pcchSnapshot Where to store the size of the snapshot data. (Excluding the trailing '\0') 853 853 */ 854 STAMR3DECL(int) STAMR3SnapshotU(PUVM pUVM, const char *pszPat, char **ppszSnapshot, size_t *pcchSnapshot, bool fWithDesc)854 VMMR3DECL(int) STAMR3SnapshotU(PUVM pUVM, const char *pszPat, char **ppszSnapshot, size_t *pcchSnapshot, bool fWithDesc) 855 855 { 856 856 STAMR3SNAPSHOTONE State = { NULL, NULL, NULL, pUVM->pVM, 0, VINF_SUCCESS, fWithDesc }; … … 905 905 * @param pcchSnapshot Where to store the size of the snapshot data. (Excluding the trailing '\0') 906 906 */ 907 STAMR3DECL(int) STAMR3Snapshot(PVM pVM, const char *pszPat, char **ppszSnapshot, size_t *pcchSnapshot, bool fWithDesc)907 VMMR3DECL(int) STAMR3Snapshot(PVM pVM, const char *pszPat, char **ppszSnapshot, size_t *pcchSnapshot, bool fWithDesc) 908 908 { 909 909 return STAMR3SnapshotU(pVM->pUVM, pszPat, ppszSnapshot, pcchSnapshot, fWithDesc); … … 1147 1147 * NULL is allowed. 1148 1148 */ 1149 STAMR3DECL(int) STAMR3SnapshotFreeU(PUVM pUVM, char *pszSnapshot)1149 VMMR3DECL(int) STAMR3SnapshotFreeU(PUVM pUVM, char *pszSnapshot) 1150 1150 { 1151 1151 if (!pszSnapshot) … … 1163 1163 * NULL is allowed. 1164 1164 */ 1165 STAMR3DECL(int) STAMR3SnapshotFree(PVM pVM, char *pszSnapshot)1165 VMMR3DECL(int) STAMR3SnapshotFree(PVM pVM, char *pszSnapshot) 1166 1166 { 1167 1167 return STAMR3SnapshotFreeU(pVM->pUVM, pszSnapshot); … … 1177 1177 * If NULL all samples are written to the log. 1178 1178 */ 1179 STAMR3DECL(int) STAMR3DumpU(PUVM pUVM, const char *pszPat)1179 VMMR3DECL(int) STAMR3DumpU(PUVM pUVM, const char *pszPat) 1180 1180 { 1181 1181 STAMR3PRINTONEARGS Args; … … 1199 1199 * If NULL all samples are written to the log. 1200 1200 */ 1201 STAMR3DECL(int) STAMR3Dump(PVM pVM, const char *pszPat)1201 VMMR3DECL(int) STAMR3Dump(PVM pVM, const char *pszPat) 1202 1202 { 1203 1203 return STAMR3DumpU(pVM->pUVM, pszPat); … … 1230 1230 * If NULL all samples are written to the log. 1231 1231 */ 1232 STAMR3DECL(int) STAMR3DumpToReleaseLogU(PUVM pUVM, const char *pszPat)1232 VMMR3DECL(int) STAMR3DumpToReleaseLogU(PUVM pUVM, const char *pszPat) 1233 1233 { 1234 1234 STAMR3PRINTONEARGS Args; … … 1252 1252 * If NULL all samples are written to the log. 1253 1253 */ 1254 STAMR3DECL(int) STAMR3DumpToReleaseLog(PVM pVM, const char *pszPat)1254 VMMR3DECL(int) STAMR3DumpToReleaseLog(PVM pVM, const char *pszPat) 1255 1255 { 1256 1256 return STAMR3DumpToReleaseLogU(pVM->pUVM, pszPat); … … 1283 1283 * If NULL all samples are reset. 1284 1284 */ 1285 STAMR3DECL(int) STAMR3PrintU(PUVM pUVM, const char *pszPat)1285 VMMR3DECL(int) STAMR3PrintU(PUVM pUVM, const char *pszPat) 1286 1286 { 1287 1287 STAMR3PRINTONEARGS Args; … … 1305 1305 * If NULL all samples are reset. 1306 1306 */ 1307 STAMR3DECL(int) STAMR3Print(PVM pVM, const char *pszPat)1307 VMMR3DECL(int) STAMR3Print(PVM pVM, const char *pszPat) 1308 1308 { 1309 1309 return STAMR3PrintU(pVM->pUVM, pszPat); … … 1453 1453 * @param pvUser The pvUser argument of the callback function. 1454 1454 */ 1455 STAMR3DECL(int) STAMR3EnumU(PUVM pUVM, const char *pszPat, PFNSTAMR3ENUM pfnEnum, void *pvUser)1455 VMMR3DECL(int) STAMR3EnumU(PUVM pUVM, const char *pszPat, PFNSTAMR3ENUM pfnEnum, void *pvUser) 1456 1456 { 1457 1457 STAMR3ENUMONEARGS Args; … … 1477 1477 * @param pvUser The pvUser argument of the callback function. 1478 1478 */ 1479 STAMR3DECL(int) STAMR3Enum(PVM pVM, const char *pszPat, PFNSTAMR3ENUM pfnEnum, void *pvUser)1479 VMMR3DECL(int) STAMR3Enum(PVM pVM, const char *pszPat, PFNSTAMR3ENUM pfnEnum, void *pvUser) 1480 1480 { 1481 1481 return STAMR3EnumU(pVM->pUVM, pszPat, pfnEnum, pvUser); … … 1806 1806 * @param enmUnit The unit. 1807 1807 */ 1808 STAMR3DECL(const char *) STAMR3GetUnit(STAMUNIT enmUnit)1808 VMMR3DECL(const char *) STAMR3GetUnit(STAMUNIT enmUnit) 1809 1809 { 1810 1810 switch (enmUnit) -
trunk/src/VBox/VMM/STAMInternal.h
r8155 r12989 29 29 #include <iprt/semaphore.h> 30 30 31 #if !defined(IN_STAM_R3) && !defined(IN_STAM_R0) && !defined(IN_STAM_GC)32 # error "Not in STAM! This is an internal header!"33 #endif34 31 35 32 -
trunk/src/VBox/VMM/TM.cpp
r12975 r12989 174 174 * @param pVM The VM to operate on. 175 175 */ 176 TMR3DECL(int) TMR3Init(PVM pVM)176 VMMR3DECL(int) TMR3Init(PVM pVM) 177 177 { 178 178 LogFlow(("TMR3Init:\n")); … … 730 730 * @param pVM The VM to operate on. 731 731 */ 732 TMR3DECL(int) TMR3InitFinalize(PVM pVM)732 VMMR3DECL(int) TMR3InitFinalize(PVM pVM) 733 733 { 734 734 int rc; … … 778 778 * @param offDelta Relocation delta relative to old location. 779 779 */ 780 TMR3DECL(void) TMR3Relocate(PVM pVM, RTGCINTPTR offDelta)780 VMMR3DECL(void) TMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 781 781 { 782 782 int rc; … … 826 826 * @param pVM The VM to operate on. 827 827 */ 828 TMR3DECL(int) TMR3Term(PVM pVM)828 VMMR3DECL(int) TMR3Term(PVM pVM) 829 829 { 830 830 AssertMsg(pVM->tm.s.offVM, ("bad init order!\n")); … … 849 849 * @param pVM VM handle. 850 850 */ 851 TMR3DECL(void) TMR3Reset(PVM pVM)851 VMMR3DECL(void) TMR3Reset(PVM pVM) 852 852 { 853 853 LogFlow(("TMR3Reset:\n")); … … 898 898 * @remark This has to work before TMR3Relocate() is called. 899 899 */ 900 TMR3DECL(int) TMR3GetImportGC(PVM pVM, const char *pszSymbol, PRTGCPTR pGCPtrValue)900 VMMR3DECL(int) TMR3GetImportGC(PVM pVM, const char *pszSymbol, PRTGCPTR pGCPtrValue) 901 901 { 902 902 if (!strcmp(pszSymbol, "g_pSUPGlobalInfoPage")) … … 1109 1109 * @param ppTimer Where to store the timer on success. 1110 1110 */ 1111 TMR3DECL(int) TMR3TimerCreateDevice(PVM pVM, PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)1111 VMMR3DECL(int) TMR3TimerCreateDevice(PVM pVM, PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 1112 1112 { 1113 1113 /* … … 1139 1139 * @param ppTimer Where to store the timer on success. 1140 1140 */ 1141 TMR3DECL(int) TMR3TimerCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)1141 VMMR3DECL(int) TMR3TimerCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 1142 1142 { 1143 1143 /* … … 1169 1169 * @param ppTimer Where to store the timer on success. 1170 1170 */ 1171 TMR3DECL(int) TMR3TimerCreateInternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMERINT pfnCallback, void *pvUser, const char *pszDesc, PPTMTIMERR3 ppTimer)1171 VMMR3DECL(int) TMR3TimerCreateInternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMERINT pfnCallback, void *pvUser, const char *pszDesc, PPTMTIMERR3 ppTimer) 1172 1172 { 1173 1173 /* … … 1200 1200 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()). 1201 1201 */ 1202 TMR3DECL(PTMTIMERR3) TMR3TimerCreateExternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)1202 VMMR3DECL(PTMTIMERR3) TMR3TimerCreateExternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc) 1203 1203 { 1204 1204 /* … … 1227 1227 * @param pDevIns Device which timers should be destroyed. 1228 1228 */ 1229 TMR3DECL(int) TMR3TimerDestroyDevice(PVM pVM, PPDMDEVINS pDevIns)1229 VMMR3DECL(int) TMR3TimerDestroyDevice(PVM pVM, PPDMDEVINS pDevIns) 1230 1230 { 1231 1231 LogFlow(("TMR3TimerDestroyDevice: pDevIns=%p\n", pDevIns)); … … 1257 1257 * @param pDrvIns Driver which timers should be destroyed. 1258 1258 */ 1259 TMR3DECL(int) TMR3TimerDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns)1259 VMMR3DECL(int) TMR3TimerDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns) 1260 1260 { 1261 1261 LogFlow(("TMR3TimerDestroyDriver: pDrvIns=%p\n", pDrvIns)); … … 1372 1372 * @param pVM The VM to run the timers for. 1373 1373 */ 1374 TMR3DECL(void) TMR3TimerQueuesDo(PVM pVM)1374 VMMR3DECL(void) TMR3TimerQueuesDo(PVM pVM) 1375 1375 { 1376 1376 STAM_PROFILE_START(&pVM->tm.s.StatDoQueues, a); … … 1781 1781 * @param pSSM Save State Manager handle. 1782 1782 */ 1783 TMR3DECL(int) TMR3TimerSave(PTMTIMERR3 pTimer, PSSMHANDLE pSSM)1783 VMMR3DECL(int) TMR3TimerSave(PTMTIMERR3 pTimer, PSSMHANDLE pSSM) 1784 1784 { 1785 1785 LogFlow(("TMR3TimerSave: pTimer=%p:{enmState=%s, .pszDesc={%s}} pSSM=%p\n", pTimer, tmTimerState(pTimer->enmState), pTimer->pszDesc, pSSM)); … … 1823 1823 * @param pSSM Save State Manager handle. 1824 1824 */ 1825 TMR3DECL(int) TMR3TimerLoad(PTMTIMERR3 pTimer, PSSMHANDLE pSSM)1825 VMMR3DECL(int) TMR3TimerLoad(PTMTIMERR3 pTimer, PSSMHANDLE pSSM) 1826 1826 { 1827 1827 Assert(pTimer); Assert(pSSM); VM_ASSERT_EMT(pTimer->pVMR3); … … 1885 1885 * @param pTime Where to store the time. 1886 1886 */ 1887 TMR3DECL(PRTTIMESPEC) TMR3UTCNow(PVM pVM, PRTTIMESPEC pTime)1887 VMMR3DECL(PRTTIMESPEC) TMR3UTCNow(PVM pVM, PRTTIMESPEC pTime) 1888 1888 { 1889 1889 RTTimeNow(pTime); -
trunk/src/VBox/VMM/TRPM.cpp
r12975 r12989 422 422 * @param pVM The VM to operate on. 423 423 */ 424 TRPMR3DECL(int) TRPMR3Init(PVM pVM)424 VMMR3DECL(int) TRPMR3Init(PVM pVM) 425 425 { 426 426 LogFlow(("TRPMR3Init\n")); … … 542 542 * @param offDelta Relocation delta relative to old location. 543 543 */ 544 TRPMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)544 VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 545 545 { 546 546 LogFlow(("TRPMR3Relocate\n")); … … 664 664 * @param pVM The VM to operate on. 665 665 */ 666 TRPMR3DECL(int) TRPMR3Term(PVM pVM)666 VMMR3DECL(int) TRPMR3Term(PVM pVM) 667 667 { 668 668 NOREF(pVM); … … 679 679 * @param pVM VM handle. 680 680 */ 681 TRPMR3DECL(void) TRPMR3Reset(PVM pVM)681 VMMR3DECL(void) TRPMR3Reset(PVM pVM) 682 682 { 683 683 /* … … 876 876 * @param pVM The VM handle. 877 877 */ 878 TRPMR3DECL(int) TRPMR3SyncIDT(PVM pVM)878 VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM) 879 879 { 880 880 STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a); … … 983 983 * @param pVM The VM to operate on. 984 984 */ 985 TRPMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)985 VMMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM) 986 986 { 987 987 /* … … 1048 1048 * @param iTrap Trap/interrupt gate number. 1049 1049 */ 1050 TRPMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)1050 VMMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap) 1051 1051 { 1052 1052 /** @todo cleanup trpmR3ClearPassThroughHandler()! */ … … 1107 1107 * @param GCPtr GC address to check. 1108 1108 */ 1109 TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr)1109 VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr) 1110 1110 { 1111 1111 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++) … … 1135 1135 * @param iTrap Interrupt/trap number. 1136 1136 */ 1137 TRPMR3DECL(RTRCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)1137 VMMR3DECL(RTRCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap) 1138 1138 { 1139 1139 AssertReturn(iTrap < RT_ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER); … … 1152 1152 * @param pHandler GC handler pointer 1153 1153 */ 1154 TRPMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTRCPTR pHandler)1154 VMMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTRCPTR pHandler) 1155 1155 { 1156 1156 /* … … 1269 1269 * @param GCPtr GC address to check. 1270 1270 */ 1271 TRPMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr)1271 VMMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr) 1272 1272 { 1273 1273 /* … … 1338 1338 * @param enmEvent Trpm event type 1339 1339 */ 1340 TRPMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)1340 VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent) 1341 1341 { 1342 1342 PCPUMCTX pCtx; -
trunk/src/VBox/VMM/TRPMInternal.h
r9288 r12989 29 29 30 30 31 #if !defined(IN_TRPM_R3) && !defined(IN_TRPM_R0) && !defined(IN_TRPM_GC)32 # error "Not in TRPM! This is an internal header!"33 #endif34 31 35 32 /* Enable to allow trap forwarding in GC. */ … … 196 193 typedef TRPM *PTRPM; 197 194 198 TRPMGCDECL(int) trpmgcGuestIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);199 TRPMGCDECL(int) trpmgcShadowIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);195 VMMRCDECL(int) trpmgcGuestIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 196 VMMRCDECL(int) trpmgcShadowIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange); 200 197 201 198 /** … … 206 203 * @param iTrap Interrupt/trap number. 207 204 */ 208 TRPMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap);205 VMMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap); 209 206 210 207 … … 218 215 * @param iTrap Trap/interrupt gate number. 219 216 */ 220 TRPMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap);217 VMMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap); 221 218 222 219 #endif -
trunk/src/VBox/VMM/VM.cpp
r12579 r12989 130 130 * @returns VBox status code. 131 131 */ 132 VM R3DECL(int) VMR3GlobalInit(void)132 VMMR3DECL(int) VMR3GlobalInit(void) 133 133 { 134 134 /* … … 164 164 * @param ppVM Where to store the 'handle' of the created VM. 165 165 */ 166 VM R3DECL(int) VMR3Create(PFNVMATERROR pfnVMAtError, void *pvUserVM, PFNCFGMCONSTRUCTOR pfnCFGMConstructor, void *pvUserCFGM, PVM *ppVM)166 VMMR3DECL(int) VMR3Create(PFNVMATERROR pfnVMAtError, void *pvUserVM, PFNCFGMCONSTRUCTOR pfnCFGMConstructor, void *pvUserCFGM, PVM *ppVM) 167 167 { 168 168 LogFlow(("VMR3Create: pfnVMAtError=%p pvUserVM=%p pfnCFGMConstructor=%p pvUserCFGM=%p ppVM=%p\n", pfnVMAtError, pvUserVM, pfnCFGMConstructor, pvUserCFGM, ppVM)); … … 789 789 * @param offDelta Relocation delta relative to old location. 790 790 */ 791 VM R3DECL(void) VMR3Relocate(PVM pVM, RTGCINTPTR offDelta)791 VMMR3DECL(void) VMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 792 792 { 793 793 LogFlow(("VMR3Relocate: offDelta=%VGv\n", offDelta)); … … 826 826 * @vmstateto Running 827 827 */ 828 VM R3DECL(int) VMR3PowerOn(PVM pVM)828 VMMR3DECL(int) VMR3PowerOn(PVM pVM) 829 829 { 830 830 LogFlow(("VMR3PowerOn: pVM=%p\n", pVM)); … … 896 896 * @vmstateto Suspended 897 897 */ 898 VM R3DECL(int) VMR3Suspend(PVM pVM)898 VMMR3DECL(int) VMR3Suspend(PVM pVM) 899 899 { 900 900 LogFlow(("VMR3Suspend: pVM=%p\n", pVM)); … … 935 935 * @vmstateto Suspended 936 936 */ 937 VM R3DECL(int) VMR3SuspendNoSave(PVM pVM)937 VMMR3DECL(int) VMR3SuspendNoSave(PVM pVM) 938 938 { 939 939 pVM->vm.s.fPreventSaveState = true; … … 983 983 * @vmstateto Running 984 984 */ 985 VM R3DECL(int) VMR3Resume(PVM pVM)985 VMMR3DECL(int) VMR3Resume(PVM pVM) 986 986 { 987 987 LogFlow(("VMR3Resume: pVM=%p\n", pVM)); … … 1059 1059 * @vmstateto Unchanged state. 1060 1060 */ 1061 VM R3DECL(int) VMR3Save(PVM pVM, const char *pszFilename, PFNVMPROGRESS pfnProgress, void *pvUser)1061 VMMR3DECL(int) VMR3Save(PVM pVM, const char *pszFilename, PFNVMPROGRESS pfnProgress, void *pvUser) 1062 1062 { 1063 1063 LogFlow(("VMR3Save: pVM=%p pszFilename=%p:{%s} pfnProgress=%p pvUser=%p\n", pVM, pszFilename, pszFilename, pfnProgress, pvUser)); … … 1154 1154 * @vmstateto Suspended 1155 1155 */ 1156 VM R3DECL(int) VMR3Load(PVM pVM, const char *pszFilename, PFNVMPROGRESS pfnProgress, void *pvUser)1156 VMMR3DECL(int) VMR3Load(PVM pVM, const char *pszFilename, PFNVMPROGRESS pfnProgress, void *pvUser) 1157 1157 { 1158 1158 LogFlow(("VMR3Load: pVM=%p pszFilename=%p:{%s} pfnProgress=%p pvUser=%p\n", pVM, pszFilename, pszFilename, pfnProgress, pvUser)); … … 1248 1248 * @vmstateto Off 1249 1249 */ 1250 VM R3DECL(int) VMR3PowerOff(PVM pVM)1250 VMMR3DECL(int) VMR3PowerOff(PVM pVM) 1251 1251 { 1252 1252 LogFlow(("VMR3PowerOff: pVM=%p\n", pVM)); … … 1379 1379 * @vmstateto N/A 1380 1380 */ 1381 VM R3DECL(int) VMR3Destroy(PVM pVM)1381 VMMR3DECL(int) VMR3Destroy(PVM pVM) 1382 1382 { 1383 1383 LogFlow(("VMR3Destroy: pVM=%p\n", pVM)); … … 1678 1678 * Use NULL to start the enumeration. 1679 1679 */ 1680 VM R3DECL(PVM) VMR3EnumVMs(PVM pVMPrev)1680 VMMR3DECL(PVM) VMR3EnumVMs(PVM pVMPrev) 1681 1681 { 1682 1682 /* … … 1700 1700 * @param pvUser User argument. 1701 1701 */ 1702 VM R3DECL(int) VMR3AtDtorRegister(PFNVMATDTOR pfnAtDtor, void *pvUser)1702 VMMR3DECL(int) VMR3AtDtorRegister(PFNVMATDTOR pfnAtDtor, void *pvUser) 1703 1703 { 1704 1704 /* … … 1745 1745 * @param pfnAtDtor Pointer to callback. 1746 1746 */ 1747 VM R3DECL(int) VMR3AtDtorDeregister(PFNVMATDTOR pfnAtDtor)1747 VMMR3DECL(int) VMR3AtDtorDeregister(PFNVMATDTOR pfnAtDtor) 1748 1748 { 1749 1749 /* … … 1800 1800 * @param pVM VM to reset. 1801 1801 */ 1802 VM R3DECL(int) VMR3Reset(PVM pVM)1802 VMMR3DECL(int) VMR3Reset(PVM pVM) 1803 1803 { 1804 1804 int rc = VINF_SUCCESS; … … 1984 1984 * @param pszDesc Description (optional). 1985 1985 */ 1986 VM R3DECL(int) VMR3AtResetRegister(PVM pVM, PPDMDEVINS pDevInst, PFNVMATRESET pfnCallback, void *pvUser, const char *pszDesc)1986 VMMR3DECL(int) VMR3AtResetRegister(PVM pVM, PPDMDEVINS pDevInst, PFNVMATRESET pfnCallback, void *pvUser, const char *pszDesc) 1987 1987 { 1988 1988 /* … … 2023 2023 * @param pszDesc Description (optional). 2024 2024 */ 2025 VM R3DECL(int) VMR3AtResetRegisterInternal(PVM pVM, PFNVMATRESETINT pfnCallback, void *pvUser, const char *pszDesc)2025 VMMR3DECL(int) VMR3AtResetRegisterInternal(PVM pVM, PFNVMATRESETINT pfnCallback, void *pvUser, const char *pszDesc) 2026 2026 { 2027 2027 /* … … 2061 2061 * @param pszDesc Description (optional). 2062 2062 */ 2063 VM R3DECL(int) VMR3AtResetRegisterExternal(PVM pVM, PFNVMATRESETEXT pfnCallback, void *pvUser, const char *pszDesc)2063 VMMR3DECL(int) VMR3AtResetRegisterExternal(PVM pVM, PFNVMATRESETEXT pfnCallback, void *pvUser, const char *pszDesc) 2064 2064 { 2065 2065 /* … … 2134 2134 * @param pfnCallback Callback function. 2135 2135 */ 2136 VM R3DECL(int) VMR3AtResetDeregister(PVM pVM, PPDMDEVINS pDevInst, PFNVMATRESET pfnCallback)2136 VMMR3DECL(int) VMR3AtResetDeregister(PVM pVM, PPDMDEVINS pDevInst, PFNVMATRESET pfnCallback) 2137 2137 { 2138 2138 int rc = VERR_VM_ATRESET_NOT_FOUND; … … 2167 2167 * @param pfnCallback Callback function. 2168 2168 */ 2169 VM R3DECL(int) VMR3AtResetDeregisterInternal(PVM pVM, PFNVMATRESETINT pfnCallback)2169 VMMR3DECL(int) VMR3AtResetDeregisterInternal(PVM pVM, PFNVMATRESETINT pfnCallback) 2170 2170 { 2171 2171 int rc = VERR_VM_ATRESET_NOT_FOUND; … … 2199 2199 * @param pfnCallback Callback function. 2200 2200 */ 2201 VM R3DECL(int) VMR3AtResetDeregisterExternal(PVM pVM, PFNVMATRESETEXT pfnCallback)2201 VMMR3DECL(int) VMR3AtResetDeregisterExternal(PVM pVM, PFNVMATRESETEXT pfnCallback) 2202 2202 { 2203 2203 int rc = VERR_VM_ATRESET_NOT_FOUND; … … 2231 2231 * @thread Any 2232 2232 */ 2233 VM R3DECL(VMSTATE) VMR3GetState(PVM pVM)2233 VMMR3DECL(VMSTATE) VMR3GetState(PVM pVM) 2234 2234 { 2235 2235 return pVM->enmVMState; … … 2243 2243 * @param enmState The state. 2244 2244 */ 2245 VM R3DECL(const char *) VMR3GetStateName(VMSTATE enmState)2245 VMMR3DECL(const char *) VMR3GetStateName(VMSTATE enmState) 2246 2246 { 2247 2247 switch (enmState) … … 2322 2322 * @thread Any. 2323 2323 */ 2324 VM R3DECL(int) VMR3AtStateRegister(PVM pVM, PFNVMATSTATE pfnAtState, void *pvUser)2324 VMMR3DECL(int) VMR3AtStateRegister(PVM pVM, PFNVMATSTATE pfnAtState, void *pvUser) 2325 2325 { 2326 2326 LogFlow(("VMR3AtStateRegister: pfnAtState=%p pvUser=%p\n", pfnAtState, pvUser)); … … 2391 2391 * @thread Any. 2392 2392 */ 2393 VM R3DECL(int) VMR3AtStateDeregister(PVM pVM, PFNVMATSTATE pfnAtState, void *pvUser)2393 VMMR3DECL(int) VMR3AtStateDeregister(PVM pVM, PFNVMATSTATE pfnAtState, void *pvUser) 2394 2394 { 2395 2395 LogFlow(("VMR3AtStateDeregister: pfnAtState=%p pvUser=%p\n", pfnAtState, pvUser)); … … 2486 2486 * @thread Any. 2487 2487 */ 2488 VM R3DECL(int) VMR3AtErrorRegister(PVM pVM, PFNVMATERROR pfnAtError, void *pvUser)2488 VMMR3DECL(int) VMR3AtErrorRegister(PVM pVM, PFNVMATERROR pfnAtError, void *pvUser) 2489 2489 { 2490 2490 return VMR3AtErrorRegisterU(pVM->pUVM, pfnAtError, pvUser); … … 2501 2501 * @thread Any. 2502 2502 */ 2503 VM R3DECL(int) VMR3AtErrorRegisterU(PUVM pUVM, PFNVMATERROR pfnAtError, void *pvUser)2503 VMMR3DECL(int) VMR3AtErrorRegisterU(PUVM pUVM, PFNVMATERROR pfnAtError, void *pvUser) 2504 2504 { 2505 2505 LogFlow(("VMR3AtErrorRegister: pfnAtError=%p pvUser=%p\n", pfnAtError, pvUser)); … … 2562 2562 * @thread Any. 2563 2563 */ 2564 VM R3DECL(int) VMR3AtErrorDeregister(PVM pVM, PFNVMATERROR pfnAtError, void *pvUser)2564 VMMR3DECL(int) VMR3AtErrorDeregister(PVM pVM, PFNVMATERROR pfnAtError, void *pvUser) 2565 2565 { 2566 2566 LogFlow(("VMR3AtErrorDeregister: pfnAtError=%p pvUser=%p\n", pfnAtError, pvUser)); … … 2667 2667 * @thread EMT. 2668 2668 */ 2669 VM R3DECL(void) VMR3SetErrorWorker(PVM pVM)2669 VMMR3DECL(void) VMR3SetErrorWorker(PVM pVM) 2670 2670 { 2671 2671 VM_ASSERT_EMT(pVM); … … 2778 2778 * @thread Any. 2779 2779 */ 2780 VM R3DECL(int) VMR3AtRuntimeErrorRegister(PVM pVM, PFNVMATRUNTIMEERROR pfnAtRuntimeError, void *pvUser)2780 VMMR3DECL(int) VMR3AtRuntimeErrorRegister(PVM pVM, PFNVMATRUNTIMEERROR pfnAtRuntimeError, void *pvUser) 2781 2781 { 2782 2782 LogFlow(("VMR3AtRuntimeErrorRegister: pfnAtRuntimeError=%p pvUser=%p\n", pfnAtRuntimeError, pvUser)); … … 2847 2847 * @thread Any. 2848 2848 */ 2849 VM R3DECL(int) VMR3AtRuntimeErrorDeregister(PVM pVM, PFNVMATRUNTIMEERROR pfnAtRuntimeError, void *pvUser)2849 VMMR3DECL(int) VMR3AtRuntimeErrorDeregister(PVM pVM, PFNVMATRUNTIMEERROR pfnAtRuntimeError, void *pvUser) 2850 2850 { 2851 2851 LogFlow(("VMR3AtRuntimeErrorDeregister: pfnAtRuntimeError=%p pvUser=%p\n", pfnAtRuntimeError, pvUser)); … … 2954 2954 * @thread EMT. 2955 2955 */ 2956 VM R3DECL(void) VMR3SetRuntimeErrorWorker(PVM pVM)2956 VMMR3DECL(void) VMR3SetRuntimeErrorWorker(PVM pVM) 2957 2957 { 2958 2958 VM_ASSERT_EMT(pVM); -
trunk/src/VBox/VMM/VMEmt.cpp
r12549 r12989 225 225 * @param pVM VM handle. 226 226 */ 227 VM R3DECL(int) VMR3WaitForResume(PVM pVM)227 VMMR3DECL(int) VMR3WaitForResume(PVM pVM) 228 228 { 229 229 /* … … 952 952 * generic REMR3NotifyFF() method is called. 953 953 */ 954 VM R3DECL(void) VMR3NotifyFF(PVM pVM, bool fNotifiedREM)954 VMMR3DECL(void) VMR3NotifyFF(PVM pVM, bool fNotifiedREM) 955 955 { 956 956 LogFlow(("VMR3NotifyFF:\n")); … … 970 970 * generic REMR3NotifyFF() method is called. 971 971 */ 972 VM R3DECL(void) VMR3NotifyFFU(PUVM pUVM, bool fNotifiedREM)972 VMMR3DECL(void) VMR3NotifyFFU(PUVM pUVM, bool fNotifiedREM) 973 973 { 974 974 LogFlow(("VMR3NotifyFF:\n")); … … 987 987 * @thread The emulation thread. 988 988 */ 989 VM R3DECL(int) VMR3WaitHalted(PVM pVM, bool fIgnoreInterrupts)989 VMMR3DECL(int) VMR3WaitHalted(PVM pVM, bool fIgnoreInterrupts) 990 990 { 991 991 LogFlow(("VMR3WaitHalted: fIgnoreInterrupts=%d\n", fIgnoreInterrupts)); … … 1059 1059 * @thread The emulation thread. 1060 1060 */ 1061 VM R3DECL(int) VMR3WaitU(PUVM pUVM)1061 VMMR3DECL(int) VMR3WaitU(PUVM pUVM) 1062 1062 { 1063 1063 LogFlow(("VMR3WaitU:\n")); -
trunk/src/VBox/VMM/VMInternal.h
r8155 r12989 27 27 #include <setjmp.h> 28 28 29 #if !defined(IN_VM_R3) && !defined(IN_VM_R0) && !defined(IN_VM_GC)30 # error "Not in VM! This is an internal header!"31 #endif32 29 33 30 -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r12972 r12989 55 55 * to go back to the default context core. 56 56 */ 57 CPUMDECL(void) CPUMHyperSetCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore)57 VMMDECL(void) CPUMHyperSetCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore) 58 58 { 59 59 LogFlow(("CPUMHyperSetCtxCore: %p/%p/%p -> %p\n", pVM->cpum.s.CTX_SUFF(pHyperCore), pCtxCore)); … … 80 80 * @param pVM Handle to the virtual machine. 81 81 */ 82 CPUMDECL(PCCPUMCTXCORE) CPUMGetHyperCtxCore(PVM pVM)82 VMMDECL(PCCPUMCTXCORE) CPUMGetHyperCtxCore(PVM pVM) 83 83 { 84 84 return pVM->cpum.s.CTX_SUFF(pHyperCore); … … 98 98 * and esp. setting the hypervisor registers. 99 99 */ 100 CPUMDECL(int) CPUMQueryHyperCtxPtr(PVM pVM, PCPUMCTX *ppCtx)100 VMMDECL(int) CPUMQueryHyperCtxPtr(PVM pVM, PCPUMCTX *ppCtx) 101 101 { 102 102 *ppCtx = &pVM->cpum.s.Hyper; … … 105 105 106 106 107 CPUMDECL(void) CPUMSetHyperGDTR(PVM pVM, uint32_t addr, uint16_t limit)107 VMMDECL(void) CPUMSetHyperGDTR(PVM pVM, uint32_t addr, uint16_t limit) 108 108 { 109 109 pVM->cpum.s.Hyper.gdtr.cbGdt = limit; … … 113 113 114 114 115 CPUMDECL(void) CPUMSetHyperIDTR(PVM pVM, uint32_t addr, uint16_t limit)115 VMMDECL(void) CPUMSetHyperIDTR(PVM pVM, uint32_t addr, uint16_t limit) 116 116 { 117 117 pVM->cpum.s.Hyper.idtr.cbIdt = limit; … … 121 121 122 122 123 CPUMDECL(void) CPUMSetHyperCR3(PVM pVM, uint32_t cr3)123 VMMDECL(void) CPUMSetHyperCR3(PVM pVM, uint32_t cr3) 124 124 { 125 125 pVM->cpum.s.Hyper.cr3 = cr3; … … 127 127 128 128 129 CPUMDECL(void) CPUMSetHyperCS(PVM pVM, RTSEL SelCS)129 VMMDECL(void) CPUMSetHyperCS(PVM pVM, RTSEL SelCS) 130 130 { 131 131 pVM->cpum.s.CTX_SUFF(pHyperCore)->cs = SelCS; … … 133 133 134 134 135 CPUMDECL(void) CPUMSetHyperDS(PVM pVM, RTSEL SelDS)135 VMMDECL(void) CPUMSetHyperDS(PVM pVM, RTSEL SelDS) 136 136 { 137 137 pVM->cpum.s.CTX_SUFF(pHyperCore)->ds = SelDS; … … 139 139 140 140 141 CPUMDECL(void) CPUMSetHyperES(PVM pVM, RTSEL SelES)141 VMMDECL(void) CPUMSetHyperES(PVM pVM, RTSEL SelES) 142 142 { 143 143 pVM->cpum.s.CTX_SUFF(pHyperCore)->es = SelES; … … 145 145 146 146 147 CPUMDECL(void) CPUMSetHyperFS(PVM pVM, RTSEL SelFS)147 VMMDECL(void) CPUMSetHyperFS(PVM pVM, RTSEL SelFS) 148 148 { 149 149 pVM->cpum.s.CTX_SUFF(pHyperCore)->fs = SelFS; … … 151 151 152 152 153 CPUMDECL(void) CPUMSetHyperGS(PVM pVM, RTSEL SelGS)153 VMMDECL(void) CPUMSetHyperGS(PVM pVM, RTSEL SelGS) 154 154 { 155 155 pVM->cpum.s.CTX_SUFF(pHyperCore)->gs = SelGS; … … 157 157 158 158 159 CPUMDECL(void) CPUMSetHyperSS(PVM pVM, RTSEL SelSS)159 VMMDECL(void) CPUMSetHyperSS(PVM pVM, RTSEL SelSS) 160 160 { 161 161 pVM->cpum.s.CTX_SUFF(pHyperCore)->ss = SelSS; … … 163 163 164 164 165 CPUMDECL(void) CPUMSetHyperESP(PVM pVM, uint32_t u32ESP)165 VMMDECL(void) CPUMSetHyperESP(PVM pVM, uint32_t u32ESP) 166 166 { 167 167 pVM->cpum.s.CTX_SUFF(pHyperCore)->esp = u32ESP; … … 169 169 170 170 171 CPUMDECL(int) CPUMSetHyperEFlags(PVM pVM, uint32_t Efl)171 VMMDECL(int) CPUMSetHyperEFlags(PVM pVM, uint32_t Efl) 172 172 { 173 173 pVM->cpum.s.CTX_SUFF(pHyperCore)->eflags.u32 = Efl; … … 176 176 177 177 178 CPUMDECL(void) CPUMSetHyperEIP(PVM pVM, uint32_t u32EIP)178 VMMDECL(void) CPUMSetHyperEIP(PVM pVM, uint32_t u32EIP) 179 179 { 180 180 pVM->cpum.s.CTX_SUFF(pHyperCore)->eip = u32EIP; … … 182 182 183 183 184 CPUMDECL(void) CPUMSetHyperTR(PVM pVM, RTSEL SelTR)184 VMMDECL(void) CPUMSetHyperTR(PVM pVM, RTSEL SelTR) 185 185 { 186 186 pVM->cpum.s.Hyper.tr = SelTR; … … 188 188 189 189 190 CPUMDECL(void) CPUMSetHyperLDTR(PVM pVM, RTSEL SelLDTR)190 VMMDECL(void) CPUMSetHyperLDTR(PVM pVM, RTSEL SelLDTR) 191 191 { 192 192 pVM->cpum.s.Hyper.ldtr = SelLDTR; … … 194 194 195 195 196 CPUMDECL(void) CPUMSetHyperDR0(PVM pVM, RTGCUINTREG uDr0)196 VMMDECL(void) CPUMSetHyperDR0(PVM pVM, RTGCUINTREG uDr0) 197 197 { 198 198 pVM->cpum.s.Hyper.dr[0] = uDr0; … … 201 201 202 202 203 CPUMDECL(void) CPUMSetHyperDR1(PVM pVM, RTGCUINTREG uDr1)203 VMMDECL(void) CPUMSetHyperDR1(PVM pVM, RTGCUINTREG uDr1) 204 204 { 205 205 pVM->cpum.s.Hyper.dr[1] = uDr1; … … 208 208 209 209 210 CPUMDECL(void) CPUMSetHyperDR2(PVM pVM, RTGCUINTREG uDr2)210 VMMDECL(void) CPUMSetHyperDR2(PVM pVM, RTGCUINTREG uDr2) 211 211 { 212 212 pVM->cpum.s.Hyper.dr[2] = uDr2; … … 215 215 216 216 217 CPUMDECL(void) CPUMSetHyperDR3(PVM pVM, RTGCUINTREG uDr3)217 VMMDECL(void) CPUMSetHyperDR3(PVM pVM, RTGCUINTREG uDr3) 218 218 { 219 219 pVM->cpum.s.Hyper.dr[3] = uDr3; … … 222 222 223 223 224 CPUMDECL(void) CPUMSetHyperDR6(PVM pVM, RTGCUINTREG uDr6)224 VMMDECL(void) CPUMSetHyperDR6(PVM pVM, RTGCUINTREG uDr6) 225 225 { 226 226 pVM->cpum.s.Hyper.dr[6] = uDr6; … … 229 229 230 230 231 CPUMDECL(void) CPUMSetHyperDR7(PVM pVM, RTGCUINTREG uDr7)231 VMMDECL(void) CPUMSetHyperDR7(PVM pVM, RTGCUINTREG uDr7) 232 232 { 233 233 pVM->cpum.s.Hyper.dr[7] = uDr7; … … 236 236 237 237 238 CPUMDECL(RTSEL) CPUMGetHyperCS(PVM pVM)238 VMMDECL(RTSEL) CPUMGetHyperCS(PVM pVM) 239 239 { 240 240 return pVM->cpum.s.CTX_SUFF(pHyperCore)->cs; … … 242 242 243 243 244 CPUMDECL(RTSEL) CPUMGetHyperDS(PVM pVM)244 VMMDECL(RTSEL) CPUMGetHyperDS(PVM pVM) 245 245 { 246 246 return pVM->cpum.s.CTX_SUFF(pHyperCore)->ds; … … 248 248 249 249 250 CPUMDECL(RTSEL) CPUMGetHyperES(PVM pVM)250 VMMDECL(RTSEL) CPUMGetHyperES(PVM pVM) 251 251 { 252 252 return pVM->cpum.s.CTX_SUFF(pHyperCore)->es; … … 254 254 255 255 256 CPUMDECL(RTSEL) CPUMGetHyperFS(PVM pVM)256 VMMDECL(RTSEL) CPUMGetHyperFS(PVM pVM) 257 257 { 258 258 return pVM->cpum.s.CTX_SUFF(pHyperCore)->fs; … … 260 260 261 261 262 CPUMDECL(RTSEL) CPUMGetHyperGS(PVM pVM)262 VMMDECL(RTSEL) CPUMGetHyperGS(PVM pVM) 263 263 { 264 264 return pVM->cpum.s.CTX_SUFF(pHyperCore)->gs; … … 266 266 267 267 268 CPUMDECL(RTSEL) CPUMGetHyperSS(PVM pVM)268 VMMDECL(RTSEL) CPUMGetHyperSS(PVM pVM) 269 269 { 270 270 return pVM->cpum.s.CTX_SUFF(pHyperCore)->ss; … … 272 272 273 273 274 CPUMDECL(uint32_t) CPUMGetHyperEAX(PVM pVM)274 VMMDECL(uint32_t) CPUMGetHyperEAX(PVM pVM) 275 275 { 276 276 return pVM->cpum.s.CTX_SUFF(pHyperCore)->eax; … … 278 278 279 279 280 CPUMDECL(uint32_t) CPUMGetHyperEBX(PVM pVM)280 VMMDECL(uint32_t) CPUMGetHyperEBX(PVM pVM) 281 281 { 282 282 return pVM->cpum.s.CTX_SUFF(pHyperCore)->ebx; … … 284 284 285 285 286 CPUMDECL(uint32_t) CPUMGetHyperECX(PVM pVM)286 VMMDECL(uint32_t) CPUMGetHyperECX(PVM pVM) 287 287 { 288 288 return pVM->cpum.s.CTX_SUFF(pHyperCore)->ecx; … … 290 290 291 291 292 CPUMDECL(uint32_t) CPUMGetHyperEDX(PVM pVM)292 VMMDECL(uint32_t) CPUMGetHyperEDX(PVM pVM) 293 293 { 294 294 return pVM->cpum.s.CTX_SUFF(pHyperCore)->edx; … … 296 296 297 297 298 CPUMDECL(uint32_t) CPUMGetHyperESI(PVM pVM)298 VMMDECL(uint32_t) CPUMGetHyperESI(PVM pVM) 299 299 { 300 300 return pVM->cpum.s.CTX_SUFF(pHyperCore)->esi; … … 302 302 303 303 304 CPUMDECL(uint32_t) CPUMGetHyperEDI(PVM pVM)304 VMMDECL(uint32_t) CPUMGetHyperEDI(PVM pVM) 305 305 { 306 306 return pVM->cpum.s.CTX_SUFF(pHyperCore)->edi; … … 308 308 309 309 310 CPUMDECL(uint32_t) CPUMGetHyperEBP(PVM pVM)310 VMMDECL(uint32_t) CPUMGetHyperEBP(PVM pVM) 311 311 { 312 312 return pVM->cpum.s.CTX_SUFF(pHyperCore)->ebp; … … 314 314 315 315 316 CPUMDECL(uint32_t) CPUMGetHyperESP(PVM pVM)316 VMMDECL(uint32_t) CPUMGetHyperESP(PVM pVM) 317 317 { 318 318 return pVM->cpum.s.CTX_SUFF(pHyperCore)->esp; … … 320 320 321 321 322 CPUMDECL(uint32_t) CPUMGetHyperEFlags(PVM pVM)322 VMMDECL(uint32_t) CPUMGetHyperEFlags(PVM pVM) 323 323 { 324 324 return pVM->cpum.s.CTX_SUFF(pHyperCore)->eflags.u32; … … 326 326 327 327 328 CPUMDECL(uint32_t) CPUMGetHyperEIP(PVM pVM)328 VMMDECL(uint32_t) CPUMGetHyperEIP(PVM pVM) 329 329 { 330 330 return pVM->cpum.s.CTX_SUFF(pHyperCore)->eip; … … 332 332 333 333 334 CPUMDECL(uint64_t) CPUMGetHyperRIP(PVM pVM)334 VMMDECL(uint64_t) CPUMGetHyperRIP(PVM pVM) 335 335 { 336 336 return pVM->cpum.s.CTX_SUFF(pHyperCore)->rip; … … 338 338 339 339 340 CPUMDECL(uint32_t) CPUMGetHyperIDTR(PVM pVM, uint16_t *pcbLimit)340 VMMDECL(uint32_t) CPUMGetHyperIDTR(PVM pVM, uint16_t *pcbLimit) 341 341 { 342 342 if (pcbLimit) … … 346 346 347 347 348 CPUMDECL(uint32_t) CPUMGetHyperGDTR(PVM pVM, uint16_t *pcbLimit)348 VMMDECL(uint32_t) CPUMGetHyperGDTR(PVM pVM, uint16_t *pcbLimit) 349 349 { 350 350 if (pcbLimit) … … 354 354 355 355 356 CPUMDECL(RTSEL) CPUMGetHyperLDTR(PVM pVM)356 VMMDECL(RTSEL) CPUMGetHyperLDTR(PVM pVM) 357 357 { 358 358 return pVM->cpum.s.Hyper.ldtr; … … 360 360 361 361 362 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR0(PVM pVM)362 VMMDECL(RTGCUINTREG) CPUMGetHyperDR0(PVM pVM) 363 363 { 364 364 return pVM->cpum.s.Hyper.dr[0]; … … 366 366 367 367 368 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR1(PVM pVM)368 VMMDECL(RTGCUINTREG) CPUMGetHyperDR1(PVM pVM) 369 369 { 370 370 return pVM->cpum.s.Hyper.dr[1]; … … 372 372 373 373 374 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR2(PVM pVM)374 VMMDECL(RTGCUINTREG) CPUMGetHyperDR2(PVM pVM) 375 375 { 376 376 return pVM->cpum.s.Hyper.dr[2]; … … 378 378 379 379 380 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR3(PVM pVM)380 VMMDECL(RTGCUINTREG) CPUMGetHyperDR3(PVM pVM) 381 381 { 382 382 return pVM->cpum.s.Hyper.dr[3]; … … 384 384 385 385 386 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR6(PVM pVM)386 VMMDECL(RTGCUINTREG) CPUMGetHyperDR6(PVM pVM) 387 387 { 388 388 return pVM->cpum.s.Hyper.dr[6]; … … 390 390 391 391 392 CPUMDECL(RTGCUINTREG) CPUMGetHyperDR7(PVM pVM)392 VMMDECL(RTGCUINTREG) CPUMGetHyperDR7(PVM pVM) 393 393 { 394 394 return pVM->cpum.s.Hyper.dr[7]; … … 402 402 * @param pVM Handle to the virtual machine. 403 403 */ 404 CPUMDECL(PCCPUMCTXCORE) CPUMGetGuestCtxCore(PVM pVM)404 VMMDECL(PCCPUMCTXCORE) CPUMGetGuestCtxCore(PVM pVM) 405 405 { 406 406 return CPUMCTX2CORE(&pVM->cpum.s.Guest); … … 414 414 * @param pCtxCore The new context core values. 415 415 */ 416 CPUMDECL(void) CPUMSetGuestCtxCore(PVM pVM, PCCPUMCTXCORE pCtxCore)416 VMMDECL(void) CPUMSetGuestCtxCore(PVM pVM, PCCPUMCTXCORE pCtxCore) 417 417 { 418 418 /** @todo #1410 requires selectors to be checked. (huh? 1410?) */ … … 456 456 * @param ppCtx Receives the CPUMCTX pointer when successful. 457 457 */ 458 CPUMDECL(int) CPUMQueryGuestCtxPtr(PVM pVM, PCPUMCTX *ppCtx)458 VMMDECL(int) CPUMQueryGuestCtxPtr(PVM pVM, PCPUMCTX *ppCtx) 459 459 { 460 460 *ppCtx = &pVM->cpum.s.Guest; … … 463 463 464 464 465 CPUMDECL(int) CPUMSetGuestGDTR(PVM pVM, uint32_t addr, uint16_t limit)465 VMMDECL(int) CPUMSetGuestGDTR(PVM pVM, uint32_t addr, uint16_t limit) 466 466 { 467 467 pVM->cpum.s.Guest.gdtr.cbGdt = limit; … … 471 471 } 472 472 473 CPUMDECL(int) CPUMSetGuestIDTR(PVM pVM, uint32_t addr, uint16_t limit)473 VMMDECL(int) CPUMSetGuestIDTR(PVM pVM, uint32_t addr, uint16_t limit) 474 474 { 475 475 pVM->cpum.s.Guest.idtr.cbIdt = limit; … … 479 479 } 480 480 481 CPUMDECL(int) CPUMSetGuestTR(PVM pVM, uint16_t tr)481 VMMDECL(int) CPUMSetGuestTR(PVM pVM, uint16_t tr) 482 482 { 483 483 pVM->cpum.s.Guest.tr = tr; … … 486 486 } 487 487 488 CPUMDECL(int) CPUMSetGuestLDTR(PVM pVM, uint16_t ldtr)488 VMMDECL(int) CPUMSetGuestLDTR(PVM pVM, uint16_t ldtr) 489 489 { 490 490 pVM->cpum.s.Guest.ldtr = ldtr; … … 505 505 * @param cr0 The new CR0 value. 506 506 */ 507 CPUMDECL(int) CPUMSetGuestCR0(PVM pVM, uint64_t cr0)507 VMMDECL(int) CPUMSetGuestCR0(PVM pVM, uint64_t cr0) 508 508 { 509 509 #ifdef IN_GC … … 572 572 573 573 574 CPUMDECL(int) CPUMSetGuestCR2(PVM pVM, uint64_t cr2)574 VMMDECL(int) CPUMSetGuestCR2(PVM pVM, uint64_t cr2) 575 575 { 576 576 pVM->cpum.s.Guest.cr2 = cr2; … … 579 579 580 580 581 CPUMDECL(int) CPUMSetGuestCR3(PVM pVM, uint64_t cr3)581 VMMDECL(int) CPUMSetGuestCR3(PVM pVM, uint64_t cr3) 582 582 { 583 583 pVM->cpum.s.Guest.cr3 = cr3; … … 587 587 588 588 589 CPUMDECL(int) CPUMSetGuestCR4(PVM pVM, uint64_t cr4)589 VMMDECL(int) CPUMSetGuestCR4(PVM pVM, uint64_t cr4) 590 590 { 591 591 if ( (cr4 & (X86_CR4_PGE | X86_CR4_PAE | X86_CR4_PSE)) … … 600 600 601 601 602 CPUMDECL(int) CPUMSetGuestEFlags(PVM pVM, uint32_t eflags)602 VMMDECL(int) CPUMSetGuestEFlags(PVM pVM, uint32_t eflags) 603 603 { 604 604 pVM->cpum.s.Guest.eflags.u32 = eflags; … … 607 607 608 608 609 CPUMDECL(int) CPUMSetGuestEIP(PVM pVM, uint32_t eip)609 VMMDECL(int) CPUMSetGuestEIP(PVM pVM, uint32_t eip) 610 610 { 611 611 pVM->cpum.s.Guest.eip = eip; … … 614 614 615 615 616 CPUMDECL(int) CPUMSetGuestEAX(PVM pVM, uint32_t eax)616 VMMDECL(int) CPUMSetGuestEAX(PVM pVM, uint32_t eax) 617 617 { 618 618 pVM->cpum.s.Guest.eax = eax; … … 621 621 622 622 623 CPUMDECL(int) CPUMSetGuestEBX(PVM pVM, uint32_t ebx)623 VMMDECL(int) CPUMSetGuestEBX(PVM pVM, uint32_t ebx) 624 624 { 625 625 pVM->cpum.s.Guest.ebx = ebx; … … 628 628 629 629 630 CPUMDECL(int) CPUMSetGuestECX(PVM pVM, uint32_t ecx)630 VMMDECL(int) CPUMSetGuestECX(PVM pVM, uint32_t ecx) 631 631 { 632 632 pVM->cpum.s.Guest.ecx = ecx; … … 635 635 636 636 637 CPUMDECL(int) CPUMSetGuestEDX(PVM pVM, uint32_t edx)637 VMMDECL(int) CPUMSetGuestEDX(PVM pVM, uint32_t edx) 638 638 { 639 639 pVM->cpum.s.Guest.edx = edx; … … 642 642 643 643 644 CPUMDECL(int) CPUMSetGuestESP(PVM pVM, uint32_t esp)644 VMMDECL(int) CPUMSetGuestESP(PVM pVM, uint32_t esp) 645 645 { 646 646 pVM->cpum.s.Guest.esp = esp; … … 649 649 650 650 651 CPUMDECL(int) CPUMSetGuestEBP(PVM pVM, uint32_t ebp)651 VMMDECL(int) CPUMSetGuestEBP(PVM pVM, uint32_t ebp) 652 652 { 653 653 pVM->cpum.s.Guest.ebp = ebp; … … 656 656 657 657 658 CPUMDECL(int) CPUMSetGuestESI(PVM pVM, uint32_t esi)658 VMMDECL(int) CPUMSetGuestESI(PVM pVM, uint32_t esi) 659 659 { 660 660 pVM->cpum.s.Guest.esi = esi; … … 663 663 664 664 665 CPUMDECL(int) CPUMSetGuestEDI(PVM pVM, uint32_t edi)665 VMMDECL(int) CPUMSetGuestEDI(PVM pVM, uint32_t edi) 666 666 { 667 667 pVM->cpum.s.Guest.edi = edi; … … 670 670 671 671 672 CPUMDECL(int) CPUMSetGuestSS(PVM pVM, uint16_t ss)672 VMMDECL(int) CPUMSetGuestSS(PVM pVM, uint16_t ss) 673 673 { 674 674 pVM->cpum.s.Guest.ss = ss; … … 677 677 678 678 679 CPUMDECL(int) CPUMSetGuestCS(PVM pVM, uint16_t cs)679 VMMDECL(int) CPUMSetGuestCS(PVM pVM, uint16_t cs) 680 680 { 681 681 pVM->cpum.s.Guest.cs = cs; … … 684 684 685 685 686 CPUMDECL(int) CPUMSetGuestDS(PVM pVM, uint16_t ds)686 VMMDECL(int) CPUMSetGuestDS(PVM pVM, uint16_t ds) 687 687 { 688 688 pVM->cpum.s.Guest.ds = ds; … … 691 691 692 692 693 CPUMDECL(int) CPUMSetGuestES(PVM pVM, uint16_t es)693 VMMDECL(int) CPUMSetGuestES(PVM pVM, uint16_t es) 694 694 { 695 695 pVM->cpum.s.Guest.es = es; … … 698 698 699 699 700 CPUMDECL(int) CPUMSetGuestFS(PVM pVM, uint16_t fs)700 VMMDECL(int) CPUMSetGuestFS(PVM pVM, uint16_t fs) 701 701 { 702 702 pVM->cpum.s.Guest.fs = fs; … … 705 705 706 706 707 CPUMDECL(int) CPUMSetGuestGS(PVM pVM, uint16_t gs)707 VMMDECL(int) CPUMSetGuestGS(PVM pVM, uint16_t gs) 708 708 { 709 709 pVM->cpum.s.Guest.gs = gs; … … 712 712 713 713 714 CPUMDECL(void) CPUMSetGuestEFER(PVM pVM, uint64_t val)714 VMMDECL(void) CPUMSetGuestEFER(PVM pVM, uint64_t val) 715 715 { 716 716 pVM->cpum.s.Guest.msrEFER = val; … … 718 718 719 719 720 CPUMDECL(uint64_t) CPUMGetGuestMsr(PVM pVM, unsigned idMsr)720 VMMDECL(uint64_t) CPUMGetGuestMsr(PVM pVM, unsigned idMsr) 721 721 { 722 722 uint64_t u64 = 0; … … 773 773 774 774 775 CPUMDECL(RTGCPTR) CPUMGetGuestIDTR(PVM pVM, uint16_t *pcbLimit)775 VMMDECL(RTGCPTR) CPUMGetGuestIDTR(PVM pVM, uint16_t *pcbLimit) 776 776 { 777 777 if (pcbLimit) … … 781 781 782 782 783 CPUMDECL(RTSEL) CPUMGetGuestTR(PVM pVM)783 VMMDECL(RTSEL) CPUMGetGuestTR(PVM pVM) 784 784 { 785 785 return pVM->cpum.s.Guest.tr; … … 787 787 788 788 789 CPUMDECL(RTSEL) CPUMGetGuestCS(PVM pVM)789 VMMDECL(RTSEL) CPUMGetGuestCS(PVM pVM) 790 790 { 791 791 return pVM->cpum.s.Guest.cs; … … 793 793 794 794 795 CPUMDECL(RTSEL) CPUMGetGuestDS(PVM pVM)795 VMMDECL(RTSEL) CPUMGetGuestDS(PVM pVM) 796 796 { 797 797 return pVM->cpum.s.Guest.ds; … … 799 799 800 800 801 CPUMDECL(RTSEL) CPUMGetGuestES(PVM pVM)801 VMMDECL(RTSEL) CPUMGetGuestES(PVM pVM) 802 802 { 803 803 return pVM->cpum.s.Guest.es; … … 805 805 806 806 807 CPUMDECL(RTSEL) CPUMGetGuestFS(PVM pVM)807 VMMDECL(RTSEL) CPUMGetGuestFS(PVM pVM) 808 808 { 809 809 return pVM->cpum.s.Guest.fs; … … 811 811 812 812 813 CPUMDECL(RTSEL) CPUMGetGuestGS(PVM pVM)813 VMMDECL(RTSEL) CPUMGetGuestGS(PVM pVM) 814 814 { 815 815 return pVM->cpum.s.Guest.gs; … … 817 817 818 818 819 CPUMDECL(RTSEL) CPUMGetGuestSS(PVM pVM)819 VMMDECL(RTSEL) CPUMGetGuestSS(PVM pVM) 820 820 { 821 821 return pVM->cpum.s.Guest.ss; … … 823 823 824 824 825 CPUMDECL(RTSEL) CPUMGetGuestLDTR(PVM pVM)825 VMMDECL(RTSEL) CPUMGetGuestLDTR(PVM pVM) 826 826 { 827 827 return pVM->cpum.s.Guest.ldtr; … … 829 829 830 830 831 CPUMDECL(uint64_t) CPUMGetGuestCR0(PVM pVM)831 VMMDECL(uint64_t) CPUMGetGuestCR0(PVM pVM) 832 832 { 833 833 return pVM->cpum.s.Guest.cr0; … … 835 835 836 836 837 CPUMDECL(uint64_t) CPUMGetGuestCR2(PVM pVM)837 VMMDECL(uint64_t) CPUMGetGuestCR2(PVM pVM) 838 838 { 839 839 return pVM->cpum.s.Guest.cr2; … … 841 841 842 842 843 CPUMDECL(uint64_t) CPUMGetGuestCR3(PVM pVM)843 VMMDECL(uint64_t) CPUMGetGuestCR3(PVM pVM) 844 844 { 845 845 return pVM->cpum.s.Guest.cr3; … … 847 847 848 848 849 CPUMDECL(uint64_t) CPUMGetGuestCR4(PVM pVM)849 VMMDECL(uint64_t) CPUMGetGuestCR4(PVM pVM) 850 850 { 851 851 return pVM->cpum.s.Guest.cr4; … … 853 853 854 854 855 CPUMDECL(void) CPUMGetGuestGDTR(PVM pVM, PVBOXGDTR pGDTR)855 VMMDECL(void) CPUMGetGuestGDTR(PVM pVM, PVBOXGDTR pGDTR) 856 856 { 857 857 *pGDTR = pVM->cpum.s.Guest.gdtr; … … 859 859 860 860 861 CPUMDECL(uint32_t) CPUMGetGuestEIP(PVM pVM)861 VMMDECL(uint32_t) CPUMGetGuestEIP(PVM pVM) 862 862 { 863 863 return pVM->cpum.s.Guest.eip; … … 865 865 866 866 867 CPUMDECL(uint64_t) CPUMGetGuestRIP(PVM pVM)867 VMMDECL(uint64_t) CPUMGetGuestRIP(PVM pVM) 868 868 { 869 869 return pVM->cpum.s.Guest.rip; … … 871 871 872 872 873 CPUMDECL(uint32_t) CPUMGetGuestEAX(PVM pVM)873 VMMDECL(uint32_t) CPUMGetGuestEAX(PVM pVM) 874 874 { 875 875 return pVM->cpum.s.Guest.eax; … … 877 877 878 878 879 CPUMDECL(uint32_t) CPUMGetGuestEBX(PVM pVM)879 VMMDECL(uint32_t) CPUMGetGuestEBX(PVM pVM) 880 880 { 881 881 return pVM->cpum.s.Guest.ebx; … … 883 883 884 884 885 CPUMDECL(uint32_t) CPUMGetGuestECX(PVM pVM)885 VMMDECL(uint32_t) CPUMGetGuestECX(PVM pVM) 886 886 { 887 887 return pVM->cpum.s.Guest.ecx; … … 889 889 890 890 891 CPUMDECL(uint32_t) CPUMGetGuestEDX(PVM pVM)891 VMMDECL(uint32_t) CPUMGetGuestEDX(PVM pVM) 892 892 { 893 893 return pVM->cpum.s.Guest.edx; … … 895 895 896 896 897 CPUMDECL(uint32_t) CPUMGetGuestESI(PVM pVM)897 VMMDECL(uint32_t) CPUMGetGuestESI(PVM pVM) 898 898 { 899 899 return pVM->cpum.s.Guest.esi; … … 901 901 902 902 903 CPUMDECL(uint32_t) CPUMGetGuestEDI(PVM pVM)903 VMMDECL(uint32_t) CPUMGetGuestEDI(PVM pVM) 904 904 { 905 905 return pVM->cpum.s.Guest.edi; … … 907 907 908 908 909 CPUMDECL(uint32_t) CPUMGetGuestESP(PVM pVM)909 VMMDECL(uint32_t) CPUMGetGuestESP(PVM pVM) 910 910 { 911 911 return pVM->cpum.s.Guest.esp; … … 913 913 914 914 915 CPUMDECL(uint32_t) CPUMGetGuestEBP(PVM pVM)915 VMMDECL(uint32_t) CPUMGetGuestEBP(PVM pVM) 916 916 { 917 917 return pVM->cpum.s.Guest.ebp; … … 919 919 920 920 921 CPUMDECL(uint32_t) CPUMGetGuestEFlags(PVM pVM)921 VMMDECL(uint32_t) CPUMGetGuestEFlags(PVM pVM) 922 922 { 923 923 return pVM->cpum.s.Guest.eflags.u32; … … 925 925 926 926 927 CPUMDECL(CPUMSELREGHID *) CPUMGetGuestTRHid(PVM pVM)927 VMMDECL(CPUMSELREGHID *) CPUMGetGuestTRHid(PVM pVM) 928 928 { 929 929 return &pVM->cpum.s.Guest.trHid; … … 932 932 933 933 ///@todo: crx should be an array 934 CPUMDECL(int) CPUMGetGuestCRx(PVM pVM, unsigned iReg, uint64_t *pValue)934 VMMDECL(int) CPUMGetGuestCRx(PVM pVM, unsigned iReg, uint64_t *pValue) 935 935 { 936 936 switch (iReg) … … 955 955 956 956 957 CPUMDECL(uint64_t) CPUMGetGuestDR0(PVM pVM)957 VMMDECL(uint64_t) CPUMGetGuestDR0(PVM pVM) 958 958 { 959 959 return pVM->cpum.s.Guest.dr[0]; … … 961 961 962 962 963 CPUMDECL(uint64_t) CPUMGetGuestDR1(PVM pVM)963 VMMDECL(uint64_t) CPUMGetGuestDR1(PVM pVM) 964 964 { 965 965 return pVM->cpum.s.Guest.dr[1]; … … 967 967 968 968 969 CPUMDECL(uint64_t) CPUMGetGuestDR2(PVM pVM)969 VMMDECL(uint64_t) CPUMGetGuestDR2(PVM pVM) 970 970 { 971 971 return pVM->cpum.s.Guest.dr[2]; … … 973 973 974 974 975 CPUMDECL(uint64_t) CPUMGetGuestDR3(PVM pVM)975 VMMDECL(uint64_t) CPUMGetGuestDR3(PVM pVM) 976 976 { 977 977 return pVM->cpum.s.Guest.dr[3]; … … 979 979 980 980 981 CPUMDECL(uint64_t) CPUMGetGuestDR6(PVM pVM)981 VMMDECL(uint64_t) CPUMGetGuestDR6(PVM pVM) 982 982 { 983 983 return pVM->cpum.s.Guest.dr[6]; … … 985 985 986 986 987 CPUMDECL(uint64_t) CPUMGetGuestDR7(PVM pVM)987 VMMDECL(uint64_t) CPUMGetGuestDR7(PVM pVM) 988 988 { 989 989 return pVM->cpum.s.Guest.dr[7]; … … 991 991 992 992 993 CPUMDECL(int) CPUMGetGuestDRx(PVM pVM, uint32_t iReg, uint64_t *pValue)993 VMMDECL(int) CPUMGetGuestDRx(PVM pVM, uint32_t iReg, uint64_t *pValue) 994 994 { 995 995 AssertReturn(iReg <= USE_REG_DR7, VERR_INVALID_PARAMETER); … … 1002 1002 1003 1003 1004 CPUMDECL(uint64_t) CPUMGetGuestEFER(PVM pVM)1004 VMMDECL(uint64_t) CPUMGetGuestEFER(PVM pVM) 1005 1005 { 1006 1006 return pVM->cpum.s.Guest.msrEFER; … … 1018 1018 * @param pEdx Where to store the EDX value. 1019 1019 */ 1020 CPUMDECL(void) CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)1020 VMMDECL(void) CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx) 1021 1021 { 1022 1022 PCCPUMCPUID pCpuId; … … 1047 1047 * @remark Intended for PATM. 1048 1048 */ 1049 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM)1049 VMMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdGCPtr(PVM pVM) 1050 1050 { 1051 1051 return RCPTRTYPE(PCCPUMCPUID)VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdStd[0]); … … 1062 1062 * @remark Intended for PATM. 1063 1063 */ 1064 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM)1064 VMMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdExtGCPtr(PVM pVM) 1065 1065 { 1066 1066 return (RCPTRTYPE(PCCPUMCPUID))VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdExt[0]); … … 1077 1077 * @remark Intended for PATM. 1078 1078 */ 1079 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM)1079 VMMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdCentaurGCPtr(PVM pVM) 1080 1080 { 1081 1081 return (RCPTRTYPE(PCCPUMCPUID))VM_GUEST_ADDR(pVM, &pVM->cpum.s.aGuestCpuIdCentaur[0]); … … 1090 1090 * @remark Intended for PATM. 1091 1091 */ 1092 CPUMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM)1092 VMMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdDefGCPtr(PVM pVM) 1093 1093 { 1094 1094 return (RCPTRTYPE(PCCPUMCPUID))VM_GUEST_ADDR(pVM, &pVM->cpum.s.GuestCpuIdDef); … … 1103 1103 * @remark Intended for PATM. 1104 1104 */ 1105 CPUMDECL(uint32_t) CPUMGetGuestCpuIdStdMax(PVM pVM)1105 VMMDECL(uint32_t) CPUMGetGuestCpuIdStdMax(PVM pVM) 1106 1106 { 1107 1107 return RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdStd); … … 1116 1116 * @remark Intended for PATM. 1117 1117 */ 1118 CPUMDECL(uint32_t) CPUMGetGuestCpuIdExtMax(PVM pVM)1118 VMMDECL(uint32_t) CPUMGetGuestCpuIdExtMax(PVM pVM) 1119 1119 { 1120 1120 return RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdExt); … … 1129 1129 * @remark Intended for PATM. 1130 1130 */ 1131 CPUMDECL(uint32_t) CPUMGetGuestCpuIdCentaurMax(PVM pVM)1131 VMMDECL(uint32_t) CPUMGetGuestCpuIdCentaurMax(PVM pVM) 1132 1132 { 1133 1133 return RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdCentaur); … … 1141 1141 * @param enmFeature The feature to set. 1142 1142 */ 1143 CPUMDECL(void) CPUMSetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature)1143 VMMDECL(void) CPUMSetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature) 1144 1144 { 1145 1145 switch (enmFeature) … … 1301 1301 * @param enmFeature The feature to query. 1302 1302 */ 1303 CPUMDECL(bool) CPUMGetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature)1303 VMMDECL(bool) CPUMGetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature) 1304 1304 { 1305 1305 switch (enmFeature) … … 1326 1326 * @param enmFeature The feature to clear. 1327 1327 */ 1328 CPUMDECL(void) CPUMClearGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature)1328 VMMDECL(void) CPUMClearGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature) 1329 1329 { 1330 1330 switch (enmFeature) … … 1387 1387 * @param pVM The VM handle. 1388 1388 */ 1389 CPUMDECL(CPUMCPUVENDOR) CPUMGetCPUVendor(PVM pVM)1389 VMMDECL(CPUMCPUVENDOR) CPUMGetCPUVendor(PVM pVM) 1390 1390 { 1391 1391 return pVM->cpum.s.enmCPUVendor; … … 1393 1393 1394 1394 1395 CPUMDECL(int) CPUMSetGuestDR0(PVM pVM, uint64_t uDr0)1395 VMMDECL(int) CPUMSetGuestDR0(PVM pVM, uint64_t uDr0) 1396 1396 { 1397 1397 pVM->cpum.s.Guest.dr[0] = uDr0; … … 1400 1400 1401 1401 1402 CPUMDECL(int) CPUMSetGuestDR1(PVM pVM, uint64_t uDr1)1402 VMMDECL(int) CPUMSetGuestDR1(PVM pVM, uint64_t uDr1) 1403 1403 { 1404 1404 pVM->cpum.s.Guest.dr[1] = uDr1; … … 1407 1407 1408 1408 1409 CPUMDECL(int) CPUMSetGuestDR2(PVM pVM, uint64_t uDr2)1409 VMMDECL(int) CPUMSetGuestDR2(PVM pVM, uint64_t uDr2) 1410 1410 { 1411 1411 pVM->cpum.s.Guest.dr[2] = uDr2; … … 1414 1414 1415 1415 1416 CPUMDECL(int) CPUMSetGuestDR3(PVM pVM, uint64_t uDr3)1416 VMMDECL(int) CPUMSetGuestDR3(PVM pVM, uint64_t uDr3) 1417 1417 { 1418 1418 pVM->cpum.s.Guest.dr[3] = uDr3; … … 1421 1421 1422 1422 1423 CPUMDECL(int) CPUMSetGuestDR6(PVM pVM, uint64_t uDr6)1423 VMMDECL(int) CPUMSetGuestDR6(PVM pVM, uint64_t uDr6) 1424 1424 { 1425 1425 pVM->cpum.s.Guest.dr[6] = uDr6; … … 1428 1428 1429 1429 1430 CPUMDECL(int) CPUMSetGuestDR7(PVM pVM, uint64_t uDr7)1430 VMMDECL(int) CPUMSetGuestDR7(PVM pVM, uint64_t uDr7) 1431 1431 { 1432 1432 pVM->cpum.s.Guest.dr[7] = uDr7; … … 1435 1435 1436 1436 1437 CPUMDECL(int) CPUMSetGuestDRx(PVM pVM, uint32_t iReg, uint64_t Value)1437 VMMDECL(int) CPUMSetGuestDRx(PVM pVM, uint32_t iReg, uint64_t Value) 1438 1438 { 1439 1439 AssertReturn(iReg <= USE_REG_DR7, VERR_INVALID_PARAMETER); … … 1457 1457 * @param pVM The VM handle. 1458 1458 */ 1459 CPUMDECL(int) CPUMRecalcHyperDRx(PVM pVM)1459 VMMDECL(int) CPUMRecalcHyperDRx(PVM pVM) 1460 1460 { 1461 1461 /* … … 1591 1591 * @see @ref pg_raw 1592 1592 */ 1593 CPUMDECL(int) CPUMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore)1593 VMMDECL(int) CPUMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore) 1594 1594 { 1595 1595 Assert(!pVM->cpum.s.fRawEntered); … … 1651 1651 * @see @ref pg_raw 1652 1652 */ 1653 CPUMDECL(int) CPUMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rc)1653 VMMDECL(int) CPUMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rc) 1654 1654 { 1655 1655 /* … … 1726 1726 * @param eflags The new EFLAGS value. 1727 1727 */ 1728 CPUMDECL(void) CPUMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t eflags)1728 VMMDECL(void) CPUMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t eflags) 1729 1729 { 1730 1730 if (!pVM->cpum.s.fRawEntered) … … 1745 1745 * @param pCtxCore The context core. 1746 1746 */ 1747 CPUMDECL(uint32_t) CPUMRawGetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore)1747 VMMDECL(uint32_t) CPUMRawGetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore) 1748 1748 { 1749 1749 #ifdef IN_RING0 … … 1764 1764 * @param pVM The VM handle. 1765 1765 */ 1766 CPUMDECL(unsigned) CPUMGetAndClearChangedFlagsREM(PVM pVM)1766 VMMDECL(unsigned) CPUMGetAndClearChangedFlagsREM(PVM pVM) 1767 1767 { 1768 1768 unsigned fFlags = pVM->cpum.s.fChanged; … … 1783 1783 * @param pVM The VM handle. 1784 1784 */ 1785 CPUMDECL(void) CPUMSetChangedFlags(PVM pVM, uint32_t fChangedFlags)1785 VMMDECL(void) CPUMSetChangedFlags(PVM pVM, uint32_t fChangedFlags) 1786 1786 { 1787 1787 pVM->cpum.s.fChanged |= fChangedFlags; … … 1795 1795 * @param pVM The VM handle. 1796 1796 */ 1797 CPUMDECL(bool) CPUMSupportsFXSR(PVM pVM)1797 VMMDECL(bool) CPUMSupportsFXSR(PVM pVM) 1798 1798 { 1799 1799 return pVM->cpum.s.CPUFeatures.edx.u1FXSR != 0; … … 1807 1807 * @param pVM The VM handle. 1808 1808 */ 1809 CPUMDECL(bool) CPUMIsHostUsingSysEnter(PVM pVM)1809 VMMDECL(bool) CPUMIsHostUsingSysEnter(PVM pVM) 1810 1810 { 1811 1811 return (pVM->cpum.s.fUseFlags & CPUM_USE_SYSENTER) != 0; … … 1819 1819 * @param pVM The VM handle. 1820 1820 */ 1821 CPUMDECL(bool) CPUMIsHostUsingSysCall(PVM pVM)1821 VMMDECL(bool) CPUMIsHostUsingSysCall(PVM pVM) 1822 1822 { 1823 1823 return (pVM->cpum.s.fUseFlags & CPUM_USE_SYSCALL) != 0; … … 1832 1832 * @param pVM VM handle. 1833 1833 */ 1834 CPUMDECL(int) CPUMHandleLazyFPU(PVM pVM)1834 VMMDECL(int) CPUMHandleLazyFPU(PVM pVM) 1835 1835 { 1836 1836 return CPUMHandleLazyFPUAsm(&pVM->cpum.s); … … 1844 1844 * @param pVM VM handle. 1845 1845 */ 1846 CPUMDECL(int) CPUMRestoreHostFPUState(PVM pVM)1846 VMMDECL(int) CPUMRestoreHostFPUState(PVM pVM) 1847 1847 { 1848 1848 Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR); … … 1858 1858 * @param pVM The VM handle. 1859 1859 */ 1860 CPUMDECL(bool) CPUMIsGuestFPUStateActive(PVM pVM)1860 VMMDECL(bool) CPUMIsGuestFPUStateActive(PVM pVM) 1861 1861 { 1862 1862 return (pVM->cpum.s.fUseFlags & CPUM_USED_FPU) != 0; … … 1868 1868 * @param pVM The VM handle. 1869 1869 */ 1870 CPUMDECL(void) CPUMDeactivateGuestFPUState(PVM pVM)1870 VMMDECL(void) CPUMDeactivateGuestFPUState(PVM pVM) 1871 1871 { 1872 1872 pVM->cpum.s.fUseFlags &= ~CPUM_USED_FPU; … … 1880 1880 * @param pVM VM handle. 1881 1881 */ 1882 CPUMDECL(bool) CPUMIsGuestDebugStateActive(PVM pVM)1882 VMMDECL(bool) CPUMIsGuestDebugStateActive(PVM pVM) 1883 1883 { 1884 1884 return (pVM->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS) != 0; … … 1892 1892 * @param pVM VM handle. 1893 1893 */ 1894 CPUMDECL(void) CPUMDeactivateGuestDebugState(PVM pVM)1894 VMMDECL(void) CPUMDeactivateGuestDebugState(PVM pVM) 1895 1895 { 1896 1896 pVM->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS; … … 1904 1904 * @param pVM The VM handle. 1905 1905 */ 1906 CPUMDECL(bool) CPUMAreHiddenSelRegsValid(PVM pVM)1906 VMMDECL(bool) CPUMAreHiddenSelRegsValid(PVM pVM) 1907 1907 { 1908 1908 return !!pVM->cpum.s.fValidHiddenSelRegs; /** @todo change fValidHiddenSelRegs to bool! */ … … 1915 1915 * @param fValid Valid or not 1916 1916 */ 1917 CPUMDECL(void) CPUMSetHiddenSelRegsValid(PVM pVM, bool fValid)1917 VMMDECL(void) CPUMSetHiddenSelRegsValid(PVM pVM, bool fValid) 1918 1918 { 1919 1919 pVM->cpum.s.fValidHiddenSelRegs = fValid; … … 1928 1928 * @param pRegFrame Trap register frame. 1929 1929 */ 1930 CPUMDECL(uint32_t) CPUMGetGuestCPL(PVM pVM, PCPUMCTXCORE pCtxCore)1930 VMMDECL(uint32_t) CPUMGetGuestCPL(PVM pVM, PCPUMCTXCORE pCtxCore) 1931 1931 { 1932 1932 uint32_t cpl; … … 1979 1979 * @param pVM The VM handle. 1980 1980 */ 1981 CPUMDECL(CPUMMODE) CPUMGetGuestMode(PVM pVM)1981 VMMDECL(CPUMMODE) CPUMGetGuestMode(PVM pVM) 1982 1982 { 1983 1983 CPUMMODE enmMode; -
trunk/src/VBox/VMM/VMMAll/DBGFAll.cpp
r12688 r12989 37 37 * @param pVM The VM handle. 38 38 */ 39 DBGFDECL(RTGCUINTREG) DBGFBpGetDR7(PVM pVM)39 VMMDECL(RTGCUINTREG) DBGFBpGetDR7(PVM pVM) 40 40 { 41 41 RTGCUINTREG uDr7 = X86_DR7_GD | X86_DR7_GE | X86_DR7_LE | X86_DR7_MB1_MASK; … … 68 68 * @param pVM The VM handle. 69 69 */ 70 DBGFDECL(RTGCUINTREG) DBGFBpGetDR0(PVM pVM)70 VMMDECL(RTGCUINTREG) DBGFBpGetDR0(PVM pVM) 71 71 { 72 72 PCDBGFBP pBp = &pVM->dbgf.s.aHwBreakpoints[0]; … … 82 82 * @param pVM The VM handle. 83 83 */ 84 DBGFDECL(RTGCUINTREG) DBGFBpGetDR1(PVM pVM)84 VMMDECL(RTGCUINTREG) DBGFBpGetDR1(PVM pVM) 85 85 { 86 86 PCDBGFBP pBp = &pVM->dbgf.s.aHwBreakpoints[1]; … … 96 96 * @param pVM The VM handle. 97 97 */ 98 DBGFDECL(RTGCUINTREG) DBGFBpGetDR2(PVM pVM)98 VMMDECL(RTGCUINTREG) DBGFBpGetDR2(PVM pVM) 99 99 { 100 100 PCDBGFBP pBp = &pVM->dbgf.s.aHwBreakpoints[2]; … … 110 110 * @param pVM The VM handle. 111 111 */ 112 DBGFDECL(RTGCUINTREG) DBGFBpGetDR3(PVM pVM)112 VMMDECL(RTGCUINTREG) DBGFBpGetDR3(PVM pVM) 113 113 { 114 114 PCDBGFBP pBp = &pVM->dbgf.s.aHwBreakpoints[3]; … … 124 124 * @param pVM The VM handle. 125 125 */ 126 DBGFDECL(bool) DBGFIsStepping(PVM pVM)126 VMMDECL(bool) DBGFIsStepping(PVM pVM) 127 127 { 128 128 return pVM->dbgf.s.fSingleSteppingRaw; -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r12801 r12989 79 79 * @returns Current status. 80 80 */ 81 EMDECL(EMSTATE) EMGetState(PVM pVM)81 VMMDECL(EMSTATE) EMGetState(PVM pVM) 82 82 { 83 83 return pVM->em.s.enmState; … … 92 92 * @todo This doesn't belong here, it should go in REMAll.cpp! 93 93 */ 94 EMDECL(void) EMFlushREMTBs(PVM pVM)94 VMMDECL(void) EMFlushREMTBs(PVM pVM) 95 95 { 96 96 Log(("EMFlushREMTBs\n")); … … 161 161 * @param pcbInstr Where to return the instruction size. (optional) 162 162 */ 163 EMDECL(int) EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr)163 VMMDECL(int) EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr) 164 164 { 165 165 RTGCPTR GCPtrInstr; … … 186 186 * @param pcbInstr Where to return the instruction size. (optional) 187 187 */ 188 EMDECL(int) EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr)188 VMMDECL(int) EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr) 189 189 { 190 190 int rc = DISCoreOneEx(GCPtrInstr, SELMGetCpuModeFromSelector(pVM, pCtxCore->eflags, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid), … … 220 220 * to worry about e.g. invalid modrm combinations (!) 221 221 */ 222 EMDECL(int) EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)222 VMMDECL(int) EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 223 223 { 224 224 RTGCPTR pbCode; … … 272 272 * Make sure this can't happen!! (will add some assertions/checks later) 273 273 */ 274 EMDECL(int) EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)274 VMMDECL(int) EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 275 275 { 276 276 STAM_PROFILE_START(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a); … … 295 295 * @remark This may raise exceptions. 296 296 */ 297 EMDECL(int) EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp)297 VMMDECL(int) EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp) 298 298 { 299 299 /* … … 1703 1703 * 1704 1704 */ 1705 EMDECL(int) EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame)1705 VMMDECL(int) EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame) 1706 1706 { 1707 1707 RTGCUINTPTR pIretStack = (RTGCUINTPTR)pRegFrame->esp; … … 1768 1768 * 1769 1769 */ 1770 EMDECL(int) EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC)1770 VMMDECL(int) EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC) 1771 1771 { 1772 1772 int rc; … … 1841 1841 * 1842 1842 */ 1843 EMDECL(int) EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame)1843 VMMDECL(int) EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame) 1844 1844 { 1845 1845 uint32_t iLeaf = pRegFrame->eax; NOREF(iLeaf); … … 1872 1872 * 1873 1873 */ 1874 EMDECL(int) EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx)1874 VMMDECL(int) EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx) 1875 1875 { 1876 1876 int rc; … … 1911 1911 * 1912 1912 */ 1913 EMDECL(int) EMInterpretLMSW(PVM pVM, uint16_t u16Data)1913 VMMDECL(int) EMInterpretLMSW(PVM pVM, uint16_t u16Data) 1914 1914 { 1915 1915 uint64_t OldCr0 = CPUMGetGuestCR0(pVM); … … 1935 1935 * 1936 1936 */ 1937 EMDECL(int) EMInterpretCLTS(PVM pVM)1937 VMMDECL(int) EMInterpretCLTS(PVM pVM) 1938 1938 { 1939 1939 uint64_t cr0 = CPUMGetGuestCR0(pVM); … … 1962 1962 * 1963 1963 */ 1964 EMDECL(int) EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen)1964 VMMDECL(int) EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen) 1965 1965 { 1966 1966 uint64_t val; … … 2123 2123 * 2124 2124 */ 2125 EMDECL(int) EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen)2125 VMMDECL(int) EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen) 2126 2126 { 2127 2127 uint64_t val; … … 2161 2161 * 2162 2162 */ 2163 EMDECL(int) EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx)2163 VMMDECL(int) EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx) 2164 2164 { 2165 2165 uint64_t val64; … … 2334 2334 * 2335 2335 */ 2336 EMDECL(int) EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame)2336 VMMDECL(int) EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame) 2337 2337 { 2338 2338 unsigned uCR4 = CPUMGetGuestCR4(pVM); … … 2484 2484 * 2485 2485 */ 2486 EMDECL(int) EMInterpretRdmsr(PVM pVM, PCPUMCTXCORE pRegFrame)2486 VMMDECL(int) EMInterpretRdmsr(PVM pVM, PCPUMCTXCORE pRegFrame) 2487 2487 { 2488 2488 uint32_t u32Dummy, u32Features, cpl; … … 2605 2605 * @param pRegFrame The register frame. 2606 2606 */ 2607 EMDECL(int) EMInterpretWrmsr(PVM pVM, PCPUMCTXCORE pRegFrame)2607 VMMDECL(int) EMInterpretWrmsr(PVM pVM, PCPUMCTXCORE pRegFrame) 2608 2608 { 2609 2609 uint32_t u32Dummy, u32Features, cpl; … … 2900 2900 * @param PC The PC. 2901 2901 */ 2902 EMDECL(void) EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC)2902 VMMDECL(void) EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC) 2903 2903 { 2904 2904 pVM->em.s.GCPtrInhibitInterrupts = PC; … … 2920 2920 * 2921 2921 */ 2922 EMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM)2922 VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM) 2923 2923 { 2924 2924 return pVM->em.s.GCPtrInhibitInterrupts; -
trunk/src/VBox/VMM/VMMAll/EMAllA.asm
r12688 r12989 48 48 ;; 49 49 ; Emulate CMP instruction, CDECL calling conv. 50 ; EMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb);50 ; VMMDECL(uint32_t) EMEmulateCmp(uint32_t u32Param1, uint64_t u64Param2, size_t cb); 51 51 ; 52 52 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 112 112 ;; 113 113 ; Emulate AND instruction, CDECL calling conv. 114 ; EMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb);114 ; VMMDECL(uint32_t) EMEmulateAnd(void *pvParam1, uint64_t u64Param2, size_t cb); 115 115 ; 116 116 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 177 177 ;; 178 178 ; Emulate OR instruction, CDECL calling conv. 179 ; EMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb);179 ; VMMDECL(uint32_t) EMEmulateOr(void *pvParam1, uint64_t u64Param2, size_t cb); 180 180 ; 181 181 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 242 242 ;; 243 243 ; Emulate LOCK OR instruction. 244 ; EMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf);244 ; VMMDECL(int) EMEmulateLockOr(void *pvParam1, uint64_t u64Param2, size_t cbSize, RTGCUINTREG32 *pf); 245 245 ; 246 246 ; @returns VINF_SUCCESS on success, VERR_ACCESS_DENIED on \#PF (GC only). … … 326 326 ;; 327 327 ; Emulate XOR instruction, CDECL calling conv. 328 ; EMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb);328 ; VMMDECL(uint32_t) EMEmulateXor(void *pvParam1, uint64_t u64Param2, size_t cb); 329 329 ; 330 330 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 391 391 ;; 392 392 ; Emulate INC instruction, CDECL calling conv. 393 ; EMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb);393 ; VMMDECL(uint32_t) EMEmulateInc(void *pvParam1, size_t cb); 394 394 ; 395 395 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 454 454 ;; 455 455 ; Emulate DEC instruction, CDECL calling conv. 456 ; EMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb);456 ; VMMDECL(uint32_t) EMEmulateDec(void *pvParam1, size_t cb); 457 457 ; 458 458 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 517 517 ;; 518 518 ; Emulate ADD instruction, CDECL calling conv. 519 ; EMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb);519 ; VMMDECL(uint32_t) EMEmulateAdd(void *pvParam1, uint64_t u64Param2, size_t cb); 520 520 ; 521 521 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 582 582 ;; 583 583 ; Emulate ADC instruction, CDECL calling conv. 584 ; EMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb);584 ; VMMDECL(uint32_t) EMEmulateAdcWithCarrySet(void *pvParam1, uint64_t u64Param2, size_t cb); 585 585 ; 586 586 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 651 651 ;; 652 652 ; Emulate SUB instruction, CDECL calling conv. 653 ; EMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb);653 ; VMMDECL(uint32_t) EMEmulateSub(void *pvParam1, uint64_t u64Param2, size_t cb); 654 654 ; 655 655 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 716 716 ;; 717 717 ; Emulate BTR instruction, CDECL calling conv. 718 ; EMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2);718 ; VMMDECL(uint32_t) EMEmulateBtr(void *pvParam1, uint64_t u64Param2); 719 719 ; 720 720 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 746 746 ;; 747 747 ; Emulate LOCK BTR instruction. 748 ; EMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf);748 ; VMMDECL(int) EMEmulateLockBtr(void *pvParam1, uint64_t u64Param2, RTGCUINTREG32 *pf); 749 749 ; 750 750 ; @returns VINF_SUCCESS on success, VERR_ACCESS_DENIED on \#PF (GC only). … … 790 790 ;; 791 791 ; Emulate BTC instruction, CDECL calling conv. 792 ; EMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2);792 ; VMMDECL(uint32_t) EMEmulateBtc(void *pvParam1, uint64_t u64Param2); 793 793 ; 794 794 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 821 821 ;; 822 822 ; Emulate BTS instruction, CDECL calling conv. 823 ; EMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2);823 ; VMMDECL(uint32_t) EMEmulateBts(void *pvParam1, uint64_t u64Param2); 824 824 ; 825 825 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 852 852 ;; 853 853 ; Emulate LOCK CMPXCHG instruction, CDECL calling conv. 854 ; EMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize);854 ; VMMDECL(uint32_t) EMEmulateLockCmpXchg(void *pvParam1, uint64_t *pu64Param2, uint64_t u64Param3, size_t cbSize); 855 855 ; 856 856 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 940 940 ;; 941 941 ; Emulate CMPXCHG instruction, CDECL calling conv. 942 ; EMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize);942 ; VMMDECL(uint32_t) EMEmulateCmpXchg(void *pvParam1, uint64_t *pu32Param2, uint64_t u32Param3, size_t cbSize); 943 943 ; 944 944 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 1031 1031 ;; 1032 1032 ; Emulate LOCK CMPXCHG8B instruction, CDECL calling conv. 1033 ; EMDECL(uint32_t) EMEmulateLockCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);1033 ; VMMDECL(uint32_t) EMEmulateLockCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX); 1034 1034 ; 1035 1035 ; @returns EFLAGS after the operation, only arithmetic flags are valid. … … 1071 1071 ;; 1072 1072 ; Emulate CMPXCHG8B instruction, CDECL calling conv. 1073 ; EMDECL(uint32_t) EMEmulateCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX);1073 ; VMMDECL(uint32_t) EMEmulateCmpXchg8b(RTHCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX); 1074 1074 ; 1075 1075 ; @returns EFLAGS after the operation, only arithmetic flags are valid. -
trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp
r12932 r12989 51 51 * @param GCVirt Page to invalidate 52 52 */ 53 HWACCMDECL(int) HWACCMInvalidatePage(PVM pVM, RTGCPTR GCVirt)53 VMMDECL(int) HWACCMInvalidatePage(PVM pVM, RTGCPTR GCVirt) 54 54 { 55 55 /** @todo Intel for nested paging */ … … 68 68 * @param pVM The VM to operate on. 69 69 */ 70 HWACCMDECL(int) HWACCMFlushTLB(PVM pVM)70 VMMDECL(int) HWACCMFlushTLB(PVM pVM) 71 71 { 72 72 /** @todo Intel for nested paging */ … … 86 86 * @param pVM The VM to operate on. 87 87 */ 88 HWACCMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM)88 VMMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM) 89 89 { 90 90 return HWACCMIsEnabled(pVM) && pVM->hwaccm.s.fNestedPaging; … … 97 97 * @param pVM The VM to operate on. 98 98 */ 99 HWACCMDECL(PGMMODE) HWACCMGetPagingMode(PVM pVM)99 VMMDECL(PGMMODE) HWACCMGetPagingMode(PVM pVM) 100 100 { 101 101 Assert(HWACCMIsNestedPagingActive(pVM)); … … 115 115 * @param GCPhys Page to invalidate 116 116 */ 117 HWACCMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys)117 VMMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys) 118 118 { 119 119 if (!HWACCMIsNestedPagingActive(pVM)) … … 138 138 * @param pVM The VM to operate on. 139 139 */ 140 HWACCMDECL(bool) HWACCMHasPendingIrq(PVM pVM)140 VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM) 141 141 { 142 142 return !!pVM->hwaccm.s.Event.fPending; -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r12772 r12989 205 205 * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes. 206 206 */ 207 IOMDECL(int) IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)207 VMMDECL(int) IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue) 208 208 { 209 209 #ifdef VBOX_WITH_STATISTICS … … 346 346 * @param cb Size of the transfer unit (1, 2 or 4 bytes). 347 347 * */ 348 IOMDECL(int) IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb)348 VMMDECL(int) IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb) 349 349 { 350 350 #ifdef LOG_ENABLED … … 468 468 * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes. 469 469 */ 470 IOMDECL(int) IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue)470 VMMDECL(int) IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue) 471 471 { 472 472 /** @todo bird: When I get time, I'll remove the GC tree and link the GC entries to the ring-3 node. */ … … 587 587 * @param cb Size of the transfer unit (1, 2 or 4 bytes). 588 588 * */ 589 IOMDECL(int) IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb)589 VMMDECL(int) IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb) 590 590 { 591 591 #ifdef LOG_ENABLED … … 709 709 * @param cb The access size. 710 710 */ 711 IOMDECL(int) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb)711 VMMDECL(int) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb) 712 712 { 713 713 /* … … 807 807 * @param pCpu Disassembler CPU state. 808 808 */ 809 IOMDECL(int) IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)809 VMMDECL(int) IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 810 810 { 811 811 #ifdef IN_GC … … 866 866 * @param pCpu Disassembler CPU state. 867 867 */ 868 IOMDECL(int) IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)868 VMMDECL(int) IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 869 869 { 870 870 #ifdef IN_GC -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r12772 r12989 1014 1014 * @param pvUser Pointer to the MMIO ring-3 range entry. 1015 1015 */ 1016 IOMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)1016 VMMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 1017 1017 { 1018 1018 STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a); … … 1241 1241 * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes. 1242 1242 */ 1243 IOMDECL(int) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)1243 VMMDECL(int) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue) 1244 1244 { 1245 1245 /* … … 1346 1346 * @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes. 1347 1347 */ 1348 IOMDECL(int) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)1348 VMMDECL(int) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue) 1349 1349 { 1350 1350 /* … … 1428 1428 * @param cbTransfer Size of transfer unit 1429 1429 */ 1430 IOMDECL(int) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)1430 VMMDECL(int) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer) 1431 1431 { 1432 1432 #ifdef VBOX_WITH_STATISTICS … … 1543 1543 * @param pCpu Disassembler CPU state. 1544 1544 */ 1545 IOMDECL(int) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)1545 VMMDECL(int) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 1546 1546 { 1547 1547 /* … … 1589 1589 * @param cbTransfer Size of transfer unit 1590 1590 */ 1591 IOMDECL(int) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)1591 VMMDECL(int) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer) 1592 1592 { 1593 1593 #ifdef VBOX_WITH_STATISTICS … … 1706 1706 * @param pCpu Disassembler CPU state. 1707 1707 */ 1708 IOMDECL(int) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)1708 VMMDECL(int) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 1709 1709 { 1710 1710 /* -
trunk/src/VBox/VMM/VMMAll/MMAll.cpp
r12967 r12989 274 274 * @thread The Emulation Thread. 275 275 */ 276 MMDECL(RTR3PTR) MMHyperR0ToR3(PVM pVM, RTR0PTR R0Ptr)276 VMMDECL(RTR3PTR) MMHyperR0ToR3(PVM pVM, RTR0PTR R0Ptr) 277 277 { 278 278 uint32_t off; … … 293 293 * @thread The Emulation Thread. 294 294 */ 295 MMDECL(RTRCPTR) MMHyperR0ToRC(PVM pVM, RTR0PTR R0Ptr)295 VMMDECL(RTRCPTR) MMHyperR0ToRC(PVM pVM, RTR0PTR R0Ptr) 296 296 { 297 297 uint32_t off; … … 313 313 * @thread The Emulation Thread. 314 314 */ 315 MMDECL(void *) MMHyperR0ToCC(PVM pVM, RTR0PTR R0Ptr)315 VMMDECL(void *) MMHyperR0ToCC(PVM pVM, RTR0PTR R0Ptr) 316 316 { 317 317 uint32_t off; … … 333 333 * @thread The Emulation Thread. 334 334 */ 335 MMDECL(RTR0PTR) MMHyperR3ToR0(PVM pVM, RTR3PTR R3Ptr)335 VMMDECL(RTR0PTR) MMHyperR3ToR0(PVM pVM, RTR3PTR R3Ptr) 336 336 { 337 337 uint32_t off; … … 353 353 * @thread The Emulation Thread. 354 354 */ 355 MMDECL(RTRCPTR) MMHyperR3ToRC(PVM pVM, RTR3PTR R3Ptr)355 VMMDECL(RTRCPTR) MMHyperR3ToRC(PVM pVM, RTR3PTR R3Ptr) 356 356 { 357 357 uint32_t off; … … 374 374 */ 375 375 #ifndef IN_RING3 376 MMDECL(void *) MMHyperR3ToCC(PVM pVM, RTR3PTR R3Ptr)376 VMMDECL(void *) MMHyperR3ToCC(PVM pVM, RTR3PTR R3Ptr) 377 377 { 378 378 uint32_t off; … … 394 394 * @thread The Emulation Thread. 395 395 */ 396 MMDECL(RTR3PTR) MMHyperRCToR3(PVM pVM, RTRCPTR RCPtr)396 VMMDECL(RTR3PTR) MMHyperRCToR3(PVM pVM, RTRCPTR RCPtr) 397 397 { 398 398 uint32_t off; … … 413 413 * @thread The Emulation Thread. 414 414 */ 415 MMDECL(RTR0PTR) MMHyperRCToR0(PVM pVM, RTRCPTR RCPtr)415 VMMDECL(RTR0PTR) MMHyperRCToR0(PVM pVM, RTRCPTR RCPtr) 416 416 { 417 417 uint32_t off; … … 433 433 */ 434 434 #ifndef IN_GC 435 MMDECL(void *) MMHyperRCToCC(PVM pVM, RTRCPTR RCPtr)435 VMMDECL(void *) MMHyperRCToCC(PVM pVM, RTRCPTR RCPtr) 436 436 { 437 437 uint32_t off; … … 455 455 */ 456 456 #ifndef IN_RING3 457 MMDECL(RTR3PTR) MMHyperCCToR3(PVM pVM, void *pv)457 VMMDECL(RTR3PTR) MMHyperCCToR3(PVM pVM, void *pv) 458 458 { 459 459 uint32_t off; … … 475 475 */ 476 476 #ifndef IN_RING0 477 MMDECL(RTR0PTR) MMHyperCCToR0(PVM pVM, void *pv)477 VMMDECL(RTR0PTR) MMHyperCCToR0(PVM pVM, void *pv) 478 478 { 479 479 uint32_t off; … … 496 496 */ 497 497 #ifndef IN_GC 498 MMDECL(RTRCPTR) MMHyperCCToRC(PVM pVM, void *pv)498 VMMDECL(RTRCPTR) MMHyperCCToRC(PVM pVM, void *pv) 499 499 { 500 500 uint32_t off; -
trunk/src/VBox/VMM/VMMAll/MMAllHyper.cpp
r12968 r12989 168 168 * @remark This is assumed not to be used at times when serialization is required. 169 169 */ 170 MMDECL(int) MMHyperAlloc(PVM pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv)170 VMMDECL(int) MMHyperAlloc(PVM pVM, size_t cb, unsigned uAlignment, MMTAG enmTag, void **ppv) 171 171 { 172 172 AssertMsg(cb >= 8, ("Hey! Do you really mean to allocate less than 8 bytes?! cb=%d\n", cb)); … … 705 705 * @remark Try avoid free hyper memory. 706 706 */ 707 MMDECL(int) MMHyperFree(PVM pVM, void *pv)707 VMMDECL(int) MMHyperFree(PVM pVM, void *pv) 708 708 { 709 709 Log2(("MMHyperFree: pv=%p\n", pv)); … … 1114 1114 * @param pVM Pointer to the shared VM structure. 1115 1115 */ 1116 MMDECL(void) MMHyperHeapCheck(PVM pVM)1116 VMMDECL(void) MMHyperHeapCheck(PVM pVM) 1117 1117 { 1118 1118 #ifdef MMHYPER_HEAP_STRICT … … 1127 1127 * @param pVM VM Handle. 1128 1128 */ 1129 MMDECL(void) MMHyperHeapDump(PVM pVM)1129 VMMDECL(void) MMHyperHeapDump(PVM pVM) 1130 1130 { 1131 1131 Log(("MMHyperHeapDump: *** heap dump - start ***\n")); … … 1151 1151 * @returns Number of free bytes in the hypervisor heap. 1152 1152 */ 1153 MMDECL(size_t) MMHyperHeapGetFreeSize(PVM pVM)1153 VMMDECL(size_t) MMHyperHeapGetFreeSize(PVM pVM) 1154 1154 { 1155 1155 return pVM->mm.s.CTX_SUFF(pHyperHeap)->cbFree; … … 1161 1161 * @returns The size of the hypervisor heap in bytes. 1162 1162 */ 1163 MMDECL(size_t) MMHyperHeapGetSize(PVM pVM)1163 VMMDECL(size_t) MMHyperHeapGetSize(PVM pVM) 1164 1164 { 1165 1165 return pVM->mm.s.CTX_SUFF(pHyperHeap)->cbHeap; … … 1174 1174 * @param pcb Where to store the size of the hypervisor area. (out) 1175 1175 */ 1176 MMDECL(RTGCPTR) MMHyperGetArea(PVM pVM, size_t *pcb)1176 VMMDECL(RTGCPTR) MMHyperGetArea(PVM pVM, size_t *pcb) 1177 1177 { 1178 1178 if (pcb) … … 1190 1190 * @param GCPtr The pointer to check. 1191 1191 */ 1192 MMDECL(bool) MMHyperIsInsideArea(PVM pVM, RTGCPTR GCPtr)1192 VMMDECL(bool) MMHyperIsInsideArea(PVM pVM, RTGCPTR GCPtr) 1193 1193 { 1194 1194 return (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pVM->mm.s.pvHyperAreaGC < pVM->mm.s.cbHyperArea; -
trunk/src/VBox/VMM/VMMAll/MMAllPagePool.cpp
r12968 r12989 54 54 * @thread The Emulation Thread. 55 55 */ 56 MMDECL(RTHCPHYS) mmPagePoolPtr2Phys(PMMPAGEPOOL pPool, void *pv)56 VMMDECL(RTHCPHYS) mmPagePoolPtr2Phys(PMMPAGEPOOL pPool, void *pv) 57 57 { 58 58 #ifdef IN_RING3 … … 93 93 * @thread The Emulation Thread. 94 94 */ 95 MMDECL(void *) mmPagePoolPhys2Ptr(PMMPAGEPOOL pPool, RTHCPHYS HCPhys)95 VMMDECL(void *) mmPagePoolPhys2Ptr(PMMPAGEPOOL pPool, RTHCPHYS HCPhys) 96 96 { 97 97 #if 0 /** @todo have to fix the debugger, but until then this is going on my nerves. */ … … 127 127 * @thread The Emulation Thread. 128 128 */ 129 MMDECL(RTHCPHYS) MMPage2Phys(PVM pVM, void *pvPage)129 VMMDECL(RTHCPHYS) MMPage2Phys(PVM pVM, void *pvPage) 130 130 { 131 131 RTHCPHYS HCPhys = mmPagePoolPtr2Phys(pVM->mm.s.CTX_SUFF(pPagePool), pvPage); … … 153 153 * @thread The Emulation Thread. 154 154 */ 155 MMDECL(void *) MMPagePhys2Page(PVM pVM, RTHCPHYS HCPhysPage)155 VMMDECL(void *) MMPagePhys2Page(PVM pVM, RTHCPHYS HCPhysPage) 156 156 { 157 157 void *pvPage = mmPagePoolPhys2Ptr(pVM->mm.s.CTX_SUFF(pPagePool), HCPhysPage); … … 180 180 * @thread The Emulation Thread. 181 181 */ 182 MMDECL(int) MMPagePhys2PageEx(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage)182 VMMDECL(int) MMPagePhys2PageEx(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage) 183 183 { 184 184 void *pvPage = mmPagePoolPhys2Ptr(pVM->mm.s.CTX_SUFF(pPagePool), HCPhysPage); … … 209 209 * @thread The Emulation Thread. 210 210 */ 211 MMDECL(int) MMPagePhys2PageTry(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage)211 VMMDECL(int) MMPagePhys2PageTry(PVM pVM, RTHCPHYS HCPhysPage, void **ppvPage) 212 212 { 213 213 void *pvPage = mmPagePoolPhys2Ptr(pVM->mm.s.CTX_SUFF(pPagePool), HCPhysPage); -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r12687 r12989 43 43 * @param pu8Interrupt Where to store the interrupt on success. 44 44 */ 45 PDMDECL(int) PDMGetInterrupt(PVM pVM, uint8_t *pu8Interrupt)45 VMMDECL(int) PDMGetInterrupt(PVM pVM, uint8_t *pu8Interrupt) 46 46 { 47 47 pdmLock(pVM); … … 98 98 * @param u8Level The new level. 99 99 */ 100 PDMDECL(int) PDMIsaSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level)100 VMMDECL(int) PDMIsaSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level) 101 101 { 102 102 pdmLock(pVM); … … 130 130 * @param u8Level The new level. 131 131 */ 132 PDMDECL(int) PDMIoApicSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level)132 VMMDECL(int) PDMIoApicSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level) 133 133 { 134 134 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns)) … … 151 151 * @param u64Base The new base. 152 152 */ 153 PDMDECL(int) PDMApicSetBase(PVM pVM, uint64_t u64Base)153 VMMDECL(int) PDMApicSetBase(PVM pVM, uint64_t u64Base) 154 154 { 155 155 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns)) … … 172 172 * @param pu64Base Where to store the APIC base. 173 173 */ 174 PDMDECL(int) PDMApicGetBase(PVM pVM, uint64_t *pu64Base)174 VMMDECL(int) PDMApicGetBase(PVM pVM, uint64_t *pu64Base) 175 175 { 176 176 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns)) … … 194 194 * @param pfPending Pending state (out). 195 195 */ 196 PDMDECL(int) PDMApicHasPendingIrq(PVM pVM, bool *pfPending)196 VMMDECL(int) PDMApicHasPendingIrq(PVM pVM, bool *pfPending) 197 197 { 198 198 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns)) … … 215 215 * @param u8TPR The new TPR. 216 216 */ 217 PDMDECL(int) PDMApicSetTPR(PVM pVM, uint8_t u8TPR)217 VMMDECL(int) PDMApicSetTPR(PVM pVM, uint8_t u8TPR) 218 218 { 219 219 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns)) … … 237 237 * @param pfPending Pending interrupt state (out). 238 238 */ 239 PDMDECL(int) PDMApicGetTPR(PVM pVM, uint8_t *pu8TPR, bool *pfPending)239 VMMDECL(int) PDMApicGetTPR(PVM pVM, uint8_t *pu8TPR, bool *pfPending) 240 240 { 241 241 if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns)) … … 312 312 * @param pGCPhys GC phys address (out). 313 313 */ 314 PDMDECL(int) PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys)314 VMMDECL(int) PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys) 315 315 { 316 316 AssertReturn(pv >= pVM->pdm.s.pvVMMDevHeap && (RTR3UINTPTR)pv < (RTR3UINTPTR)pVM->pdm.s.pvVMMDevHeap + pVM->pdm.s.cbVMMDevHeap, VERR_INVALID_PARAMETER); -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp
r12983 r12989 50 50 * and the section is busy. 51 51 */ 52 PDMDECL(int) PDMCritSectEnter(PPDMCRITSECT pCritSect, int rcBusy)52 VMMDECL(int) PDMCritSectEnter(PPDMCRITSECT pCritSect, int rcBusy) 53 53 { 54 54 Assert(pCritSect->s.Core.cNestings < 8); /* useful to catch incorrect locking */ … … 109 109 * @param fCallHost Whether this is a VMMGCCallHost() or VMMR0CallHost() request. 110 110 */ 111 PDMR3DECL(int) PDMR3CritSectEnterEx(PPDMCRITSECT pCritSect, bool fCallHost)111 VMMR3DECL(int) PDMR3CritSectEnterEx(PPDMCRITSECT pCritSect, bool fCallHost) 112 112 { 113 113 int rc = PDMCritSectEnter(pCritSect, VERR_INTERNAL_ERROR); … … 129 129 * @param pCritSect The PDM critical section to leave. 130 130 */ 131 PDMDECL(void) PDMCritSectLeave(PPDMCRITSECT pCritSect)131 VMMDECL(void) PDMCritSectLeave(PPDMCRITSECT pCritSect) 132 132 { 133 133 #ifdef IN_RING3 … … 210 210 * @param pCritSect The critical section. 211 211 */ 212 PDMDECL(bool) PDMCritSectIsOwner(PCPDMCRITSECT pCritSect)212 VMMDECL(bool) PDMCritSectIsOwner(PCPDMCRITSECT pCritSect) 213 213 { 214 214 #ifdef IN_RING3 … … 229 229 * @param pCritSect The critical section. 230 230 */ 231 PDMDECL(bool) PDMCritSectIsInitialized(PCPDMCRITSECT pCritSect)231 VMMDECL(bool) PDMCritSectIsInitialized(PCPDMCRITSECT pCritSect) 232 232 { 233 233 return pCritSect->s.Core.u32Magic == RTCRITSECT_MAGIC; -
trunk/src/VBox/VMM/VMMAll/PDMAllQueue.cpp
r12986 r12989 48 48 * @thread Any thread. 49 49 */ 50 PDMDECL(PPDMQUEUEITEMCORE) PDMQueueAlloc(PPDMQUEUE pQueue)50 VMMDECL(PPDMQUEUEITEMCORE) PDMQueueAlloc(PPDMQUEUE pQueue) 51 51 { 52 52 Assert(VALID_PTR(pQueue) && pQueue->CTX_SUFF(pVM)); … … 75 75 * @thread Any thread. 76 76 */ 77 PDMDECL(void) PDMQueueInsert(PPDMQUEUE pQueue, PPDMQUEUEITEMCORE pItem)77 VMMDECL(void) PDMQueueInsert(PPDMQUEUE pQueue, PPDMQUEUEITEMCORE pItem) 78 78 { 79 79 Assert(VALID_PTR(pQueue) && pQueue->CTX_SUFF(pVM)); … … 111 111 * @thread Any thread. 112 112 */ 113 PDMDECL(void) PDMQueueInsertEx(PPDMQUEUE pQueue, PPDMQUEUEITEMCORE pItem, uint64_t NanoMaxDelay)113 VMMDECL(void) PDMQueueInsertEx(PPDMQUEUE pQueue, PPDMQUEUEITEMCORE pItem, uint64_t NanoMaxDelay) 114 114 { 115 115 PDMQueueInsert(pQueue, pItem); … … 138 138 * @param pQueue The queue handle. 139 139 */ 140 PDMDECL(RCPTRTYPE(PPDMQUEUE)) PDMQueueRCPtr(PPDMQUEUE pQueue)140 VMMDECL(RCPTRTYPE(PPDMQUEUE)) PDMQueueRCPtr(PPDMQUEUE pQueue) 141 141 { 142 142 Assert(VALID_PTR(pQueue)); … … 157 157 * @param pQueue The queue handle. 158 158 */ 159 PDMDECL(R0PTRTYPE(PPDMQUEUE)) PDMQueueR0Ptr(PPDMQUEUE pQueue)159 VMMDECL(R0PTRTYPE(PPDMQUEUE)) PDMQueueR0Ptr(PPDMQUEUE pQueue) 160 160 { 161 161 Assert(VALID_PTR(pQueue)); … … 174 174 * @param pQueue The queue handle. 175 175 */ 176 PDMDECL(void) PDMQueueFlush(PPDMQUEUE pQueue)176 VMMDECL(void) PDMQueueFlush(PPDMQUEUE pQueue) 177 177 { 178 178 Assert(VALID_PTR(pQueue)); -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r12936 r12989 348 348 * @param pvFault The fault address. 349 349 */ 350 PGMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)350 VMMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 351 351 { 352 352 LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%VGv eip=%VGv\n", uErr, pvFault, pRegFrame->rip)); … … 419 419 * @param GCPtrPage Page to invalidate. 420 420 */ 421 PGMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage)421 VMMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage) 422 422 { 423 423 STAM_PROFILE_START(&pVM->pgm.s.StatHCPrefetch, a); … … 467 467 * @param fAccess Access type (r/w, user/supervisor (X86_PTE_*)) 468 468 */ 469 PGMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess)469 VMMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess) 470 470 { 471 471 /* … … 519 519 * @param fAccess Access type (r/w, user/supervisor (X86_PTE_*)) 520 520 */ 521 PGMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess)521 VMMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess) 522 522 { 523 523 /* … … 628 628 * @todo Flush page or page directory only if necessary! 629 629 */ 630 PGMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage)630 VMMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage) 631 631 { 632 632 int rc; … … 684 684 * @param pvFault Fault address. 685 685 */ 686 PGMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)686 VMMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 687 687 { 688 688 uint32_t cb; … … 707 707 * @remark You should use PGMMapGetPage() for pages in a mapping. 708 708 */ 709 PGMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)709 VMMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys) 710 710 { 711 711 return PGM_SHW_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, pfFlags, pHCPhys); … … 723 723 * @remark You must use PGMMapSetPage() for pages in a mapping. 724 724 */ 725 PGMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)725 VMMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags) 726 726 { 727 727 return PGMShwModifyPage(pVM, GCPtr, cb, fFlags, 0); … … 743 743 * @remark You must use PGMMapModifyPage() for pages in a mapping. 744 744 */ 745 PGMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)745 VMMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask) 746 746 { 747 747 /* … … 782 782 * @param ppPD Receives address of page directory 783 783 */ 784 PGMDECL(int) PGMShwSyncPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD)784 VMMDECL(int) PGMShwSyncPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD) 785 785 { 786 786 PPGM pPGM = &pVM->pgm.s; … … 834 834 * @param ppPD Receives address of page directory 835 835 */ 836 PGMDECL(int) PGMShwGetPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD)836 VMMDECL(int) PGMShwGetPAEPDPtr(PVM pVM, RTGCUINTPTR GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD) 837 837 { 838 838 PPGM pPGM = &pVM->pgm.s; … … 869 869 * @param ppPD Receives address of page directory 870 870 */ 871 PGMDECL(int) PGMShwSyncLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD)871 VMMDECL(int) PGMShwSyncLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD) 872 872 { 873 873 PPGM pPGM = &pVM->pgm.s; … … 971 971 * @param ppPD Receives address of page directory 972 972 */ 973 PGMDECL(int) PGMShwGetLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD)973 VMMDECL(int) PGMShwGetLongModePDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD) 974 974 { 975 975 PPGM pPGM = &pVM->pgm.s; … … 1005 1005 /** 1006 1006 * Syncs the SHADOW EPT page directory pointer for the specified address. Allocates 1007 * backing pages in case the PDPT or PML4 entry is missing. 1007 * backing pages in case the PDPT or PML4 entry is missing. 1008 1008 * 1009 1009 * @returns VBox status. … … 1013 1013 * @param ppPD Receives address of page directory 1014 1014 */ 1015 PGMDECL(int) PGMShwGetEPTPDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD)1015 VMMDECL(int) PGMShwGetEPTPDPtr(PVM pVM, RTGCUINTPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD) 1016 1016 { 1017 1017 PPGM pPGM = &pVM->pgm.s; … … 1105 1105 * This is page aligned. The fact that the 1106 1106 */ 1107 PGMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)1107 VMMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys) 1108 1108 { 1109 1109 return PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, pfFlags, pGCPhys); … … 1119 1119 * @param GCPtr Address within the page. 1120 1120 */ 1121 PGMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr)1121 VMMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr) 1122 1122 { 1123 1123 int rc = PGMGstGetPage(pVM, GCPtr, NULL, NULL); … … 1135 1135 * @param fFlags Page flags X86_PTE_*, excluding the page mask of course. 1136 1136 */ 1137 PGMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)1137 VMMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags) 1138 1138 { 1139 1139 return PGMGstModifyPage(pVM, GCPtr, cb, fFlags, 0); … … 1154 1154 * Be very CAREFUL when ~'ing constants which could be 32-bit! 1155 1155 */ 1156 PGMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)1156 VMMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask) 1157 1157 { 1158 1158 STAM_PROFILE_START(&CTXMID(pVM->pgm.s.Stat,GstModifyPage), a); … … 1199 1199 * @param pVM The VM handle. 1200 1200 */ 1201 PGMDECL(RTHCPHYS) PGMGetHyperCR3(PVM pVM)1201 VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVM pVM) 1202 1202 { 1203 1203 PGMMODE enmShadowMode = pVM->pgm.s.enmShadowMode; … … 1232 1232 * @param pVM The VM handle. 1233 1233 */ 1234 PGMDECL(RTHCPHYS) PGMGetNestedCR3(PVM pVM, PGMMODE enmShadowMode)1234 VMMDECL(RTHCPHYS) PGMGetNestedCR3(PVM pVM, PGMMODE enmShadowMode) 1235 1235 { 1236 1236 switch (enmShadowMode) … … 1259 1259 * @param pVM The VM handle. 1260 1260 */ 1261 PGMDECL(RTHCPHYS) PGMGetHyper32BitCR3(PVM pVM)1261 VMMDECL(RTHCPHYS) PGMGetHyper32BitCR3(PVM pVM) 1262 1262 { 1263 1263 return pVM->pgm.s.HCPhys32BitPD; … … 1270 1270 * @param pVM The VM handle. 1271 1271 */ 1272 PGMDECL(RTHCPHYS) PGMGetHyperPaeCR3(PVM pVM)1272 VMMDECL(RTHCPHYS) PGMGetHyperPaeCR3(PVM pVM) 1273 1273 { 1274 1274 return pVM->pgm.s.HCPhysPaePDPT; … … 1281 1281 * @param pVM The VM handle. 1282 1282 */ 1283 PGMDECL(RTHCPHYS) PGMGetHyperAmd64CR3(PVM pVM)1283 VMMDECL(RTHCPHYS) PGMGetHyperAmd64CR3(PVM pVM) 1284 1284 { 1285 1285 return pVM->pgm.s.HCPhysPaePML4; … … 1292 1292 * @param pVM The VM handle. 1293 1293 */ 1294 PGMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM)1294 VMMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM) 1295 1295 { 1296 1296 switch (pVM->pgm.s.enmHostMode) … … 1324 1324 * @param pVM The VM handle. 1325 1325 */ 1326 PGMDECL(RTHCPHYS) PGMGetInterGCCR3(PVM pVM)1326 VMMDECL(RTHCPHYS) PGMGetInterGCCR3(PVM pVM) 1327 1327 { 1328 1328 switch (pVM->pgm.s.enmShadowMode) … … 1355 1355 * @param pVM The VM handle. 1356 1356 */ 1357 PGMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM)1357 VMMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM) 1358 1358 { 1359 1359 return pVM->pgm.s.HCPhysInterPD; … … 1366 1366 * @param pVM The VM handle. 1367 1367 */ 1368 PGMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM)1368 VMMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM) 1369 1369 { 1370 1370 return pVM->pgm.s.HCPhysInterPaePDPT; … … 1377 1377 * @param pVM The VM handle. 1378 1378 */ 1379 PGMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM)1379 VMMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM) 1380 1380 { 1381 1381 return pVM->pgm.s.HCPhysInterPaePML4; … … 1395 1395 * @param fGlobal Indicates whether this is a global flush or not. 1396 1396 */ 1397 PGMDECL(int) PGMFlushTLB(PVM pVM, uint64_t cr3, bool fGlobal)1397 VMMDECL(int) PGMFlushTLB(PVM pVM, uint64_t cr3, bool fGlobal) 1398 1398 { 1399 1399 STAM_PROFILE_START(&pVM->pgm.s.StatFlushTLB, a); … … 1466 1466 * @param cr3 The new cr3. 1467 1467 */ 1468 PGMDECL(int) PGMUpdateCR3(PVM pVM, uint64_t cr3)1468 VMMDECL(int) PGMUpdateCR3(PVM pVM, uint64_t cr3) 1469 1469 { 1470 1470 LogFlow(("PGMUpdateCR3: cr3=%VX64 OldCr3=%VX64\n", cr3, pVM->pgm.s.GCPhysCR3)); … … 1510 1510 * @param fGlobal Including global page directories or not 1511 1511 */ 1512 PGMDECL(int) PGMSyncCR3(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)1512 VMMDECL(int) PGMSyncCR3(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal) 1513 1513 { 1514 1514 /* … … 1582 1582 * @param efer The new extended feature enable register. 1583 1583 */ 1584 PGMDECL(int) PGMChangeMode(PVM pVM, uint64_t cr0, uint64_t cr4, uint64_t efer)1584 VMMDECL(int) PGMChangeMode(PVM pVM, uint64_t cr0, uint64_t cr4, uint64_t efer) 1585 1585 { 1586 1586 PGMMODE enmGuestMode; … … 1636 1636 * @param pVM The VM handle. 1637 1637 */ 1638 PGMDECL(PGMMODE) PGMGetGuestMode(PVM pVM)1638 VMMDECL(PGMMODE) PGMGetGuestMode(PVM pVM) 1639 1639 { 1640 1640 return pVM->pgm.s.enmGuestMode; … … 1648 1648 * @param pVM The VM handle. 1649 1649 */ 1650 PGMDECL(PGMMODE) PGMGetShadowMode(PVM pVM)1650 VMMDECL(PGMMODE) PGMGetShadowMode(PVM pVM) 1651 1651 { 1652 1652 return pVM->pgm.s.enmShadowMode; … … 1659 1659 * @param pVM The VM handle. 1660 1660 */ 1661 PGMDECL(PGMMODE) PGMGetHostMode(PVM pVM)1661 VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM) 1662 1662 { 1663 1663 switch (pVM->pgm.s.enmHostMode) … … 1696 1696 * @param enmMode The mode which name is desired. 1697 1697 */ 1698 PGMDECL(const char *) PGMGetModeName(PGMMODE enmMode)1698 VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode) 1699 1699 { 1700 1700 switch (enmMode) … … 1755 1755 * @param pVM The VM Handle. 1756 1756 */ 1757 PGMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM)1757 VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM) 1758 1758 { 1759 1759 unsigned cErrors = 0; … … 1797 1797 * @param cr4 The current guest CR4 register value. 1798 1798 */ 1799 PGMDECL(unsigned) PGMAssertCR3(PVM pVM, uint64_t cr3, uint64_t cr4)1799 VMMDECL(unsigned) PGMAssertCR3(PVM pVM, uint64_t cr3, uint64_t cr4) 1800 1800 { 1801 1801 STAM_PROFILE_START(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a); -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r12964 r12989 3581 3581 */ 3582 3582 __BEGIN_DECLS 3583 PGMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint32_t cr3, uint32_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp);3583 VMMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint32_t cr3, uint32_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp); 3584 3584 __END_DECLS 3585 3585 -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r11309 r12989 79 79 * @param pszDesc Pointer to description string. This must not be freed. 80 80 */ 81 PGMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,81 VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 82 82 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 83 83 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, … … 284 284 * @param GCPhys Start physical address. 285 285 */ 286 PGMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)286 VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys) 287 287 { 288 288 /* … … 485 485 * @param GCPhysLast New last location. 486 486 */ 487 PGMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)487 VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast) 488 488 { 489 489 /* … … 597 597 * @param pszDesc Pointer to description string. This must not be freed. 598 598 */ 599 PGMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,599 VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys, 600 600 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 601 601 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, … … 641 641 * @param GCPhysSplit The split address. 642 642 */ 643 PGMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)643 VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit) 644 644 { 645 645 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER); … … 707 707 * @param GCPhys2 Start physical address of the second handler. 708 708 */ 709 PGMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)709 VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2) 710 710 { 711 711 /* … … 784 784 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister(). 785 785 */ 786 PGMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)786 VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys) 787 787 { 788 788 pgmLock(pVM); … … 864 864 * @param GCPhysPage Physical address of the page to turn off access monitoring for. 865 865 */ 866 PGMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)866 VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage) 867 867 { 868 868 /* … … 918 918 * @param GCPhysPage Physical address of the page to turn on access monitoring for. 919 919 */ 920 PGMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)920 VMMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage) 921 921 { 922 922 /* … … 963 963 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister(). 964 964 */ 965 PGMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)965 VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys) 966 966 { 967 967 /* … … 1335 1335 * @param pVM The VM handle. 1336 1336 */ 1337 PGMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)1337 VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM) 1338 1338 { 1339 1339 PPGM pPGM = &pVM->pgm.s; -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r11311 r12989 45 45 * @param fFlags Page flags (X86_PTE_*). 46 46 */ 47 PGMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags)47 VMMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags) 48 48 { 49 49 AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n")); … … 125 125 * @param fFlags Page flags X86_PTE_*, excluding the page mask of course. 126 126 */ 127 PGMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags)127 VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags) 128 128 { 129 129 return PGMMapModifyPage(pVM, GCPtr, cb, fFlags, 0); … … 143 143 * @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course. 144 144 */ 145 PGMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)145 VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask) 146 146 { 147 147 /* -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r12964 r12989 69 69 * @param pvUser User argument. Pointer to the ROM range structure. 70 70 */ 71 PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)71 VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser) 72 72 { 73 73 int rc; … … 136 136 * @param pVM VM handle. 137 137 */ 138 PGMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)138 VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM) 139 139 { 140 140 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled)); … … 151 151 * @param GCPhys The physical address to validate. 152 152 */ 153 PGMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)153 VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys) 154 154 { 155 155 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys); … … 167 167 * @param GCPhys The physical address to check. 168 168 */ 169 PGMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)169 VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys) 170 170 { 171 171 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys); … … 188 188 * @param pHCPhys Where to store the HC physical address on success. 189 189 */ 190 PGMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)190 VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys) 191 191 { 192 192 PPGMPAGE pPage; … … 210 210 * @param pVM The VM handle. 211 211 */ 212 PDMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)212 VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM) 213 213 { 214 214 /* later */ … … 222 222 * @param pVM The VM handle. 223 223 */ 224 PDMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)224 VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM) 225 225 { 226 226 PGMPhysInvalidatePageR3MapTLB(pVM); … … 233 233 * @param pVM The VM handle. 234 234 */ 235 PDMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)235 VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM) 236 236 { 237 237 pgmLock(pVM); … … 641 641 * @thread Any thread. 642 642 */ 643 PGMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)643 VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock) 644 644 { 645 645 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 727 727 * @thread Any thread. 728 728 */ 729 PGMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)729 VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock) 730 730 { 731 731 /** @todo implement this */ … … 761 761 * @thread EMT 762 762 */ 763 PGMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)763 VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock) 764 764 { 765 765 RTGCPHYS GCPhys; … … 794 794 * @thread EMT 795 795 */ 796 PGMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)796 VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock) 797 797 { 798 798 RTGCPHYS GCPhys; … … 813 813 * @param pLock The lock structure initialized by the mapping function. 814 814 */ 815 PGMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)815 VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock) 816 816 { 817 817 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 859 859 * @param pHCPtr Where to store the HC pointer on success. 860 860 */ 861 PGMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr)861 VMMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr) 862 862 { 863 863 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 911 911 * @param cbRange Physical range. 912 912 */ 913 PGMDECL(RTHCPTR) PGMPhysGCPhys2HCPtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)913 VMMDECL(RTHCPTR) PGMPhysGCPhys2HCPtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange) 914 914 { 915 915 RTHCPTR HCPtr; … … 931 931 * @param pGCPhys Where to store the GC physical address. 932 932 */ 933 PGMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)933 VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys) 934 934 { 935 935 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys); … … 950 950 * @param pHCPhys Where to store the HC physical address. 951 951 */ 952 PGMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)952 VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys) 953 953 { 954 954 RTGCPHYS GCPhys; … … 970 970 * @param pHCPtr Where to store the HC virtual address. 971 971 */ 972 PGMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr)972 VMMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr) 973 973 { 974 974 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 998 998 * future DBGF API to cpu state independent conversions. 999 999 */ 1000 PGMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr)1000 VMMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr) 1001 1001 { 1002 1002 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 1131 1131 * @param cbRead How many bytes to read. 1132 1132 */ 1133 PGMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)1133 VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead) 1134 1134 { 1135 1135 #ifdef IN_RING3 … … 1392 1392 * @param cbWrite How many bytes to write. 1393 1393 */ 1394 PGMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)1394 VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite) 1395 1395 { 1396 1396 #ifdef IN_RING3 … … 1730 1730 * @param cb The number of bytes to read. 1731 1731 */ 1732 PGMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)1732 VMMDECL(int) PGMPhysReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb) 1733 1733 { 1734 1734 /* … … 1812 1812 * @param cb The number of bytes to write. 1813 1813 */ 1814 PGMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)1814 VMMDECL(int) PGMPhysWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb) 1815 1815 { 1816 1816 /* … … 1899 1899 * @param cb The number of bytes to read. 1900 1900 */ 1901 PGMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)1901 VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb) 1902 1902 { 1903 1903 /* … … 1960 1960 * @param cb The number of bytes to write. 1961 1961 */ 1962 PGMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)1962 VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb) 1963 1963 { 1964 1964 /* … … 2023 2023 */ 2024 2024 /** @todo use the PGMPhysReadGCPtr name and rename the unsafe one to something appropriate */ 2025 PGMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)2025 VMMDECL(int) PGMPhysReadGCPtrSafe(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb) 2026 2026 { 2027 2027 RTGCPHYS GCPhys; … … 2096 2096 */ 2097 2097 /** @todo use the PGMPhysWriteGCPtr name and rename the unsafe one to something appropriate */ 2098 PGMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)2098 VMMDECL(int) PGMPhysWriteGCPtrSafe(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb) 2099 2099 { 2100 2100 RTGCPHYS GCPhys; … … 2169 2169 * @param cb The number of bytes to write. 2170 2170 */ 2171 PGMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)2171 VMMDECL(int) PGMPhysWriteGCPtrDirty(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb) 2172 2172 { 2173 2173 /* … … 2250 2250 * mappings done by the caller. Be careful! 2251 2251 */ 2252 PGMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)2252 VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb) 2253 2253 { 2254 2254 Assert(cb <= PAGE_SIZE); … … 2388 2388 } 2389 2389 2390 /// @todo PGMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)2391 2392 2390 /// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb) 2391 2392 -
trunk/src/VBox/VMM/VMMAll/REMAll.cpp
r11311 r12989 44 44 * @param GCPtrPage The 45 45 */ 46 REMDECL(int) REMNotifyInvalidatePage(PVM pVM, RTGCPTR GCPtrPage)46 VMMDECL(int) REMNotifyInvalidatePage(PVM pVM, RTGCPTR GCPtrPage) 47 47 { 48 48 if (pVM->rem.s.cInvalidatedPages < RT_ELEMENTS(pVM->rem.s.aGCPtrInvalidatedPages)) … … 92 92 * @param fHasHCHandler Set if the handler have a HC callback function. 93 93 */ 94 REMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler)94 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 95 95 { 96 96 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) … … 116 116 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 117 117 */ 118 REMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)118 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 119 119 { 120 120 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) … … 142 142 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 143 143 */ 144 REMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)144 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 145 145 { 146 146 if (pVM->rem.s.cHandlerNotifications >= RT_ELEMENTS(pVM->rem.s.aHandlerNotifications)) -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r12404 r12989 51 51 * @remarks Don't use when in long mode. 52 52 */ 53 SELMDECL(RTGCPTR) SELMToFlatBySel(PVM pVM, RTSEL Sel, RTGCPTR Addr)53 VMMDECL(RTGCPTR) SELMToFlatBySel(PVM pVM, RTSEL Sel, RTGCPTR Addr) 54 54 { 55 55 Assert(!CPUMIsGuestInLongMode(pVM)); /* DON'T USE! */ … … 86 86 * @param Addr Address part. 87 87 */ 88 SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, DIS_SELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr)88 VMMDECL(RTGCPTR) SELMToFlat(PVM pVM, DIS_SELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr) 89 89 { 90 90 PCPUMSELREGHID pHiddenSel; … … 147 147 * @param ppvGC Where to store the GC flat address. 148 148 */ 149 SELMDECL(int) SELMToFlatEx(PVM pVM, DIS_SELREG SelReg, PCCPUMCTXCORE pCtxCore, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC)149 VMMDECL(int) SELMToFlatEx(PVM pVM, DIS_SELREG SelReg, PCCPUMCTXCORE pCtxCore, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC) 150 150 { 151 151 PCPUMSELREGHID pHiddenSel; … … 455 455 * @remarks Don't use when in long mode. 456 456 */ 457 SELMDECL(int) SELMToFlatBySelEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, CPUMSELREGHID *pHiddenSel, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb)457 VMMDECL(int) SELMToFlatBySelEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, CPUMSELREGHID *pHiddenSel, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb) 458 458 { 459 459 Assert(!CPUMIsGuestInLongMode(pVM)); /* DON'T USE! */ … … 830 830 * @param pcBits Where to store the 64-bit/32-bit/16-bit indicator. 831 831 */ 832 SELMDECL(int) SELMValidateAndConvertCSAddrGCTrap(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr, PRTGCPTR ppvFlat, uint32_t *pcBits)832 VMMDECL(int) SELMValidateAndConvertCSAddrGCTrap(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr, PRTGCPTR ppvFlat, uint32_t *pcBits) 833 833 { 834 834 if ( CPUMIsGuestInRealMode(pVM) … … 855 855 * @param ppvFlat Where to store the flat address. 856 856 */ 857 SELMDECL(int) SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, CPUMSELREGHID *pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat)857 VMMDECL(int) SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, CPUMSELREGHID *pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat) 858 858 { 859 859 if ( CPUMIsGuestInRealMode(pVM) … … 902 902 * @param pHiddenSel The hidden selector register. 903 903 */ 904 SELMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel)904 VMMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel) 905 905 { 906 906 if (!CPUMAreHiddenSelRegsValid(pVM)) … … 930 930 * @param pVM VM Handle. 931 931 */ 932 SELMDECL(RTSEL) SELMGetTrap8Selector(PVM pVM)932 VMMDECL(RTSEL) SELMGetTrap8Selector(PVM pVM) 933 933 { 934 934 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_TSS_TRAP08]; … … 942 942 * @param u32EIP EIP of Trap 08 handler. 943 943 */ 944 SELMDECL(void) SELMSetTrap8EIP(PVM pVM, uint32_t u32EIP)944 VMMDECL(void) SELMSetTrap8EIP(PVM pVM, uint32_t u32EIP) 945 945 { 946 946 pVM->selm.s.TssTrap08.eip = u32EIP; … … 955 955 * @param esp Ring1 ESP register value. 956 956 */ 957 SELMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, RTGCPTR32 esp)957 VMMDECL(void) SELMSetRing1Stack(PVM pVM, uint32_t ss, RTGCPTR32 esp) 958 958 { 959 959 pVM->selm.s.Tss.ss1 = ss; … … 970 970 * @param pEsp Ring1 ESP register value. 971 971 */ 972 SELMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp)972 VMMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp) 973 973 { 974 974 if (pVM->selm.s.fSyncTSSRing0Stack) … … 1043 1043 * @param pVM VM Handle. 1044 1044 */ 1045 SELMDECL(RTGCPTR) SELMGetGuestTSS(PVM pVM)1045 VMMDECL(RTGCPTR) SELMGetGuestTSS(PVM pVM) 1046 1046 { 1047 1047 return (RTGCPTR)pVM->selm.s.GCPtrGuestTss; … … 1056 1056 * @param SelCPL The selector defining the CPL (SS). 1057 1057 */ 1058 SELMDECL(int) SELMSelInfoValidateCS(PCSELMSELINFO pSelInfo, RTSEL SelCPL)1058 VMMDECL(int) SELMSelInfoValidateCS(PCSELMSELINFO pSelInfo, RTSEL SelCPL) 1059 1059 { 1060 1060 /* … … 1091 1091 * @param pVM The VM handle. 1092 1092 */ 1093 SELMDECL(RTSEL) SELMGetHyperCS(PVM pVM)1093 VMMDECL(RTSEL) SELMGetHyperCS(PVM pVM) 1094 1094 { 1095 1095 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_CS]; … … 1102 1102 * @param pVM The VM handle. 1103 1103 */ 1104 SELMDECL(RTSEL) SELMGetHyperCS64(PVM pVM)1104 VMMDECL(RTSEL) SELMGetHyperCS64(PVM pVM) 1105 1105 { 1106 1106 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_CS64]; … … 1113 1113 * @param pVM The VM handle. 1114 1114 */ 1115 SELMDECL(RTSEL) SELMGetHyperDS(PVM pVM)1115 VMMDECL(RTSEL) SELMGetHyperDS(PVM pVM) 1116 1116 { 1117 1117 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_DS]; … … 1124 1124 * @param pVM The VM handle. 1125 1125 */ 1126 SELMDECL(RTSEL) SELMGetHyperTSS(PVM pVM)1126 VMMDECL(RTSEL) SELMGetHyperTSS(PVM pVM) 1127 1127 { 1128 1128 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_TSS]; … … 1135 1135 * @param pVM The VM handle. 1136 1136 */ 1137 SELMDECL(RTSEL) SELMGetHyperTSSTrap08(PVM pVM)1137 VMMDECL(RTSEL) SELMGetHyperTSSTrap08(PVM pVM) 1138 1138 { 1139 1139 return pVM->selm.s.aHyperSel[SELM_HYPER_SEL_TSS_TRAP08]; … … 1148 1148 * switchers. Don't exploit this API! 1149 1149 */ 1150 SELMDECL(RTGCPTR) SELMGetHyperGDT(PVM pVM)1150 VMMDECL(RTGCPTR) SELMGetHyperGDT(PVM pVM) 1151 1151 { 1152 1152 /* … … 1171 1171 * @param pfCanHaveIOBitmap Where to store the can-have-I/O-bitmap indicator. (optional) 1172 1172 */ 1173 SELMDECL(int) SELMGetTSSInfo(PVM pVM, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap)1173 VMMDECL(int) SELMGetTSSInfo(PVM pVM, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap) 1174 1174 { 1175 1175 if (!CPUMAreHiddenSelRegsValid(pVM)) -
trunk/src/VBox/VMM/VMMAll/TMAll.cpp
r12549 r12989 55 55 * @param pVM Pointer to the shared VM structure. 56 56 */ 57 TMDECL(void) TMNotifyStartOfExecution(PVM pVM)57 VMMDECL(void) TMNotifyStartOfExecution(PVM pVM) 58 58 { 59 59 if (pVM->tm.s.fTSCTiedToExecution) … … 72 72 * @param pVM Pointer to the shared VM structure. 73 73 */ 74 TMDECL(void) TMNotifyEndOfExecution(PVM pVM)74 VMMDECL(void) TMNotifyEndOfExecution(PVM pVM) 75 75 { 76 76 if (pVM->tm.s.fTSCTiedToExecution) … … 89 89 * @param pVM Pointer to the shared VM structure. 90 90 */ 91 TMDECL(void) TMNotifyStartOfHalt(PVM pVM)91 VMMDECL(void) TMNotifyStartOfHalt(PVM pVM) 92 92 { 93 93 if ( pVM->tm.s.fTSCTiedToExecution … … 107 107 * @param pVM Pointer to the shared VM structure. 108 108 */ 109 TMDECL(void) TMNotifyEndOfHalt(PVM pVM)109 VMMDECL(void) TMNotifyEndOfHalt(PVM pVM) 110 110 { 111 111 if ( pVM->tm.s.fTSCTiedToExecution … … 216 216 * @thread The emulation thread. 217 217 */ 218 TMDECL(uint64_t) TMTimerPoll(PVM pVM)218 VMMDECL(uint64_t) TMTimerPoll(PVM pVM) 219 219 { 220 220 /* … … 310 310 * @thread The emulation thread. 311 311 */ 312 TMDECL(uint64_t) TMTimerPollGIP(PVM pVM, uint64_t *pu64Delta)312 VMMDECL(uint64_t) TMTimerPollGIP(PVM pVM, uint64_t *pu64Delta) 313 313 { 314 314 /* … … 413 413 * @param pTimer Timer handle as returned by one of the create functions. 414 414 */ 415 TMDECL(PTMTIMERR3) TMTimerR3Ptr(PTMTIMER pTimer)415 VMMDECL(PTMTIMERR3) TMTimerR3Ptr(PTMTIMER pTimer) 416 416 { 417 417 return (PTMTIMERR3)MMHyperCCToR3(pTimer->CTXALLSUFF(pVM), pTimer); … … 425 425 * @param pTimer Timer handle as returned by one of the create functions. 426 426 */ 427 TMDECL(PTMTIMERR0) TMTimerR0Ptr(PTMTIMER pTimer)427 VMMDECL(PTMTIMERR0) TMTimerR0Ptr(PTMTIMER pTimer) 428 428 { 429 429 return (PTMTIMERR0)MMHyperCCToR0(pTimer->CTXALLSUFF(pVM), pTimer); … … 437 437 * @param pTimer Timer handle as returned by one of the create functions. 438 438 */ 439 TMDECL(PTMTIMERRC) TMTimerRCPtr(PTMTIMER pTimer)439 VMMDECL(PTMTIMERRC) TMTimerRCPtr(PTMTIMER pTimer) 440 440 { 441 441 return (PTMTIMERRC)MMHyperCCToRC(pTimer->CTXALLSUFF(pVM), pTimer); … … 449 449 * @param pTimer Timer handle as returned by one of the create functions. 450 450 */ 451 TMDECL(int) TMTimerDestroy(PTMTIMER pTimer)451 VMMDECL(int) TMTimerDestroy(PTMTIMER pTimer) 452 452 { 453 453 int cRetries = 1000; … … 547 547 * @param u64Expire New expire time. 548 548 */ 549 TMDECL(int) TMTimerSet(PTMTIMER pTimer, uint64_t u64Expire)549 VMMDECL(int) TMTimerSet(PTMTIMER pTimer, uint64_t u64Expire) 550 550 { 551 551 STAM_PROFILE_START(&pTimer->CTXALLSUFF(pVM)->tm.s.CTXALLSUFF(StatTimerSet), a); … … 657 657 * @param cMilliesToNext Number of millieseconds to the next tick. 658 658 */ 659 TMDECL(int) TMTimerSetMillies(PTMTIMER pTimer, uint32_t cMilliesToNext)659 VMMDECL(int) TMTimerSetMillies(PTMTIMER pTimer, uint32_t cMilliesToNext) 660 660 { 661 661 PVM pVM = pTimer->CTXALLSUFF(pVM); … … 686 686 * @param cMicrosToNext Number of microseconds to the next tick. 687 687 */ 688 TMDECL(int) TMTimerSetMicro(PTMTIMER pTimer, uint64_t cMicrosToNext)688 VMMDECL(int) TMTimerSetMicro(PTMTIMER pTimer, uint64_t cMicrosToNext) 689 689 { 690 690 PVM pVM = pTimer->CTXALLSUFF(pVM); … … 720 720 * @param cNanosToNext Number of nanoseconds to the next tick. 721 721 */ 722 TMDECL(int) TMTimerSetNano(PTMTIMER pTimer, uint64_t cNanosToNext)722 VMMDECL(int) TMTimerSetNano(PTMTIMER pTimer, uint64_t cNanosToNext) 723 723 { 724 724 PVM pVM = pTimer->CTXALLSUFF(pVM); … … 754 754 * @param pTimer Timer handle as returned by one of the create functions. 755 755 */ 756 TMDECL(int) TMTimerStop(PTMTIMER pTimer)756 VMMDECL(int) TMTimerStop(PTMTIMER pTimer) 757 757 { 758 758 STAM_PROFILE_START(&pTimer->CTXALLSUFF(pVM)->tm.s.CTXALLSUFF(StatTimerStop), a); … … 844 844 * @param pTimer Timer handle as returned by one of the create functions. 845 845 */ 846 TMDECL(uint64_t) TMTimerGet(PTMTIMER pTimer)846 VMMDECL(uint64_t) TMTimerGet(PTMTIMER pTimer) 847 847 { 848 848 uint64_t u64; … … 879 879 * @param pTimer Timer handle as returned by one of the create functions. 880 880 */ 881 TMDECL(uint64_t) TMTimerGetFreq(PTMTIMER pTimer)881 VMMDECL(uint64_t) TMTimerGetFreq(PTMTIMER pTimer) 882 882 { 883 883 switch (pTimer->enmClock) … … 906 906 * @param pTimer Timer handle as returned by one of the create functions. 907 907 */ 908 TMDECL(uint64_t) TMTimerGetNano(PTMTIMER pTimer)908 VMMDECL(uint64_t) TMTimerGetNano(PTMTIMER pTimer) 909 909 { 910 910 return TMTimerToNano(pTimer, TMTimerGet(pTimer)); … … 918 918 * @param pTimer Timer handle as returned by one of the create functions. 919 919 */ 920 TMDECL(uint64_t) TMTimerGetMicro(PTMTIMER pTimer)920 VMMDECL(uint64_t) TMTimerGetMicro(PTMTIMER pTimer) 921 921 { 922 922 return TMTimerToMicro(pTimer, TMTimerGet(pTimer)); … … 930 930 * @param pTimer Timer handle as returned by one of the create functions. 931 931 */ 932 TMDECL(uint64_t) TMTimerGetMilli(PTMTIMER pTimer)932 VMMDECL(uint64_t) TMTimerGetMilli(PTMTIMER pTimer) 933 933 { 934 934 return TMTimerToMilli(pTimer, TMTimerGet(pTimer)); … … 945 945 * without any adjustments. 946 946 */ 947 TMDECL(uint64_t) TMTimerToNano(PTMTIMER pTimer, uint64_t u64Ticks)947 VMMDECL(uint64_t) TMTimerToNano(PTMTIMER pTimer, uint64_t u64Ticks) 948 948 { 949 949 switch (pTimer->enmClock) … … 978 978 * without any adjustments. 979 979 */ 980 TMDECL(uint64_t) TMTimerToMicro(PTMTIMER pTimer, uint64_t u64Ticks)980 VMMDECL(uint64_t) TMTimerToMicro(PTMTIMER pTimer, uint64_t u64Ticks) 981 981 { 982 982 switch (pTimer->enmClock) … … 1011 1011 * without any adjustments. 1012 1012 */ 1013 TMDECL(uint64_t) TMTimerToMilli(PTMTIMER pTimer, uint64_t u64Ticks)1013 VMMDECL(uint64_t) TMTimerToMilli(PTMTIMER pTimer, uint64_t u64Ticks) 1014 1014 { 1015 1015 switch (pTimer->enmClock) … … 1043 1043 * @remark There could be rounding and overflow errors here. 1044 1044 */ 1045 TMDECL(uint64_t) TMTimerFromNano(PTMTIMER pTimer, uint64_t u64NanoTS)1045 VMMDECL(uint64_t) TMTimerFromNano(PTMTIMER pTimer, uint64_t u64NanoTS) 1046 1046 { 1047 1047 switch (pTimer->enmClock) … … 1075 1075 * @remark There could be rounding and overflow errors here. 1076 1076 */ 1077 TMDECL(uint64_t) TMTimerFromMicro(PTMTIMER pTimer, uint64_t u64MicroTS)1077 VMMDECL(uint64_t) TMTimerFromMicro(PTMTIMER pTimer, uint64_t u64MicroTS) 1078 1078 { 1079 1079 switch (pTimer->enmClock) … … 1107 1107 * @remark There could be rounding and overflow errors here. 1108 1108 */ 1109 TMDECL(uint64_t) TMTimerFromMilli(PTMTIMER pTimer, uint64_t u64MilliTS)1109 VMMDECL(uint64_t) TMTimerFromMilli(PTMTIMER pTimer, uint64_t u64MilliTS) 1110 1110 { 1111 1111 switch (pTimer->enmClock) … … 1138 1138 * @param pTimer Timer handle as returned by one of the create functions. 1139 1139 */ 1140 TMDECL(uint64_t) TMTimerGetExpire(PTMTIMER pTimer)1140 VMMDECL(uint64_t) TMTimerGetExpire(PTMTIMER pTimer) 1141 1141 { 1142 1142 int cRetries = 1000; … … 1199 1199 * @param pTimer Timer handle as returned by one of the create functions. 1200 1200 */ 1201 TMDECL(bool) TMTimerIsActive(PTMTIMER pTimer)1201 VMMDECL(bool) TMTimerIsActive(PTMTIMER pTimer) 1202 1202 { 1203 1203 TMTIMERSTATE enmState = pTimer->enmState; -
trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp
r12549 r12989 83 83 * @todo replace this with TMNotifyResume 84 84 */ 85 TMDECL(int) TMCpuTickResume(PVM pVM)85 VMMDECL(int) TMCpuTickResume(PVM pVM) 86 86 { 87 87 if (!pVM->tm.s.fTSCTiedToExecution) … … 119 119 * @todo replace this with TMNotifySuspend 120 120 */ 121 TMDECL(int) TMCpuTickPause(PVM pVM)121 VMMDECL(int) TMCpuTickPause(PVM pVM) 122 122 { 123 123 if (!pVM->tm.s.fTSCTiedToExecution) … … 137 137 * @thread EMT. 138 138 */ 139 TMDECL(bool) TMCpuTickCanUseRealTSC(PVM pVM, uint64_t *poffRealTSC)139 VMMDECL(bool) TMCpuTickCanUseRealTSC(PVM pVM, uint64_t *poffRealTSC) 140 140 { 141 141 /* … … 193 193 * @param pVM The VM to operate on. 194 194 */ 195 TMDECL(uint64_t) TMCpuTickGet(PVM pVM)195 VMMDECL(uint64_t) TMCpuTickGet(PVM pVM) 196 196 { 197 197 uint64_t u64; … … 222 222 * @param u64Tick The new timestamp value. 223 223 */ 224 TMDECL(int) TMCpuTickSet(PVM pVM, uint64_t u64Tick)224 VMMDECL(int) TMCpuTickSet(PVM pVM, uint64_t u64Tick) 225 225 { 226 226 Assert(!pVM->tm.s.fTSCTicking); … … 236 236 * @param pVM The VM. 237 237 */ 238 TMDECL(uint64_t) TMCpuTicksPerSecond(PVM pVM)238 VMMDECL(uint64_t) TMCpuTicksPerSecond(PVM pVM) 239 239 { 240 240 if (pVM->tm.s.fTSCUseRealTSC) -
trunk/src/VBox/VMM/VMMAll/TMAllReal.cpp
r8155 r12989 37 37 * @param pVM The VM handle. 38 38 */ 39 TMDECL(uint64_t) TMRealGet(PVM pVM)39 VMMDECL(uint64_t) TMRealGet(PVM pVM) 40 40 { 41 41 return RTTimeMilliTS(); … … 49 49 * @param pVM The VM handle. 50 50 */ 51 TMDECL(uint64_t) TMRealGetFreq(PVM pVM)51 VMMDECL(uint64_t) TMRealGetFreq(PVM pVM) 52 52 { 53 53 return TMCLOCK_FREQ_REAL; -
trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
r8579 r12989 357 357 * makes use of TSC and kernel timers. 358 358 */ 359 TMDECL(uint64_t) TMVirtualGet(PVM pVM)359 VMMDECL(uint64_t) TMVirtualGet(PVM pVM) 360 360 { 361 361 return TMVirtualGetEx(pVM, true /* check timers */); … … 375 375 * makes use of TSC and kernel timers. 376 376 */ 377 TMDECL(uint64_t) TMVirtualGetEx(PVM pVM, bool fCheckTimers)377 VMMDECL(uint64_t) TMVirtualGetEx(PVM pVM, bool fCheckTimers) 378 378 { 379 379 return tmVirtualGet(pVM, fCheckTimers); … … 389 389 * @thread EMT. 390 390 */ 391 TMDECL(uint64_t) TMVirtualSyncGetEx(PVM pVM, bool fCheckTimers)391 VMMDECL(uint64_t) TMVirtualSyncGetEx(PVM pVM, bool fCheckTimers) 392 392 { 393 393 VM_ASSERT_EMT(pVM); … … 509 509 * @thread EMT. 510 510 */ 511 TMDECL(uint64_t) TMVirtualSyncGet(PVM pVM)511 VMMDECL(uint64_t) TMVirtualSyncGet(PVM pVM) 512 512 { 513 513 return TMVirtualSyncGetEx(pVM, true /* check timers */); … … 521 521 * @param pVM VM handle. 522 522 */ 523 TMDECL(uint64_t) TMVirtualSyncGetLag(PVM pVM)523 VMMDECL(uint64_t) TMVirtualSyncGetLag(PVM pVM) 524 524 { 525 525 return pVM->tm.s.offVirtualSync - pVM->tm.s.offVirtualSyncGivenUp; … … 533 533 * @param pVM VM handle. 534 534 */ 535 TMDECL(uint32_t) TMVirtualSyncGetCatchUpPct(PVM pVM)535 VMMDECL(uint32_t) TMVirtualSyncGetCatchUpPct(PVM pVM) 536 536 { 537 537 if (pVM->tm.s.fVirtualSyncCatchUp) … … 547 547 * @param pVM VM handle. 548 548 */ 549 TMDECL(uint64_t) TMVirtualGetFreq(PVM pVM)549 VMMDECL(uint64_t) TMVirtualGetFreq(PVM pVM) 550 550 { 551 551 return TMCLOCK_FREQ_VIRTUAL; … … 560 560 * @param pVM VM handle. 561 561 */ 562 TMDECL(int) TMVirtualResume(PVM pVM)562 VMMDECL(int) TMVirtualResume(PVM pVM) 563 563 { 564 564 if (!pVM->tm.s.fVirtualTicking) … … 585 585 * @param pVM VM handle. 586 586 */ 587 TMDECL(int) TMVirtualPause(PVM pVM)587 VMMDECL(int) TMVirtualPause(PVM pVM) 588 588 { 589 589 if (pVM->tm.s.fVirtualTicking) … … 607 607 * @param pVM The VM handle. 608 608 */ 609 TMDECL(uint32_t) TMVirtualGetWarpDrive(PVM pVM)609 VMMDECL(uint32_t) TMVirtualGetWarpDrive(PVM pVM) 610 610 { 611 611 return pVM->tm.s.u32VirtualWarpDrivePercentage; … … 620 620 * @param u32Percent The new percentage. 100 means normal operation. 621 621 */ 622 TMDECL(int) TMVirtualSetWarpDrive(PVM pVM, uint32_t u32Percent)622 VMMDECL(int) TMVirtualSetWarpDrive(PVM pVM, uint32_t u32Percent) 623 623 { 624 624 /** @todo This isn't a feature specific to virtual time, move to TM level. (It … … 694 694 * without any adjustments. 695 695 */ 696 TMDECL(uint64_t) TMVirtualToNano(PVM pVM, uint64_t u64VirtualTicks)696 VMMDECL(uint64_t) TMVirtualToNano(PVM pVM, uint64_t u64VirtualTicks) 697 697 { 698 698 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); … … 710 710 * without any adjustments. 711 711 */ 712 TMDECL(uint64_t) TMVirtualToMicro(PVM pVM, uint64_t u64VirtualTicks)712 VMMDECL(uint64_t) TMVirtualToMicro(PVM pVM, uint64_t u64VirtualTicks) 713 713 { 714 714 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); … … 726 726 * without any adjustments. 727 727 */ 728 TMDECL(uint64_t) TMVirtualToMilli(PVM pVM, uint64_t u64VirtualTicks)728 VMMDECL(uint64_t) TMVirtualToMilli(PVM pVM, uint64_t u64VirtualTicks) 729 729 { 730 730 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); … … 741 741 * @remark There could be rounding and overflow errors here. 742 742 */ 743 TMDECL(uint64_t) TMVirtualFromNano(PVM pVM, uint64_t u64NanoTS)743 VMMDECL(uint64_t) TMVirtualFromNano(PVM pVM, uint64_t u64NanoTS) 744 744 { 745 745 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); … … 756 756 * @remark There could be rounding and overflow errors here. 757 757 */ 758 TMDECL(uint64_t) TMVirtualFromMicro(PVM pVM, uint64_t u64MicroTS)758 VMMDECL(uint64_t) TMVirtualFromMicro(PVM pVM, uint64_t u64MicroTS) 759 759 { 760 760 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); … … 771 771 * @remark There could be rounding and overflow errors here. 772 772 */ 773 TMDECL(uint64_t) TMVirtualFromMilli(PVM pVM, uint64_t u64MilliTS)773 VMMDECL(uint64_t) TMVirtualFromMilli(PVM pVM, uint64_t u64MilliTS) 774 774 { 775 775 AssertCompile(TMCLOCK_FREQ_VIRTUAL == 1000000000); -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r11933 r12989 53 53 * @param pEnmType Where to store the trap type 54 54 */ 55 TRPMDECL(int) TRPMQueryTrap(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType)55 VMMDECL(int) TRPMQueryTrap(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType) 56 56 { 57 57 /* … … 80 80 * @param pVM VM handle. 81 81 */ 82 TRPMDECL(uint8_t) TRPMGetTrapNo(PVM pVM)82 VMMDECL(uint8_t) TRPMGetTrapNo(PVM pVM) 83 83 { 84 84 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n")); … … 96 96 * @param pVM VM handle. 97 97 */ 98 TRPMDECL(RTGCUINT) TRPMGetErrorCode(PVM pVM)98 VMMDECL(RTGCUINT) TRPMGetErrorCode(PVM pVM) 99 99 { 100 100 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n")); … … 128 128 * @param pVM VM handle. 129 129 */ 130 TRPMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVM pVM)130 VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVM pVM) 131 131 { 132 132 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n")); … … 145 145 * @param pVM The virtual machine handle. 146 146 */ 147 TRPMDECL(int) TRPMResetTrap(PVM pVM)147 VMMDECL(int) TRPMResetTrap(PVM pVM) 148 148 { 149 149 /* … … 175 175 * @param enmType Trap type. 176 176 */ 177 TRPMDECL(int) TRPMAssertTrap(PVM pVM, uint8_t u8TrapNo, TRPMEVENT enmType)177 VMMDECL(int) TRPMAssertTrap(PVM pVM, uint8_t u8TrapNo, TRPMEVENT enmType) 178 178 { 179 179 Log2(("TRPMAssertTrap: u8TrapNo=%02x type=%d\n", u8TrapNo, enmType)); … … 206 206 * @param uErrorCode The new error code. 207 207 */ 208 TRPMDECL(void) TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode)208 VMMDECL(void) TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode) 209 209 { 210 210 Log2(("TRPMSetErrorCode: uErrorCode=%VGv\n", uErrorCode)); … … 238 238 * @param uCR2 The new fault address (cr2 register). 239 239 */ 240 TRPMDECL(void) TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2)240 VMMDECL(void) TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2) 241 241 { 242 242 Log2(("TRPMSetFaultAddress: uCR2=%VGv\n", uCR2)); … … 258 258 * @param pVM VM handle. 259 259 */ 260 TRPMDECL(bool) TRPMIsSoftwareInterrupt(PVM pVM)260 VMMDECL(bool) TRPMIsSoftwareInterrupt(PVM pVM) 261 261 { 262 262 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n")); … … 271 271 * @param pVM The virtual machine. 272 272 */ 273 TRPMDECL(bool) TRPMHasTrap(PVM pVM)273 VMMDECL(bool) TRPMHasTrap(PVM pVM) 274 274 { 275 275 return pVM->trpm.s.uActiveVector != ~0U; … … 289 289 * @param puCR2 Where to store the CR2 associated with a trap 0E. 290 290 */ 291 TRPMDECL(int) TRPMQueryTrapAll(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2)291 VMMDECL(int) TRPMQueryTrapAll(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2) 292 292 { 293 293 /* … … 319 319 * @param pVM VM handle. 320 320 */ 321 TRPMDECL(void) TRPMSaveTrap(PVM pVM)321 VMMDECL(void) TRPMSaveTrap(PVM pVM) 322 322 { 323 323 pVM->trpm.s.uSavedVector = pVM->trpm.s.uActiveVector; … … 335 335 * @param pVM VM handle. 336 336 */ 337 TRPMDECL(void) TRPMRestoreTrap(PVM pVM)337 VMMDECL(void) TRPMRestoreTrap(PVM pVM) 338 338 { 339 339 pVM->trpm.s.uActiveVector = pVM->trpm.s.uSavedVector; … … 360 360 * @internal 361 361 */ 362 TRPMDECL(int) TRPMForwardTrap(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)362 VMMDECL(int) TRPMForwardTrap(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap) 363 363 { 364 364 #ifdef TRPM_FORWARD_TRAPS_IN_GC … … 756 756 * @param enmXcpt The exception. 757 757 */ 758 TRPMDECL(int) TRPMRaiseXcpt(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)758 VMMDECL(int) TRPMRaiseXcpt(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt) 759 759 { 760 760 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x\n", pCtxCore->cs, pCtxCore->eip, enmXcpt)); … … 783 783 * @param uErr The error code. 784 784 */ 785 TRPMDECL(int) TRPMRaiseXcptErr(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)785 VMMDECL(int) TRPMRaiseXcptErr(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr) 786 786 { 787 787 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr)); … … 811 811 * @param uCR2 The CR2 value. 812 812 */ 813 TRPMDECL(int) TRPMRaiseXcptErrCR2(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)813 VMMDECL(int) TRPMRaiseXcptErrCR2(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2) 814 814 { 815 815 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32 uCR2=%RGv\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr, uCR2)); … … 830 830 * @param iTrap Interrupt/trap number. 831 831 */ 832 TRPMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap)832 VMMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap) 833 833 { 834 834 /* -
trunk/src/VBox/VMM/VMMAll/VMAll.cpp
r8155 r12989 49 49 * @thread Any 50 50 */ 51 VM DECL(int) VMSetError(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)51 VMMDECL(int) VMSetError(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...) 52 52 { 53 53 va_list args; … … 73 73 * @thread Any 74 74 */ 75 VM DECL(int) VMSetErrorV(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list args)75 VMMDECL(int) VMSetErrorV(PVM pVM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list args) 76 76 { 77 77 #ifdef IN_RING3 … … 225 225 * Also, why a string ID and not an enum? 226 226 */ 227 VM DECL(int) VMSetRuntimeError(PVM pVM, bool fFatal, const char *pszErrorID,227 VMMDECL(int) VMSetRuntimeError(PVM pVM, bool fFatal, const char *pszErrorID, 228 228 const char *pszFormat, ...) 229 229 { … … 250 250 * @thread Any 251 251 */ 252 VM DECL(int) VMSetRuntimeErrorV(PVM pVM, bool fFatal, const char *pszErrorID,252 VMMDECL(int) VMSetRuntimeErrorV(PVM pVM, bool fFatal, const char *pszErrorID, 253 253 const char *pszFormat, va_list args) 254 254 { … … 357 357 * @param enmState The state. 358 358 */ 359 VM DECL(const char *) VMGetStateName(VMSTATE enmState)359 VMMDECL(const char *) VMGetStateName(VMSTATE enmState) 360 360 { 361 361 switch (enmState) -
trunk/src/VBox/VMM/VMMGC/CPUMGCA.asm
r12657 r12989 143 143 ; @remark This call never returns! 144 144 ; 145 ; CPUMGCDECL(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTGCPTR pHandler, uint32_t eflags, uint32_t selSS, RTGCPTR pEsp);145 ; VMMRCDECL(void) CPUMGCCallGuestTrapHandler(PCPUMCTXCORE pRegFrame, uint32_t selCS, RTGCPTR pHandler, uint32_t eflags, uint32_t selSS, RTGCPTR pEsp); 146 146 align 16 147 147 BEGINPROC_EXPORTED CPUMGCCallGuestTrapHandler … … 198 198 ; This function does not return! 199 199 ; 200 ; CPUMGCDECL(void) CPUMGCCallV86Code(PCPUMCTXCORE pRegFrame);200 ;VMMRCDECL(void) CPUMGCCallV86Code(PCPUMCTXCORE pRegFrame); 201 201 align 16 202 202 BEGINPROC CPUMGCCallV86Code -
trunk/src/VBox/VMM/VMMGC/DBGFGC.cpp
r12663 r12989 48 48 * @param uDr6 The DR6 register value. 49 49 */ 50 DBGFGCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6)50 VMMRCDECL(int) DBGFGCTrap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6) 51 51 { 52 52 const bool fInHyper = !(pRegFrame->ss & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM; … … 108 108 * @param pRegFrame Pointer to the register frame for the trap. 109 109 */ 110 DBGFGCDECL(int) DBGFGCTrap03Handler(PVM pVM, PCPUMCTXCORE pRegFrame)110 VMMRCDECL(int) DBGFGCTrap03Handler(PVM pVM, PCPUMCTXCORE pRegFrame) 111 111 { 112 112 /* -
trunk/src/VBox/VMM/VMMGC/EMGCA.asm
r9247 r12989 31 31 ;; 32 32 ; Emulate LOCK CMPXCHG instruction, CDECL calling conv. 33 ; EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);33 ; VMMRCDECL(uint32_t) EMGCEmulateLockCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags); 34 34 ; 35 35 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. … … 102 102 ;; 103 103 ; Emulate CMPXCHG instruction, CDECL calling conv. 104 ; EMGCDECL(uint32_t) EMGCEmulateCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);104 ; VMMRCDECL(uint32_t) EMGCEmulateCmpXchg(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags); 105 105 ; 106 106 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. … … 172 172 ;; 173 173 ; Emulate LOCK CMPXCHG8B instruction, CDECL calling conv. 174 ; EMGCDECL(uint32_t) EMGCEmulateLockCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);174 ; VMMRCDECL(uint32_t) EMGCEmulateLockCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags); 175 175 ; 176 176 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. … … 228 228 ;; 229 229 ; Emulate CMPXCHG8B instruction, CDECL calling conv. 230 ; EMGCDECL(uint32_t) EMGCEmulateCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags);230 ; VMMRCDECL(uint32_t) EMGCEmulateCmpXchg8b(RTGCPTR pu32Param1, uint32_t *pEAX, uint32_t *pEDX, uint32_t uEBX, uint32_t uECX, uint32_t *pEflags); 231 231 ; 232 232 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. … … 283 283 ;; 284 284 ; Emulate LOCK XADD instruction, CDECL calling conv. 285 ; EMGCDECL(uint32_t) EMGCEmulateLockXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);285 ; VMMRCDECL(uint32_t) EMGCEmulateLockXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags); 286 286 ; 287 287 ; @returns eax=0 if data exchanged, other code - invalid access, #PF was generated. … … 344 344 ;; 345 345 ; Emulate XADD instruction, CDECL calling conv. 346 ; EMGCDECL(uint32_t) EMGCEmulateXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags);346 ; VMMRCDECL(uint32_t) EMGCEmulateXAdd(RTGCPTR pu32Param1, uint32_t *pu32Param2, uint32_t u32Param3, size_t cbSize, uint32_t *pEflags); 347 347 ; 348 348 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. -
trunk/src/VBox/VMM/VMMGC/IOMGC.cpp
r8155 r12989 68 68 * @param pCpu Disassembler CPU state. 69 69 */ 70 IOMGCDECL(int) IOMGCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)70 VMMRCDECL(int) IOMGCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu) 71 71 { 72 72 switch (pCpu->pCurInstr->opcode) -
trunk/src/VBox/VMM/VMMGC/MMRamGC.cpp
r12965 r12989 73 73 * @param pVM VM handle. 74 74 */ 75 MMGCDECL(void) MMGCRamRegisterTrapHandler(PVM pVM)75 VMMRCDECL(void) MMGCRamRegisterTrapHandler(PVM pVM) 76 76 { 77 77 TRPMGCSetTempHandler(pVM, 0xe, mmGCRamTrap0eHandler); … … 85 85 * @param pVM VM handle. 86 86 */ 87 MMGCDECL(void) MMGCRamDeregisterTrapHandler(PVM pVM)87 VMMRCDECL(void) MMGCRamDeregisterTrapHandler(PVM pVM) 88 88 { 89 89 TRPMGCSetTempHandler(pVM, 0xe, NULL); … … 100 100 * @param cb Size of data to read, only 1/2/4/8 is valid. 101 101 */ 102 MMGCDECL(int) MMGCRamRead(PVM pVM, void *pDst, void *pSrc, size_t cb)102 VMMRCDECL(int) MMGCRamRead(PVM pVM, void *pDst, void *pSrc, size_t cb) 103 103 { 104 104 int rc; … … 125 125 * @param cb Size of data to write, only 1/2/4 is valid. 126 126 */ 127 MMGCDECL(int) MMGCRamWrite(PVM pVM, void *pDst, void *pSrc, size_t cb)127 VMMRCDECL(int) MMGCRamWrite(PVM pVM, void *pDst, void *pSrc, size_t cb) 128 128 { 129 129 TRPMSaveTrap(pVM); /* save the current trap info, because it will get trashed if our access failed. */ -
trunk/src/VBox/VMM/VMMGC/MMRamGCA.asm
r8155 r12989 34 34 ;; 35 35 ; Read data in guest context, CDECL calling conv. 36 ; MMGCDECL(int) MMGCRamRead(void *pDst, void *pSrc, size_t cb);36 ; VMMRCDECL(int) MMGCRamRead(void *pDst, void *pSrc, size_t cb); 37 37 ; MMRamGC page fault handler must be installed prior this call for safe operation. 38 38 ; … … 106 106 ;; 107 107 ; Write data in guest context, CDECL calling conv. 108 ; MMGCDECL(int) MMGCRamWrite(void *pDst, void *pSrc, size_t cb);108 ; VMMRCDECL(int) MMGCRamWrite(void *pDst, void *pSrc, size_t cb); 109 109 ; 110 110 ; @returns eax=0 if data written, other code - invalid access, #PF was generated. -
trunk/src/VBox/VMM/VMMGC/PGMGC.cpp
r11311 r12989 177 177 * @param ppv Where to store the address of the mapping. 178 178 */ 179 PGMGCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv)179 VMMRCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv) 180 180 { 181 181 AssertMsg(!(GCPhys & PAGE_OFFSET_MASK), ("GCPhys=%VGp\n", GCPhys)); … … 217 217 * @param ppv Where to store the address of the mapping address corresponding to GCPhys. 218 218 */ 219 PGMGCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv)219 VMMRCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv) 220 220 { 221 221 /* … … 253 253 * @param ppv Where to store the address of the mapping. 254 254 */ 255 PGMGCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv)255 VMMRCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv) 256 256 { 257 257 AssertMsg(!(HCPhys & PAGE_OFFSET_MASK), ("HCPhys=%VHp\n", HCPhys)); … … 315 315 * @param GCPtrPage Page to invalidate. 316 316 */ 317 PGMGCDECL(int) PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage)317 VMMRCDECL(int) PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage) 318 318 { 319 319 LogFlow(("PGMGCInvalidatePage: GCPtrPage=%VGv\n", GCPtrPage)); -
trunk/src/VBox/VMM/VMMGC/SELMGC.cpp
r10087 r12989 182 182 * (If it's a EIP range this's the EIP, if not it's pvFault.) 183 183 */ 184 SELMGCDECL(int) selmgcGuestGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)184 VMMRCDECL(int) selmgcGuestGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 185 185 { 186 186 LogFlow(("selmgcGuestGDTWriteHandler errcode=%x fault=%VGv offRange=%08x\n", (uint32_t)uErrorCode, pvFault, offRange)); … … 255 255 * (If it's a EIP range this's the EIP, if not it's pvFault.) 256 256 */ 257 SELMGCDECL(int) selmgcGuestLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)257 VMMRCDECL(int) selmgcGuestLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 258 258 { 259 259 /** @todo To be implemented. */ … … 278 278 * (If it's a EIP range this's the EIP, if not it's pvFault.) 279 279 */ 280 SELMGCDECL(int) selmgcGuestTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)280 VMMRCDECL(int) selmgcGuestTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 281 281 { 282 282 LogFlow(("selmgcGuestTSSWriteHandler errcode=%x fault=%VGv offRange=%08x\n", (uint32_t)uErrorCode, pvFault, offRange)); … … 309 309 310 310 /** @todo not sure how the partial case is handled; probably not allowed */ 311 if ( offIntRedirBitmap <= offRange 311 if ( offIntRedirBitmap <= offRange 312 312 && offIntRedirBitmap + sizeof(pVM->selm.s.Tss.IntRedirBitmap) >= offRange + cb 313 313 && offIntRedirBitmap + sizeof(pVM->selm.s.Tss.IntRedirBitmap) <= pVM->selm.s.cbGuestTss) … … 361 361 * (If it's a EIP range this's the EIP, if not it's pvFault.) 362 362 */ 363 SELMGCDECL(int) selmgcShadowGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)363 VMMRCDECL(int) selmgcShadowGDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 364 364 { 365 365 LogRel(("FATAL ERROR: selmgcShadowGDTWriteHandler: eip=%08X pvFault=%VGv pvRange=%VGv\r\n", pRegFrame->eip, pvFault, pvRange)); … … 379 379 * (If it's a EIP range this's the EIP, if not it's pvFault.) 380 380 */ 381 SELMGCDECL(int) selmgcShadowLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)381 VMMRCDECL(int) selmgcShadowLDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 382 382 { 383 383 LogRel(("FATAL ERROR: selmgcShadowLDTWriteHandler: eip=%08X pvFault=%VGv pvRange=%VGv\r\n", pRegFrame->eip, pvFault, pvRange)); … … 398 398 * (If it's a EIP range this's the EIP, if not it's pvFault.) 399 399 */ 400 SELMGCDECL(int) selmgcShadowTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)400 VMMRCDECL(int) selmgcShadowTSSWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 401 401 { 402 402 LogRel(("FATAL ERROR: selmgcShadowTSSWriteHandler: eip=%08X pvFault=%VGv pvRange=%VGv\r\n", pRegFrame->eip, pvFault, pvRange)); … … 413 413 * @param pEsp Ring1 ESP register value. 414 414 */ 415 SELMGCDECL(int) SELMGCGetRing1Stack(PVM pVM, uint32_t *pSS, uint32_t *pEsp)415 VMMRCDECL(int) SELMGCGetRing1Stack(PVM pVM, uint32_t *pSS, uint32_t *pEsp) 416 416 { 417 417 if (pVM->selm.s.fSyncTSSRing0Stack) -
trunk/src/VBox/VMM/VMMGC/TRPMGC.cpp
r11311 r12989 55 55 * @param pfnHandler Pointer to the handler. Use NULL for uninstalling the handler. 56 56 */ 57 TRPMGCDECL(int) TRPMGCSetTempHandler(PVM pVM, unsigned iTrap, PFNTRPMGCTRAPHANDLER pfnHandler)57 VMMRCDECL(int) TRPMGCSetTempHandler(PVM pVM, unsigned iTrap, PFNTRPMGCTRAPHANDLER pfnHandler) 58 58 { 59 59 /* … … 83 83 * @param rc The return code for host context. 84 84 */ 85 TRPMGCDECL(void) TRPMGCHyperReturnToHost(PVM pVM, int rc)85 VMMRCDECL(void) TRPMGCHyperReturnToHost(PVM pVM, int rc) 86 86 { 87 87 LogFlow(("TRPMGCHyperReturnToHost: rc=%Vrc\n", rc)); … … 105 105 * (If it's a EIP range this's the EIP, if not it's pvFault.) 106 106 */ 107 TRPMGCDECL(int) trpmgcGuestIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)107 VMMRCDECL(int) trpmgcGuestIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 108 108 { 109 109 uint16_t cbIDT; … … 166 166 * (If it's a EIP range this's the EIP, if not it's pvFault.) 167 167 */ 168 TRPMGCDECL(int) trpmgcShadowIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange)168 VMMRCDECL(int) trpmgcShadowIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange) 169 169 { 170 170 LogRel(("FATAL ERROR: trpmgcShadowIDTWriteHandler: eip=%08X pvFault=%VGv pvRange=%08X\r\n", pRegFrame->eip, pvFault, pvRange)); -
trunk/src/VBox/VMM/VMMGC/VMMGC.cpp
r10804 r12989 62 62 * @param uArg Argument to that operation. 63 63 */ 64 VMM GCDECL(int) VMMGCEntry(PVM pVM, unsigned uOperation, unsigned uArg, ...)64 VMMRCDECL(int) VMMGCEntry(PVM pVM, unsigned uOperation, unsigned uArg, ...) 65 65 { 66 66 /* todo */ … … 168 168 * @remark This function must be exported! 169 169 */ 170 VMM GCDECL(int) vmmGCLoggerFlush(PRTLOGGERRC pLogger)170 VMMRCDECL(int) vmmGCLoggerFlush(PRTLOGGERRC pLogger) 171 171 { 172 172 PVM pVM = &g_VM; … … 182 182 * @param rc The status code. 183 183 */ 184 VMM GCDECL(void) VMMGCGuestToHost(PVM pVM, int rc)184 VMMRCDECL(void) VMMGCGuestToHost(PVM pVM, int rc) 185 185 { 186 186 pVM->vmm.s.pfnGCGuestToHost(rc); … … 196 196 * @param uArg The argument to the operation. 197 197 */ 198 VMM GCDECL(int) VMMGCCallHost(PVM pVM, VMMCALLHOST enmOperation, uint64_t uArg)198 VMMRCDECL(int) VMMGCCallHost(PVM pVM, VMMCALLHOST enmOperation, uint64_t uArg) 199 199 { 200 200 /** @todo profile this! */ -
trunk/src/VBox/VMM/VMMGC/VMMGCA.asm
r8155 r12989 62 62 ; * Internal GC logger worker: Logger wrapper. 63 63 ; */ 64 ;VMM GCDECL(void) vmmGCLoggerWrapper(const char *pszFormat, ...);64 ;VMMRCDECL(void) vmmGCLoggerWrapper(const char *pszFormat, ...); 65 65 EXPORTEDNAME vmmGCLoggerWrapper 66 66 %ifdef __YASM__ … … 82 82 ; * Internal GC logger worker: Logger (release) wrapper. 83 83 ; */ 84 ;VMM GCDECL(void) vmmGCRelLoggerWrapper(const char *pszFormat, ...);84 ;VMMRCDECL(void) vmmGCRelLoggerWrapper(const char *pszFormat, ...); 85 85 EXPORTEDNAME vmmGCRelLoggerWrapper 86 86 %ifdef __YASM__ -
trunk/src/VBox/VMM/VMMInternal.h
r12837 r12989 29 29 30 30 31 #if !defined(IN_VMM_R3) && !defined(IN_VMM_R0) && !defined(IN_VMM_ GC)31 #if !defined(IN_VMM_R3) && !defined(IN_VMM_R0) && !defined(IN_VMM_RC) 32 32 # error "Not in VMM! This is an internal header!" 33 33 #endif … … 466 466 * Internal GC logger worker: Logger wrapper. 467 467 */ 468 VMM GCDECL(void) vmmGCLoggerWrapper(const char *pszFormat, ...);468 VMMRCDECL(void) vmmGCLoggerWrapper(const char *pszFormat, ...); 469 469 470 470 /** 471 471 * Internal GC release logger worker: Logger wrapper. 472 472 */ 473 VMM GCDECL(void) vmmGCRelLoggerWrapper(const char *pszFormat, ...);473 VMMRCDECL(void) vmmGCRelLoggerWrapper(const char *pszFormat, ...); 474 474 475 475 /** … … 480 480 * @remark This function must be exported! 481 481 */ 482 VMM GCDECL(int) vmmGCLoggerFlush(PRTLOGGERRC pLogger);482 VMMRCDECL(int) vmmGCLoggerFlush(PRTLOGGERRC pLogger); 483 483 484 484 /** @name Trap testcases and related labels. -
trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r12657 r12989 45 45 * @param pVM The VM to operate on. 46 46 */ 47 CPUMR0DECL(int) CPUMR0Init(PVM pVM)47 VMMR0DECL(int) CPUMR0Init(PVM pVM) 48 48 { 49 49 LogFlow(("CPUMR0Init: %p\n", pVM)); … … 116 116 * @param pCtx CPU context 117 117 */ 118 CPUMR0DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PCPUMCTX pCtx)118 VMMR0DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PCPUMCTX pCtx) 119 119 { 120 120 Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR); … … 236 236 * @param pCtx CPU context 237 237 */ 238 CPUMR0DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PCPUMCTX pCtx)238 VMMR0DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PCPUMCTX pCtx) 239 239 { 240 240 Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR); … … 287 287 * @param fDR6 Include DR6 or not 288 288 */ 289 CPUMR0DECL(int) CPUMR0SaveGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6)289 VMMR0DECL(int) CPUMR0SaveGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6) 290 290 { 291 291 Assert(pVM->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS); … … 323 323 * @param fDR6 Include DR6 or not 324 324 */ 325 CPUMR0DECL(int) CPUMR0LoadGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6)325 VMMR0DECL(int) CPUMR0LoadGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6) 326 326 { 327 327 /* Save the host state. */ -
trunk/src/VBox/VMM/VMMR0/DBGFR0.cpp
r12663 r12989 47 47 * @param uDr6 The DR6 register value. 48 48 */ 49 DBGFR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6)49 VMMR0DECL(int) DBGFR0Trap01Handler(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6) 50 50 { 51 51 /** @todo Intel docs say that X86_DR6_BS has the highest priority... */ … … 105 105 * @param pRegFrame Pointer to the register frame for the trap. 106 106 */ 107 DBGFR0DECL(int) DBGFR0Trap03Handler(PVM pVM, PCPUMCTXCORE pRegFrame)107 VMMR0DECL(int) DBGFR0Trap03Handler(PVM pVM, PCPUMCTXCORE pRegFrame) 108 108 { 109 109 /* -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r12892 r12989 136 136 * @returns VBox status code. 137 137 */ 138 HWACCMR0DECL(int) HWACCMR0Init(void)138 VMMR0DECL(int) HWACCMR0Init(void) 139 139 { 140 140 int rc; … … 415 415 * @returns VBox status code. 416 416 */ 417 HWACCMR0DECL(int) HWACCMR0Term(void)417 VMMR0DECL(int) HWACCMR0Term(void) 418 418 { 419 419 int aRc[RTCPUSET_MAX_CPUS]; … … 512 512 * 513 513 */ 514 HWACCMR0DECL(int) HWACCMR0EnableAllCpus(PVM pVM, HWACCMSTATE enmNewHwAccmState)514 VMMR0DECL(int) HWACCMR0EnableAllCpus(PVM pVM, HWACCMSTATE enmNewHwAccmState) 515 515 { 516 516 Assert(sizeof(HWACCMR0Globals.enmHwAccmState) == sizeof(uint32_t)); … … 649 649 * @param pVM The VM to operate on. 650 650 */ 651 HWACCMR0DECL(int) HWACCMR0InitVM(PVM pVM)651 VMMR0DECL(int) HWACCMR0InitVM(PVM pVM) 652 652 { 653 653 AssertReturn(pVM, VERR_INVALID_PARAMETER); … … 696 696 * @param pVM The VM to operate on. 697 697 */ 698 HWACCMR0DECL(int) HWACCMR0TermVM(PVM pVM)698 VMMR0DECL(int) HWACCMR0TermVM(PVM pVM) 699 699 { 700 700 AssertReturn(pVM, VERR_INVALID_PARAMETER); … … 715 715 * @param pVM The VM to operate on. 716 716 */ 717 HWACCMR0DECL(int) HWACCMR0SetupVM(PVM pVM)717 VMMR0DECL(int) HWACCMR0SetupVM(PVM pVM) 718 718 { 719 719 AssertReturn(pVM, VERR_INVALID_PARAMETER); … … 734 734 * @param pVM The VM to operate on. 735 735 */ 736 HWACCMR0DECL(int) HWACCMR0Enter(PVM pVM)736 VMMR0DECL(int) HWACCMR0Enter(PVM pVM) 737 737 { 738 738 CPUMCTX *pCtx; … … 785 785 * @param pVM The VM to operate on. 786 786 */ 787 HWACCMR0DECL(int) HWACCMR0Leave(PVM pVM)787 VMMR0DECL(int) HWACCMR0Leave(PVM pVM) 788 788 { 789 789 CPUMCTX *pCtx; … … 825 825 * @param pVM The VM to operate on. 826 826 */ 827 HWACCMR0DECL(int) HWACCMR0RunGuestCode(PVM pVM)827 VMMR0DECL(int) HWACCMR0RunGuestCode(PVM pVM) 828 828 { 829 829 CPUMCTX *pCtx; … … 848 848 * @param pVM The VM to operate on. 849 849 */ 850 HWACCMR0DECL(PHWACCM_CPUINFO) HWACCMR0GetCurrentCpu()850 VMMR0DECL(PHWACCM_CPUINFO) HWACCMR0GetCurrentCpu() 851 851 { 852 852 RTCPUID idCpu = RTMpCpuId(); … … 864 864 * @param pszMsg Message to prepend the log entry with. 865 865 */ 866 HWACCMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC pDesc, RTSEL Sel, const char *pszMsg)866 VMMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC pDesc, RTSEL Sel, const char *pszMsg) 867 867 { 868 868 /* … … 985 985 * @param pCtx The context to format. 986 986 */ 987 HWACCMR0DECL(void) HWACCMDumpRegs(PVM pVM, PCPUMCTX pCtx)987 VMMR0DECL(void) HWACCMDumpRegs(PVM pVM, PCPUMCTX pCtx) 988 988 { 989 989 /* … … 1127 1127 1128 1128 /* Dummy callback handlers. */ 1129 HWACCMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu)1129 VMMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu) 1130 1130 { 1131 1131 return VINF_SUCCESS; 1132 1132 } 1133 1133 1134 HWACCMR0DECL(int) HWACCMR0DummyLeave(PVM pVM, PCPUMCTX pCtx)1134 VMMR0DECL(int) HWACCMR0DummyLeave(PVM pVM, PCPUMCTX pCtx) 1135 1135 { 1136 1136 return VINF_SUCCESS; 1137 1137 } 1138 1138 1139 HWACCMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys)1139 VMMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 1140 1140 { 1141 1141 return VINF_SUCCESS; 1142 1142 } 1143 1143 1144 HWACCMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys)1144 VMMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 1145 1145 { 1146 1146 return VINF_SUCCESS; 1147 1147 } 1148 1148 1149 HWACCMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM)1149 VMMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM) 1150 1150 { 1151 1151 return VINF_SUCCESS; 1152 1152 } 1153 1153 1154 HWACCMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM)1154 VMMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM) 1155 1155 { 1156 1156 return VINF_SUCCESS; 1157 1157 } 1158 1158 1159 HWACCMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM)1159 VMMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM) 1160 1160 { 1161 1161 return VINF_SUCCESS; 1162 1162 } 1163 1163 1164 HWACCMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx)1164 VMMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx) 1165 1165 { 1166 1166 return VINF_SUCCESS; 1167 1167 } 1168 1168 1169 HWACCMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM)1169 VMMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM) 1170 1170 { 1171 1171 return VINF_SUCCESS; 1172 1172 } 1173 1173 1174 HWACCMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx)1174 VMMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx) 1175 1175 { 1176 1176 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r12795 r12989 66 66 * @param pPageCpuPhys Physical address of the global cpu page 67 67 */ 68 HWACCMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys)68 VMMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 69 69 { 70 70 AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER); … … 99 99 * @param pPageCpuPhys Physical address of the global cpu page 100 100 */ 101 HWACCMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys)101 VMMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 102 102 { 103 103 AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER); … … 125 125 * @param pVM The VM to operate on. 126 126 */ 127 HWACCMR0DECL(int) SVMR0InitVM(PVM pVM)127 VMMR0DECL(int) SVMR0InitVM(PVM pVM) 128 128 { 129 129 int rc; … … 218 218 * @param pVM The VM to operate on. 219 219 */ 220 HWACCMR0DECL(int) SVMR0TermVM(PVM pVM)220 VMMR0DECL(int) SVMR0TermVM(PVM pVM) 221 221 { 222 222 if (pVM->hwaccm.s.svm.pMemObjVMCB != NIL_RTR0MEMOBJ) … … 257 257 * @param pVM The VM to operate on. 258 258 */ 259 HWACCMR0DECL(int) SVMR0SetupVM(PVM pVM)259 VMMR0DECL(int) SVMR0SetupVM(PVM pVM) 260 260 { 261 261 int rc = VINF_SUCCESS; … … 525 525 * @param pVM The VM to operate on. 526 526 */ 527 HWACCMR0DECL(int) SVMR0SaveHostState(PVM pVM)527 VMMR0DECL(int) SVMR0SaveHostState(PVM pVM) 528 528 { 529 529 /* Nothing to do here. */ … … 540 540 * @param pCtx Guest context 541 541 */ 542 HWACCMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx)542 VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx) 543 543 { 544 544 RTGCUINTPTR val; … … 799 799 * @param pCtx Guest context 800 800 */ 801 HWACCMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx)801 VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx) 802 802 { 803 803 int rc = VINF_SUCCESS; … … 2055 2055 * @param pCpu CPU info struct 2056 2056 */ 2057 HWACCMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu)2057 VMMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu) 2058 2058 { 2059 2059 Assert(pVM->hwaccm.s.svm.fSupported); … … 2076 2076 * @param pCtx CPU context 2077 2077 */ 2078 HWACCMR0DECL(int) SVMR0Leave(PVM pVM, PCPUMCTX pCtx)2078 VMMR0DECL(int) SVMR0Leave(PVM pVM, PCPUMCTX pCtx) 2079 2079 { 2080 2080 SVM_VMCB *pVMCB = (SVM_VMCB *)pVM->hwaccm.s.svm.pVMCB; … … 2193 2193 * @param GCVirt Page to invalidate 2194 2194 */ 2195 HWACCMR0DECL(int) SVMR0InvalidatePage(PVM pVM, RTGCPTR GCVirt)2195 VMMR0DECL(int) SVMR0InvalidatePage(PVM pVM, RTGCPTR GCVirt) 2196 2196 { 2197 2197 bool fFlushPending = pVM->hwaccm.s.svm.fAlwaysFlushTLB | pVM->hwaccm.s.svm.fForceTLBFlush; … … 2225 2225 * @param GCPhys Page to invalidate 2226 2226 */ 2227 HWACCMR0DECL(int) SVMR0InvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys)2227 VMMR0DECL(int) SVMR0InvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys) 2228 2228 { 2229 2229 bool fFlushPending = pVM->hwaccm.s.svm.fAlwaysFlushTLB | pVM->hwaccm.s.svm.fForceTLBFlush; -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.h
r12756 r12989 49 49 * @param pCpu CPU info struct 50 50 */ 51 HWACCMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu);51 VMMR0DECL(int) SVMR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu); 52 52 53 53 /** … … 58 58 * @param pCtx CPU context 59 59 */ 60 HWACCMR0DECL(int) SVMR0Leave(PVM pVM, PCPUMCTX pCtx);60 VMMR0DECL(int) SVMR0Leave(PVM pVM, PCPUMCTX pCtx); 61 61 62 62 /** … … 69 69 * @param pPageCpuPhys Physical address of the global cpu page 70 70 */ 71 HWACCMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);71 VMMR0DECL(int) SVMR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 72 72 73 73 /** … … 79 79 * @param pPageCpuPhys Physical address of the global cpu page 80 80 */ 81 HWACCMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);81 VMMR0DECL(int) SVMR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 82 82 83 83 /** … … 87 87 * @param pVM The VM to operate on. 88 88 */ 89 HWACCMR0DECL(int) SVMR0InitVM(PVM pVM);89 VMMR0DECL(int) SVMR0InitVM(PVM pVM); 90 90 91 91 /** … … 95 95 * @param pVM The VM to operate on. 96 96 */ 97 HWACCMR0DECL(int) SVMR0TermVM(PVM pVM);97 VMMR0DECL(int) SVMR0TermVM(PVM pVM); 98 98 99 99 /** … … 103 103 * @param pVM The VM to operate on. 104 104 */ 105 HWACCMR0DECL(int) SVMR0SetupVM(PVM pVM);105 VMMR0DECL(int) SVMR0SetupVM(PVM pVM); 106 106 107 107 … … 113 113 * @param pCtx Guest context 114 114 */ 115 HWACCMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx);115 VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx); 116 116 117 117 … … 122 122 * @param pVM The VM to operate on. 123 123 */ 124 HWACCMR0DECL(int) SVMR0SaveHostState(PVM pVM);124 VMMR0DECL(int) SVMR0SaveHostState(PVM pVM); 125 125 126 126 /** … … 131 131 * @param pCtx Guest context 132 132 */ 133 HWACCMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx);133 VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx); 134 134 135 135 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r12824 r12989 71 71 * @param pPageCpuPhys Physical address of the global cpu page 72 72 */ 73 HWACCMR0DECL(int) VMXR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys)73 VMMR0DECL(int) VMXR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 74 74 { 75 75 AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER); … … 112 112 * @param pPageCpuPhys Physical address of the global cpu page 113 113 */ 114 HWACCMR0DECL(int) VMXR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys)114 VMMR0DECL(int) VMXR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys) 115 115 { 116 116 AssertReturn(pPageCpuPhys, VERR_INVALID_PARAMETER); … … 135 135 * @param pVM The VM to operate on. 136 136 */ 137 HWACCMR0DECL(int) VMXR0InitVM(PVM pVM)137 VMMR0DECL(int) VMXR0InitVM(PVM pVM) 138 138 { 139 139 int rc; … … 203 203 * @param pVM The VM to operate on. 204 204 */ 205 HWACCMR0DECL(int) VMXR0TermVM(PVM pVM)205 VMMR0DECL(int) VMXR0TermVM(PVM pVM) 206 206 { 207 207 if (pVM->hwaccm.s.vmx.pMemObjVMCS != NIL_RTR0MEMOBJ) … … 235 235 * @param pVM The VM to operate on. 236 236 */ 237 HWACCMR0DECL(int) VMXR0SetupVM(PVM pVM)237 VMMR0DECL(int) VMXR0SetupVM(PVM pVM) 238 238 { 239 239 int rc = VINF_SUCCESS; … … 476 476 if (CPUMIsGuestInRealModeEx(pCtx)) 477 477 { 478 /* Injecting events doesn't work right with real mode emulation. 478 /* Injecting events doesn't work right with real mode emulation. 479 479 * (#GP if we try to inject external hardware interrupts) 480 480 * Fake an 'int x' instruction. Note that we need to take special precautions when … … 637 637 * @param pVM The VM to operate on. 638 638 */ 639 HWACCMR0DECL(int) VMXR0SaveHostState(PVM pVM)639 VMMR0DECL(int) VMXR0SaveHostState(PVM pVM) 640 640 { 641 641 int rc = VINF_SUCCESS; … … 749 749 * @param pCtx Guest context 750 750 */ 751 HWACCMR0DECL(int) VMXR0LoadGuestState(PVM pVM, CPUMCTX *pCtx)751 VMMR0DECL(int) VMXR0LoadGuestState(PVM pVM, CPUMCTX *pCtx) 752 752 { 753 753 int rc = VINF_SUCCESS; … … 1230 1230 # endif /* HWACCM_VMX_EMULATE_REALMODE */ 1231 1231 rc = VMXWriteVMCS(VMX_VMCS_CTRL_EXCEPTION_BITMAP, pVM->hwaccm.s.vmx.u32TrapMask); 1232 AssertRC(rc); 1232 AssertRC(rc); 1233 1233 #endif 1234 1234 … … 1246 1246 * @param pCtx Guest context 1247 1247 */ 1248 HWACCMR0DECL(int) VMXR0RunGuestCode(PVM pVM, CPUMCTX *pCtx)1248 VMMR0DECL(int) VMXR0RunGuestCode(PVM pVM, CPUMCTX *pCtx) 1249 1249 { 1250 1250 int rc = VINF_SUCCESS; … … 2637 2637 * @param pCpu CPU info struct 2638 2638 */ 2639 HWACCMR0DECL(int) VMXR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu)2639 VMMR0DECL(int) VMXR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu) 2640 2640 { 2641 2641 Assert(pVM->hwaccm.s.vmx.fSupported); … … 2665 2665 * @param pCtx CPU context 2666 2666 */ 2667 HWACCMR0DECL(int) VMXR0Leave(PVM pVM, PCPUMCTX pCtx)2667 VMMR0DECL(int) VMXR0Leave(PVM pVM, PCPUMCTX pCtx) 2668 2668 { 2669 2669 Assert(pVM->hwaccm.s.vmx.fSupported); -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r12826 r12989 49 49 * @param pCpu CPU info struct 50 50 */ 51 HWACCMR0DECL(int) VMXR0Enter(PVM pVMm, PHWACCM_CPUINFO pCpu);51 VMMR0DECL(int) VMXR0Enter(PVM pVMm, PHWACCM_CPUINFO pCpu); 52 52 53 53 /** … … 58 58 * @param pCtx CPU context 59 59 */ 60 HWACCMR0DECL(int) VMXR0Leave(PVM pVM, PCPUMCTX pCtx);60 VMMR0DECL(int) VMXR0Leave(PVM pVM, PCPUMCTX pCtx); 61 61 62 62 … … 70 70 * @param pPageCpuPhys Physical address of the global cpu page 71 71 */ 72 HWACCMR0DECL(int) VMXR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);72 VMMR0DECL(int) VMXR0EnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 73 73 74 74 /** … … 80 80 * @param pPageCpuPhys Physical address of the global cpu page 81 81 */ 82 HWACCMR0DECL(int) VMXR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);82 VMMR0DECL(int) VMXR0DisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 83 83 84 84 /** … … 88 88 * @param pVM The VM to operate on. 89 89 */ 90 HWACCMR0DECL(int) VMXR0InitVM(PVM pVM);90 VMMR0DECL(int) VMXR0InitVM(PVM pVM); 91 91 92 92 /** … … 96 96 * @param pVM The VM to operate on. 97 97 */ 98 HWACCMR0DECL(int) VMXR0TermVM(PVM pVM);98 VMMR0DECL(int) VMXR0TermVM(PVM pVM); 99 99 100 100 /** … … 104 104 * @param pVM The VM to operate on. 105 105 */ 106 HWACCMR0DECL(int) VMXR0SetupVM(PVM pVM);106 VMMR0DECL(int) VMXR0SetupVM(PVM pVM); 107 107 108 108 … … 113 113 * @param pVM The VM to operate on. 114 114 */ 115 HWACCMR0DECL(int) VMXR0SaveHostState(PVM pVM);115 VMMR0DECL(int) VMXR0SaveHostState(PVM pVM); 116 116 117 117 /** … … 122 122 * @param pCtx Guest context 123 123 */ 124 HWACCMR0DECL(int) VMXR0LoadGuestState(PVM pVM, CPUMCTX *pCtx);124 VMMR0DECL(int) VMXR0LoadGuestState(PVM pVM, CPUMCTX *pCtx); 125 125 126 126 … … 132 132 * @param pCtx Guest context 133 133 */ 134 HWACCMR0DECL(int) VMXR0RunGuestCode(PVM pVM, CPUMCTX *pCtx);134 VMMR0DECL(int) VMXR0RunGuestCode(PVM pVM, CPUMCTX *pCtx); 135 135 136 136 -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r10471 r12989 58 58 * @remarks Must be called from within the PGM critical section. 59 59 */ 60 PGMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM)60 VMMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM) 61 61 { 62 62 return VERR_NOT_IMPLEMENTED; … … 74 74 * @param pvFault The fault address. 75 75 */ 76 PGMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault)76 VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault) 77 77 { 78 78 int rc; … … 128 128 * Call the worker. 129 129 * 130 * We pretend the guest is in protected mode without paging, so we can use existing code to build the 130 * We pretend the guest is in protected mode without paging, so we can use existing code to build the 131 131 * nested page tables. 132 132 */ -
trunk/src/VBox/VMM/VMMR0/TRPMR0.cpp
r9412 r12989 40 40 * @remark Must be called with interrupts disabled. 41 41 */ 42 TRPMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM)42 VMMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM) 43 43 { 44 44 RTUINT uActiveVector = pVM->trpm.s.uActiveVector; … … 115 115 * @param pvRet Pointer to the return address of VMMR0Entry() on the stack. 116 116 */ 117 TRPMR0DECL(void) TRPMR0SetupInterruptDispatcherFrame(PVM pVM, void *pvRet)117 VMMR0DECL(void) TRPMR0SetupInterruptDispatcherFrame(PVM pVM, void *pvRet) 118 118 { 119 119 RTUINT uActiveVector = pVM->trpm.s.uActiveVector; -
trunk/src/VBox/VMM/VMReq.cpp
r8155 r12989 71 71 * @param ... Function arguments. 72 72 */ 73 VM R3DECL(int) VMR3ReqCall(PVM pVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...)73 VMMR3DECL(int) VMR3ReqCall(PVM pVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...) 74 74 { 75 75 va_list va; … … 104 104 * @param ... Function arguments. 105 105 */ 106 VM R3DECL(int) VMR3ReqCallVoidU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...)106 VMMR3DECL(int) VMR3ReqCallVoidU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...) 107 107 { 108 108 va_list va; … … 137 137 * @param ... Function arguments. 138 138 */ 139 VM R3DECL(int) VMR3ReqCallVoid(PVM pVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...)139 VMMR3DECL(int) VMR3ReqCallVoid(PVM pVM, PVMREQ *ppReq, unsigned cMillies, PFNRT pfnFunction, unsigned cArgs, ...) 140 140 { 141 141 va_list va; … … 172 172 * @param ... Function arguments. 173 173 */ 174 VM R3DECL(int) VMR3ReqCallEx(PVM pVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, ...)174 VMMR3DECL(int) VMR3ReqCallEx(PVM pVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, ...) 175 175 { 176 176 va_list va; … … 207 207 * @param ... Function arguments. 208 208 */ 209 VM R3DECL(int) VMR3ReqCallU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, ...)209 VMMR3DECL(int) VMR3ReqCallU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, ...) 210 210 { 211 211 va_list va; … … 242 242 * @param Args Argument vector. 243 243 */ 244 VM R3DECL(int) VMR3ReqCallVU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, va_list Args)244 VMMR3DECL(int) VMR3ReqCallVU(PUVM pUVM, PVMREQ *ppReq, unsigned cMillies, unsigned fFlags, PFNRT pfnFunction, unsigned cArgs, va_list Args) 245 245 { 246 246 LogFlow(("VMR3ReqCallV: cMillies=%d fFlags=%#x pfnFunction=%p cArgs=%d\n", cMillies, fFlags, pfnFunction, cArgs)); … … 365 365 * @param enmType Package type. 366 366 */ 367 VM R3DECL(int) VMR3ReqAlloc(PVM pVM, PVMREQ *ppReq, VMREQTYPE enmType)367 VMMR3DECL(int) VMR3ReqAlloc(PVM pVM, PVMREQ *ppReq, VMREQTYPE enmType) 368 368 { 369 369 return VMR3ReqAllocU(pVM->pUVM, ppReq, enmType); … … 383 383 * @param enmType Package type. 384 384 */ 385 VM R3DECL(int) VMR3ReqAllocU(PUVM pUVM, PVMREQ *ppReq, VMREQTYPE enmType)385 VMMR3DECL(int) VMR3ReqAllocU(PUVM pUVM, PVMREQ *ppReq, VMREQTYPE enmType) 386 386 { 387 387 /* … … 515 515 * @remark The request packet must be in allocated or completed state! 516 516 */ 517 VM R3DECL(int) VMR3ReqFree(PVMREQ pReq)517 VMMR3DECL(int) VMR3ReqFree(PVMREQ pReq) 518 518 { 519 519 /* … … 585 585 * wait till it's completed. 586 586 */ 587 VM R3DECL(int) VMR3ReqQueue(PVMREQ pReq, unsigned cMillies)587 VMMR3DECL(int) VMR3ReqQueue(PVMREQ pReq, unsigned cMillies) 588 588 { 589 589 LogFlow(("VMR3ReqQueue: pReq=%p cMillies=%d\n", pReq, cMillies)); … … 661 661 * Use RT_INDEFINITE_WAIT to only wait till it's completed. 662 662 */ 663 VM R3DECL(int) VMR3ReqWait(PVMREQ pReq, unsigned cMillies)663 VMMR3DECL(int) VMR3ReqWait(PVMREQ pReq, unsigned cMillies) 664 664 { 665 665 LogFlow(("VMR3ReqWait: pReq=%p cMillies=%d\n", pReq, cMillies)); … … 726 726 * @param pUVM Pointer to the user mode VM structure. 727 727 */ 728 VM R3DECL(int) VMR3ReqProcessU(PUVM pUVM)728 VMMR3DECL(int) VMR3ReqProcessU(PUVM pUVM) 729 729 { 730 730 LogFlow(("VMR3ReqProcessU: (enmVMState=%d)\n", pUVM->pVM ? pUVM->pVM->enmVMState : VMSTATE_CREATING)); -
trunk/src/VBox/VMM/testcase/Makefile.kmk
r12444 r12989 85 85 # 86 86 tstVMStructGC_TEMPLATE = VBOXGCEXE 87 tstVMStructGC_DEFS = IN_VMM_ GC IN_PDM_GC IN_CFGM_GC IN_IOM_GC IN_VM_GC IN_CPUM_GC IN_SELM_GC IN_PGM_GC IN_TRPM_GC IN_MM_GC IN_PDM_GC IN_DBGF_GC IN_PATM_GC IN_DIS_GC IN_STAM_GC IN_VGADEVICE_GC IN_CSAM_GC IN_SSM_GC IN_REM_GC IN_RRM_GC87 tstVMStructGC_DEFS = IN_VMM_RC IN_DIS IN_RT_RC IN_RT_GC 88 88 ifdef VBOX_WITH_IDT_PATCHING 89 89 tstVMStructGC_DEFS += VBOX_WITH_IDT_PATCHING … … 93 93 94 94 tstVMStructSize_TEMPLATE= VBOXR3AUTOTST 95 tstVMStructSize_DEFS = IN_VMM_R3 IN_ PDM_R3 IN_CFGM_R3 IN_IOM_R3 IN_VM_R3 IN_CPUM_R3 IN_SELM_R3 IN_PGM_R3 IN_TRPM_R3 IN_MM_R3 IN_PDM_R3 IN_DBGF_R3 IN_PATM_R3 IN_DIS_R3 IN_STAM_R3 IN_VGADEVICE_R3 IN_CSAM_R3 IN_SSM_R3 IN_REM_R395 tstVMStructSize_DEFS = IN_VMM_R3 IN_DIS 96 96 ifdef VBOX_WITH_IDT_PATCHING 97 97 tstVMStructSize_DEFS += VBOX_WITH_IDT_PATCHING … … 102 102 103 103 tstAsmStructs_TEMPLATE = VBOXR3AUTOTST 104 tstAsmStructs_DEFS = IN_VMM_R3 IN_ PDM_R3 IN_CFGM_R3 IN_IOM_R3 IN_VM_R3 IN_CPUM_R3 IN_SELM_R3 IN_PGM_R3 IN_TRPM_R3 IN_MM_R3 IN_PDM_R3 IN_DBGF_R3 IN_PATM_R3 IN_DIS_R3 IN_STAM_R3 IN_VGADEVICE_R3 IN_CSAM_R3 IN_SSM_R3104 tstAsmStructs_DEFS = IN_VMM_R3 IN_DIS 105 105 ifdef VBOX_WITH_IDT_PATCHING 106 106 tstAsmStructs_DEFS += VBOX_WITH_IDT_PATCHING … … 110 110 111 111 tstAsmStructsGC_TEMPLATE= VBOXGCEXE 112 tstAsmStructsGC_DEFS = IN_VMM_ GC IN_PDM_GC IN_CFGM_GC IN_IOM_GC IN_VM_GC IN_CPUM_GC IN_SELM_GC IN_PGM_GC IN_TRPM_GC IN_MM_GC IN_PDM_GC IN_DBGF_GC IN_PATM_GC IN_DIS_GC IN_STAM_GC IN_VGADEVICE_GC IN_CSAM_GC IN_SSM_GC IN_RRM_GC112 tstAsmStructsGC_DEFS = IN_VMM_RC IN_DIS IN_RT_RC IN_RT_GC 113 113 ifdef VBOX_WITH_IDT_PATCHING 114 114 tstAsmStructsGC_DEFS += VBOX_WITH_IDT_PATCHING
Note:
See TracChangeset
for help on using the changeset viewer.