Changeset 13020 in vbox

Timestamp:

Oct 6, 2008 4:27:16 PM (16 years ago)

Author:

vboxsync

Message:

Knut-compatibility fixes

Location:

trunk

Files:

• include/VBox/pdmapi.h (modified) (1 diff)
• include/VBox/pdmdev.h (modified) (5 diffs)
• src/VBox/Devices/PC/DevAPIC.cpp (modified) (7 diffs)
• src/VBox/VMM/PDM.cpp (modified) (1 diff)
• src/VBox/VMM/PDMDevHlp.cpp (modified) (14 diffs)
• src/VBox/VMM/PDMInternal.h (modified) (3 diffs)
• src/VBox/VMM/VMMAll/EMAll.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMAll/PDMAll.cpp (modified) (3 diffs)
• src/VBox/VMM/testcase/tstVMStructGC.cpp (modified) (3 diffs)
• src/recompiler/VBoxREMWrapper.cpp (modified) (3 diffs)
• src/recompiler/VBoxRecompiler.c (modified) (2 diffs)
• src/recompiler/target-i386/helper.c (modified) (2 diffs)

trunk/include/VBox/pdmapi.h

@@ -51 +51 @@
 VMMDECL(int)    PDMApicSetTPR(PVM pVM, uint8_t u8TPR);
 VMMDECL(int)    PDMApicGetTPR(PVM pVM, uint8_t *pu8TPR, bool *pfPending);
-VMMDECL(int)    PDMApicWRMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
-VMMDECL(int)    PDMApicRDMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);
+VMMDECL(int)    PDMApicWriteMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
+VMMDECL(int)    PDMApicReadMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);
 VMMDECL(int)    PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys);
 

trunk/include/VBox/pdmdev.h

@@ -992 +992 @@
 
     /**
-     * WRMSR in APIC range.
+     * Write MSR in APIC range.
      *
      * @returns VBox status code.
@@ -1000 +1000 @@
      * @param   u64Value        Value to write.
      */
-    DECLR3CALLBACKMEMBER(uint32_t, pfnWRMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
-
-    /**
-     * RDMSR in APIC range.
+    DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
+
+    /**
+     * Read MSR in APIC range.
      *
      * @returns VBox status code.
@@ -1011 +1011 @@
      * @param   pu64Value       Value read.
      */
-    DECLR3CALLBACKMEMBER(uint32_t, pfnRDMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
+    DECLR3CALLBACKMEMBER(uint32_t, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
 
     /**
@@ -1046 +1046 @@
     /** The name of the RC GetTPR entry point. */
     const char         *pszGetTPRRC;
-    /** The name of the RC WRMSR entry point. */
-    const char         *pszWRMSRRC;
-    /** The name of the RC RDMSR entry point. */
-    const char         *pszRDMSRRC;
+    /** The name of the RC WriteMSR entry point. */
+    const char         *pszWriteMSRRC;
+    /** The name of the RC ReadMSR entry point. */
+    const char         *pszReadMSRRC;
     /** The name of the RC BusDeliver entry point. */
     const char         *pszBusDeliverRC;
@@ -1065 +1065 @@
     /** The name of the R0 GetTPR entry point. */
     const char         *pszGetTPRR0;
-    /** The name of the R0 WRMSR entry point. */
-    const char         *pszWRMSRR0;
-    /** The name of the R0 RDMSR entry point. */
-    const char         *pszRDMSRR0;
+    /** The name of the R0 WriteMSR entry point. */
+    const char         *pszWriteMSRR0;
+    /** The name of the R0 ReadMSR entry point. */
+    const char         *pszReadMSRR0;
     /** The name of the R0 BusDeliver entry point. */
     const char         *pszBusDeliverR0;

trunk/src/VBox/Devices/PC/DevAPIC.cpp

@@ -366 +366 @@
                                            uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
                                            uint8_t u8TriggerMode);
-PDMBOTHCBDECL(uint32_t) apicWRMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
-PDMBOTHCBDECL(uint32_t) apicRDMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);
+PDMBOTHCBDECL(uint32_t) apicWriteMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
+PDMBOTHCBDECL(uint32_t) apicReadMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);
 PDMBOTHCBDECL(int)  ioapicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
 PDMBOTHCBDECL(int)  ioapicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
@@ -581 +581 @@
 }
 
-PDMBOTHCBDECL(uint32_t) apicWRMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value)
-{
+PDMBOTHCBDECL(uint32_t) apicWriteMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value)
+{
+    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
+    u32Reg -= MSR_IA32_APIC_START;
+    LogRel(("nike: WRMSR on %d: to %x written %llx\n", iCpu, u32Reg, u64Value));
     return 0;
 }
-PDMBOTHCBDECL(uint32_t) apicRDMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value)
-{
+PDMBOTHCBDECL(uint32_t) apicReadMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value)
+{
+    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
+    u32Reg -= MSR_IA32_APIC_START;
+    LogRel(("nike: RDMSR on %d: read from %x\n", iCpu, u32Reg));
+    *pu64Value = 0;
     return 0;
 }
@@ -1968 +1975 @@
     ApicReg.pfnSetTPRR3             = apicSetTPR;
     ApicReg.pfnGetTPRR3             = apicGetTPR;
-    ApicReg.pfnWRMSRR3              = apicWRMSR;
-    ApicReg.pfnRDMSRR3              = apicRDMSR;
+    ApicReg.pfnWriteMSRR3           = apicWriteMSR;
+    ApicReg.pfnReadMSRR3            = apicReadMSR;
     ApicReg.pfnBusDeliverR3         = apicBusDeliverCallback;
     if (fGCEnabled) {
@@ -1978 +1985 @@
         ApicReg.pszSetTPRRC         = "apicSetTPR";
         ApicReg.pszGetTPRRC         = "apicGetTPR";
-        ApicReg.pszWRMSRRC          = "apicWRMSR";
-        ApicReg.pszRDMSRRC          = "apicRDMSR";
+        ApicReg.pszWriteMSRRC       = "apicWriteMSR";
+        ApicReg.pszReadMSRRC        = "apicReadMSR";
         ApicReg.pszBusDeliverRC     = "apicBusDeliverCallback";
     } else {
@@ -1988 +1995 @@
         ApicReg.pszSetTPRRC         = NULL;
         ApicReg.pszGetTPRRC         = NULL;
-        ApicReg.pszWRMSRRC          = NULL;
-        ApicReg.pszRDMSRRC          = NULL;
+        ApicReg.pszWriteMSRRC       = NULL;
+        ApicReg.pszReadMSRRC        = NULL;
         ApicReg.pszBusDeliverRC     = NULL;
     }
@@ -1999 +2006 @@
         ApicReg.pszSetTPRR0         = "apicSetTPR";
         ApicReg.pszGetTPRR0         = "apicGetTPR";
-        ApicReg.pszWRMSRR0          = "apicWRMSR";
-        ApicReg.pszRDMSRR0          = "apicRDMSR";
+        ApicReg.pszWriteMSRR0       = "apicWriteMSR";
+        ApicReg.pszReadMSRR0        = "apicReadMSR";
         ApicReg.pszBusDeliverR0     = "apicBusDeliverCallback";
     } else {
@@ -2009 +2016 @@
         ApicReg.pszSetTPRR0         = NULL;
         ApicReg.pszGetTPRR0         = NULL;
-        ApicReg.pszWRMSRR0          = NULL;
-        ApicReg.pszRDMSRR0          = NULL;
+        ApicReg.pszWriteMSRR0       = NULL;
+        ApicReg.pszReadMSRR0        = NULL;
         ApicReg.pszBusDeliverR0     = NULL;
     }

trunk/src/VBox/VMM/PDM.cpp

@@ -432 +432 @@
         pVM->pdm.s.Apic.pfnGetTPRRC         += offDelta;
         pVM->pdm.s.Apic.pfnBusDeliverRC     += offDelta;
-        pVM->pdm.s.Apic.pfnWRMSRRC          += offDelta;
-        pVM->pdm.s.Apic.pfnRDMSRRC          += offDelta;
+        pVM->pdm.s.Apic.pfnWriteMSRRC       += offDelta;
+        pVM->pdm.s.Apic.pfnReadMSRRC        += offDelta;
     }
 

trunk/src/VBox/VMM/PDMDevHlp.cpp

@@ -1489 +1489 @@
     VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
-             ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWRMSR3=%p, .pfnRDMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
-             ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWRMSRRC=%p:{%s}, .pszRDMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
+             ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
+             ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
-             pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWRMSRR3, pApicReg->pfnRDMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
+             pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
              pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
-             pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWRMSRRC, pApicReg->pszWRMSRRC, pApicReg->pszRDMSRRC, pApicReg->pszRDMSRRC, pApicReg->pszBusDeliverRC,
+             pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
              pApicReg->pszBusDeliverRC, ppApicHlpR3));
 
@@ -1512 +1512 @@
         ||  !pApicReg->pfnSetTPRR3
         ||  !pApicReg->pfnGetTPRR3
-        ||  !pApicReg->pfnWRMSRR3
-        ||  !pApicReg->pfnRDMSRR3
+        ||  !pApicReg->pfnWriteMSRR3
+        ||  !pApicReg->pfnReadMSRR3
         ||  !pApicReg->pfnBusDeliverR3)
     {
@@ -1522 +1522 @@
         Assert(pApicReg->pfnSetTPRR3);
         Assert(pApicReg->pfnGetTPRR3);
-        Assert(pApicReg->pfnWRMSRR3);
-        Assert(pApicReg->pfnRDMSRR3);
+        Assert(pApicReg->pfnWriteMSRR3);
+        Assert(pApicReg->pfnReadMSRR3);
         Assert(pApicReg->pfnBusDeliverR3);
         LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
@@ -1534 +1534 @@
             ||  pApicReg->pszSetTPRRC
             ||  pApicReg->pszGetTPRRC
-            ||  pApicReg->pszWRMSRRC
-            ||  pApicReg->pszRDMSRRC
+            ||  pApicReg->pszWriteMSRRC
+            ||  pApicReg->pszReadMSRRC
             ||  pApicReg->pszBusDeliverRC)
         &&  (   !VALID_PTR(pApicReg->pszGetInterruptRC)
@@ -1543 +1543 @@
             ||  !VALID_PTR(pApicReg->pszSetTPRRC)
             ||  !VALID_PTR(pApicReg->pszGetTPRRC)
-            ||  !VALID_PTR(pApicReg->pszWRMSRRC)
-            ||  !VALID_PTR(pApicReg->pszRDMSRRC)
+            ||  !VALID_PTR(pApicReg->pszWriteMSRRC)
+            ||  !VALID_PTR(pApicReg->pszReadMSRRC)
             ||  !VALID_PTR(pApicReg->pszBusDeliverRC))
        )
@@ -1554 +1554 @@
         Assert(VALID_PTR(pApicReg->pszSetTPRRC));
         Assert(VALID_PTR(pApicReg->pszGetTPRRC));
-        Assert(VALID_PTR(pApicReg->pszRDMSRRC));
-        Assert(VALID_PTR(pApicReg->pszWRMSRRC));
+        Assert(VALID_PTR(pApicReg->pszReadMSRRC));
+        Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
         Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
         LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
@@ -1566 +1566 @@
             ||  pApicReg->pszSetTPRR0
             ||  pApicReg->pszGetTPRR0
-            ||  pApicReg->pszWRMSRR0
-            ||  pApicReg->pszRDMSRR0
+            ||  pApicReg->pszWriteMSRR0
+            ||  pApicReg->pszReadMSRR0
             ||  pApicReg->pszBusDeliverR0)
         &&  (   !VALID_PTR(pApicReg->pszGetInterruptR0)
@@ -1575 +1575 @@
             ||  !VALID_PTR(pApicReg->pszSetTPRR0)
             ||  !VALID_PTR(pApicReg->pszGetTPRR0)
-            ||  !VALID_PTR(pApicReg->pszRDMSRR0)
-            ||  !VALID_PTR(pApicReg->pszWRMSRR0)
+            ||  !VALID_PTR(pApicReg->pszReadMSRR0)
+            ||  !VALID_PTR(pApicReg->pszWriteMSRR0)
             ||  !VALID_PTR(pApicReg->pszBusDeliverR0))
        )
@@ -1586 +1586 @@
         Assert(VALID_PTR(pApicReg->pszSetTPRR0));
         Assert(VALID_PTR(pApicReg->pszGetTPRR0));
-        Assert(VALID_PTR(pApicReg->pszRDMSRR0));
-        Assert(VALID_PTR(pApicReg->pszWRMSRR0));
+        Assert(VALID_PTR(pApicReg->pszReadMSRR0));
+        Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
         Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
         LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
@@ -1645 +1645 @@
         if (RT_SUCCESS(rc))
         {
-            rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWRMSRRC, &pVM->pdm.s.Apic.pfnWRMSRRC);
-            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWRMSRRC, rc));
+            rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
+            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
         }
         if (RT_SUCCESS(rc))
         {
-            rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszRDMSRRC, &pVM->pdm.s.Apic.pfnRDMSRRC);
-            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszRDMSRRC, rc));
+            rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
+            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
         }
         if (RT_SUCCESS(rc))
@@ -1674 +1674 @@
         pVM->pdm.s.Apic.pfnSetTPRRC         = 0;
         pVM->pdm.s.Apic.pfnGetTPRRC         = 0;
-        pVM->pdm.s.Apic.pfnWRMSRRC          = 0;
-        pVM->pdm.s.Apic.pfnRDMSRRC          = 0;
+        pVM->pdm.s.Apic.pfnWriteMSRRC       = 0;
+        pVM->pdm.s.Apic.pfnReadMSRRC        = 0;
         pVM->pdm.s.Apic.pfnBusDeliverRC     = 0;
     }
@@ -1713 +1713 @@
         if (RT_SUCCESS(rc))
         {
-            rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWRMSRR0, &pVM->pdm.s.Apic.pfnWRMSRR0);
-            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWRMSRR0, rc));
+            rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
+            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
         }
         if (RT_SUCCESS(rc))
         {
-            rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszRDMSRR0, &pVM->pdm.s.Apic.pfnRDMSRR0);
-            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszRDMSRR0, rc));
+            rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
+            AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
         }
         if (RT_SUCCESS(rc))
@@ -1742 +1742 @@
         pVM->pdm.s.Apic.pfnSetTPRR0         = 0;
         pVM->pdm.s.Apic.pfnGetTPRR0         = 0;
-        pVM->pdm.s.Apic.pfnWRMSRR0          = 0;
-        pVM->pdm.s.Apic.pfnRDMSRR0          = 0;
+        pVM->pdm.s.Apic.pfnWriteMSRR0       = 0;
+        pVM->pdm.s.Apic.pfnReadMSRR0        = 0;
         pVM->pdm.s.Apic.pfnBusDeliverR0     = 0;
         pVM->pdm.s.Apic.pDevInsR0           = 0;
@@ -1758 +1758 @@
     pVM->pdm.s.Apic.pfnSetTPRR3         = pApicReg->pfnSetTPRR3;
     pVM->pdm.s.Apic.pfnGetTPRR3         = pApicReg->pfnGetTPRR3;
-    pVM->pdm.s.Apic.pfnWRMSRR3          = pApicReg->pfnWRMSRR3;
-    pVM->pdm.s.Apic.pfnRDMSRR3          = pApicReg->pfnRDMSRR3;
+    pVM->pdm.s.Apic.pfnWriteMSRR3       = pApicReg->pfnWriteMSRR3;
+    pVM->pdm.s.Apic.pfnReadMSRR3        = pApicReg->pfnReadMSRR3;
     pVM->pdm.s.Apic.pfnBusDeliverR3     = pApicReg->pfnBusDeliverR3;
     Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));

trunk/src/VBox/VMM/PDMInternal.h

@@ -409 +409 @@
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
     DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns));
-    /** @copydoc PDMAPICREG::pfnWRMSRR3 */
-    DECLR3CALLBACKMEMBER(uint32_t,  pfnWRMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
-    /** @copydoc PDMAPICREG::pfnRDMSRR3 */
-    DECLR3CALLBACKMEMBER(uint32_t,  pfnRDMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
+    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
+    DECLR3CALLBACKMEMBER(uint32_t,  pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
+    /** @copydoc PDMAPICREG::pfnReadMSRR3 */
+    DECLR3CALLBACKMEMBER(uint32_t,  pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
     /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
     DECLR3CALLBACKMEMBER(void,      pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
@@ -431 +431 @@
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
     DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns));
-     /** @copydoc PDMAPICREG::pfnWRMSRR3 */
-    DECLR0CALLBACKMEMBER(uint32_t,  pfnWRMSRR0, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
-    /** @copydoc PDMAPICREG::pfnRDMSRR3 */
-    DECLR0CALLBACKMEMBER(uint32_t,  pfnRDMSRR0, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
+     /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
+    DECLR0CALLBACKMEMBER(uint32_t,  pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
+    /** @copydoc PDMAPICREG::pfnReadMSRR3 */
+    DECLR0CALLBACKMEMBER(uint32_t,  pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
     /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
     DECLR0CALLBACKMEMBER(void,      pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
@@ -453 +453 @@
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
     DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns));
-    /** @copydoc PDMAPICREG::pfnWRMSRR3 */
-    DECLRCCALLBACKMEMBER(uint32_t,  pfnWRMSRRC, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
-    /** @copydoc PDMAPICREG::pfnRDMSRR3 */
-    DECLRCCALLBACKMEMBER(uint32_t,  pfnRDMSRRC, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
+    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
+    DECLRCCALLBACKMEMBER(uint32_t,  pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value));
+    /** @copydoc PDMAPICREG::pfnReadMSRR3 */
+    DECLRCCALLBACKMEMBER(uint32_t,  pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value));
     /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
     DECLRCCALLBACKMEMBER(void,      pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -2579 +2579 @@
         /* In X2APIC specification this range is reserved for APIC control. */ 
         if ((pRegFrame->ecx >= MSR_IA32_APIC_START) && (pRegFrame->ecx < MSR_IA32_APIC_END))
-        {
-            rc = PDMApicRDMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, &val);
-        } 
+            rc = PDMApicReadMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, &val);
         else 
-        {
             /* We should actually trigger a #GP here, but don't as that might cause more trouble. */
             val = 0;
-            break;
-        }
+        break;
     }
     Log(("EMInterpretRdmsr %s (%x) -> val=%VX64\n", emMSRtoString(pRegFrame->ecx), pRegFrame->ecx, val));
@@ -2728 +2724 @@
         /* In X2APIC specification this range is reserved for APIC control. */ 
         if ((pRegFrame->ecx >=  MSR_IA32_APIC_START) && (pRegFrame->ecx <  MSR_IA32_APIC_END))
-        {
-            return PDMApicWRMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, val);
-        }
+            return PDMApicWriteMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, val);
+
         /* We should actually trigger a #GP here, but don't as that might cause more trouble. */
         break;

trunk/src/VBox/VMM/VMMAll/PDMAll.cpp

@@ -254 +254 @@
 
 /**
- * WRMSR in APIC range.
+ * Write MSR in APIC range.
  *
  * @returns VBox status code.
@@ -262 +262 @@
  * @param   u64Value        Value to write.
  */
-VMMDECL(int) PDMApicWRMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value)
-{
-    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnWRMSR));
-        pdmLock(pVM);
-        pVM->pdm.s.Apic.CTX_SUFF(pfnWRMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, u64Value);
-        pdmUnlock(pVM);
-        return VINF_SUCCESS;
-    }
-    return VERR_PDM_NO_APIC_INSTANCE;
-}
-
-/**
- * RDMSR in APIC range.
+VMMDECL(int) PDMApicWriteMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value)
+{
+    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
+    {
+        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnWriteMSR));
+        pdmLock(pVM);
+        pVM->pdm.s.Apic.CTX_SUFF(pfnWriteMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, u64Value);
+        pdmUnlock(pVM);
+        return VINF_SUCCESS;
+    }
+    return VERR_PDM_NO_APIC_INSTANCE;
+}
+
+/**
+ * Read MSR in APIC range.
  *
  * @returns VBox status code.
@@ -284 +284 @@
  * @param   pu64Value       Value read.
  */
-VMMDECL(int) PDMApicRDMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value)
-{
-    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnRDMSR));
-        pdmLock(pVM);
-        pVM->pdm.s.Apic.CTX_SUFF(pfnRDMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, pu64Value);
+VMMDECL(int) PDMApicReadMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value)
+{
+    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
+    {
+        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnReadMSR));
+        pdmLock(pVM);
+        pVM->pdm.s.Apic.CTX_SUFF(pfnReadMSR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), iCpu, u32Reg, pu64Value);
         pdmUnlock(pVM);
         return VINF_SUCCESS;

trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

@@ -275 +275 @@
     GEN_CHECK_OFF(PDM, Apic.pfnGetBaseR3);
     GEN_CHECK_OFF(PDM, Apic.pfnSetTPRR3);
-    GEN_CHECK_OFF(PDM, Apic.pfnWRMSRR3);
-    GEN_CHECK_OFF(PDM, Apic.pfnRDMSRR3);
+    GEN_CHECK_OFF(PDM, Apic.pfnWriteMSRR3);
+    GEN_CHECK_OFF(PDM, Apic.pfnReadMSRR3);
     GEN_CHECK_OFF(PDM, Apic.pfnGetTPRR3);
     GEN_CHECK_OFF(PDM, Apic.pfnBusDeliverR3);
@@ -285 +285 @@
     GEN_CHECK_OFF(PDM, Apic.pfnSetTPRR0);
     GEN_CHECK_OFF(PDM, Apic.pfnGetTPRR0);
-    GEN_CHECK_OFF(PDM, Apic.pfnWRMSRR0);
-    GEN_CHECK_OFF(PDM, Apic.pfnRDMSRR0);
+    GEN_CHECK_OFF(PDM, Apic.pfnWriteMSRR0);
+    GEN_CHECK_OFF(PDM, Apic.pfnReadMSRR0);
     GEN_CHECK_OFF(PDM, Apic.pfnBusDeliverR0);
     GEN_CHECK_OFF(PDM, Apic.pDevInsRC);
@@ -294 +294 @@
     GEN_CHECK_OFF(PDM, Apic.pfnSetTPRRC);
     GEN_CHECK_OFF(PDM, Apic.pfnGetTPRRC);
-    GEN_CHECK_OFF(PDM, Apic.pfnWRMSRRC);
-    GEN_CHECK_OFF(PDM, Apic.pfnRDMSRRC);
+    GEN_CHECK_OFF(PDM, Apic.pfnWriteMSRRC);
+    GEN_CHECK_OFF(PDM, Apic.pfnReadMSRRC);
     GEN_CHECK_OFF(PDM, Apic.pfnBusDeliverRC);
     GEN_CHECK_OFF(PDM, IoApic);

trunk/src/recompiler/VBoxREMWrapper.cpp

@@ -645 +645 @@
     { REMPARMDESC_FLAGS_INT,        sizeof(uint8_t), NULL }
 };
-static const REMPARMDESC g_aArgsPDMApicWRMSR[] =
+static const REMPARMDESC g_aArgsPDMApicWriteMSR[] =
 {
     { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
@@ -652 +652 @@
     { REMPARMDESC_FLAGS_INT,        sizeof(uint64_t), NULL }
 };
-static const REMPARMDESC g_aArgsPDMApicRDMSR[] =
+static const REMPARMDESC g_aArgsPDMApicReadMSR[] =
 {
     { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
@@ -1079 +1079 @@
     { "PDMApicSetBase",                         (void *)(uintptr_t)&PDMApicSetBase,                 &g_aArgsPDMApicSetBase[0],                  RT_ELEMENTS(g_aArgsPDMApicSetBase),                    REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
     { "PDMApicSetTPR",                          (void *)(uintptr_t)&PDMApicSetTPR,                  &g_aArgsPDMApicSetTPR[0],                   RT_ELEMENTS(g_aArgsPDMApicSetTPR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
-    { "PDMApicWRMSR",                           (void *)(uintptr_t)&PDMApicWRMSR,                  &g_aArgsPDMApicWRMSR[0],                   RT_ELEMENTS(g_aArgsPDMApicWRMSR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),           NULL },
-    { "PDMApicRDMSR",                           (void *)(uintptr_t)&PDMApicRDMSR,                  &g_aArgsPDMApicRDMSR[0],                   RT_ELEMENTS(g_aArgsPDMApicRDMSR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),           NULL },
+    { "PDMApicWriteMSR",                        (void *)(uintptr_t)&PDMApicWriteMSR,                  &g_aArgsPDMApicWriteMSR[0],                   RT_ELEMENTS(g_aArgsPDMApicWriteMSR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),           NULL },
+    { "PDMApicReadMSR",                         (void *)(uintptr_t)&PDMApicReadMSR,                  &g_aArgsPDMApicReadMSR[0],                   RT_ELEMENTS(g_aArgsPDMApicReadMSR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),           NULL },
     { "PDMR3DmaRun",                            (void *)(uintptr_t)&PDMR3DmaRun,                    &g_aArgsVM[0],                              RT_ELEMENTS(g_aArgsVM),                                REMFNDESC_FLAGS_RET_VOID,   0,                  NULL },
     { "PDMGetInterrupt",                        (void *)(uintptr_t)&PDMGetInterrupt,                &g_aArgsPDMGetInterrupt[0],                 RT_ELEMENTS(g_aArgsPDMGetInterrupt),                   REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },

trunk/src/recompiler/VBoxRecompiler.c

@@ -4090 +4090 @@
 {
     uint64_t value;
-    int rc = PDMApicRDMSR(env->pVM, 0/* cpu */, reg, &value);
-    if (rc != VINF_SUCCESS)
-    {
-        /** @todo: exception ? */
-        value = 0;
-    }
+    int rc = PDMApicReadMSR(env->pVM, 0/* cpu */, reg, &value);
+    if (VBOX_SUCCESS(rc))
+    {
+        LogFlow(("cpu_apic_rdms returns %#x\n", value));
+        return value;
+    }
+    /** @todo: exception ? */
+    LogFlow(("cpu_apic_rdms returns 0 (rc=%Vrc)\n", rc));
     return value;
 }
@@ -4101 +4103 @@
 void     cpu_apic_wrmsr(CPUX86State *env, uint32_t reg, uint64_t value)
 {
-    int rc = PDMApicWRMSR(env->pVM, 0 /* cpu */, reg, value);
-    if (rc != VINF_SUCCESS)
-    {
-        /** @todo: exception ? */
-    }
+    int rc = PDMApicWriteMSR(env->pVM, 0 /* cpu */, reg, value);
+    /** @todo: exception if error ? */
+    LogFlow(("cpu_apic_wrmsr: rc=%Vrc\n", rc)); NOREF(rc);
 }
 /* -+- I/O Ports -+- */

trunk/src/recompiler/target-i386/helper.c

@@ -3077 +3077 @@
         /* In X2APIC specification this range is reserved for APIC control. */ 
         if ((ecx >= MSR_APIC_RANGE_START) && (ecx < MSR_APIC_RANGE_END))
-        {
             cpu_apic_wrmsr(env, ecx, val);
-        }
         else 
-        {
-            /* @todo: exception ? */
-        }
+            /* @todo: exception ? */;
         break;
     }
@@ -3139 +3135 @@
         /* In X2APIC specification this range is reserved for APIC control. */ 
         if ((ecx >= MSR_APIC_RANGE_START) && (ecx < MSR_APIC_RANGE_END))
-        {
             val = cpu_apic_rdmsr(env, ecx);
-        } 
         else 
-        {
             /** @todo: exception ? */
             val = 0;
-            break;
-        }
+        break;
     }
     }