VirtualBox

Changeset 13060 in vbox


Ignore:
Timestamp:
Oct 8, 2008 7:42:06 AM (16 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
37532
Message:

#1865: More PGM changes.

Location:
trunk
Files:
14 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/pgm.h

    r13045 r13060  
    438438#endif /* VBOX_STRICT */
    439439
     440#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
     441VMMDECL(int)    PGMDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
     442VMMDECL(int)    PGMDynMapGCPageOff(PVM pVM, RTGCPHYS GCPhys, void **ppv);
     443VMMDECL(int)    PGMDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
     444VMMDECL(int)    PGMDynMapHCPageOff(PVM pVM, RTHCPHYS HCPhys, void **ppv);
     445#endif
     446
    440447
    441448#ifdef IN_GC
    … …  
    444451 * @{
    445452 */
    446 VMMRCDECL(int)  PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
    447 VMMRCDECL(int)  PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv);
    448 VMMRCDECL(int)  PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
    449453VMMRCDECL(int)  PGMGCInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
    450454/** @} */
    … …  
    459463VMMR0DECL(int)  PGMR0PhysAllocateHandyPages(PVM pVM);
    460464VMMR0DECL(int)  PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
    461 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    462 VMMR0DECL(int)  PGMR0DynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv);
    463 VMMR0DECL(int)  PGMR0DynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv);
    464 VMMR0DECL(int)  PGMR0DynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv);
    465 # endif
    466465/** @} */
    467466#endif /* IN_RING0 */

  • trunk/src/VBox/VMM/Makefile.kmk

    r13038 r13060  
    357357VMMR0_DEFS     += VBOX_WITH_IDT_PATCHING
    358358endif
    359 VMMR0_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_0
     359VMMR0_DEFS.darwin = VBOX_WITH_2X_4GB_ADDR_SPACE VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    360360ifeq ($(VBOX_LDR_FMT),pe)
    361361VMMR0_LDFLAGS   = -Entry:VMMR0EntryEx

  • trunk/src/VBox/VMM/PGM.cpp

    r13045 r13060  
    32373237     * @todo A20 setting
    32383238     */
    3239     if (   pVM->pgm.s.CTXSUFF(pPool)
     3239    if (   pVM->pgm.s.CTX_SUFF(pPool)
    32403240        && !HWACCMIsNestedPagingActive(pVM)
    32413241        && PGMMODE_WITH_PAGING(pVM->pgm.s.enmGuestMode) != PGMMODE_WITH_PAGING(enmGuestMode))

  • trunk/src/VBox/VMM/PGMInternal.h

    r13047 r13060  
    220220 * @remark  There is no need to assert on the result.
    221221 */
    222 #ifdef IN_GC
    223 # define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
    224 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    225 # define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMR0DynMapHCPage(pVM, HCPhys, (void **)(ppv))
     222#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     223# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMDynMapHCPage(pVM, HCPhys, (void **)(ppv))
    226224#else
    227225# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
    … …  
    240238 * @remark  There is no need to assert on the result.
    241239 */
    242 #ifdef IN_GC
    243 # define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
    244 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    245 # define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMR0DynMapGCPage(pVM, GCPhys, (void **)(ppv))
     240#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     241# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMDynMapGCPage(pVM, GCPhys, (void **)(ppv))
    246242#else
    247243# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
    … …  
    260256 * @remark  There is no need to assert on the result.
    261257 */
    262 #ifdef IN_GC
    263 # define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
    264 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    265 # define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMR0DynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
     258#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     259# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMDynMapGCPageOff(pVM, GCPhys, (void **)(ppv))
    266260#else
    267261# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
    … …  
    927921    uint32_t                            u32Alignment; /**< alignment. */
    928922#ifndef VBOX_WITH_NEW_PHYS_CODE
    929     /** HC virtual lookup ranges for chunks - R3/R0 Ptr.
    930      * Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
     923    /** R3 virtual lookup ranges for chunks.
     924     * Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges.
     925     * @remarks This is occationally accessed from ring-0!! (not darwin) */
     926# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     927    R3PTRTYPE(PRTR3UINTPTR)             paChunkR3Ptrs;
     928# else
    931929    R3R0PTRTYPE(PRTR3UINTPTR)           paChunkR3Ptrs;
     930# endif
    932931#endif
    933932    /** Start of the HC mapping of the range. This is only used for MMIO2. */
    … …  
    995994    /** Pointer to the next range - R0. */
    996995    R0PTRTYPE(struct PGMROMRANGE *) pNextR0;
    997     /** Pointer to the next range - GC. */
    998     RCPTRTYPE(struct PGMROMRANGE *) pNextGC;
     996    /** Pointer to the next range - RC. */
     997    RCPTRTYPE(struct PGMROMRANGE *) pNextRC;
    999998    /** Pointer alignment */
    1000999    RTRCPTR                         GCPtrAlignment;
    … …  
    10621061
    10631062
    1064 /** @todo r=bird: fix typename. */
    10651063/**
    10661064 * PGMPhysRead/Write cache entry
    10671065 */
    1068 typedef struct PGMPHYSCACHE_ENTRY
    1069 {
    1070     /** HC pointer to physical page */
    1071     R3PTRTYPE(uint8_t *)            pbHC;
     1066typedef struct PGMPHYSCACHEENTRY
     1067{
     1068    /** R3 pointer to physical page. */
     1069    R3PTRTYPE(uint8_t *)            pbR3;
    10721070    /** GC Physical address for cache entry */
    10731071    RTGCPHYS                        GCPhys;
    … …  
    10751073    RTGCPHYS                        u32Padding0; /**< alignment padding. */
    10761074#endif
    1077 } PGMPHYSCACHE_ENTRY;
     1075} PGMPHYSCACHEENTRY;
    10781076
    10791077/**
    … …  
    10851083    uint64_t                        aEntries;
    10861084    /** Cache entries */
    1087     PGMPHYSCACHE_ENTRY              Entry[PGM_MAX_PHYSCACHE_ENTRIES];
     1085    PGMPHYSCACHEENTRY               Entry[PGM_MAX_PHYSCACHE_ENTRIES];
    10881086} PGMPHYSCACHE;
    10891087
    … …  
    11271125#endif
    11281126    /** The chunk map. */
     1127#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     1128    R3PTRTYPE(PPGMCHUNKR3MAP) volatile  pChunk;
     1129#else
    11291130    R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile  pChunk;
     1131#endif
    11301132} PGMCHUNKR3MAPTLBE;
    11311133/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
    … …  
    11731175{
    11741176    /** Address of the page. */
    1175     RTGCPHYS volatile                    GCPhys;
     1177    RTGCPHYS volatile                   GCPhys;
    11761178    /** The guest page. */
    1177     R3R0PTRTYPE(PPGMPAGE) volatile       pPage;
     1179#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     1180    R3PTRTYPE(PPGMPAGE) volatile        pPage;
     1181#else
     1182    R3R0PTRTYPE(PPGMPAGE) volatile      pPage;
     1183#endif
    11781184    /** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
     1185#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     1186    R3PTRTYPE(PPGMCHUNKR3MAP) volatile  pMap;
     1187#else
    11791188    R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap;
     1189#endif
    11801190    /** The address */
    1181     R3R0PTRTYPE(void *) volatile         pv;
     1191#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     1192    R3PTRTYPE(void *) volatile          pv;
     1193#else
     1194    R3R0PTRTYPE(void *) volatile        pv;
     1195#endif
    11821196#if HC_ARCH_BITS == 32
    1183     uint32_t                             u32Padding; /**< alignment padding. */
     1197    uint32_t                            u32Padding; /**< alignment padding. */
    11841198#endif
    11851199} PGMPAGER3MAPTLBE;
    … …  
    14051419    AVLOHCPHYSNODECORE  Core;
    14061420    /** Pointer to the HC mapping of the page. */
     1421#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     1422    R3PTRTYPE(void *)   pvPageHC;
     1423#else
    14071424    R3R0PTRTYPE(void *) pvPageHC;
     1425#endif
    14081426    /** The guest physical address. */
    14091427#if HC_ARCH_BITS == 32 && GC_ARCH_BITS == 64
    … …  
    16581676 * @remark  There is no need to assert on the result.
    16591677 */
    1660 #ifdef IN_GC
    1661 # define PGMPOOL_PAGE_2_PTR(pVM, pPage)    pgmGCPoolMapPage((pVM), (pPage))
     1678#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
     1679# define PGMPOOL_PAGE_2_PTR(pVM, pPage)    pgmPoolMapPage((pVM), (pPage))
    16621680#else
    16631681# define PGMPOOL_PAGE_2_PTR(pVM, pPage)    ((pPage)->pvPageHC)
    … …  
    19551973     * @{ */
    19561974    /** The guest's page directory, HC pointer. */
     1975#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     1976    R3PTRTYPE(PX86PD)           pGuestPDHC;
     1977#else
    19571978    R3R0PTRTYPE(PX86PD)         pGuestPDHC;
     1979#endif
    19581980    /** The guest's page directory, static GC mapping. */
    19591981    RCPTRTYPE(PX86PD)           pGuestPDGC;
    … …  
    19651987    RCPTRTYPE(PX86PDPT)         pGstPaePDPTGC;
    19661988    /** The guest's page directory pointer table, HC pointer. */
     1989#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     1990    R3PTRTYPE(PX86PDPT)         pGstPaePDPTHC;
     1991#else
    19671992    R3R0PTRTYPE(PX86PDPT)       pGstPaePDPTHC;
     1993#endif
    19681994    /** The guest's page directories, HC pointers.
    19691995     * These are individual pointers and don't have to be adjecent.
    19701996     * These don't have to be up-to-date - use pgmGstGetPaePD() to access them. */
     1997#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     1998    R3PTRTYPE(PX86PDPAE)        apGstPaePDsHC[4];
     1999#else
    19712000    R3R0PTRTYPE(PX86PDPAE)      apGstPaePDsHC[4];
     2001#endif
    19722002    /** The guest's page directories, static GC mapping.
    19732003     * Unlike the HC array the first entry can be accessed as a 2048 entry PD.
    … …  
    19832013     * @{ */
    19842014    /** The guest's page directory pointer table, HC pointer. */
     2015#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
    19852016    R3R0PTRTYPE(PX86PML4)       pGstPaePML4HC;
     2017#else
     2018    R3R0PTRTYPE(PX86PML4)       pGstPaePML4HC;
     2019#endif
    19862020    /** @} */
    19872021
    … …  
    19892023     * @{ */
    19902024    /** The 32-Bit PD - HC Ptr. */
     2025#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2026    R3PTRTYPE(PX86PD)           pHC32BitPD;
     2027#else
    19912028    R3R0PTRTYPE(PX86PD)         pHC32BitPD;
     2029#endif
    19922030    /** The 32-Bit PD - GC Ptr. */
    19932031    RCPTRTYPE(PX86PD)           pGC32BitPD;
    … …  
    20042042     * Even though these are 4 pointers, what they point at is a single table.
    20052043     * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
     2044#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2045    R3PTRTYPE(PX86PDPAE)        apHCPaePDs[4];
     2046#else
    20062047    R3R0PTRTYPE(PX86PDPAE)      apHCPaePDs[4];
     2048#endif
    20072049    /** The four PDs for the low 4GB - GC Ptr.
    20082050     * Same kind of mapping as apHCPaePDs. */
    … …  
    20262068#endif
    20272069    /** The Page Map Level 4 table - HC Ptr. */
     2070#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2071    R3PTRTYPE(PX86PML4)         pHCPaePML4;
     2072#else
    20282073    R3R0PTRTYPE(PX86PML4)       pHCPaePML4;
     2074#endif
    20292075    /** The Physical Address (HC) of the Page Map Level 4 table. */
    20302076    RTHCPHYS                    HCPhysPaePML4;
    20312077    /** The pgm pool page descriptor for the current active CR3. */
     2078#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2079    R3PTRTYPE(PPGMPOOLPAGE)     pHCShwAmd64CR3;
     2080#else
    20322081    R3R0PTRTYPE(PPGMPOOLPAGE)   pHCShwAmd64CR3;
     2082#endif
    20332083
    20342084    /** @}*/
    … …  
    20372087     * @{ */
    20382088    /** Root table; format depends on the host paging mode (AMD-V) or EPT */
     2089#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2090    R3PTRTYPE(void *)           pHCNestedRoot;
     2091#else
    20392092    R3R0PTRTYPE(void *)         pHCNestedRoot;
     2093#endif
    20402094    /** The Physical Address (HC) of the nested paging root. */
    20412095    RTHCPHYS                    HCPhysNestedRoot;
    … …  
    21482202    R3PTRTYPE(PPGMROMRANGE)         pRomRangesR3;
    21492203    /** R0 pointer corresponding to PGM::pRomRangesR3. */
    2150     R0PTRTYPE(PPGMRAMRANGE)         pRomRangesR0;
    2151     /** GC pointer corresponding to PGM::pRomRangesR3. */
    2152     RCPTRTYPE(PPGMRAMRANGE)         pRomRangesGC;
     2204    R0PTRTYPE(PPGMROMRANGE)         pRomRangesR0;
     2205    /** RC pointer corresponding to PGM::pRomRangesR3. */
     2206    RCPTRTYPE(PPGMROMRANGE)         pRomRangesRC;
    21532207    /** Alignment padding. */
    21542208    RTRCPTR                         GCPtrPadding2;
    … …  
    22472301    PDMCRITSECT                     CritSect;
    22482302
    2249     /** Shadow Page Pool - HC Ptr. */
    2250     R3R0PTRTYPE(PPGMPOOL)           pPoolHC;
    2251     /** Shadow Page Pool - GC Ptr. */
    2252     RCPTRTYPE(PPGMPOOL)             pPoolGC;
     2303    /** Shadow Page Pool - R3 Ptr. */
     2304    R3PTRTYPE(PPGMPOOL)             pPoolR3;
     2305    /** Shadow Page Pool - R0 Ptr. */
     2306    R0PTRTYPE(PPGMPOOL)             pPoolR0;
     2307    /** Shadow Page Pool - RC Ptr. */
     2308    RCPTRTYPE(PPGMPOOL)             pPoolRC;
    22532309
    22542310    /** We're not in a state which permits writes to guest memory.
    … …  
    22702326    {
    22712327        /** The chunk tree, ordered by chunk id. */
    2272         R3R0PTRTYPE(PAVLU32NODECORE)  pTree;
     2328#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
     2329        R3PTRTYPE(PAVLU32NODECORE)  pTree;
     2330#else
     2331        R3R0PTRTYPE(PAVLU32NODECORE) pTree;
     2332#endif
    22732333        /** The chunk mapping TLB. */
    22742334        PGMCHUNKR3MAPTLB            Tlb;
    … …  
    26642724
    26652725#endif /* IN_RING3 */
    2666 #ifdef IN_GC
    2667 void           *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
     2726#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
     2727void           *pgmPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
    26682728#endif
    26692729int             pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage);
    … …  
    30313091#endif /* !IN_GC */
    30323092
    3033 #if !defined(IN_GC) /** @todo && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) */
     3093#if !defined(IN_GC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    30343094
    30353095# ifndef VBOX_WITH_NEW_PHYS_CODE
    … …  
    31513211#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES only MapCR3 usage. */
    31523212        PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(PGM2VM(pPGM), pRam->paChunkR3Ptrs);
    3153         *pHCPtr = paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK);
     3213        *pHCPtr = (RTHCPTR)(paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
    31543214#else
    31553215        *pHCPtr = (RTHCPTR)(pRam->paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));

  • trunk/src/VBox/VMM/PGMPhys.cpp

    r13042 r13060  
    13401340                    pRomNew->pNextR3 = pRom;
    13411341                    pRomNew->pNextR0 = pRom ? MMHyperCCToR0(pVM, pRom) : NIL_RTR0PTR;
    1342                     pRomNew->pNextGC = pRom ? MMHyperCCToRC(pVM, pRom) : NIL_RTRCPTR;
     1342                    pRomNew->pNextRC = pRom ? MMHyperCCToRC(pVM, pRom) : NIL_RTRCPTR;
    13431343
    13441344                    if (pRomPrev)
    … …  
    13461346                        pRomPrev->pNextR3 = pRomNew;
    13471347                        pRomPrev->pNextR0 = MMHyperCCToR0(pVM, pRomNew);
    1348                         pRomPrev->pNextGC = MMHyperCCToRC(pVM, pRomNew);
     1348                        pRomPrev->pNextRC = MMHyperCCToRC(pVM, pRomNew);
    13491349                    }
    13501350                    else
    … …  
    13521352                        pVM->pgm.s.pRomRangesR3 = pRomNew;
    13531353                        pVM->pgm.s.pRomRangesR0 = MMHyperCCToR0(pVM, pRomNew);
    1354                         pVM->pgm.s.pRomRangesGC = MMHyperCCToRC(pVM, pRomNew);
     1354                        pVM->pgm.s.pRomRangesRC = MMHyperCCToRC(pVM, pRomNew);
    13551355                    }
    13561356

  • trunk/src/VBox/VMM/PGMPhysRWTmpl.h

    r12989 r13060  
    5252    {
    5353        RTGCPHYS off = GCPhys - pVM->pgm.s.pgmphysreadcache.Entry[iCacheIndex].GCPhys;
    54         return *(PGMPHYS_DATATYPE *)(pVM->pgm.s.pgmphysreadcache.Entry[iCacheIndex].pbHC + off);
     54        return *(PGMPHYS_DATATYPE *)(pVM->pgm.s.pgmphysreadcache.Entry[iCacheIndex].pbR3 + off);
    5555    }
    5656#endif /* PGM_PHYSMEMACCESS_CACHING */
    … …  
    9494    {
    9595        RTGCPHYS off = GCPhys - pVM->pgm.s.pgmphyswritecache.Entry[iCacheIndex].GCPhys;
    96         *(PGMPHYS_DATATYPE *)(pVM->pgm.s.pgmphyswritecache.Entry[iCacheIndex].pbHC + off) = val;
     96        *(PGMPHYS_DATATYPE *)(pVM->pgm.s.pgmphyswritecache.Entry[iCacheIndex].pbR3 + off) = val;
    9797        return;
    9898    }

  • trunk/src/VBox/VMM/PGMPool.cpp

    r13042 r13060  
    180180    if (VBOX_FAILURE(rc))
    181181        return rc;
    182     pVM->pgm.s.pPoolHC = pPool;
    183     pVM->pgm.s.pPoolGC = MMHyperHC2GC(pVM, pPool);
     182    pVM->pgm.s.pPoolR3 = pPool;
     183    pVM->pgm.s.pPoolR0 = MMHyperR3ToR0(pVM, pPool);
     184    pVM->pgm.s.pPoolRC = MMHyperR3ToRC(pVM, pPool);
    184185
    185186    /*
    … …  
    380381void pgmR3PoolRelocate(PVM pVM)
    381382{
    382     pVM->pgm.s.pPoolGC = MMHyperHC2GC(pVM, pVM->pgm.s.pPoolHC);
    383     pVM->pgm.s.pPoolHC->pVMGC = pVM->pVMGC;
     383    pVM->pgm.s.pPoolRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3);
     384    pVM->pgm.s.pPoolR3->pVMGC = pVM->pVMRC;
    384385#ifdef PGMPOOL_WITH_USER_TRACKING
    385     pVM->pgm.s.pPoolHC->paUsersGC = MMHyperHC2GC(pVM, pVM->pgm.s.pPoolHC->paUsersHC);
     386    pVM->pgm.s.pPoolR3->paUsersGC = MMHyperHC2GC(pVM, pVM->pgm.s.pPoolR3->paUsersHC);
    386387#endif
    387388#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
    388     pVM->pgm.s.pPoolHC->paPhysExtsGC = MMHyperHC2GC(pVM, pVM->pgm.s.pPoolHC->paPhysExtsHC);
     389    pVM->pgm.s.pPoolR3->paPhysExtsGC = MMHyperHC2GC(pVM, pVM->pgm.s.pPoolR3->paPhysExtsHC);
    389390#endif
    390391#ifdef PGMPOOL_WITH_MONITORING
    391     int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolHC->pfnAccessHandlerRC);
     392    int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerRC);
    392393    AssertReleaseRC(rc);
    393394    /* init order hack. */
    394     if (!pVM->pgm.s.pPoolHC->pfnAccessHandlerR0)
    395     {
    396         rc = PDMR3LdrGetSymbolR0(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolHC->pfnAccessHandlerR0);
     395    if (!pVM->pgm.s.pPoolR3->pfnAccessHandlerR0)
     396    {
     397        rc = PDMR3LdrGetSymbolR0(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerR0);
    397398        AssertReleaseRC(rc);
    398399    }
    … …  
    423424VMMR3DECL(int) PGMR3PoolGrow(PVM pVM)
    424425{
    425     PPGMPOOL pPool = pVM->pgm.s.pPoolHC;
     426    PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
    426427    AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_INTERNAL_ERROR);
    427428
    … …  
    510511static DECLCALLBACK(int) pgmR3PoolAccessHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
    511512{
    512     STAM_PROFILE_START(&pVM->pgm.s.pPoolHC->StatMonitorHC, a);
    513     PPGMPOOL pPool = pVM->pgm.s.pPoolHC;
     513    STAM_PROFILE_START(&pVM->pgm.s.pPoolR3->StatMonitorHC, a);
     514    PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
    514515    PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)pvUser;
    515516    LogFlow(("pgmR3PoolAccessHandler: GCPhys=%VGp %p:{.Core=%RHp, .idx=%d, .GCPhys=%RGp, .enmType=%d}\n",

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r13019 r13060  
    785785{
    786786    PPGM           pPGM   = &pVM->pgm.s;
    787     PPGMPOOL       pPool  = pPGM->CTXSUFF(pPool);
     787    PPGMPOOL       pPool  = pPGM->CTX_SUFF(pPool);
    788788    PPGMPOOLPAGE   pShwPage;
    789789    int            rc;
    … …  
    837837{
    838838    PPGM           pPGM   = &pVM->pgm.s;
    839     PPGMPOOL       pPool  = pPGM->CTXSUFF(pPool);
     839    PPGMPOOL       pPool  = pPGM->CTX_SUFF(pPool);
    840840    PPGMPOOLPAGE   pShwPage;
    841841
    … …  
    873873    PPGM           pPGM   = &pVM->pgm.s;
    874874    const unsigned iPml4e = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
    875     PPGMPOOL       pPool  = pPGM->CTXSUFF(pPool);
     875    PPGMPOOL       pPool  = pPGM->CTX_SUFF(pPool);
    876876    PX86PML4E      pPml4e;
    877877    PPGMPOOLPAGE   pShwPage;
    … …  
    977977    PPGM           pPGM   = &pVM->pgm.s;
    978978    const unsigned iPml4e = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
    979     PPGMPOOL       pPool  = pPGM->CTXSUFF(pPool);
     979    PPGMPOOL       pPool  = pPGM->CTX_SUFF(pPool);
    980980    PX86PML4E      pPml4e;
    981981    PPGMPOOLPAGE   pShwPage;
    … …  
    10191019    PPGM           pPGM   = &pVM->pgm.s;
    10201020    const unsigned iPml4e = (GCPtr >> EPT_PML4_SHIFT) & EPT_PML4_MASK;
    1021     PPGMPOOL       pPool  = pPGM->CTXSUFF(pPool);
     1021    PPGMPOOL       pPool  = pPGM->CTX_SUFF(pPool);
    10221022    PEPTPML4       pPml4  = (PEPTPML4)pPGM->pHCNestedRoot;
    10231023    PEPTPML4E      pPml4e;
    … …  
    17501750}
    17511751
     1752#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1753
     1754/**
     1755 * Temporarily maps one guest page specified by GC physical address.
     1756 * These pages must have a physical mapping in HC, i.e. they cannot be MMIO pages.
     1757 *
     1758 * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
     1759 * reused after 8 mappings (or perhaps a few more if you score with the cache).
     1760 *
     1761 * @returns VBox status.
     1762 * @param   pVM         VM handle.
     1763 * @param   GCPhys      GC Physical address of the page.
     1764 * @param   ppv         Where to store the address of the mapping.
     1765 */
     1766VMMDECL(int) PGMDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv)
     1767{
     1768    AssertMsg(!(GCPhys & PAGE_OFFSET_MASK), ("GCPhys=%VGp\n", GCPhys));
     1769
     1770    /*
     1771     * Get the ram range.
     1772     */
     1773    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
     1774    while (pRam && GCPhys - pRam->GCPhys >= pRam->cb)
     1775        pRam = pRam->CTX_SUFF(pNext);
     1776    if (!pRam)
     1777    {
     1778        AssertMsgFailed(("Invalid physical address %VGp!\n", GCPhys));
     1779        return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
     1780    }
     1781
     1782    /*
     1783     * Pass it on to PGMDynMapHCPage.
     1784     */
     1785    RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT]);
     1786    //Log(("PGMDynMapGCPage: GCPhys=%VGp HCPhys=%VHp\n", GCPhys, HCPhys));
     1787    return PGMDynMapHCPage(pVM, HCPhys, ppv);
     1788}
     1789
     1790
     1791/**
     1792 * Temporarily maps one guest page specified by unaligned GC physical address.
     1793 * These pages must have a physical mapping in HC, i.e. they cannot be MMIO pages.
     1794 *
     1795 * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
     1796 * reused after 8 mappings (or perhaps a few more if you score with the cache).
     1797 *
     1798 * The caller is aware that only the speicifed page is mapped and that really bad things
     1799 * will happen if writing beyond the page!
     1800 *
     1801 * @returns VBox status.
     1802 * @param   pVM         VM handle.
     1803 * @param   GCPhys      GC Physical address within the page to be mapped.
     1804 * @param   ppv         Where to store the address of the mapping address corresponding to GCPhys.
     1805 */
     1806VMMDECL(int) PGMDynMapGCPageOff(PVM pVM, RTGCPHYS GCPhys, void **ppv)
     1807{
     1808    /*
     1809     * Get the ram range.
     1810     */
     1811    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
     1812    while (pRam && GCPhys - pRam->GCPhys >= pRam->cb)
     1813        pRam = pRam->CTX_SUFF(pNext);
     1814    if (!pRam)
     1815    {
     1816        AssertMsgFailed(("Invalid physical address %VGp!\n", GCPhys));
     1817        return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
     1818    }
     1819
     1820    /*
     1821     * Pass it on to PGMDynMapHCPageOff.
     1822     */
     1823    RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT]);
     1824    return PGMDynMapHCPageOff(pVM, HCPhys, ppv);
     1825}
     1826
     1827
     1828/**
     1829 * Temporarily maps one host page specified by HC physical address.
     1830 *
     1831 * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
     1832 * reused after 8 mappings (or perhaps a few more if you score with the cache).
     1833 *
     1834 * @returns VBox status.
     1835 * @param   pVM         VM handle.
     1836 * @param   HCPhys      HC Physical address of the page.
     1837 * @param   ppv         Where to store the address of the mapping.
     1838 */
     1839VMMDECL(int) PGMDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv)
     1840{
     1841    AssertMsg(!(HCPhys & PAGE_OFFSET_MASK), ("HCPhys=%VHp\n", HCPhys));
     1842# ifdef IN_GC
     1843
     1844    /*
     1845     * Check the cache.
     1846     */
     1847    register unsigned iCache;
     1848    if (    pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 0] == HCPhys
     1849        ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 1] == HCPhys
     1850        ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 2] == HCPhys
     1851        ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 3] == HCPhys)
     1852    {
     1853        static const uint8_t au8Trans[MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT][RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache)] =
     1854        {
     1855            { 0, 5, 6, 7 },
     1856            { 0, 1, 6, 7 },
     1857            { 0, 1, 2, 7 },
     1858            { 0, 1, 2, 3 },
     1859            { 4, 1, 2, 3 },
     1860            { 4, 5, 2, 3 },
     1861            { 4, 5, 6, 3 },
     1862            { 4, 5, 6, 7 },
     1863        };
     1864        Assert(RT_ELEMENTS(au8Trans) == 8);
     1865        Assert(RT_ELEMENTS(au8Trans[0]) == 4);
     1866        int iPage = au8Trans[pVM->pgm.s.iDynPageMapLast][iCache];
     1867        void *pv = pVM->pgm.s.pbDynPageMapBaseGC + (iPage << PAGE_SHIFT);
     1868        *ppv = pv;
     1869        STAM_COUNTER_INC(&pVM->pgm.s.StatDynMapCacheHits);
     1870        //Log(("PGMGCDynMapHCPage: HCPhys=%VHp pv=%VGv iPage=%d iCache=%d\n", HCPhys, pv, iPage, iCache));
     1871        return VINF_SUCCESS;
     1872    }
     1873    Assert(RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) == 4);
     1874    STAM_COUNTER_INC(&pVM->pgm.s.StatDynMapCacheMisses);
     1875
     1876    /*
     1877     * Update the page tables.
     1878     */
     1879    register unsigned iPage = pVM->pgm.s.iDynPageMapLast;
     1880    pVM->pgm.s.iDynPageMapLast = iPage = (iPage + 1) & ((MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT) - 1);
     1881    Assert((MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT) == 8);
     1882
     1883    pVM->pgm.s.aHCPhysDynPageMapCache[iPage & (RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) - 1)] = HCPhys;
     1884    pVM->pgm.s.paDynPageMap32BitPTEsGC[iPage].u = (uint32_t)HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D;
     1885    pVM->pgm.s.paDynPageMapPaePTEsGC[iPage].u   =           HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D;
     1886
     1887    void *pv = pVM->pgm.s.pbDynPageMapBaseGC + (iPage << PAGE_SHIFT);
     1888    *ppv = pv;
     1889    ASMInvalidatePage(pv);
     1890    Log4(("PGMGCDynMapHCPage: HCPhys=%VHp pv=%VGv iPage=%d\n", HCPhys, pv, iPage));
     1891    return VINF_SUCCESS;
     1892
     1893#else  /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     1894    AssertFailed();
     1895    return VERR_NOT_IMPLEMENTED;
     1896#endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     1897}
     1898
     1899
     1900/**
     1901 * Temporarily maps one host page specified by HC physical address, returning
     1902 * pointer within the page.
     1903 *
     1904 * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
     1905 * reused after 8 mappings (or perhaps a few more if you score with the cache).
     1906 *
     1907 * @returns VBox status.
     1908 * @param   pVM         VM handle.
     1909 * @param   HCPhys      HC Physical address of the page.
     1910 * @param   ppv         Where to store the address corresponding to HCPhys.
     1911 */
     1912VMMDECL(int) PGMDynMapHCPageOff(PVM pVM, RTHCPHYS HCPhys, void **ppv)
     1913{
     1914    int rc = PGMDynMapHCPage(pVM, HCPhys, ppv);
     1915    if (RT_SUCCESS(rc))
     1916        *ppv = (void *)((uintptr_t)*ppv | (HCPhys & PAGE_OFFSET_MASK));
     1917    return rc;
     1918}
     1919
     1920#endif /* IN_GC || VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    17521921
    17531922#ifdef VBOX_STRICT

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r13046 r13060  
    121121    if (!pPDSrc)
    122122    {
    123         LogFlow(("Trap0eHandler: guest PDPTR %d not present CR3=%VGp\n", (pvFault >> X86_PML4_SHIFT) & X86_PML4_MASK, (CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK)));
     123#   if PGM_GST_TYPE == PGM_TYPE_AMD64 && GC_ARCH_BITS == 64
     124        LogFlow(("Trap0eHandler: guest PML4 %d not present CR3=%VGp\n", (int)(((RTGCUINTPTR)pvFault >> X86_PML4_SHIFT) & X86_PML4_MASK), CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK));
     125#   else
     126        LogFlow(("Trap0eHandler: guest iPDSrc=%u not present CR3=%VGp\n", iPDSrc, CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK));
     127#   endif
    124128        STAM_STATS({ pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution) = &pVM->pgm.s.StatTrap0eGuestTrap; });
    125129        TRPMSetErrorCode(pVM, uErr);
    … …  
    987991
    988992# if PGM_GST_TYPE == PGM_TYPE_AMD64
    989     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     993    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    990994
    991995    /* Fetch the pgm pool shadow descriptor. */
    … …  
    10851089        PX86PDPAE  pPDPAE  = pVM->pgm.s.CTXMID(ap,PaePDs)[0]; /* root of the 2048 PDE array */
    10861090        PX86PDEPAE pPDEDst = &pPDPAE->a[iPdpte * X86_PG_PAE_ENTRIES];
    1087         PPGMPOOL   pPool   = pVM->pgm.s.CTXSUFF(pPool);
     1091        PPGMPOOL   pPool   = pVM->pgm.s.CTX_SUFF(pPool);
    10881092
    10891093        Assert(!(CTXSUFF(pVM->pgm.s.pGstPaePDPT)->a[iPdpte].n.u1Present));
    … …  
    13121316            if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
    13131317            {
    1314                 PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     1318                PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    13151319                pgmTrackDerefGCPhys(pPool, pShwPage, &pRam->aPages[iPage]);
    13161320                pShwPage->cPresent--;
    … …  
    13261330# else  /* !PGMPOOL_WITH_GCPHYS_TRACKING */
    13271331    pShwPage->cPresent--;
    1328     pVM->pgm.s.CTXSUFF(pPool)->cPresent--;
     1332    pVM->pgm.s.CTX_SUFF(pPool)->cPresent--;
    13291333# endif /* !PGMPOOL_WITH_GCPHYS_TRACKING */
    13301334}
    … …  
    13671371
    13681372    /* update statistics. */
    1369     pVM->pgm.s.CTXSUFF(pPool)->cPresent++;
     1373    pVM->pgm.s.CTX_SUFF(pPool)->cPresent++;
    13701374    pShwPage->cPresent++;
    13711375    if (pShwPage->iFirstPresent > iPTDst)
    … …  
    18051809     * Yea, I'm lazy.
    18061810     */
    1807     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     1811    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    18081812# if PGM_GST_TYPE == PGM_TYPE_AMD64
    18091813    pgmPoolFreeByPage(pPool, pShwPage, pShwPde->idx, iPDDst);
    … …  
    31403144    unsigned    iPdNoMapping;
    31413145    const bool  fRawR0Enabled = EMIsRawRing0Enabled(pVM);
    3142     PPGMPOOL    pPool         = pVM->pgm.s.CTXSUFF(pPool);
     3146    PPGMPOOL    pPool         = pVM->pgm.s.CTX_SUFF(pPool);
    31433147
    31443148    /* Only check mappings if they are supposed to be put into the shadow page table. */
    … …  
    36603664
    36613665# if PGM_GST_TYPE == PGM_TYPE_AMD64 || PGM_GST_TYPE == PGM_TYPE_PAE
    3662     PPGMPOOL    pPool         = pVM->pgm.s.CTXSUFF(pPool);
     3666    PPGMPOOL    pPool         = pVM->pgm.s.CTX_SUFF(pPool);
    36633667# endif
    36643668

  • trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

    r13046 r13060  
    486486            }
    487487# elif PGM_GST_TYPE == PGM_TYPE_AMD64
    488             PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     488            PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    489489
    490490            pVM->pgm.s.pGstPaePML4HC = (R3R0PTRTYPE(PX86PML4))HCPtrGuestCR3;
    … …  
    564564        if (pVM->pgm.s.pHCShwAmd64CR3)
    565565        {
    566             PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     566            PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    567567            pgmPoolFreeByPage(pPool, pVM->pgm.s.pHCShwAmd64CR3, PGMPOOL_IDX_AMD64_CR3, pVM->pgm.s.pHCShwAmd64CR3->GCPhys >> PAGE_SHIFT);
    568568            pVM->pgm.s.pHCShwAmd64CR3 = NULL;
    … …  
    614614                                              pVM->pgm.s.pszR3GstWriteHandlerCR3);
    615615# else  /* PGMPOOL_WITH_MIXED_PT_CR3 */
    616         rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool),
     616        rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool),
    617617                                         pVM->pgm.s.enmShadowMode == PGMMODE_PAE
    618618                                      || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX
    … …  
    640640    if (pVM->pgm.s.GCPhysGstCR3Monitored != GCPhysCR3)
    641641    {
    642         rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3);
     642        rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3);
    643643        if (VBOX_FAILURE(rc))
    644644        {
    … …  
    661661                Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
    662662
    663                 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys);
     663                rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys);
    664664            }
    665665
    … …  
    674674        else if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS)
    675675        {
    676             rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
     676            rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
    677677            AssertRC(rc);
    678678            pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS;
    … …  
    710710        AssertRCReturn(rc, rc);
    711711# else /* PGMPOOL_WITH_MIXED_PT_CR3 */
    712         rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool),
     712        rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool),
    713713                                           pVM->pgm.s.enmShadowMode == PGMMODE_PAE
    714714                                        || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX
    … …  
    728728    if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS)
    729729    {
    730         rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT);
     730        rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PDPT);
    731731        AssertRC(rc);
    732732    }
    … …  
    738738        {
    739739            Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
    740             int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
     740            int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
    741741            AssertRC(rc2);
    742742            if (VBOX_FAILURE(rc2))

  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r13046 r13060  
    491491int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
    492492{
    493 #ifdef IN_GC
    494     /*
    495      * Just some sketchy GC code.
     493#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     494    /*
     495     * Just some sketchy GC/R0-darwin code.
    496496     */
    497497    *ppMap = NULL;
    498498    RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
    499499    Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
    500     return PGMGCDynMapHCPage(pVM, HCPhys, ppv);
     500    return PGMDynMapHCPage(pVM, HCPhys, ppv);
    501501
    502502#else /* IN_RING3 || IN_RING0 */
    … …  
    557557
    558558
    559 #ifndef IN_GC
     559#if !defined(IN_GC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    560560/**
    561561 * Load a guest page into the ring-3 physical TLB.
    … …  
    613613    return VINF_SUCCESS;
    614614}
    615 #endif /* !IN_GC */
     615#endif /* !IN_GC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    616616
    617617
    … …  
    644644{
    645645#ifdef VBOX_WITH_NEW_PHYS_CODE
    646 #ifdef IN_GC
    647     /* Until a physical TLB is implemented for GC, let PGMGCDynMapGCPageEx handle it. */
    648     return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
     646# if defined(IN_GC) && defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     647    /* Until a physical TLB is implemented for GC or/and R0-darwin, let PGMDynMapGCPageEx handle it. */
     648    return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
     649
    649650#else
    650651    int rc = pgmLock(pVM);
    … …  
    697698     * Temporary fallback code.
    698699     */
    699 # ifdef IN_GC
    700     return PGMGCDynMapGCPageEx(pVM, GCPhys, ppv);
     700# if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     701    return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
    701702# else
    702703    return PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1, ppv);
    … …  
    816817{
    817818#ifdef VBOX_WITH_NEW_PHYS_CODE
    818 #ifdef IN_GC
     819#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    819820    /* currently nothing to do here. */
    820821/* --- postponed
    … …  
    11071108 * @thread  EMT.
    11081109 */
    1109 static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbHC)
     1110static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbR3)
    11101111{
    11111112    uint32_t iCacheIndex;
    … …  
    11141115
    11151116    GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
    1116     pbHC   = (uint8_t *)PAGE_ADDRESS(pbHC);
     1117    pbR3   = (uint8_t *)PAGE_ADDRESS(pbR3);
    11171118
    11181119    iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
    … …  
    11211122
    11221123    pCache->Entry[iCacheIndex].GCPhys = GCPhys;
    1123     pCache->Entry[iCacheIndex].pbHC   = pbHC;
     1124    pCache->Entry[iCacheIndex].pbR3   = pbR3;
    11241125}
    11251126#endif
    … …  
    12191220                    if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
    12201221                    {
    1221 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1222#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    12221223                        void *pvSrc = NULL;
    1223                         PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
    1224                         pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
     1224                        PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
    12251225#else
    12261226                        void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    12681268                    if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
    12691269                    {
    1270 #ifdef IN_GC  /** @todo @bugref{3202}: R0 too */
     1270#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    12711271                        void *pvSrc = NULL;
    1272                         PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
    1273                         pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
     1272                        PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
    12741273#else
    12751274                        void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    12981297                        case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
    12991298                        {
    1300 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1299#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    13011300                            void *pvSrc = NULL;
    1302                             PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvSrc);
    1303                             pvSrc = (char *)pvSrc + (off & PAGE_OFFSET_MASK);
     1301                            PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
    13041302#else
    13051303                            void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    15221520                        if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
    15231521                        {
    1524 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1522#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    15251523                            void *pvDst = NULL;
    1526                             PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
    1527                             pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
     1524                            PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
    15281525#else
    15291526                            void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    15671564                        if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
    15681565                        {
    1569 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1566#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    15701567                            void *pvDst = NULL;
    1571                             PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
    1572                             pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
     1568                            PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
    15731569#else
    15741570                            void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    16121608                    if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
    16131609                    {
    1614 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1610#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    16151611                        void *pvDst = NULL;
    1616                         PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
    1617                         pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
     1612                        PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
    16181613#else
    16191614                        void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    16411636                        case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
    16421637                        {
    1643 #ifdef IN_GC /** @todo @bugref{3202}: R0 too */
     1638#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    16441639                            void *pvDst = NULL;
    1645                             PGMGCDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), &pvDst);
    1646                             pvDst = (char *)pvDst + (off & PAGE_OFFSET_MASK);
     1640                            PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
    16471641#else
    16481642                            void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
    … …  
    17231717}
    17241718
    1725 #ifndef IN_GC /* Ring 0 & 3 only */  /** @todo @bugref{1865,3202}: this'll be fun! */
     1719#if !defined(IN_GC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* Ring 0 & 3 only */  /** @todo @bugref{1865,3202}: this'll be fun! */
    17261720
    17271721/**

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r13042 r13060  
    8787
    8888
    89 #ifdef IN_GC
     89#if defined(IN_GC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    9090/**
    9191 * Maps a pool page into the current context.
    … …  
    9595 * @param   pPage   The page to map.
    9696 */
    97 void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage)
     97void *pgmPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage)
    9898{
    9999    /* general pages. */
    100100    if (pPage->idx >= PGMPOOL_IDX_FIRST)
    101101    {
    102         Assert(pPage->idx < pVM->pgm.s.pPoolGC->cCurPages);
     102        Assert(pPage->idx < pVM->pgm.s.CTX_SUFF(pPool)->cCurPages);
    103103        void *pv;
    104         int rc = PGMGCDynMapHCPage(pVM, pPage->Core.Key, &pv);
     104        int rc = PGMDynMapHCPage(pVM, pPage->Core.Key, &pv);
    105105        AssertReleaseRC(rc);
    106106        return pv;
    … …  
    108108
    109109    /* special pages. */
     110# ifdef IN_GC
    110111    switch (pPage->idx)
    111112    {
    … …  
    127128            return NULL;
    128129    }
    129 }
    130 #endif /* IN_GC */
     130
     131# else  /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     132    RTHCPHYS HCPhys;
     133    switch (pPage->idx)
     134    {
     135        case PGMPOOL_IDX_PD:
     136            HCPhys = pVM->pgm.s.HCPhys32BitPD;
     137            break;
     138        case PGMPOOL_IDX_PAE_PD:
     139        case PGMPOOL_IDX_PAE_PD_0:
     140            HCPhys = pVM->pgm.s.aHCPhysPaePDs[0];
     141            break;
     142        case PGMPOOL_IDX_PAE_PD_1:
     143            HCPhys = pVM->pgm.s.aHCPhysPaePDs[1];
     144            break;
     145        case PGMPOOL_IDX_PAE_PD_2:
     146            HCPhys = pVM->pgm.s.aHCPhysPaePDs[2];
     147            break;
     148        case PGMPOOL_IDX_PAE_PD_3:
     149            HCPhys = pVM->pgm.s.aHCPhysPaePDs[3];
     150            break;
     151        case PGMPOOL_IDX_PDPT:
     152            HCPhys = pVM->pgm.s.HCPhysPaePDPT;
     153            break;
     154        default:
     155            AssertReleaseMsgFailed(("Invalid index %d\n", pPage->idx));
     156            return NULL;
     157    }
     158    void *pv;
     159    int rc = PGMDynMapHCPage(pVM, pPage->Core.Key, &pv);
     160    AssertReleaseRC(rc);
     161    return pv;
     162# endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     163}
     164#endif /* IN_GC || VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    131165
    132166
    … …  
    213247#ifdef IN_GC
    214248    return (const void *)((RTGCUINTPTR)pvFault & ~(RTGCUINTPTR)(cbEntry - 1));
     249
     250#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     251    void *pvRet;
     252    int rc = PGMDynMapGCPageOff(pPool->pVMHC, GCPhysFault & ~(RTGCPHYS)(cbEntry - 1), &pvRet);
     253    AssertFatalRCSuccess(rc);
     254    return pvRet;
    215255
    216256#elif defined(IN_RING0)
    … …  
    950990DECLEXPORT(int) pgmPoolAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
    951991{
    952     STAM_PROFILE_START(&pVM->pgm.s.CTXSUFF(pPool)->CTXSUFF(StatMonitor), a);
    953     PPGMPOOL        pPool = pVM->pgm.s.CTXSUFF(pPool);
     992    STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pPool)->CTXSUFF(StatMonitor), a);
     993    PPGMPOOL        pPool = pVM->pgm.s.CTX_SUFF(pPool);
    954994    PPGMPOOLPAGE    pPage = (PPGMPOOLPAGE)pvUser;
    955995    LogFlow(("pgmPoolAccessHandler: pvFault=%VGv pPage=%p:{.idx=%d} GCPhysFault=%VGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
    … …  
    9831023        {
    9841024             rc = pgmPoolAccessHandlerSimple(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
    985              STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTXSUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,Handled), a);
     1025             STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,Handled), a);
    9861026             return rc;
    9871027        }
    … …  
    10051045        {
    10061046             rc = pgmPoolAccessHandlerSTOSD(pVM, pPool, pPage, &Cpu, pRegFrame, GCPhysFault, pvFault);
    1007              STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTXSUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,RepStosd), a);
     1047             STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,RepStosd), a);
    10081048             return rc;
    10091049        }
    … …  
    10261066    if (rc == VINF_EM_RAW_EMULATE_INSTR && fReused)
    10271067        rc = VINF_SUCCESS;
    1028     STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTXSUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,FlushPage), a);
     1068    STAM_PROFILE_STOP_EX(&pVM->pgm.s.CTX_SUFF(pPool)->CTXSUFF(StatMonitor), &pPool->CTXMID(StatMonitor,FlushPage), a);
    10291069    return rc;
    10301070}
    … …  
    18361876void pgmPoolMonitorModifiedClearAll(PVM pVM)
    18371877{
    1838     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     1878    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    18391879    LogFlow(("pgmPoolMonitorModifiedClearAll: cModifiedPages=%d\n", pPool->cModifiedPages));
    18401880
    … …  
    18651905void pgmPoolClearAll(PVM pVM)
    18661906{
    1867     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     1907    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    18681908    STAM_PROFILE_START(&pPool->StatClearAll, c);
    18691909    LogFlow(("pgmPoolClearAll: cUsedPages=%d\n", pPool->cUsedPages));
    … …  
    23752415{
    23762416    LogFlow(("pgmPoolTrackFlushGCPhysPT: HCPhys=%RHp iShw=%d cRefs=%d\n", pPhysPage->HCPhys, iShw, cRefs));
    2377     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2417    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    23782418
    23792419    /*
    … …  
    24632503void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs)
    24642504{
    2465     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool); NOREF(pPool);
     2505    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); NOREF(pPool);
    24662506    LogFlow(("pgmPoolTrackFlushGCPhysPT: HCPhys=%RHp iShw=%d cRefs=%d\n", pPhysPage->HCPhys, iShw, cRefs));
    24672507    STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPT, f);
    … …  
    24812521void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt)
    24822522{
    2483     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2523    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    24842524    STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTs, f);
    24852525    LogFlow(("pgmPoolTrackFlushGCPhysPTs: HCPhys=%RHp iPhysExt\n", pPhysPage->HCPhys, iPhysExt));
    … …  
    25282568int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage)
    25292569{
    2530     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2570    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    25312571    STAM_PROFILE_START(&pPool->StatTrackFlushGCPhysPTsSlow, s);
    25322572    LogFlow(("pgmPoolTrackFlushGCPhysPTsSlow: cUsedPages=%d cPresent=%d HCPhys=%RHp\n",
    … …  
    27642804PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt)
    27652805{
    2766     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2806    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    27672807    uint16_t iPhysExt = pPool->iPhysExtFreeHead;
    27682808    if (iPhysExt == NIL_PGMPOOL_PHYSEXT_INDEX)
    … …  
    27872827void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt)
    27882828{
    2789     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2829    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    27902830    Assert(iPhysExt < pPool->cMaxPhysExts);
    27912831    PPGMPOOLPHYSEXT pPhysExt = &pPool->CTXSUFF(paPhysExts)[iPhysExt];
    … …  
    28052845void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt)
    28062846{
    2807     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     2847    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    28082848
    28092849    const uint16_t  iPhysExtStart = iPhysExt;
    … …  
    28362876static uint16_t pgmPoolTrackPhysExtInsert(PVM pVM, uint16_t iPhysExt, uint16_t iShwPT)
    28372877{
    2838     PPGMPOOL        pPool = pVM->pgm.s.CTXSUFF(pPool);
     2878    PPGMPOOL        pPool = pVM->pgm.s.CTX_SUFF(pPool);
    28392879    PPGMPOOLPHYSEXT paPhysExts = pPool->CTXSUFF(paPhysExts);
    28402880
    … …  
    38753915int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage)
    38763916{
    3877     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     3917    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    38783918    STAM_PROFILE_ADV_START(&pPool->StatAlloc, a);
    38793919    LogFlow(("pgmPoolAlloc: GCPhys=%VGp enmKind=%d iUser=%#x iUserTable=%#x\n", GCPhys, enmKind, iUser, iUserTable));
    … …  
    39984038{
    39994039    LogFlow(("pgmPoolFree: HCPhys=%VHp iUser=%#x iUserTable=%#x\n", HCPhys, iUser, iUserTable));
    4000     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     4040    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    40014041    pgmPoolFreeByPage(pPool, pgmPoolGetPage(pPool, HCPhys), iUser, iUserTable);
    40024042}
    … …  
    40144054{
    40154055    /** @todo profile this! */
    4016     PPGMPOOL pPool = pVM->pgm.s.CTXSUFF(pPool);
     4056    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    40174057    PPGMPOOLPAGE pPage = pgmPoolGetPage(pPool, HCPhys);
    40184058    Log3(("pgmPoolGetPageByHCPhys: HCPhys=%VHp -> %p:{.idx=%d .GCPhys=%VGp .enmKind=%d}\n",
    … …  
    40334073{
    40344074    LogFlow(("pgmPoolFlushAll:\n"));
    4035     pgmPoolFlushAllInt(pVM->pgm.s.CTXSUFF(pPool));
    4036 }
    4037 
     4075    pgmPoolFlushAllInt(pVM->pgm.s.CTX_SUFF(pPool));
     4076}
     4077

  • trunk/src/VBox/VMM/VMMGC/PGMGC.cpp

    r13035 r13060  
    165165
    166166
    167 /**
    168  * Temporarily maps one guest page specified by GC physical address.
    169  * These pages must have a physical mapping in HC, i.e. they cannot be MMIO pages.
    170  *
    171  * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
    172  * reused after 8 mappings (or perhaps a few more if you score with the cache).
    173  *
    174  * @returns VBox status.
    175  * @param   pVM         VM handle.
    176  * @param   GCPhys      GC Physical address of the page.
    177  * @param   ppv         Where to store the address of the mapping.
    178  */
    179 VMMRCDECL(int) PGMGCDynMapGCPage(PVM pVM, RTGCPHYS GCPhys, void **ppv)
    180 {
    181     AssertMsg(!(GCPhys & PAGE_OFFSET_MASK), ("GCPhys=%VGp\n", GCPhys));
    182 
    183     /*
    184      * Get the ram range.
    185      */
    186     PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesRC;
    187     while (pRam && GCPhys - pRam->GCPhys >= pRam->cb)
    188         pRam = pRam->pNextRC;
    189     if (!pRam)
    190     {
    191         AssertMsgFailed(("Invalid physical address %VGp!\n", GCPhys));
    192         return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
    193     }
    194 
    195     /*
    196      * Pass it on to PGMGCDynMapHCPage.
    197      */
    198     RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT]);
    199     //Log(("PGMGCDynMapGCPage: GCPhys=%VGp HCPhys=%VHp\n", GCPhys, HCPhys));
    200     return PGMGCDynMapHCPage(pVM, HCPhys, ppv);
    201 }
    202 
    203 
    204 /**
    205  * Temporarily maps one guest page specified by unaligned GC physical address.
    206  * These pages must have a physical mapping in HC, i.e. they cannot be MMIO pages.
    207  *
    208  * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
    209  * reused after 8 mappings (or perhaps a few more if you score with the cache).
    210  *
    211  * The caller is aware that only the speicifed page is mapped and that really bad things
    212  * will happen if writing beyond the page!
    213  *
    214  * @returns VBox status.
    215  * @param   pVM         VM handle.
    216  * @param   GCPhys      GC Physical address within the page to be mapped.
    217  * @param   ppv         Where to store the address of the mapping address corresponding to GCPhys.
    218  */
    219 VMMRCDECL(int) PGMGCDynMapGCPageEx(PVM pVM, RTGCPHYS GCPhys, void **ppv)
    220 {
    221     /*
    222      * Get the ram range.
    223      */
    224     PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesRC;
    225     while (pRam && GCPhys - pRam->GCPhys >= pRam->cb)
    226         pRam = pRam->pNextRC;
    227     if (!pRam)
    228     {
    229         AssertMsgFailed(("Invalid physical address %VGp!\n", GCPhys));
    230         return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
    231     }
    232 
    233     /*
    234      * Pass it on to PGMGCDynMapHCPage.
    235      */
    236     RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT]);
    237     int rc = PGMGCDynMapHCPage(pVM, HCPhys, ppv);
    238     if (VBOX_SUCCESS(rc))
    239         *ppv = (void *)((uintptr_t)*ppv | (GCPhys & PAGE_OFFSET_MASK));
    240     return rc;
    241 }
    242 
    243 
    244 /**
    245  * Temporarily maps one host page specified by HC physical address.
    246  *
    247  * Be WARNED that the dynamic page mapping area is small, 8 pages, thus the space is
    248  * reused after 8 mappings (or perhaps a few more if you score with the cache).
    249  *
    250  * @returns VBox status.
    251  * @param   pVM         VM handle.
    252  * @param   HCPhys      HC Physical address of the page.
    253  * @param   ppv         Where to store the address of the mapping.
    254  */
    255 VMMRCDECL(int) PGMGCDynMapHCPage(PVM pVM, RTHCPHYS HCPhys, void **ppv)
    256 {
    257     AssertMsg(!(HCPhys & PAGE_OFFSET_MASK), ("HCPhys=%VHp\n", HCPhys));
    258 
    259     /*
    260      * Check the cache.
    261      */
    262     register unsigned iCache;
    263     if (    pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 0] == HCPhys
    264         ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 1] == HCPhys
    265         ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 2] == HCPhys
    266         ||  pVM->pgm.s.aHCPhysDynPageMapCache[iCache = 3] == HCPhys)
    267     {
    268         static const uint8_t au8Trans[MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT][RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache)] =
    269         {
    270             { 0, 5, 6, 7 },
    271             { 0, 1, 6, 7 },
    272             { 0, 1, 2, 7 },
    273             { 0, 1, 2, 3 },
    274             { 4, 1, 2, 3 },
    275             { 4, 5, 2, 3 },
    276             { 4, 5, 6, 3 },
    277             { 4, 5, 6, 7 },
    278         };
    279         Assert(RT_ELEMENTS(au8Trans) == 8);
    280         Assert(RT_ELEMENTS(au8Trans[0]) == 4);
    281         int iPage = au8Trans[pVM->pgm.s.iDynPageMapLast][iCache];
    282         void *pv = pVM->pgm.s.pbDynPageMapBaseGC + (iPage << PAGE_SHIFT);
    283         *ppv = pv;
    284         STAM_COUNTER_INC(&pVM->pgm.s.StatDynMapCacheHits);
    285         //Log(("PGMGCDynMapHCPage: HCPhys=%VHp pv=%VGv iPage=%d iCache=%d\n", HCPhys, pv, iPage, iCache));
    286         return VINF_SUCCESS;
    287     }
    288     Assert(RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) == 4);
    289     STAM_COUNTER_INC(&pVM->pgm.s.StatDynMapCacheMisses);
    290 
    291     /*
    292      * Update the page tables.
    293      */
    294     register unsigned iPage = pVM->pgm.s.iDynPageMapLast;
    295     pVM->pgm.s.iDynPageMapLast = iPage = (iPage + 1) & ((MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT) - 1);
    296     Assert((MM_HYPER_DYNAMIC_SIZE >> PAGE_SHIFT) == 8);
    297 
    298     pVM->pgm.s.aHCPhysDynPageMapCache[iPage & (RT_ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache) - 1)] = HCPhys;
    299     pVM->pgm.s.paDynPageMap32BitPTEsGC[iPage].u = (uint32_t)HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D;
    300     pVM->pgm.s.paDynPageMapPaePTEsGC[iPage].u   =           HCPhys | X86_PTE_P | X86_PTE_A | X86_PTE_D;
    301 
    302     void *pv = pVM->pgm.s.pbDynPageMapBaseGC + (iPage << PAGE_SHIFT);
    303     *ppv = pv;
    304     ASMInvalidatePage(pv);
    305     Log4(("PGMGCDynMapHCPage: HCPhys=%VHp pv=%VGv iPage=%d\n", HCPhys, pv, iPage));
    306     return VINF_SUCCESS;
    307 }
    308 
    309167
    310168/**

  • trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

    r13046 r13060  
    452452    GEN_CHECK_OFF(PGM, pRomRangesR3);
    453453    GEN_CHECK_OFF(PGM, pRomRangesR0);
    454     GEN_CHECK_OFF(PGM, pRomRangesGC);
     454    GEN_CHECK_OFF(PGM, pRomRangesRC);
    455455    GEN_CHECK_OFF(PGM, cbRamSize);
    456456    GEN_CHECK_OFF(PGM, pTreesHC);
    … …  
    479479    GEN_CHECK_OFF(PGM, fSyncFlags);
    480480    GEN_CHECK_OFF(PGM, CritSect);
    481 #ifdef PGM_PD_CACHING_ENABLED
    482     GEN_CHECK_OFF(PGM, pdcache);
    483 #endif
     481    GEN_CHECK_OFF(PGM, pPoolR3);
     482    GEN_CHECK_OFF(PGM, pPoolR0);
     483    GEN_CHECK_OFF(PGM, pPoolRC);
     484    GEN_CHECK_OFF(PGM, fNoMorePhysWrites);
     485    GEN_CHECK_OFF(PGM, fPhysCacheFlushPending);
    484486    GEN_CHECK_OFF(PGM, pgmphysreadcache);
    485487    GEN_CHECK_OFF(PGM, pgmphyswritecache);
    … …  
    582584    GEN_CHECK_OFF(PGMROMRANGE, pNextR3);
    583585    GEN_CHECK_OFF(PGMROMRANGE, pNextR0);
    584     GEN_CHECK_OFF(PGMROMRANGE, pNextGC);
     586    GEN_CHECK_OFF(PGMROMRANGE, pNextRC);
    585587    GEN_CHECK_OFF(PGMROMRANGE, GCPhys);
    586588    GEN_CHECK_OFF(PGMROMRANGE, GCPhysLast);
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