Changeset 13198 in vbox
- Timestamp:
- Oct 13, 2008 9:05:42 AM (16 years ago)
- svn:sync-xref-src-repo-rev:
- 37740
- Location:
- trunk
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/cpum.h
r13174 r13198 806 806 } 807 807 808 /** 809 * Tests if the guest is running in PAE mode or not. 810 * 811 * @returns true if in PAE mode, otherwise false. 812 * @param pCtx Current CPU context 813 */ 814 DECLINLINE(bool) CPUMIsGuestInPAEModeEx(PCPUMCTX pCtx) 815 { 816 return ( CPUMIsGuestInPagedProtectedModeEx(pCtx) 817 && (pCtx->cr4 & X86_CR4_PAE) 818 && !CPUMIsGuestInLongModeEx(pCtx)); 819 } 820 808 821 /** @} */ 809 822 -
trunk/include/VBox/pgm.h
r13197 r13198 336 336 VMMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags); 337 337 VMMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask); 338 VMMDECL(X86PDPE) PGMGstGetPaePDPtr(PVM pVM, unsigned iPdPt); 339 338 340 VMMDECL(int) PGMFlushTLB(PVM pVM, uint64_t cr3, bool fGlobal); 339 341 VMMDECL(int) PGMUpdateCR3(PVM pVM, uint64_t cr3); -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r13197 r13198 1211 1211 } 1212 1212 1213 /** 1214 * Gets the specified page directory pointer table entry. 1215 * 1216 * @returns PDP entry 1217 * @param pPGM Pointer to the PGM instance data. 1218 * @param iPdpt PDPT index 1219 */ 1220 VMMDECL(X86PDPE) PGMGstGetPaePDPtr(PVM pVM, unsigned iPdpt) 1221 { 1222 Assert(iPdpt <= 3); 1223 return pVM->pgm.s.CTXSUFF(pGstPaePDPT)->a[iPdpt & 3]; 1224 } 1225 1213 1226 1214 1227 /** -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r13197 r13198 56 56 #define VMXR0ReportWorldSwitchError(a, b, c) do { } while (0); 57 57 #endif /* VBOX_STRICT */ 58 static void VMXR0SetupTLBEPT(PVM pVM);59 static void VMXR0SetupTLBVPID(PVM pVM);60 static void VMXR0SetupTLBDummy(PVM pVM);61 static void VMXR0FlushEPT(PVM pVM, VMX_FLUSH enmFlush, RTGCPHYS GCPhys);62 static void VMXR0FlushVPID(PVM pVM, VMX_FLUSH enmFlush, RTGCPTR GCPtr);58 static void vmxR0SetupTLBEPT(PVM pVM); 59 static void vmxR0SetupTLBVPID(PVM pVM); 60 static void vmxR0SetupTLBDummy(PVM pVM); 61 static void vmxR0FlushEPT(PVM pVM, VMX_FLUSH enmFlush, RTGCPHYS GCPhys); 62 static void vmxR0FlushVPID(PVM pVM, VMX_FLUSH enmFlush, RTGCPTR GCPtr); 63 63 64 64 … … 476 476 if (pVM->hwaccm.s.fNestedPaging) 477 477 { 478 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = VMXR0SetupTLBEPT;478 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = vmxR0SetupTLBEPT; 479 479 480 480 /* Default values for flushing. */ … … 496 496 if (pVM->hwaccm.s.vmx.fVPID) 497 497 { 498 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = VMXR0SetupTLBVPID;498 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = vmxR0SetupTLBVPID; 499 499 500 500 /* Default values for flushing. */ … … 514 514 #endif /* HWACCM_VTX_WITH_VPID */ 515 515 else 516 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = VMXR0SetupTLBDummy;516 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB = vmxR0SetupTLBDummy; 517 517 518 518 … … 818 818 } 819 819 820 /** 821 * Prefetch the 4 PDPT pointers (PAE and nested paging only) 822 * 823 * @param pVM The VM to operate on. 824 * @param pCtx Guest context 825 */ 826 static void vmxR0PrefetchPAEPdptrs(PVM pVM, PCPUMCTX pCtx) 827 { 828 if (CPUMIsGuestInPAEModeEx(pCtx)) 829 { 830 X86PDPE Pdpe; 831 832 for (unsigned i=0;i<4;i++) 833 { 834 Pdpe = PGMGstGetPaePDPtr(pVM, i); 835 int rc = VMXWriteVMCS64(VMX_VMCS_GUEST_PDPTR0_FULL + i*2, Pdpe.u); 836 AssertRC(rc); 837 } 838 } 839 } 820 840 821 841 /** … … 1226 1246 /* Save the real guest CR3 in VMX_VMCS_GUEST_CR3 */ 1227 1247 val = pCtx->cr3; 1248 /* Prefetch the four PDPT entries in PAE mode. */ 1249 vmxR0PrefetchPAEPdptrs(pVM, pCtx); 1228 1250 } 1229 1251 } … … 1454 1476 PGMUpdateCR3(pVM, val); 1455 1477 } 1478 /* Prefetch the four PDPT entries in PAE mode. */ 1479 vmxR0PrefetchPAEPdptrs(pVM, pCtx); 1456 1480 } 1457 1481 … … 1516 1540 * @param pVM The VM to operate on. 1517 1541 */ 1518 static void VMXR0SetupTLBDummy(PVM pVM)1542 static void vmxR0SetupTLBDummy(PVM pVM) 1519 1543 { 1520 1544 return; … … 1527 1551 * @param pVM The VM to operate on. 1528 1552 */ 1529 static void VMXR0SetupTLBEPT(PVM pVM)1553 static void vmxR0SetupTLBEPT(PVM pVM) 1530 1554 { 1531 1555 PHWACCM_CPUINFO pCpu; … … 1552 1576 1553 1577 if (pVM->hwaccm.s.fForceTLBFlush) 1554 VMXR0FlushEPT(pVM, pVM->hwaccm.s.vmx.enmFlushContext, 0);1578 vmxR0FlushEPT(pVM, pVM->hwaccm.s.vmx.enmFlushContext, 0); 1555 1579 1556 1580 #ifdef VBOX_WITH_STATISTICS … … 1569 1593 * @param pVM The VM to operate on. 1570 1594 */ 1571 static void VMXR0SetupTLBVPID(PVM pVM)1595 static void vmxR0SetupTLBVPID(PVM pVM) 1572 1596 { 1573 1597 PHWACCM_CPUINFO pCpu; … … 1626 1650 1627 1651 if (pVM->hwaccm.s.fForceTLBFlush) 1628 VMXR0FlushVPID(pVM, pVM->hwaccm.s.vmx.enmFlushContext, 0);1652 vmxR0FlushVPID(pVM, pVM->hwaccm.s.vmx.enmFlushContext, 0); 1629 1653 1630 1654 #ifdef VBOX_WITH_STATISTICS … … 2986 3010 * @param GCPhys Physical address of the page to flush 2987 3011 */ 2988 static void VMXR0FlushEPT(PVM pVM, VMX_FLUSH enmFlush, RTGCPHYS GCPhys)3012 static void vmxR0FlushEPT(PVM pVM, VMX_FLUSH enmFlush, RTGCPHYS GCPhys) 2989 3013 { 2990 3014 uint64_t descriptor[2]; 2991 3015 2992 LogFlow((" VMXR0FlushEPT %d %VGv\n", enmFlush, GCPhys));3016 LogFlow(("vmxR0FlushEPT %d %VGv\n", enmFlush, GCPhys)); 2993 3017 Assert(pVM->hwaccm.s.fNestedPaging); 2994 3018 descriptor[0] = pVM->hwaccm.s.vmx.GCPhysEPTP; … … 3007 3031 * @param GCPtr Virtual address of the page to flush 3008 3032 */ 3009 static void VMXR0FlushVPID(PVM pVM, VMX_FLUSH enmFlush, RTGCPTR GCPtr)3033 static void vmxR0FlushVPID(PVM pVM, VMX_FLUSH enmFlush, RTGCPTR GCPtr) 3010 3034 { 3011 3035 uint64_t descriptor[2]; … … 3037 3061 if ( !fFlushPending 3038 3062 && pVM->hwaccm.s.vmx.fVPID) 3039 VMXR0FlushVPID(pVM, pVM->hwaccm.s.vmx.enmFlushPage, GCVirt);3063 vmxR0FlushVPID(pVM, pVM->hwaccm.s.vmx.enmFlushPage, GCVirt); 3040 3064 #endif /* HWACCM_VTX_WITH_VPID */ 3041 3065 … … 3060 3084 /* Skip it if a TLB flush is already pending. */ 3061 3085 if (!fFlushPending) 3062 VMXR0FlushEPT(pVM, pVM->hwaccm.s.vmx.enmFlushPage, GCPhys);3086 vmxR0FlushEPT(pVM, pVM->hwaccm.s.vmx.enmFlushPage, GCPhys); 3063 3087 3064 3088 return VINF_SUCCESS;
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