Changeset 13382 in vbox for trunk/src

Timestamp:

Oct 19, 2008 8:45:30 PM (16 years ago)

Author:

vboxsync

Message:

more MSVC-related stuff

Location:

trunk/src/recompiler_new

Files:

• VBoxRecompiler.c (modified) (62 diffs)
• bswap.h (modified) (6 diffs)
• cpu-all.h (modified) (29 diffs)
• cpu-exec.c (modified) (1 diff)
• exec-all.h (modified) (9 diffs)
• exec.c (modified) (22 diffs)
• hostregs_helper.h (modified) (1 diff)
• osdep.h (modified) (3 diffs)
• softmmu_header.h (modified) (11 diffs)
• softmmu_template.h (modified) (2 diffs)
• target-i386/cpu.h (modified) (6 diffs)
• target-i386/exec.h (modified) (19 diffs)
• translate-all.c (modified) (1 diff)

trunk/src/recompiler_new/VBoxRecompiler.c

@@ -245 +245 @@
     uint32_t u32Dummy;
     unsigned i;
+    int rc;
 
     /*
@@ -276 +277 @@
 
     /* ctx. */
-    int rc = CPUMQueryGuestCtxPtr(pVM, &pVM->rem.s.pCtx);
+    rc = CPUMQueryGuestCtxPtr(pVM, &pVM->rem.s.pCtx);
     if (VBOX_FAILURE(rc))
     {
@@ -451 +452 @@
 static DECLCALLBACK(int) remR3Save(PVM pVM, PSSMHANDLE pSSM)
 {
-    LogFlow(("remR3Save:\n"));
-
     /*
      * Save the required CPU Env bits.
@@ -458 +457 @@
      */
     PREM pRem = &pVM->rem.s;
+    LogFlow(("remR3Save:\n"));
     Assert(!pRem->fInREM);
     SSMR3PutU32(pSSM,   pRem->Env.hflags);
@@ -482 +482 @@
     uint32_t u32Dummy;
     uint32_t fRawRing0 = false;
+    uint32_t u32Sep;
+    int rc;
+    PREM pRem;
     LogFlow(("remR3Load:\n"));
 
@@ -509 +512 @@
      * (Not much because we're never in REM when doing the save.)
      */
-    PREM pRem = &pVM->rem.s;
+    pRem = &pVM->rem.s;
     Assert(!pRem->fInREM);
     SSMR3GetU32(pSSM,   &pRem->Env.hflags);
@@ -519 +522 @@
     }
 
-    uint32_t u32Sep;
-    int rc = SSMR3GetU32(pSSM, &u32Sep);            /* separator */
+    rc = SSMR3GetU32(pSSM, &u32Sep);            /* separator */
     if (VBOX_FAILURE(rc))
         return rc;
@@ -536 +538 @@
     if (u32Version == REM_SAVED_STATE_VERSION_VER1_6)
     {
+        unsigned i;
+    
         /*
          * Load the REM stuff.
@@ -547 +551 @@
             return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
         }
-        unsigned i;
         for (i = 0; i < pRem->cInvalidatedPages; i++)
             SSMR3GetGCPtr(pSSM, &pRem->aGCPtrInvalidatedPages[i]);
@@ -608 +611 @@
 REMR3DECL(int) REMR3Step(PVM pVM)
 {
+    int         rc, interrupt_request;
+    RTGCPTR     GCPtrPC;
+    bool        fBp;
+ 
     /*
      * Lock the REM - we don't wanna have anyone interrupting us
@@ -613 +620 @@
      * pending interrupts and suchlike.
      */
-    int interrupt_request = pVM->rem.s.Env.interrupt_request;
+    interrupt_request = pVM->rem.s.Env.interrupt_request;
     Assert(!(interrupt_request & ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXIT | CPU_INTERRUPT_EXITTB | CPU_INTERRUPT_TIMER  | CPU_INTERRUPT_EXTERNAL_HARD | CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_TIMER)));
     pVM->rem.s.Env.interrupt_request = 0;
@@ -621 +628 @@
      * If we're standing at a breakpoint, that have to be disabled before we start stepping.
      */
-    RTGCPTR     GCPtrPC = pVM->rem.s.Env.eip + pVM->rem.s.Env.segs[R_CS].base;
-    bool        fBp = !cpu_breakpoint_remove(&pVM->rem.s.Env, GCPtrPC);
+    GCPtrPC = pVM->rem.s.Env.eip + pVM->rem.s.Env.segs[R_CS].base;
+    fBp = !cpu_breakpoint_remove(&pVM->rem.s.Env, GCPtrPC);
 
     /*
@@ -629 +636 @@
      * just flip it on and off to make sure it moves
      */
-    int rc = cpu_exec(&pVM->rem.s.Env);
+    rc = cpu_exec(&pVM->rem.s.Env);
     if (rc == EXCP_DEBUG)
     {
@@ -728 +735 @@
 REMR3DECL(int) REMR3EmulateInstruction(PVM pVM)
 {
+    int rc, rc2;
     Log2(("REMR3EmulateInstruction: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVM), CPUMGetGuestEIP(pVM)));
 
@@ -739 +747 @@
      * Sync the state and enable single instruction / single stepping.
      */
-    int rc = REMR3State(pVM, false /* no need to flush the TBs; we always compile. */);
+    rc = REMR3State(pVM, false /* no need to flush the TBs; we always compile. */);
     if (VBOX_SUCCESS(rc))
     {
@@ -951 +959 @@
 #endif
         pVM->rem.s.Env.interrupt_request = interrupt_request;
-        int rc2 = REMR3StateBack(pVM);
+        rc2 = REMR3StateBack(pVM);
         AssertRC(rc2);
     }
@@ -975 +983 @@
 REMR3DECL(int) REMR3Run(PVM pVM)
 {
+    int rc;
     Log2(("REMR3Run: (cs:eip=%04x:%VGv)\n", pVM->rem.s.Env.segs[R_CS].selector, pVM->rem.s.Env.eip));
     Assert(pVM->rem.s.fInREM);
 
     TMNotifyStartOfExecution(pVM);
-    int rc = cpu_exec(&pVM->rem.s.Env);
+    rc = cpu_exec(&pVM->rem.s.Env);
     TMNotifyEndOfExecution(pVM);
     switch (rc)
@@ -1104 +1113 @@
     /* !!! THIS MUST BE IN SYNC WITH emR3Reschedule !!! */
     /* !!! THIS MUST BE IN SYNC WITH emR3Reschedule !!! */
+    uint32_t u32CR0;
 
     /* Update counter. */
@@ -1110 +1120 @@
     if (HWACCMIsEnabled(env->pVM))
     {
+        CPUMCTX Ctx;
+
         env->state |= CPU_RAW_HWACC;
 
@@ -1115 +1127 @@
          * Create partial context for HWACCMR3CanExecuteGuest
          */
-        CPUMCTX Ctx;
         Ctx.cr0            = env->cr[0];
         Ctx.cr3            = env->cr[3];
@@ -1215 +1226 @@
     }
 
-    uint32_t u32CR0 = env->cr[0];
+    u32CR0 = env->cr[0];
     if ((u32CR0 & (X86_CR0_PG | X86_CR0_PE)) != (X86_CR0_PG | X86_CR0_PE))
     {
@@ -1344 +1355 @@
 {
     PVM pVM = env->pVM;
+    PCPUMCTX pCtx;
+    int rc;
 
     /*
@@ -1359 +1372 @@
      * Update the control registers before calling PGMFlushPage.
      */
-    PCPUMCTX pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
+    pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
     pCtx->cr0 = env->cr[0];
     pCtx->cr3 = env->cr[3];
@@ -1367 +1380 @@
      * Let PGM do the rest.
      */
-    int rc = PGMInvalidatePage(pVM, GCPtr);
+    rc = PGMInvalidatePage(pVM, GCPtr);
     if (VBOX_FAILURE(rc))
     {
@@ -1426 +1439 @@
 {
     PVM pVM = env->pVM;
+    PCPUMCTX pCtx;
 
     /*
@@ -1445 +1459 @@
      * Update the control registers before calling PGMR3FlushTLB.
      */
-    PCPUMCTX pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
+    pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
     pCtx->cr0 = env->cr[0];
     pCtx->cr3 = env->cr[3];
@@ -1466 +1480 @@
     int rc;
     PVM pVM = env->pVM;
+    PCPUMCTX pCtx;
 
     /*
@@ -1479 +1494 @@
      * as it may need to map whatever cr3 is pointing to.
      */
-    PCPUMCTX pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
+    pCtx = (PCPUMCTX)pVM->rem.s.pCtx;
     pCtx->cr0 = env->cr[0];
     pCtx->cr3 = env->cr[3];
@@ -1628 +1643 @@
 REMR3DECL(int)  REMR3State(PVM pVM, bool fFlushTBs)
 {
+    register const CPUMCTX *pCtx;
+    register unsigned       fFlags;
+    bool                    fHiddenSelRegsValid;
+    unsigned                i;
+    TRPMEVENT               enmType;
+    uint8_t                 u8TrapNo;
+    int                     rc; 
+
     Log2(("REMR3State:\n"));
     STAM_PROFILE_START(&pVM->rem.s.StatsState, a);
-    register const CPUMCTX *pCtx = pVM->rem.s.pCtx;
-    register unsigned       fFlags;
-    bool                    fHiddenSelRegsValid = CPUMAreHiddenSelRegsValid(pVM);
-    unsigned                i;
+         
+    pCtx = pVM->rem.s.pCtx;
+    fHiddenSelRegsValid = CPUMAreHiddenSelRegsValid(pVM);
 
     Assert(!pVM->rem.s.fInREM);
@@ -1716 +1738 @@
     if (pVM->rem.s.cInvalidatedPages)
     {
+        RTUINT i;
+        
         pVM->rem.s.fIgnoreInvlPg = true;
-        RTUINT i;
         for (i = 0; i < pVM->rem.s.cInvalidatedPages; i++)
         {
@@ -1976 +1999 @@
      */
     pVM->rem.s.Env.exception_index = -1; /** @todo this won't work :/ */
-    TRPMEVENT   enmType;
-    uint8_t     u8TrapNo;
-    int rc = TRPMQueryTrap(pVM, &u8TrapNo, &enmType);
+    rc = TRPMQueryTrap(pVM, &u8TrapNo, &enmType);
     if (VBOX_SUCCESS(rc))
     {
@@ -2076 +2097 @@
 REMR3DECL(int) REMR3StateBack(PVM pVM)
 {
+    register PCPUMCTX pCtx = pVM->rem.s.pCtx;
+    unsigned          i;
+
     Log2(("REMR3StateBack:\n"));
     Assert(pVM->rem.s.fInREM);
     STAM_PROFILE_START(&pVM->rem.s.StatsStateBack, a);
-    register PCPUMCTX pCtx = pVM->rem.s.pCtx;
-    unsigned          i;
-
-    /*
+        /*
      * Copy back the registers.
      * This is done in the order they are declared in the CPUMCTX structure.
@@ -2269 +2290 @@
         &&  pVM->rem.s.Env.exception_index < 256)
     {
+        int rc;
+
         Log(("REMR3StateBack: Pending trap %x %d\n", pVM->rem.s.Env.exception_index, pVM->rem.s.Env.exception_is_int));
-        int rc = TRPMAssertTrap(pVM, pVM->rem.s.Env.exception_index, (pVM->rem.s.Env.exception_is_int) ? TRPM_SOFTWARE_INT : TRPM_HARDWARE_INT);
+        rc = TRPMAssertTrap(pVM, pVM->rem.s.Env.exception_index, (pVM->rem.s.Env.exception_is_int) ? TRPM_SOFTWARE_INT : TRPM_HARDWARE_INT);
         AssertRC(rc);
         switch (pVM->rem.s.Env.exception_index)
@@ -2301 +2324 @@
 static void remR3StateUpdate(PVM pVM)
 {
-    Assert(pVM->rem.s.fInREM);
     register PCPUMCTX pCtx = pVM->rem.s.pCtx;
     unsigned          i;
 
+    Assert(pVM->rem.s.fInREM);
+    
     /*
      * Copy back the registers.
@@ -2492 +2516 @@
 REMR3DECL(void) REMR3A20Set(PVM pVM, bool fEnable)
 {
+    bool fSaved;
+
     LogFlow(("REMR3A20Set: fEnable=%d\n", fEnable));
     VM_ASSERT_EMT(pVM);
 
-    bool fSaved = pVM->rem.s.fIgnoreAll; /* just in case. */
+    fSaved = pVM->rem.s.fIgnoreAll; /* just in case. */
     pVM->rem.s.fIgnoreAll = fSaved || !pVM->rem.s.fInREM;
 
@@ -2512 +2538 @@
 REMR3DECL(void) REMR3ReplayInvalidatedPages(PVM pVM)
 {
+    RTUINT i;
+    
     VM_ASSERT_EMT(pVM);
 
@@ -2526 +2554 @@
      */
     pVM->rem.s.fIgnoreInvlPg = true;
-    RTUINT i;
     for (i = 0; i < pVM->rem.s.cInvalidatedPages; i++)
     {
@@ -2545 +2572 @@
 REMR3DECL(void) REMR3ReplayHandlerNotifications(PVM pVM)
 {
+    /*
+     * Replay the flushes.
+     */
+    RTUINT i;
+    const RTUINT c = pVM->rem.s.cHandlerNotifications;
+    
     LogFlow(("REMR3ReplayInvalidatedPages:\n"));
     VM_ASSERT_EMT(pVM);
 
-    /*
-     * Replay the flushes.
-     */
-    RTUINT i;
-    const RTUINT c = pVM->rem.s.cHandlerNotifications;
     pVM->rem.s.cHandlerNotifications = 0;
     for (i = 0; i < c; i++)
@@ -2745 +2773 @@
     int rc;
     PVM pVM = cpu_single_env->pVM;
+    const RTGCPHYS GCPhys = physaddr;
 
     LogFlow(("remR3GrowDynRange %VGp\n", physaddr));
-    const RTGCPHYS GCPhys = physaddr;
     rc = PGM3PhysGrowRange(pVM, &GCPhys);
     if (VBOX_SUCCESS(rc))
@@ -3274 +3302 @@
 static void     remR3MMIOWriteU8(void *pvVM, target_phys_addr_t GCPhys, uint32_t u32)
 {
+    int rc;
     Log2(("remR3MMIOWriteU8: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
-    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 1);
+    rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 1);
     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
 }
@@ -3282 +3311 @@
 static void     remR3MMIOWriteU16(void *pvVM, target_phys_addr_t GCPhys, uint32_t u32)
 {
+    int rc;
     Log2(("remR3MMIOWriteU16: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
-    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 2);
+    rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 2);
     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
 }
@@ -3290 +3320 @@
 static void     remR3MMIOWriteU32(void *pvVM, target_phys_addr_t GCPhys, uint32_t u32)
 {
+    int rc;
     Log2(("remR3MMIOWriteU32: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
-    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 4);
+    rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 4);
     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
 }
@@ -3303 +3334 @@
 static uint32_t remR3HandlerReadU8(void *pvVM, target_phys_addr_t GCPhys)
 {
+    uint8_t u8;
     Log2(("remR3HandlerReadU8: GCPhys=%VGp\n", GCPhys));
-    uint8_t u8;
     PGMPhysRead((PVM)pvVM, GCPhys, &u8, sizeof(u8));
     return u8;
@@ -3311 +3342 @@
 static uint32_t remR3HandlerReadU16(void *pvVM, target_phys_addr_t GCPhys)
 {
+    uint16_t u16;
     Log2(("remR3HandlerReadU16: GCPhys=%VGp\n", GCPhys));
-    uint16_t u16;
     PGMPhysRead((PVM)pvVM, GCPhys, &u16, sizeof(u16));
     return u16;
@@ -3319 +3350 @@
 static uint32_t remR3HandlerReadU32(void *pvVM, target_phys_addr_t GCPhys)
 {
+    uint32_t u32;
     Log2(("remR3HandlerReadU32: GCPhys=%VGp\n", GCPhys));
-    uint32_t u32;
     PGMPhysRead((PVM)pvVM, GCPhys, &u32, sizeof(u32));
     return u32;
@@ -3434 +3465 @@
 bool remR3DisasBlock(CPUState *env, int f32BitCode, int nrInstructions, char *pszPrefix)
 {
-    int i;
+    int           i, rc;
+    RTGCPTR       GCPtrPC;
+    uint8_t       *pvPC;
+    RTINTPTR      off;
+    DISCPUSTATE   Cpu;
 
     /*
@@ -3446 +3481 @@
      * We don't care to much about cross page correctness presently.
      */
-    RTGCPTR    GCPtrPC = env->segs[R_CS].base + env->eip;
-    void      *pvPC;
+    GCPtrPC = env->segs[R_CS].base + env->eip;
     if (f32BitCode && (env->cr[0] & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG))
     {
@@ -3453 +3487 @@
 
         /* convert eip to physical address. */
-        int rc = PGMPhysGCPtr2HCPtrByGstCR3(env->pVM,
-                                            GCPtrPC,
-                                            env->cr[3],
-                                            env->cr[4] & (X86_CR4_PSE | X86_CR4_PAE), /** @todo add longmode flag */
-                                            &pvPC);
+        rc = PGMPhysGCPtr2HCPtrByGstCR3(env->pVM,
+                                        GCPtrPC,
+                                        env->cr[3],
+                                        env->cr[4] & (X86_CR4_PSE | X86_CR4_PAE), /** @todo add longmode flag */
+                                        &pvPC);
         if (VBOX_FAILURE(rc))
         {
@@ -3469 +3503 @@
     {
         /* physical address */
-        int rc = PGMPhysGCPhys2HCPtr(env->pVM, (RTGCPHYS)GCPtrPC, nrInstructions * 16, &pvPC);
+        rc = PGMPhysGCPhys2HCPtr(env->pVM, (RTGCPHYS)GCPtrPC, nrInstructions * 16, &pvPC);
         if (VBOX_FAILURE(rc))
             return false;
@@ -3477 +3511 @@
      * Disassemble.
      */
-    RTINTPTR        off = env->eip - (RTGCUINTPTR)pvPC;
-    DISCPUSTATE     Cpu;
+    off = env->eip - (RTGCUINTPTR)pvPC;
     Cpu.mode = f32BitCode ? CPUMODE_32BIT : CPUMODE_16BIT;
     Cpu.pfnReadBytes = NULL;            /** @todo make cs:eip reader for the disassembler. */
@@ -3518 +3551 @@
 {
 #ifdef USE_OLD_DUMP_AND_DISASSEMBLY
-    PVM pVM = env->pVM;
+    PVM         pVM =   env->pVM;
+    RTGCPTR     GCPtrPC;
+    uint8_t     *pvPC;
+    char        szOutput[256];
+    uint32_t    cbOp;
+    RTINTPTR    off;
+    DISCPUSTATE Cpu;
+                         
 
     /* Doesn't work in long mode. */
@@ -3543 +3583 @@
      * We don't care to much about cross page correctness presently.
      */
-    RTGCPTR    GCPtrPC = env->segs[R_CS].base + env->eip;
-    void      *pvPC;
+    GCPtrPC = env->segs[R_CS].base + env->eip;
     if ((env->cr[0] & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG))
     {
@@ -3573 +3612 @@
      * Disassemble.
      */
-    RTINTPTR        off = env->eip - (RTGCUINTPTR)pvPC;
-    DISCPUSTATE     Cpu;
+    off = env->eip - (RTGCUINTPTR)pvPC;
     Cpu.mode = f32BitCode ? CPUMODE_32BIT : CPUMODE_16BIT;
     Cpu.pfnReadBytes = NULL;            /** @todo make cs:eip reader for the disassembler. */
@@ -3580 +3618 @@
     //Cpu.dwUserData[1] = (uintptr_t)pvPC;
     //Cpu.dwUserData[2] = GCPtrPC;
-    char szOutput[256];
-    uint32_t    cbOp;
     if (RT_FAILURE(DISInstr(&Cpu, (uintptr_t)pvPC, off, &cbOp, &szOutput[0])))
         return false;
@@ -3691 +3727 @@
     {
         PVM pVM = cpu_single_env->pVM;
+        RTSEL cs;
+        RTGCUINTPTR eip;
 
         /*
@@ -3701 +3739 @@
          */
         RTLogPrintf("Guest Code: PC=%VGp #VGp (%VGp) bytes fFlags=%d\n", uCode, cb, cb, fFlags);
-        RTSEL cs = cpu_single_env->segs[R_CS].selector;
-        RTGCUINTPTR eip = uCode - cpu_single_env->segs[R_CS].base;
+        cs = cpu_single_env->segs[R_CS].selector;
+        eip = uCode - cpu_single_env->segs[R_CS].base;
         for (;;)
         {
@@ -4120 +4158 @@
 void cpu_outb(CPUState *env, int addr, int val)
 {
+    int rc;
+
     if (addr != 0x80 && addr != 0x70 && addr != 0x61)
         Log2(("cpu_outb: addr=%#06x val=%#x\n", addr, val));
 
-    int rc = IOMIOPortWrite(env->pVM, (RTIOPORT)addr, val, 1);
+    rc = IOMIOPortWrite(env->pVM, (RTIOPORT)addr, val, 1);
     if (RT_LIKELY(rc == VINF_SUCCESS))
         return;
@@ -4152 +4192 @@
 void cpu_outl(CPUState *env, int addr, int val)
 {
+    int rc;
     Log2(("cpu_outl: addr=%#06x val=%#x\n", addr, val));
-    int rc = IOMIOPortWrite(env->pVM, (RTIOPORT)addr, val, 4);
+    rc = IOMIOPortWrite(env->pVM, (RTIOPORT)addr, val, 4);
     if (RT_LIKELY(rc == VINF_SUCCESS))
         return;
@@ -4286 +4327 @@
 void cpu_abort(CPUState *env, const char *pszFormat, ...)
 {
+    va_list args;
+    PVM pVM;
+    
     /*
      * Bitch about it.
      */
+#ifndef _MSC_VER
+    /** @todo: MSVC is right - it's not valid C */
     RTLogFlags(NULL, "nodisabled nobuffered");
-    va_list args;
+#endif
     va_start(args, pszFormat);
     RTLogPrintf("fatal error in recompiler cpu: %N\n", pszFormat, &args);
@@ -4302 +4348 @@
      * the EMs failure handling.
      */
-    PVM pVM = cpu_single_env->pVM;
+    pVM = cpu_single_env->pVM;
     if (pVM->rem.s.fInREM)
         REMR3StateBack(pVM);
@@ -4318 +4364 @@
 static void remAbort(int rc, const char *pszTip)
 {
+    PVM pVM;
+
     /*
      * Bitch about it.
@@ -4327 +4375 @@
      * Jump back to where we entered the recompiler.
      */
-    PVM pVM = cpu_single_env->pVM;
+    pVM = cpu_single_env->pVM;
     if (pVM->rem.s.fInREM)
         REMR3StateBack(pVM);

trunk/src/recompiler_new/bswap.h

@@ -79 +79 @@
 
 #ifndef bswap16 /* BSD endian.h clash */
+#ifndef VBOX
 static inline uint16_t bswap16(uint16_t x)
+#else
+DECLINLINE(uint16_t) bswap16(uint16_t x)
+#endif
 {
     return bswap_16(x);
@@ -86 +90 @@
 
 #ifndef bswap32 /* BSD endian.h clash */
+#ifndef VBOX
 static inline uint32_t bswap32(uint32_t x)
+#else
+DECLINLINE(uint32_t) bswap32(uint32_t x)
+#endif
 {
     return bswap_32(x);
@@ -93 +101 @@
 
 #ifndef bswap64 /* BSD endian.h clash. */
+#ifndef VBOX
 static inline uint64_t bswap64(uint64_t x)
+#else
+DECLINLINE(uint64_t) bswap64(uint64_t x)
+#endif
 {
     return bswap_64(x);
@@ -99 +111 @@
 #endif
 
+#ifndef VBOX
 static inline void bswap16s(uint16_t *s)
+#else
+DECLINLINE(void) bswap16s(uint16_t *s)
+#endif
 {
     *s = bswap16(*s);
 }
 
+#ifndef VBOX
 static inline void bswap32s(uint32_t *s)
+#else
+DECLINLINE(void) bswap32s(uint32_t *s)
+#endif
 {
     *s = bswap32(*s);
 }
 
+#ifndef VBOX
 static inline void bswap64s(uint64_t *s)
+#else
+DECLINLINE(void) bswap64s(uint64_t *s)
+#endif
 {
     *s = bswap64(*s);
@@ -126 +150 @@
 #endif
 
+#ifndef VBOX
 #define CPU_CONVERT(endian, size, type)\
 static inline type endian ## size ## _to_cpu(type v)\
@@ -156 +181 @@
      *p = cpu_to_ ## endian ## size(v);\
 }
+#else  /* VBOX */
+#define CPU_CONVERT(endian, size, type)\
+DECLINLINE(type) endian ## size ## _to_cpu(type v)\
+{\
+    return endian ## _bswap(v, size);\
+}\
+\
+DECLINLINE(type) cpu_to_ ## endian ## size(type v)\
+{\
+    return endian ## _bswap(v, size);\
+}\
+\
+DECLINLINE(void) endian ## size ## _to_cpus(type *p)\
+{\
+    endian ## _bswaps(p, size)\
+}\
+\
+DECLINLINE(void) cpu_to_ ## endian ## size ## s(type *p)\
+{\
+    endian ## _bswaps(p, size)\
+}\
+\
+DECLINLINE(type) endian ## size ## _to_cpup(const type *p)\
+{\
+    return endian ## size ## _to_cpu(*p);\
+}\
+\
+DECLINLINE(void) cpu_to_ ## endian ## size ## w(type *p, type v)\
+{\
+     *p = cpu_to_ ## endian ## size(v);\
+}
+#endif /* VBOX */
 
 CPU_CONVERT(be, 16, uint16_t)

trunk/src/recompiler_new/cpu-all.h

@@ -32 +32 @@
 #ifdef VBOX
 # ifndef LOG_GROUP
-#  include <VBox/log.h>
 #  define LOG_GROUP LOG_GROUP_REM
 # endif
+# include <VBox/log.h>
 # include <VBox/pgm.h> /* PGM_DYNAMIC_RAM_ALLOC */
 #endif
@@ -95 +95 @@
 #else
 
+#ifndef VBOX
 static inline uint16_t tswap16(uint16_t s)
+#else
+DECLINLINE(uint16_t) tswap16(uint16_t s)
+#endif
 {
     return s;
 }
 
+#ifndef VBOX
 static inline uint32_t tswap32(uint32_t s)
+#else
+DECLINLINE(uint32_t) tswap32(uint32_t s)
+#endif
 {
     return s;
 }
 
+#ifndef VBOX
 static inline uint64_t tswap64(uint64_t s)
+#else
+DECLINLINE(uint64_t) tswap64(uint64_t s)
+#endif
 {
     return s;
 }
 
+#ifndef VBOX
 static inline void tswap16s(uint16_t *s)
-{
-}
-
+#else
+DECLINLINE(void) tswap16s(uint16_t *s)
+#endif
+{
+}
+
+#ifndef VBOX
 static inline void tswap32s(uint32_t *s)
-{
-}
-
+#else
+DECLINLINE(void) tswap32s(uint32_t *s)
+#endif
+{
+}
+
+#ifndef VBOX
 static inline void tswap64s(uint64_t *s)
+#else
+DECLINLINE(void) tswap64s(uint64_t *s)
+#endif
 {
 }
@@ -249 +273 @@
 #endif
 
-static inline int ldub_p(void *ptr)
+DECLINLINE(int) ldub_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -255 +279 @@
 }
 
-static inline int ldsb_p(void *ptr)
+DECLINLINE(int) ldsb_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -261 +285 @@
 }
 
-static inline void stb_p(void *ptr, int v)
+DECLINLINE(void) stb_p(void *ptr, int v)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -267 +291 @@
 }
 
-static inline int lduw_le_p(void *ptr)
+DECLINLINE(int) lduw_le_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -273 +297 @@
 }
 
-static inline int ldsw_le_p(void *ptr)
+DECLINLINE(int) ldsw_le_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -279 +303 @@
 }
 
-static inline void stw_le_p(void *ptr, int v)
+DECLINLINE(void) stw_le_p(void *ptr, int v)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -285 +309 @@
 }
 
-static inline int ldl_le_p(void *ptr)
+DECLINLINE(int) ldl_le_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -291 +315 @@
 }
 
-static inline void stl_le_p(void *ptr, int v)
+DECLINLINE(void) stl_le_p(void *ptr, int v)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -297 +321 @@
 }
 
-static inline void stq_le_p(void *ptr, uint64_t v)
+DECLINLINE(void) stq_le_p(void *ptr, uint64_t v)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -303 +327 @@
 }
 
-static inline uint64_t ldq_le_p(void *ptr)
+DECLINLINE(uint64_t) ldq_le_p(void *ptr)
 {
     VBOX_CHECK_ADDR(ptr);
@@ -313 +337 @@
 /* float access */
 
-static inline float32 ldfl_le_p(void *ptr)
+DECLINLINE(float32) ldfl_le_p(void *ptr)
 {
     union {
@@ -323 +347 @@
 }
 
-static inline void stfl_le_p(void *ptr, float32 v)
+DECLINLINE(void) stfl_le_p(void *ptr, float32 v)
 {
     union {
@@ -333 +357 @@
 }
 
-static inline float64 ldfq_le_p(void *ptr)
+DECLINLINE(float64) ldfq_le_p(void *ptr)
 {
     CPU_DoubleU u;
     u.l.lower = ldl_le_p(ptr);
-    u.l.upper = ldl_le_p(ptr + 4);
+    u.l.upper = ldl_le_p((uint8_t*)ptr + 4);
     return u.d;
 }
 
-static inline void stfq_le_p(void *ptr, float64 v)
+DECLINLINE(void) stfq_le_p(void *ptr, float64 v)
 {
     CPU_DoubleU u;
     u.d = v;
     stl_le_p(ptr, u.l.lower);
-    stl_le_p(ptr + 4, u.l.upper);
+    stl_le_p((uint8_t*)ptr + 4, u.l.upper);
 }
 
@@ -549 +573 @@
 #if !defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED)
 
+#ifndef VBOX
 static inline int lduw_be_p(void *ptr)
 {
@@ -563 +588 @@
 #endif
 }
-
+#else /* VBOX */
+DECLINLINE(int) lduw_be_p(void *ptr)
+{
+#if defined(__i386__) && !defined(_MSC_VER)
+    int val;
+    asm volatile ("movzwl %1, %0\n"
+                  "xchgb %b0, %h0\n"
+                  : "=q" (val)
+                  : "m" (*(uint16_t *)ptr));
+    return val;
+#else
+    uint8_t *b = (uint8_t *) ptr;
+    return ((b[0] << 8) | b[1]);
+#endif
+}
+#endif
+
+#ifndef VBOX
 static inline int ldsw_be_p(void *ptr)
 {
@@ -578 +620 @@
 #endif
 }
-
+#else
+DECLINLINE(int) ldsw_be_p(void *ptr)
+{
+#if defined(__i386__) && !defined(_MSC_VER)
+    int val;
+    asm volatile ("movzwl %1, %0\n"
+                  "xchgb %b0, %h0\n"
+                  : "=q" (val)
+                  : "m" (*(uint16_t *)ptr));
+    return (int16_t)val;
+#else
+    uint8_t *b = (uint8_t *) ptr;
+    return (int16_t)((b[0] << 8) | b[1]);
+#endif
+}
+#endif
+
+#ifndef VBOX
 static inline int ldl_be_p(void *ptr)
 {
@@ -593 +652 @@
 #endif
 }
-
+#else
+DECLINLINE(int) ldl_be_p(void *ptr)
+{
+#if (defined(__i386__) || defined(__x86_64__)) && !defined(_MSC_VER)
+    int val;
+    asm volatile ("movl %1, %0\n"
+                  "bswap %0\n"
+                  : "=r" (val)
+                  : "m" (*(uint32_t *)ptr));
+    return val;
+#else
+    uint8_t *b = (uint8_t *) ptr;
+    return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];
+#endif
+}
+#endif
+
+#ifndef VBOX
 static inline uint64_t ldq_be_p(void *ptr)
+#else
+DECLINLINE(uint64_t) ldq_be_p(void *ptr)
+#endif
 {
     uint32_t a,b;
     a = ldl_be_p(ptr);
-    b = ldl_be_p(ptr+4);
+    b = ldl_be_p((uint8_t*)ptr+4);
     return (((uint64_t)a<<32)|b);
 }
 
+#ifndef VBOX
 static inline void stw_be_p(void *ptr, int v)
 {
@@ -615 +695 @@
 #endif
 }
-
+#else
+DECLINLINE(void) stw_be_p(void *ptr, int v)
+{
+#if defined(__i386__) && !defined(_MSC_VER)
+    asm volatile ("xchgb %b0, %h0\n"
+                  "movw %w0, %1\n"
+                  : "=q" (v)
+                  : "m" (*(uint16_t *)ptr), "0" (v));
+#else
+    uint8_t *d = (uint8_t *) ptr;
+    d[0] = v >> 8;
+    d[1] = v;
+#endif
+}
+
+#endif /* VBOX */
+
+#ifndef VBOX
 static inline void stl_be_p(void *ptr, int v)
 {
@@ -631 +728 @@
 #endif
 }
-
+#else
+DECLINLINE(void) stl_be_p(void *ptr, int v)
+{
+#if !defined(_MSC_VER) && (defined(__i386__) || defined(__x86_64__))
+    asm volatile ("bswap %0\n"
+                  "movl %0, %1\n"
+                  : "=r" (v)
+                  : "m" (*(uint32_t *)ptr), "0" (v));
+#else
+    uint8_t *d = (uint8_t *) ptr;
+    d[0] = v >> 24;
+    d[1] = v >> 16;
+    d[2] = v >> 8;
+    d[3] = v;
+#endif
+}
+#endif /* VBOX */
+
+#ifndef VBOX
 static inline void stq_be_p(void *ptr, uint64_t v)
+#else
+DECLINLINE(void) stq_be_p(void *ptr, uint64_t v)
+#endif
 {
     stl_be_p(ptr, v >> 32);
-    stl_be_p(ptr + 4, v);
+    stl_be_p((uint8_t*)ptr + 4, v);
 }
 
 /* float access */
-
+#ifndef VBOX
 static inline float32 ldfl_be_p(void *ptr)
+#else
+DECLINLINE(float32) ldfl_be_p(void *ptr)
+#endif
 {
     union {
@@ -650 +771 @@
 }
 
+#ifndef VBOX
 static inline void stfl_be_p(void *ptr, float32 v)
+#else
+DECLINLINE(void) stfl_be_p(void *ptr, float32 v)
+#endif
 {
     union {
@@ -660 +785 @@
 }
 
+#ifndef VBOX
 static inline float64 ldfq_be_p(void *ptr)
+#else
+DECLINLINE(float64) ldfq_be_p(void *ptr)
+#endif
 {
     CPU_DoubleU u;
     u.l.upper = ldl_be_p(ptr);
-    u.l.lower = ldl_be_p(ptr + 4);
+    u.l.lower = ldl_be_p((uint8_t*)ptr + 4);
     return u.d;
 }
 
+#ifndef VBOX
 static inline void stfq_be_p(void *ptr, float64 v)
+#else
+DECLINLINE(void) stfq_be_p(void *ptr, float64 v)
+#endif
 {
     CPU_DoubleU u;
     u.d = v;
     stl_be_p(ptr, u.l.upper);
-    stl_be_p(ptr + 4, u.l.lower);
+    stl_be_p((uint8_t*)ptr + 4, u.l.lower);
 }
 
@@ -1103 +1236 @@
 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
                             int len, int is_write);
+#ifndef VBOX
 static inline void cpu_physical_memory_read(target_phys_addr_t addr,
                                             uint8_t *buf, int len)
+#else
+DECLINLINE(void) cpu_physical_memory_read(target_phys_addr_t addr,
+                                          uint8_t *buf, int len)
+#endif
 {
     cpu_physical_memory_rw(addr, buf, len, 0);
 }
+#ifndef VBOX
 static inline void cpu_physical_memory_write(target_phys_addr_t addr,
                                              const uint8_t *buf, int len)
+#else
+DECLINLINE(void) cpu_physical_memory_write(target_phys_addr_t addr,
+                                           const uint8_t *buf, int len)
+#endif
 {
     cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
@@ -1135 +1278 @@
 
 /* read dirty bit (return 0 or 1) */
+#ifndef VBOX
 static inline int cpu_physical_memory_is_dirty(ram_addr_t addr)
 {
-#ifdef VBOX
+    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
+}
+#else
+DECLINLINE(int) cpu_physical_memory_is_dirty(ram_addr_t addr)
+{
     if (RT_UNLIKELY((addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
     {
@@ -1144 +1292 @@
         return 0;
     }
-#endif
     return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
 }
-
+#endif
+
+#ifndef VBOX
 static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
                                                 int dirty_flags)
 {
-#ifdef VBOX
+    return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
+}
+#else
+DECLINLINE(int) cpu_physical_memory_get_dirty(ram_addr_t addr,
+                                              int dirty_flags)
+{
     if (RT_UNLIKELY((addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
     {
@@ -1158 +1312 @@
         return 0xff & dirty_flags; /** @todo I don't think this is the right thing to return, fix! */
     }
-#endif
     return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
 }
-
+#endif
+
+#ifndef VBOX
 static inline void cpu_physical_memory_set_dirty(ram_addr_t addr)
 {
-#ifdef VBOX
+    phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
+}
+#else
+DECLINLINE(void) cpu_physical_memory_set_dirty(ram_addr_t addr)
+{
     if (RT_UNLIKELY((addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
     {
@@ -1171 +1330 @@
         return;
     }
-#endif
     phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
 }
+#endif
 
 void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
@@ -1189 +1348 @@
 /* host CPU ticks (if available) */
 
-#if defined(__powerpc__)
+#ifdef VBOX
+
+DECLINLINE(int64_t) cpu_get_real_ticks(void)
+{
+    return  ASMReadTSC();
+}
+
+#elif defined(__powerpc__)
 
 static inline uint32_t get_tbl(void)

trunk/src/recompiler_new/cpu-exec.c

@@ -169 +169 @@
 }
 
+#ifndef VBOX
 static inline TranslationBlock *tb_find_fast(void)
+#else
+DECLINLINE(TranslationBlock *) tb_find_fast(void)
+#endif
 {
     TranslationBlock *tb;

trunk/src/recompiler_new/exec-all.h

@@ -112 +112 @@
                       target_phys_addr_t paddr, int prot,
                       int mmu_idx, int is_softmmu);
+#ifndef VBOX
 static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,
                                target_phys_addr_t paddr, int prot,
                                int mmu_idx, int is_softmmu)
+#else
+DECLINLINE(int) tlb_set_page(CPUState *env1, target_ulong vaddr,
+                               target_phys_addr_t paddr, int prot,
+                               int mmu_idx, int is_softmmu)
+#endif
 {
     if (prot & PAGE_READ)
@@ -190 +196 @@
 };
 
+#ifndef VBOX
 static inline unsigned int tb_jmp_cache_hash_page(target_ulong pc)
+#else
+DECLINLINE(unsigned int) tb_jmp_cache_hash_page(target_ulong pc)
+#endif
 {
     target_ulong tmp;
@@ -197 +207 @@
 }
 
+#ifndef VBOX
 static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc)
+#else
+DECLINLINE(unsigned int) tb_jmp_cache_hash_func(target_ulong pc)
+#endif
+
 {
     target_ulong tmp;
@@ -205 +220 @@
 }
 
+#ifndef VBOX
 static inline unsigned int tb_phys_hash_func(unsigned long pc)
+#else
+DECLINLINE(unsigned int) tb_phys_hash_func(unsigned long pc)
+#endif
 {
     return pc & (CODE_GEN_PHYS_HASH_SIZE - 1);
@@ -265 +284 @@
 
 /* set the jump target */
+#ifndef VBOX
 static inline void tb_set_jmp_target(TranslationBlock *tb,
                                      int n, unsigned long addr)
+#else
+DECLINLINE(void) tb_set_jmp_target(TranslationBlock *tb,
+                                   int n, unsigned long addr)
+#endif
 {
     tb->tb_next[n] = addr;
@@ -273 +297 @@
 #endif
 
+#ifndef VBOX
 static inline void tb_add_jump(TranslationBlock *tb, int n,
                                TranslationBlock *tb_next)
+#else
+DECLINLINE(void) tb_add_jump(TranslationBlock *tb, int n,
+                             TranslationBlock *tb_next)
+#endif
 {
     /* NOTE: this test is only needed for thread safety */
@@ -361 +390 @@
 /* NOTE2: the returned address is not exactly the physical address: it
    is the offset relative to phys_ram_base */
+#ifndef VBOX
 static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
+#else
+DECLINLINE(target_ulong) get_phys_addr_code(CPUState *env, target_ulong addr)
+#endif
 {
     int is_user, index, pd;
@@ -381 +414 @@
 #error unimplemented CPU
 #endif
+#ifndef VBOX
     if (__builtin_expect(env->tlb_table[is_user][index].addr_code !=
                          (addr & TARGET_PAGE_MASK), 0)) {
+#else
+    if (RT_UNLIKELY(env->tlb_table[is_user][index].addr_code !=
+                         (addr & TARGET_PAGE_MASK))) {
+#endif
         ldub_code(addr);
     }
@@ -406 +444 @@
 /* Deterministic execution requires that IO only be performed on the last
    instruction of a TB so that interrupts take effect immediately.  */
+#ifndef VBOX
 static inline int can_do_io(CPUState *env)
+#else
+DECLINLINE(int) can_do_io(CPUState *env)
+#endif
 {
     if (!use_icount)

trunk/src/recompiler_new/exec.c

@@ -45 +45 @@
 # include <stdlib.h>
 # include <stdio.h>
-# include <inttypes.h>
 # include <iprt/alloc.h>
 # include <iprt/string.h>
@@ -102 +101 @@
 spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
 
+#ifndef VBOX
 #if defined(__arm__) || defined(__sparc_v9__)
 /* The prologue must be reachable with a direct jump. ARM and Sparc64
@@ -113 +113 @@
     __attribute__((aligned (32)))
 #endif
-
 uint8_t code_gen_prologue[1024] code_gen_section;
+
+#else /* VBOX */
+ALIGNED_MEMBER(uint8_t, code_gen_prologue[1024], 32);
+#endif /* VBOX */
+
 static uint8_t *code_gen_buffer;
 static unsigned long code_gen_buffer_size;
@@ -331 +335 @@
 }
 
+#ifndef VBOX
 static inline PageDesc **page_l1_map(target_ulong index)
+#else
+DECLINLINE(PageDesc **) page_l1_map(target_ulong index)
+#endif
 {
 #if TARGET_LONG_BITS > 32
@@ -342 +350 @@
 }
 
+#ifndef VBOX
 static inline PageDesc *page_find_alloc(target_ulong index)
+#else
+DECLINLINE(PageDesc *) page_find_alloc(target_ulong index)
+#endif
 {
     PageDesc **lp, *p;
@@ -373 +385 @@
 }
 
+#ifndef VBOX
 static inline PageDesc *page_find(target_ulong index)
+#else
+DECLINLINE(PageDesc *) page_find(target_ulong index)
+#endif
 {
     PageDesc **lp, *p;
@@ -430 +446 @@
 }
 
+#ifndef VBOX
 static inline PhysPageDesc *phys_page_find(target_phys_addr_t index)
+#else
+DECLINLINE(PhysPageDesc *) phys_page_find(target_phys_addr_t index)
+#endif
 {
     return phys_page_find_alloc(index, 0);
@@ -624 +644 @@
 }
 
+#ifndef VBOX
 static inline void invalidate_page_bitmap(PageDesc *p)
+#else
+DECLINLINE(void) invalidate_page_bitmap(PageDesc *p)
+#endif
 {
     if (p->code_bitmap) {
@@ -737 +761 @@
 
 /* invalidate one TB */
+#ifndef VBOX
 static inline void tb_remove(TranslationBlock **ptb, TranslationBlock *tb,
                              int next_offset)
+#else
+DECLINLINE(void) tb_remove(TranslationBlock **ptb, TranslationBlock *tb,
+                           int next_offset)
+#endif
 {
     TranslationBlock *tb1;
@@ -751 +780 @@
 }
 
+#ifndef VBOX
 static inline void tb_page_remove(TranslationBlock **ptb, TranslationBlock *tb)
+#else
+DECLINLINE(void) tb_page_remove(TranslationBlock **ptb, TranslationBlock *tb)
+#endif
 {
     TranslationBlock *tb1;
@@ -768 +801 @@
 }
 
+#ifndef VBOX
 static inline void tb_jmp_remove(TranslationBlock *tb, int n)
+#else
+DECLINLINE(void) tb_jmp_remove(TranslationBlock *tb, int n)
+#endif
 {
     TranslationBlock *tb1, **ptb;
@@ -798 +835 @@
 /* reset the jump entry 'n' of a TB so that it is not chained to
    another TB */
+#ifndef VBOX
 static inline void tb_reset_jump(TranslationBlock *tb, int n)
+#else
+DECLINLINE(void) tb_reset_jump(TranslationBlock *tb, int n)
+#endif
 {
     tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));
@@ -907 +948 @@
 #endif /* VBOX */
 
+#ifndef VBOX
 static inline void set_bits(uint8_t *tab, int start, int len)
+#else
+DECLINLINE(void) set_bits(uint8_t *tab, int start, int len)
+#endif
 {
     int end, mask, end1;
@@ -1120 +1165 @@
 
 /* len must be <= 8 and start must be a multiple of len */
+#ifndef VBOX
 static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)
+#else
+DECLINLINE(void) tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)
+#endif
 {
     PageDesc *p;
@@ -1218 +1267 @@
 
 /* add the tb in the target page and protect it if necessary */
+#ifndef VBOX
 static inline void tb_alloc_page(TranslationBlock *tb,
                                  unsigned int n, target_ulong page_addr)
+#else
+DECLINLINE(void) tb_alloc_page(TranslationBlock *tb,
+                                 unsigned int n, target_ulong page_addr)                   
+#endif
 {
     PageDesc *p;
@@ -1371 +1425 @@
 static void tb_reset_jump_recursive(TranslationBlock *tb);
 
+#ifndef VBOX
 static inline void tb_reset_jump_recursive2(TranslationBlock *tb, int n)
+#else
+DECLINLINE(void) tb_reset_jump_recursive2(TranslationBlock *tb, int n)
+#endif
 {
     TranslationBlock *tb1, *tb_next, **ptb;
@@ -1748 +1806 @@
 #if !defined(CONFIG_USER_ONLY)
 
+#ifndef VBOX
 static inline void tlb_flush_jmp_cache(CPUState *env, target_ulong addr)
+#else
+DECLINLINE(void) tlb_flush_jmp_cache(CPUState *env, target_ulong addr)
+#endif
 {
     unsigned int i;
@@ -1814 +1876 @@
 }
 
+#ifndef VBOX
 static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
+#else
+DECLINLINE(void) tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
+#endif
 {
     if (addr == (tlb_entry->addr_read &
@@ -1883 +1949 @@
 }
 
+#ifndef VBOX
 static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
                                          unsigned long start, unsigned long length)
+#else
+DECLINLINE(void) tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
+                                       unsigned long start, unsigned long length)
+#endif
 {
     unsigned long addr;
@@ -1968 +2039 @@
 #endif
 
+#ifndef VBOX
 static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)
+#else
+DECLINLINE(void) tlb_update_dirty(CPUTLBEntry *tlb_entry)
+#endif
 {
     ram_addr_t ram_addr;
@@ -2006 +2081 @@
 }
 
+#ifndef VBOX
 static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)
+#else
+DECLINLINE(void) tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)
+#endif
 {
     if (tlb_entry->addr_write == (vaddr | TLB_NOTDIRTY))
@@ -2015 +2094 @@
 /* update the TLB corresponding to virtual page vaddr and phys addr
    addr so that it is no longer dirty */
+#ifndef VBOX
 static inline void tlb_set_dirty(CPUState *env,
                                  unsigned long addr, target_ulong vaddr)
+#else
+DECLINLINE(void) tlb_set_dirty(CPUState *env,
+                               unsigned long addr, target_ulong vaddr)
+#endif
 {
     int i;

trunk/src/recompiler_new/hostregs_helper.h

@@ -37 +37 @@
 #if defined(DECLARE_HOST_REGS)
 
+#ifndef VBOX
 #define DO_REG(REG)                                     \
     register host_reg_t reg_AREG##REG asm(AREG##REG);   \
     volatile host_reg_t saved_AREG##REG;
+#else
+#define DO_REG(REG)                                                \
+    REGISTER_BOUND_GLOBAL(host_reg_t, reg_AREG##REG, AREG##REG);   \
+    volatile host_reg_t saved_AREG##REG;
+#endif
 
 #elif defined(SAVE_HOST_REGS)
 
+#ifndef VBOX
 #define DO_REG(REG)                                     \
     __asm__ __volatile__ ("" : "=r" (reg_AREG##REG));   \
     saved_AREG##REG = reg_AREG##REG;
+#else /* VBOX */
+#define DO_REG(REG)                                     \
+    SAVE_GLOBAL_REGISTER(REG, reg_AREG##REG);           \
+    saved_AREG##REG = reg_AREG##REG;
+#endif /* VBOX */
 
 #else
 
+#ifndef VBOX
 #define DO_REG(REG)                                     \
     reg_AREG##REG = saved_AREG##REG;                    \
     __asm__ __volatile__ ("" : : "r" (reg_AREG##REG));
+#else /* VBOX */
+#define DO_REG(REG)                                     \
+    reg_AREG##REG = saved_AREG##REG;                    \
+    RESTORE_GLOBAL_REGISTER(REG, reg_AREG##REG);
+#endif
 
 #endif

trunk/src/recompiler_new/osdep.h

@@ -111 +111 @@
 
 #ifdef __i386__
+#ifdef _MSC_VER
+/** @todo: maybe wrong, or slow */
+#define REGPARM 
+#else
 #define REGPARM __attribute((regparm(3)))
+#endif
 #else
 #define REGPARM
@@ -123 +128 @@
 #endif
 
+#ifndef VBOX
 void *qemu_memalign(size_t alignment, size_t size);
 void *qemu_vmalloc(size_t size);
 void qemu_vfree(void *ptr);
 
-#ifndef VBOX
 int qemu_create_pidfile(const char *filename);
 
@@ -144 +149 @@
 #endif /* !VBOX */
 
+#ifdef VBOX
+#ifdef _MSC_VER
+#define ALIGNED_MEMBER(type, name, bytes) type name
+#define ALIGNED_MEMBER_DEF(type, name) type name  
+#define PACKED_STRUCT(name) struct name
+#define REGISTER_BOUND_GLOBAL(type, var, reg) type var
+#define SAVE_GLOBAL_REGISTER(reg, var)
+#define RESTORE_GLOBAL_REGISTER(reg, var)
+#define DECLALWAYSINLINE(type) DECLINLINE(type)
+#else /* ! _MSC_VER */
+#define ALIGNED_MEMBER(type, name, bytes) type name __attribute__((aligned(bytes)))
+#define ALIGNED_MEMBER_DEF(type, name) type name __attribute__((aligned()))
+#define PACKED_STRUCT(name) struct __attribute__ ((__packed__)) name
+#define REGISTER_BOUND_GLOBAL(type, var, reg) register type var asm(reg)
+#define SAVE_GLOBAL_REGISTER(reg, var)     __asm__ __volatile__ ("" : "=r" (var))
+#define RESTORE_GLOBAL_REGISTER(reg, var) __asm__ __volatile__ ("" : : "r" (var))
+#define DECLALWAYSINLINE(type) static always_inline type
+#endif /* !_MSC_VER */
+#endif /* VBOX */
+
 #endif

trunk/src/recompiler_new/softmmu_header.h

@@ -86 +86 @@
 /* generic store macro */
 
-static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
+DELCINLINE(void) glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
 {
     int index;
@@ -162 +162 @@
 /* generic load/store macros */
 
+#ifndef VBOX
 static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
+#else
+DECLINLINE(RES_TYPE) glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
+#endif
 {
     int index;
@@ -173 +177 @@
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
     is_user = CPU_MMU_INDEX;
+#ifndef VBOX
     if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ != 
                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
+#else
+    if  (RT_UNLIKELY(env->tlb_table[is_user][index].ADDR_READ != 
+                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
+#endif
         res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
     } else {
@@ -184 +193 @@
 
 #if DATA_SIZE <= 2
+#ifndef VBOX
 static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
+#else
+DECLINLINE(int) glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
+#endif
 {
     int res, index;
@@ -194 +207 @@
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
     is_user = CPU_MMU_INDEX;
+#ifndef VBOX
     if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ != 
                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
+#else
+    if (RT_UNLIKELY(env->tlb_table[is_user][index].ADDR_READ != 
+                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
+#endif
         res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
     } else {
@@ -208 +226 @@
 
 /* generic store macro */
-
+#ifndef VBOX
 static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
+#else
+DECLINLINE(void) glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
+#endif
 {
     int index;
@@ -219 +240 @@
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
     is_user = CPU_MMU_INDEX;
+#ifndef VBOX
     if (__builtin_expect(env->tlb_table[is_user][index].addr_write != 
                          (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
+#else
+    if (RT_UNLIKELY(env->tlb_table[is_user][index].addr_write != 
+                         (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
+#endif
         glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
     } else {
@@ -235 +261 @@
 
 #if DATA_SIZE == 8
+#ifndef VBOX
 static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
+#else
+DECLINLINE(float64) glue(ldfq, MEMSUFFIX)(target_ulong ptr)
+#endif
 {
     union {
@@ -245 +275 @@
 }
 
+#ifndef VBOX
 static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
+#else
+DECLINLINE(void) glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
+#endif
 {
     union {
@@ -257 +291 @@
 
 #if DATA_SIZE == 4
+#ifndef VBOX
 static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
+#else
+DECLINLINE(float32) glue(ldfl, MEMSUFFIX)(target_ulong ptr)
+#endif
 {
     union {
@@ -267 +305 @@
 }
 
+#ifndef VBOX
 static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
+#else
+DECLINLINE(void) glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
+#endif
 {
     union {

trunk/src/recompiler_new/softmmu_template.h

@@ -60 +60 @@
                                                         int is_user,
                                                         void *retaddr);
+#ifndef VBOX
 static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 
                                               target_ulong addr,
                                               void *retaddr)
+#else
+DECLINLINE(DATA_TYPE) glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 
+                                            target_ulong addr,
+                                            void *retaddr)
+#endif
 {
     DATA_TYPE res;
@@ -204 +210 @@
                                                    void *retaddr);
 
+#ifndef VBOX
 static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 
                                           DATA_TYPE val,
                                           target_ulong addr,
                                           void *retaddr)
+#else
+DECLINLINE(void) glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 
+                                        DATA_TYPE val,
+                                        target_ulong addr,
+                                        void *retaddr)
+#endif
 {
     int index;

trunk/src/recompiler_new/target-i386/cpu.h

@@ -569 +569 @@
     union {
 #ifdef USE_X86LDOUBLE
+#ifndef VBOX
         CPU86_LDouble d __attribute__((aligned(16)));
+#else
+        ALIGNED_MEMBER(CPU86_LDouble, d, 16); 
+#endif
 #else
         CPU86_LDouble d;
@@ -729 +733 @@
     union {
 #ifdef USE_X86LDOUBLE
+#ifndef VBOX
         CPU86_LDouble d __attribute__((aligned(16)));
+#else
+        ALIGNED_MEMBER(CPU86_LDouble, d, 16);
+#endif
 #else
         CPU86_LDouble d;
@@ -805 +813 @@
 /* this function must always be used to load data in the segment
    cache: it synchronizes the hflags with the segment cache values */
+#ifndef VBOX
 static inline void cpu_x86_load_seg_cache(CPUX86State *env, 
                                           int seg_reg, unsigned int selector,
@@ -810 +819 @@
                                           unsigned int limit, 
                                           unsigned int flags)
+#else
+DECLINLINE(void)  cpu_x86_load_seg_cache(CPUX86State *env, 
+                                          int seg_reg, unsigned int selector,
+                                          target_ulong base,
+                                          unsigned int limit, 
+                                          unsigned int flags)
+
+#endif
 {
     SegmentCache *sc;
@@ -866 +883 @@
 
 /* wrapper, just in case memory mappings must be changed */
+#ifndef VBOX
 static inline void cpu_x86_set_cpl(CPUX86State *s, int cpl)
+#else
+DECLINLINE(void) cpu_x86_set_cpl(CPUX86State *s, int cpl)
+#endif
 {
 #if HF_CPL_MASK == 3
@@ -956 +977 @@
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
+#ifndef VBOX
 static inline int cpu_mmu_index (CPUState *env)
+#else
+DECLINLINE(int) cpu_mmu_index (CPUState *env)
+#endif
 {
     return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0;

trunk/src/recompiler_new/target-i386/exec.h

@@ -39 +39 @@
 #include "cpu-defs.h"
 
+#ifndef VBOX
 /* at least 4 register variables are defined */
 register struct CPUX86State *env asm(AREG0);
-
-#ifndef VBOX
+#else
+REGISTER_BOUND_GLOBAL(struct CPUX86State*, env, AREG0);
+#endif /* VBOX */
+
 #include "qemu-log.h"
-#endif
 
 #ifndef reg_EAX
@@ -113 +115 @@
 
 /* n must be a constant to be efficient */
+#ifndef VBOX
 static inline target_long lshift(target_long x, int n)
+#else
+DECLINLINE(target_long) lshift(target_long x, int n)
+#endif
 {
     if (n >= 0)
@@ -123 +129 @@
 #include "helper.h"
 
+#ifndef VBOX
 static inline void svm_check_intercept(uint32_t type)
+#else
+DECLINLINE(void) svm_check_intercept(uint32_t type)
+#endif
 {
     helper_svm_check_intercept_param(type, 0);
@@ -139 +149 @@
 #include "softmmu_exec.h"
 
+#ifndef VBOX
 static inline double ldfq(target_ulong ptr)
+#else
+DECLINLINE(double) ldfq(target_ulong ptr)
+#endif
 {
     union {
@@ -149 +163 @@
 }
 
+#ifndef VBOX 
 static inline void stfq(target_ulong ptr, double v)
+#else
+DECLINLINE(void) stfq(target_ulong ptr, double v)
+#endif
 {
     union {
@@ -159 +177 @@
 }
 
+#ifndef VBOX
 static inline float ldfl(target_ulong ptr)
+#else
+DECLINLINE(float) ldfl(target_ulong ptr)
+#endif
 {
     union {
@@ -169 +191 @@
 }
 
+#ifndef VBOX
 static inline void stfl(target_ulong ptr, float v)
+#else
+DECLINLINE(void) stfl(target_ulong ptr, float v)
+#endif
 {
     union {
@@ -239 +265 @@
 
 #ifdef VBOX
+#ifndef _MSC_VER
 extern CPU86_LDouble sin(CPU86_LDouble x);
 extern CPU86_LDouble cos(CPU86_LDouble x);
@@ -248 +275 @@
 extern CPU86_LDouble floor(CPU86_LDouble x);
 extern CPU86_LDouble ceil(CPU86_LDouble x);
-#endif
+#endif /* !_MSC_VER */
+#endif /* VBOX */
 
 #define RC_MASK         0xc00
+#ifndef RC_NEAR
 #define RC_NEAR         0x000
+#endif
+#ifndef RC_DOWN
 #define RC_DOWN         0x400
+#endif
+#ifndef RC_UP
 #define RC_UP           0x800
+#endif
+#ifndef RC_CHOP
 #define RC_CHOP         0xc00
+#endif
 
 #define MAXTAN 9223372036854775808.0
@@ -311 +347 @@
 #endif
 
+#ifndef VBOX
 static inline void fpush(void)
+#else
+DECLINLINE(void) fpush(void)
+#endif
 {
     env->fpstt = (env->fpstt - 1) & 7;
@@ -317 +357 @@
 }
 
+#ifndef VBOX
 static inline void fpop(void)
+#else
+DECLINLINE(void) fpop(void)
+#endif
 {
     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
@@ -378 +422 @@
 /* we use memory access macros */
 
+#ifndef VBOX
 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
+#else
+DECLINLINE(CPU86_LDouble) helper_fldt(target_ulong ptr)
+#endif
 {
     CPU86_LDoubleU temp;
@@ -387 +435 @@
 }
 
+#ifndef VBOX
 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
+#else
+DECLINLINE(void) helper_fstt(CPU86_LDouble f, target_ulong ptr)
+#endif
 {
     CPU86_LDoubleU temp;
@@ -422 +474 @@
 extern const uint8_t rclb_table[32];
 
+#ifndef VBOX
 static inline uint32_t compute_eflags(void)
+#else
+DECLINLINE(uint32_t) compute_eflags(void)
+#endif
 {
     return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
@@ -428 +484 @@
 
 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
+#ifndef VBOX
 static inline void load_eflags(int eflags, int update_mask)
+#else
+DECLINLINE(void) load_eflags(int eflags, int update_mask)
+#endif
 {
     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
@@ -436 +496 @@
 }
 
+#ifndef VBOX
 static inline void env_to_regs(void)
+#else
+DECLINLINE(void) env_to_regs(void)
+#endif
 {
 #ifdef reg_EAX
@@ -464 +528 @@
 }
 
+#ifndef VBOX
 static inline void regs_to_env(void)
+#else
+DECLINLINE(void) regs_to_env(void)
+#endif
 {
 #ifdef reg_EAX
@@ -492 +560 @@
 }
 
+#ifndef VBOX
 static inline int cpu_halted(CPUState *env) {
+#else
+DECLINLINE(int) cpu_halted(CPUState *env) {
+#endif
     /* handle exit of HALTED state */
     if (!env->halted)
@@ -508 +580 @@
 /* load efer and update the corresponding hflags. XXX: do consistency
    checks with cpuid bits ? */
+#ifndef VBOX
 static inline void cpu_load_efer(CPUState *env, uint64_t val)
+#else
+DECLINLINE(void) cpu_load_efer(CPUState *env, uint64_t val)
+#endif
 {
     env->efer = val;

trunk/src/recompiler_new/translate-all.c

@@ -31 +31 @@
 #include <stdio.h>
 #include <string.h>
-#include <inttypes.h>
 
 #include "config.h"