Changeset 13533 in vbox

Timestamp:

Oct 23, 2008 1:00:28 PM (16 years ago)

Author:

vboxsync

Message:

Extra assertions to check for unexpected use conditions.

Location:

trunk/src/VBox/VMM

Files:

• HWACCMInternal.h (modified) (1 diff)
• VMMR0/HWACCMR0.cpp (modified) (13 diffs)

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -143 +143 @@
 typedef struct
 {
-    RTCPUID     idCpu;
-
-    RTR0MEMOBJ  pMemObj;
+    RTCPUID             idCpu;
+
+    RTR0MEMOBJ          pMemObj;
     /* Current ASID (AMD-V)/VPID (Intel) */
-    uint32_t    uCurrentASID;
+    uint32_t            uCurrentASID;
     /* TLB flush count */
-    uint32_t    cTLBFlushes;
+    uint32_t            cTLBFlushes;
 
     /* Set the first time a cpu is used to make sure we start with a clean TLB. */
-    bool        fFlushTLB;
-
-    bool        fConfigured;
+    bool                fFlushTLB;
+
+    /** Configured for VT-x or AMD-V. */
+    bool                fConfigured;
+
+    /** In use by our code. (for power suspend) */
+    volatile bool       fInUse;
 } HWACCM_CPUINFO;
 typedef HWACCM_CPUINFO *PHWACCM_CPUINFO;

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -603 +603 @@
     Assert(idCpu < RT_ELEMENTS(HWACCMR0Globals.aCpuInfo));
     Assert(!pCpu->fConfigured);
+    Assert(ASMAtomicReadBool(&pCpu->fInUse) == false);
 
     pCpu->idCpu     = idCpu;
@@ -648 +649 @@
     Assert(idCpu == (RTCPUID)RTMpCpuIdToSetIndex(idCpu)); /// @todo fix idCpu == index assumption (rainy day)
     Assert(idCpu < RT_ELEMENTS(HWACCMR0Globals.aCpuInfo));
+    Assert(ASMAtomicReadBool(&pCpu->fInUse) == false);
 
     if (!pCpu->pMemObj)
@@ -735 +737 @@
 VMMR0DECL(int) HWACCMR0InitVM(PVM pVM)
 {
+    int             rc;
+    RTCPUID         idCpu = RTMpCpuId();
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
+
     AssertReturn(pVM, VERR_INVALID_PARAMETER);
 
@@ -780 +786 @@
     pVM->hwaccm.s.uCurrentASID              = 0;
 
+    ASMAtomicWriteBool(&pCpu->fInUse, true);
+
     /* Init a VT-x or AMD-V VM. */
-    return HWACCMR0Globals.pfnInitVM(pVM);
+    rc = HWACCMR0Globals.pfnInitVM(pVM);
+
+    ASMAtomicWriteBool(&pCpu->fInUse, false);
+
+    return rc;
 }
 
@@ -793 +805 @@
 VMMR0DECL(int) HWACCMR0TermVM(PVM pVM)
 {
+    int             rc;
+    RTCPUID         idCpu = RTMpCpuId();
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
+
     AssertReturn(pVM, VERR_INVALID_PARAMETER);
 
@@ -802 +818 @@
     AssertReturn(!ASMAtomicReadBool(&HWACCMR0Globals.fSuspended), VERR_HWACCM_SUSPEND_PENDING);
 
+    ASMAtomicWriteBool(&pCpu->fInUse, true);
+
     /* Terminate a VT-x or AMD-V VM. */
-    return HWACCMR0Globals.pfnTermVM(pVM);
+    rc = HWACCMR0Globals.pfnTermVM(pVM);
+
+    ASMAtomicWriteBool(&pCpu->fInUse, false);
+    return rc;
 }
 
@@ -815 +836 @@
 VMMR0DECL(int) HWACCMR0SetupVM(PVM pVM)
 {
+    int             rc;
+    RTCPUID         idCpu = RTMpCpuId();
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
+
     AssertReturn(pVM, VERR_INVALID_PARAMETER);
 
@@ -824 +849 @@
 #endif
 
+    ASMAtomicWriteBool(&pCpu->fInUse, true);
+
     /* Setup VT-x or AMD-V. */
-    return HWACCMR0Globals.pfnSetupVM(pVM);
+    rc = HWACCMR0Globals.pfnSetupVM(pVM);
+
+    ASMAtomicWriteBool(&pCpu->fInUse, false);
+
+    return rc;
 }
 
@@ -837 +868 @@
 VMMR0DECL(int) HWACCMR0Enter(PVM pVM)
 {
-    CPUMCTX *pCtx;
-    int      rc;
-    RTCPUID  idCpu = RTMpCpuId();
+    PCPUMCTX        pCtx;
+    int             rc;
+    RTCPUID         idCpu = RTMpCpuId();
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
 
     /* Make sure we can't enter a session after we've disabled hwaccm in preparation of a suspend. */
     AssertReturn(!ASMAtomicReadBool(&HWACCMR0Globals.fSuspended), VERR_HWACCM_SUSPEND_PENDING);
+    ASMAtomicWriteBool(&pCpu->fInUse, true);
 
     pCtx = CPUMQueryGuestCtxPtr(pVM);
@@ -861 +894 @@
         pVM->hwaccm.s.u64RegisterMask = UINT64_C(0xFFFFFFFF);
 
-    rc  = HWACCMR0Globals.pfnEnterSession(pVM, &HWACCMR0Globals.aCpuInfo[idCpu]);
+    rc  = HWACCMR0Globals.pfnEnterSession(pVM, pCpu);
     AssertRC(rc);
     /* We must save the host context here (VT-x) as we might be rescheduled on a different cpu after a long jump back to ring 3. */
@@ -889 +922 @@
 VMMR0DECL(int) HWACCMR0Leave(PVM pVM)
 {
-    CPUMCTX *pCtx;
-    int      rc;
+    PCPUMCTX        pCtx;
+    int             rc;
+    RTCPUID         idCpu = RTMpCpuId();
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
 
     AssertReturn(!ASMAtomicReadBool(&HWACCMR0Globals.fSuspended), VERR_HWACCM_SUSPEND_PENDING);
@@ -913 +948 @@
 #ifdef VBOX_STRICT
     /* keep track of the CPU owning the VMCS for debugging scheduling weirdness and ring-3 calls. */
-    RTCPUID idCpu = RTMpCpuId();
     AssertMsg(pVM->hwaccm.s.idEnteredCpu == idCpu, ("owner is %d, I'm %d", (int)pVM->hwaccm.s.idEnteredCpu, (int)idCpu));
     pVM->hwaccm.s.idEnteredCpu = NIL_RTCPUID;
 #endif
 
+    ASMAtomicWriteBool(&pCpu->fInUse, false);
     return rc;
 }
@@ -932 +967 @@
     int      rc;
     RTCPUID  idCpu = RTMpCpuId(); NOREF(idCpu);
+#ifdef VBOX_STRICT
+    PHWACCM_CPUINFO pCpu = &HWACCMR0Globals.aCpuInfo[idCpu];
+#endif
 
     Assert(!VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL));
     Assert(HWACCMR0Globals.aCpuInfo[idCpu].fConfigured);
     AssertReturn(!ASMAtomicReadBool(&HWACCMR0Globals.fSuspended), VERR_HWACCM_SUSPEND_PENDING);
+    Assert(ASMAtomicReadBool(&pCpu->fInUse) == true);
 
     pCtx = CPUMQueryGuestCtxPtr(pVM);