- Timestamp:
- Mar 9, 2007 10:40:44 AM (18 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/EM.cpp
r1336 r1359 1645 1645 if (pCtx->SysEnter.cs != 0) 1646 1646 { 1647 rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pCtx->eip),1648 SELMIsSelector32Bit(pVM, pCtx-> cs, &pCtx->csHid) ? PATMFL_CODE32 : 0);1647 rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pCtx->eip), 1648 SELMIsSelector32Bit(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) ? PATMFL_CODE32 : 0); 1649 1649 if (VBOX_SUCCESS(rc)) 1650 1650 { … … 1852 1852 && !PATMIsPatchGCAddr(pVM, pCtx->eip)) 1853 1853 { 1854 int rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pCtx->eip),1855 SELMIsSelector32Bit(pVM, pCtx-> cs, &pCtx->csHid) ? PATMFL_CODE32 : 0);1854 int rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pCtx->eip), 1855 SELMIsSelector32Bit(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) ? PATMFL_CODE32 : 0); 1856 1856 if (VBOX_SUCCESS(rc)) 1857 1857 { … … 1960 1960 if ( (pCtx->ss & X86_SEL_RPL) == 0 1961 1961 && !pCtx->eflags.Bits.u1VM 1962 && SELMIsSelector32Bit(pVM, pCtx-> cs, &pCtx->csHid))1962 && SELMIsSelector32Bit(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid)) 1963 1963 { 1964 1964 uint32_t size; … … 2182 2182 */ 2183 2183 case VINF_PATM_HC_MMIO_PATCH_READ: 2184 rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pCtx->eip),2185 PATMFL_MMIO_ACCESS | (SELMIsSelector32Bit(pVM, pCtx-> cs, &pCtx->csHid) ? PATMFL_CODE32 : 0));2184 rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pCtx->eip), 2185 PATMFL_MMIO_ACCESS | (SELMIsSelector32Bit(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) ? PATMFL_CODE32 : 0)); 2186 2186 if (VBOX_FAILURE(rc)) 2187 2187 rc = emR3RawExecuteInstruction(pVM, "MMIO"); … … 2433 2433 /* Prefetch pages for EIP and ESP */ 2434 2434 /** @todo This is rather expensive. Should investigate if it really helps at all. */ 2435 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pCtx->eip));2435 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pCtx->eip)); 2436 2436 if (rc == VINF_SUCCESS) 2437 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx-> ss, &pCtx->ssHid, pCtx->esp));2437 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->ss, &pCtx->ssHid, pCtx->esp)); 2438 2438 if (rc != VINF_SUCCESS) 2439 2439 { … … 2735 2735 2736 2736 /* Prefetch pages for EIP and ESP */ 2737 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pCtx->eip));2737 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pCtx->eip)); 2738 2738 if (rc == VINF_SUCCESS) 2739 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx-> ss, &pCtx->ssHid, pCtx->esp));2739 rc = PGMPrefetchPage(pVM, SELMToFlat(pVM, pCtx->eflags, pCtx->ss, &pCtx->ssHid, pCtx->esp)); 2740 2740 if (rc != VINF_SUCCESS) 2741 2741 { -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r1086 r1359 2048 2048 if (CSAMIsEnabled(pVM)) 2049 2049 { 2050 bool fCode32 = SELMIsSelector32Bit(pVM, Sel, pHiddenSel); 2050 X86EFLAGS fakeflags; 2051 2052 /* we're not in v86 mode here */ 2053 fakeflags.u32 = 0; 2054 2055 bool fCode32 = SELMIsSelector32Bit(pVM, fakeflags, Sel, pHiddenSel); 2051 2056 2052 2057 //assuming 32 bits code for now 2053 2058 Assert(fCode32); 2054 2059 2055 pInstrGC = SELMToFlat(pVM, Sel, pHiddenSel, pInstrGC);2060 pInstrGC = SELMToFlat(pVM, fakeflags, Sel, pHiddenSel, pInstrGC); 2056 2061 2057 2062 return CSAMR3CheckCode(pVM, pInstrGC); … … 2239 2244 CSAMP2GLOOKUPREC cacheRec = {0}; /* Cache record for PATMGCVirtToHCVirt. */ 2240 2245 PCSAMPAGE pPage = NULL; 2246 X86EFLAGS fakeflags; 2247 2248 /* we're not in v86 mode here */ 2249 fakeflags.u32 = 0; 2241 2250 2242 2251 pHandler = (pGuestIdte->Gen.u16OffsetHigh << 16) | pGuestIdte->Gen.u16OffsetLow; 2243 pHandler = SELMToFlat(pVM, pGuestIdte->Gen.u16SegSel, 0, pHandler);2252 pHandler = SELMToFlat(pVM, fakeflags, pGuestIdte->Gen.u16SegSel, 0, pHandler); 2244 2253 2245 2254 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) -
trunk/src/VBox/VMM/PATM/PATM.cpp
r1125 r1359 3338 3338 3339 3339 pBranchTarget = pCtx->edx; 3340 pBranchTarget = SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pBranchTarget);3340 pBranchTarget = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pBranchTarget); 3341 3341 3342 3342 /* First we check if the duplicate function target lies in some existing function patch already. Will save some space. */ … … 3955 3955 && (pCtx->ss & X86_SEL_RPL) == 0) 3956 3956 { 3957 RTGCPTR pInstrGCFlat = SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, pInstrGC);3957 RTGCPTR pInstrGCFlat = SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, pInstrGC); 3958 3958 Assert(pInstrGCFlat == pInstrGC); 3959 3959 } … … 5907 5907 5908 5908 /* Return original address, correct by subtracting the CS base address. */ 5909 *ppNewEip = pNewEip - SELMToFlat(pVM, pCtx-> cs, &pCtx->csHid, 0);5909 *ppNewEip = pNewEip - SELMToFlat(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid, 0); 5910 5910 5911 5911 /* Reset the PATM stack. */ -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r1163 r1359 469 469 } 470 470 471 cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame-> cs, 0) ? CPUMODE_32BIT : CPUMODE_16BIT;471 cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, 0) ? CPUMODE_32BIT : CPUMODE_16BIT; 472 472 if(cpu.mode != CPUMODE_32BIT) 473 473 { -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r1322 r1359 131 131 { 132 132 RTGCPTR GCPtrInstr; 133 int rc = SELMValidateAndConvertCSAddr(pVM, pCtxCore-> ss, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid, (RTGCPTR)pCtxCore->eip, &GCPtrInstr);133 int rc = SELMValidateAndConvertCSAddr(pVM, pCtxCore->eflags, pCtxCore->ss, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid, (RTGCPTR)pCtxCore->eip, &GCPtrInstr); 134 134 if (VBOX_FAILURE(rc)) 135 135 { … … 155 155 EMDECL(int) EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr) 156 156 { 157 int rc = DISCoreOneEx(GCPtrInstr, SELMIsSelector32Bit(pVM, pCtxCore-> cs, (PCPUMSELREGHID)&pCtxCore->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT,157 int rc = DISCoreOneEx(GCPtrInstr, SELMIsSelector32Bit(pVM, pCtxCore->eflags, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT, 158 158 #ifdef IN_GC 159 159 NULL, NULL, … … 192 192 * Only allow 32-bit code. 193 193 */ 194 if (SELMIsSelector32Bit(pVM, pRegFrame-> cs, &pRegFrame->csHid))194 if (SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid)) 195 195 { 196 196 RTGCPTR pbCode; 197 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pbCode);197 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pbCode); 198 198 if (VBOX_SUCCESS(rc)) 199 199 { … … 542 542 543 543 /* Read stack value first */ 544 if (SELMIsSelector32Bit(pVM, pRegFrame-> ss, &pRegFrame->ssHid) == false)544 if (SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->ss, &pRegFrame->ssHid) == false) 545 545 return VERR_EM_INTERPRETER; /* No legacy 16 bits stuff here, please. */ 546 546 547 547 /* Convert address; don't bother checking limits etc, as we only read here */ 548 pStackVal = SELMToFlat(pVM, pRegFrame-> ss, &pRegFrame->ssHid, (RTGCPTR)pRegFrame->esp);548 pStackVal = SELMToFlat(pVM, pRegFrame->eflags, pRegFrame->ss, &pRegFrame->ssHid, (RTGCPTR)pRegFrame->esp); 549 549 if (pStackVal == 0) 550 550 return VERR_EM_INTERPRETER; … … 1749 1749 1750 1750 Assert(pRegFrame->eflags.u32 & X86_EFL_IF); 1751 Assert(pvFault == SELMToFlat(pVM, pRegFrame-> cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip));1751 Assert(pvFault == SELMToFlat(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip)); 1752 1752 1753 1753 pVM->em.s.GCPtrInhibitInterrupts = pRegFrame->eip + pCpu->opsize; … … 1853 1853 /* In HWACCM mode we can execute 16 bits code. Our emulation above can't cope with that yet. */ 1854 1854 /** @note if not in HWACCM mode, then we will never execute 16 bits code, so don't bother checking. */ 1855 if (HWACCMIsEnabled(pVM) && !SELMIsSelector32Bit(pVM, pRegFrame-> cs, &pRegFrame->csHid))1855 if (HWACCMIsEnabled(pVM) && !SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid)) 1856 1856 return VERR_EM_INTERPRETER; 1857 1857 -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r708 r1359 1199 1199 */ 1200 1200 uint32_t efl = CPUMRawGetEFlags(pVM, pCtxCore); 1201 if ( ( (unsigned)(pCtxCore->ss & X86_SEL_RPL) > 1 1202 && X86_EFL_GET_IOPL(efl) < (unsigned)(pCtxCore->ss & X86_SEL_RPL) 1203 ) 1204 || (efl & X86_EFL_VM) 1201 uint32_t cpl; 1202 1203 if (pCtxCore->eflags.Bits.u1VM) 1204 cpl = 3; 1205 else 1206 cpl = (pCtxCore->ss & X86_SEL_RPL); 1207 1208 if ( cpl > 1 1209 && X86_EFL_GET_IOPL(efl) < cpl 1205 1210 ) 1206 1211 { -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r1332 r1359 216 216 217 217 218 #if 0219 /**220 * Calculates effective address (offset from current segment register) for221 * instruction parameter, i.e. [eax + esi*4 + 1234h] -> virtual address.222 *223 * @returns true on success.224 * @param pCpu Pointer to current disassembler context.225 * @param pParam Pointer to parameter of instruction to calc EA.226 * @param pRegFrame Pointer to CPUMCTXCORE guest structure.227 * @param ppAddr Where to store result address.228 */229 static bool iomGCCalcParamEA(PDISCPUSTATE pCpu, POP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, void **ppAddr)230 {231 uint8_t *pAddr = 0;232 233 if (pCpu->addrmode == CPUMODE_32BIT)234 {235 /* 32-bit addressing. */236 if (pParam->flags & USE_BASE)237 pAddr += ACCESS_REG32(pRegFrame, pParam->base.reg_gen32);238 if (pParam->flags & USE_INDEX)239 {240 unsigned i = ACCESS_REG32(pRegFrame, pParam->index.reg_gen);241 if (pParam->flags & USE_SCALE)242 i *= pParam->scale;243 pAddr += i;244 }245 if (pParam->flags & USE_DISPLACEMENT8)246 pAddr += pParam->disp8;247 else248 if (pParam->flags & USE_DISPLACEMENT16)249 pAddr += pParam->disp16;250 else251 if (pParam->flags & USE_DISPLACEMENT32)252 pAddr += pParam->disp32;253 254 if (pParam->flags & (USE_BASE | USE_INDEX | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32))255 {256 /* EA present in parameter. */257 *ppAddr = pAddr;258 return true;259 }260 }261 else262 {263 /* 16-bit addressing. */264 if (pParam->flags & USE_BASE)265 pAddr += ACCESS_REG16(pRegFrame, pParam->base.reg_gen16);266 if (pParam->flags & USE_INDEX)267 pAddr += ACCESS_REG16(pRegFrame, pParam->index.reg_gen);268 if (pParam->flags & USE_DISPLACEMENT8)269 pAddr += pParam->disp8;270 else271 if (pParam->flags & USE_DISPLACEMENT16)272 pAddr += pParam->disp16;273 274 if (pParam->flags & (USE_BASE | USE_INDEX | USE_DISPLACEMENT8 | USE_DISPLACEMENT16))275 {276 /* EA present in parameter. */277 *ppAddr = pAddr;278 return true;279 }280 }281 282 /* Error exit. */283 return false;284 }285 286 /**287 * Calculates the size of register parameter.288 *289 * @returns 1, 2, 4 on success.290 * @returns 0 if non-register parameter.291 * @param pCpu Pointer to current disassembler context.292 * @param pParam Pointer to parameter of instruction to proccess.293 */294 static unsigned iomGCGetRegSize(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam)295 {296 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32 | USE_IMMEDIATE8 | USE_IMMEDIATE16 | USE_IMMEDIATE32 | USE_IMMEDIATE16_SX8 | USE_IMMEDIATE32_SX8))297 return 0;298 299 if (pParam->flags & USE_REG_GEN32)300 return 4;301 302 if (pParam->flags & USE_REG_GEN16)303 return 2;304 305 if (pParam->flags & USE_REG_GEN8)306 return 1;307 308 if (pParam->flags & USE_REG_SEG)309 return 2;310 return 0;311 }312 #endif313 314 218 /** 315 219 * Returns the contents of register or immediate data of instruction's parameter. … … 608 512 } 609 513 514 uint32_t cpl; 515 if (pRegFrame->eflags.Bits.u1VM) 516 cpl = 3; 517 else 518 cpl = (pRegFrame->ss & X86_SEL_RPL); 519 610 520 /* 611 521 * Get data size. … … 639 549 /* Convert source address ds:esi. */ 640 550 uint8_t *pu8Virt; 641 rc = SELMToFlatEx(pVM, pRegFrame-> ds, (RTGCPTR)pRegFrame->esi,551 rc = SELMToFlatEx(pVM, pRegFrame->eflags, pRegFrame->ds, (RTGCPTR)pRegFrame->esi, 642 552 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 643 553 (PRTGCPTR)&pu8Virt, NULL); … … 646 556 647 557 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 648 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pu8Virt, cTransfers * cbSize, ( (pRegFrame->ss & X86_SEL_RPL)== 3) ? X86_PTE_US : 0);558 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pu8Virt, cTransfers * cbSize, (cpl == 3) ? X86_PTE_US : 0); 649 559 if (rc != VINF_SUCCESS) 650 560 { … … 695 605 /* Convert destination address. */ 696 606 uint8_t *pu8Virt; 697 rc = SELMToFlatEx(pVM, pRegFrame->e s, (RTGCPTR)pRegFrame->edi,607 rc = SELMToFlatEx(pVM, pRegFrame->eflags, pRegFrame->es, (RTGCPTR)pRegFrame->edi, 698 608 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 699 609 (PRTGCPTR)&pu8Virt, NULL); … … 751 661 752 662 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 753 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pu8Virt, cTransfers * cbSize, X86_PTE_RW | (( (pRegFrame->ss & X86_SEL_RPL)== 3) ? X86_PTE_US : 0));663 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pu8Virt, cTransfers * cbSize, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0)); 754 664 if (rc != VINF_SUCCESS) 755 665 { … … 1317 1227 GCPhysFault, uErrorCode, pvFault, pRegFrame->eip)); 1318 1228 1319 /** @todo V86 mode; SELM functions don't handle this */1320 if (pRegFrame->eflags.Bits.u1VM)1321 return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;1322 1323 1229 /* 1324 1230 * Find the corresponding MMIO range. … … 1356 1262 */ 1357 1263 DISCPUSTATE cpu; 1358 cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame-> cs, &pRegFrame->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT;1264 cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT; 1359 1265 1360 1266 RTGCPTR pvCode; 1361 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)(cpu.mode == CPUMODE_32BIT ? pRegFrame->eip : pRegFrame->eip & 0xffff), &pvCode);1267 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)(cpu.mode == CPUMODE_32BIT ? pRegFrame->eip : pRegFrame->eip & 0xffff), &pvCode); 1362 1268 if (VBOX_FAILURE(rc)) 1363 1269 { -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r1158 r1359 201 201 * Check if the EIP is in a virtual page access handler range. 202 202 */ 203 if ((pRegFrame->ss & X86_SEL_RPL) == 1) 203 if ( (pRegFrame->ss & X86_SEL_RPL) == 1 204 && !pRegFrame->eflags.Bits.u1VM) 204 205 { 205 206 RTGCPTR pvEIP; 206 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pvEIP);207 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pvEIP); 207 208 if (VBOX_SUCCESS(rc)) 208 209 { … … 700 701 /** @todo this stuff is completely broken by the out-of-sync stuff. since we don't use this stuff, that's not really a problem yet. */ 701 702 STAM_PROFILE_START(&pVM->pgm.s.StatEIPHandlers, d); 702 if ((pRegFrame->ss & X86_SEL_RPL) == 1) 703 if ( (pRegFrame->ss & X86_SEL_RPL) == 1 704 && !pRegFrame->eflags.Bits.u1VM) 703 705 { 704 706 RTGCPTR pvEIP; 705 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pvEIP);707 rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pvEIP); 706 708 if ( VBOX_SUCCESS(rc) 707 709 && pvEIP == (RTGCPTR)pRegFrame->eip) -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r138 r1359 1058 1058 { 1059 1059 DISCPUSTATE Cpu; 1060 Cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame-> cs, &pRegFrame->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT;1060 Cpu.mode = SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid) ? CPUMODE_32BIT : CPUMODE_16BIT; 1061 1061 if (Cpu.mode == CPUMODE_32BIT) 1062 1062 { 1063 1063 RTGCPTR GCPtrCode; 1064 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtrCode);1064 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &GCPtrCode); 1065 1065 if (VBOX_SUCCESS(rc)) 1066 1066 { -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r105 r1359 84 84 * @returns Flat address. 85 85 * @param pVM VM Handle. 86 * @param eflags Current eflags 86 87 * @param Sel Selector part. 87 88 * @param Addr Address part. 88 89 */ 89 SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, RTSEL Sel, CPUMSELREGHID *pHiddenSel, RTGCPTR Addr) 90 { 90 SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel, RTGCPTR Addr) 91 { 92 /* 93 * Deal with real mode first. 94 */ 95 if ( CPUMIsGuestInRealMode(pVM) 96 || eflags.Bits.u1VM) 97 { 98 RTGCUINTPTR uFlat = ((RTGCUINTPTR)Addr & 0xffff) + (Sel << 4); 99 return (RTGCPTR)uFlat; 100 } 101 91 102 if (!CPUMAreHiddenSelRegsValid(pVM)) 92 103 return selmToFlat(pVM, Sel, Addr); … … 103 114 * @returns VBox status 104 115 * @param pVM VM Handle. 116 * @param eflags Current eflags 105 117 * @param Sel Selector part. 106 118 * @param Addr Address part. … … 111 123 * the selector. NULL is allowed. 112 124 */ 113 SELMDECL(int) SELMToFlatEx(PVM pVM, RTSEL Sel, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb)125 SELMDECL(int) SELMToFlatEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb) 114 126 { 115 127 /* 116 128 * Deal with real mode first. 117 129 */ 118 if ( CPUMIsGuestInRealMode(pVM)119 /** @todo || (fFlags & SELMTOFLAT_FLAGS_V86)*/)130 if ( CPUMIsGuestInRealMode(pVM) 131 || eflags.Bits.u1VM) 120 132 { 121 133 if (pcb) … … 353 365 * @returns Flat address. 354 366 * @param pVM VM Handle. 367 * @param eflags Current eflags 355 368 * @param SelCPL Current privilege level. Get this from SS - CS might be conforming! 356 369 * A full selector can be passed, we'll only use the RPL part. … … 360 373 * @param ppvFlat Where to store the flat address. 361 374 */ 362 SELMDECL(int) SELMValidateAndConvertCSAddr(PVM pVM, RTSEL SelCPL, RTSEL SelCS, CPUMSELREGHID *pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat) 363 { 375 SELMDECL(int) SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, CPUMSELREGHID *pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat) 376 { 377 /* Special handling for V86 mode */ 378 if (eflags.Bits.u1VM) 379 { 380 if (ppvFlat) 381 { 382 RTGCUINTPTR uFlat = ((RTGCUINTPTR)Addr & 0xffff) + (SelCS << 4); 383 *ppvFlat = (RTGCPTR)uFlat; 384 } 385 return VINF_SUCCESS; 386 } 387 364 388 if (!CPUMAreHiddenSelRegsValid(pVM)) 365 389 return selmValidateAndConvertCSAddr(pVM, SelCPL, SelCS, Addr, ppvFlat); … … 441 465 * @returns False if it is 16-bit. 442 466 * @param pVM VM Handle. 467 * @param eflags Current eflags register 443 468 * @param Sel The selector. 444 469 * @param pHiddenSel The hidden selector register. 445 470 */ 446 SELMDECL(bool) SELMIsSelector32Bit(PVM pVM, RTSEL Sel, CPUMSELREGHID *pHiddenSel) 447 { 471 SELMDECL(bool) SELMIsSelector32Bit(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel) 472 { 473 if (eflags.Bits.u1VM) 474 return false; 475 448 476 if (!CPUMAreHiddenSelRegsValid(pVM)) 449 477 return selmIsSelector32Bit(pVM, Sel); -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r1328 r1359 492 492 /* Note: SELMValidateAndConvertCSAddr checks for code type, memory type, selector validity. */ 493 493 /** @todo dpl <= cpl else GPF */ 494 rc = SELMValidateAndConvertCSAddr(pVM, 0, GuestIdte.Gen.u16SegSel, NULL, pHandler, &dummy); 494 495 /** @note don't use current eflags as we might be in V86 mode and the IDT always contains protected mode selectors */ 496 X86EFLAGS fakeflags; 497 fakeflags.u32 = 0; 498 499 rc = SELMValidateAndConvertCSAddr(pVM, fakeflags, 0, GuestIdte.Gen.u16SegSel, NULL, pHandler, &dummy); 495 500 if (rc == VINF_SUCCESS) 496 501 { … … 558 563 || !ss_r0 559 564 || (ss_r0 & X86_SEL_RPL) != ((dpl == 0) ? 1 : dpl) 560 || SELMToFlatEx(pVM, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS565 || SELMToFlatEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS 561 566 ) 562 567 { … … 572 577 573 578 if ( eflags.Bits.u1VM /* illegal */ 574 || SELMToFlatEx(pVM, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS)579 || SELMToFlatEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS) 575 580 { 576 581 AssertMsgFailed(("Invalid stack %04X:%VGv??? (VM=%d)\n", ss_r0, esp_r0, eflags.Bits.u1VM)); -
trunk/src/VBox/VMM/VMMGC/DBGFGC.cpp
r1161 r1359 112 112 { 113 113 RTGCPTR pPc; 114 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid,115 (RTGCPTR)((RTGCUINTPTR)pRegFrame->eip - 1), 114 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, 115 (RTGCPTR)((RTGCUINTPTR)pRegFrame->eip - 1), 116 116 &pPc); 117 117 AssertRCReturn(rc, rc); -
trunk/src/VBox/VMM/VMMGC/IOMGC.cpp
r1160 r1359 554 554 /* Convert destination address es:edi. */ 555 555 RTGCPTR GCPtrDst; 556 rc = SELMToFlatEx(pVM, pRegFrame->e s, (RTGCPTR)pRegFrame->edi,556 rc = SELMToFlatEx(pVM, pRegFrame->eflags, pRegFrame->es, (RTGCPTR)pRegFrame->edi, 557 557 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 558 558 &GCPtrDst, NULL); … … 659 659 /* Convert source address ds:esi. */ 660 660 RTGCPTR GCPtrSrc; 661 rc = SELMToFlatEx(pVM, pRegFrame-> ds, (RTGCPTR)pRegFrame->esi,661 rc = SELMToFlatEx(pVM, pRegFrame->eflags, pRegFrame->ds, (RTGCPTR)pRegFrame->esi, 662 662 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 663 663 &GCPtrSrc, NULL); -
trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp
r1321 r1359 349 349 */ 350 350 RTGCPTR PC; 351 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);351 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC); 352 352 if (VBOX_FAILURE(rc)) 353 353 { … … 423 423 */ 424 424 uint8_t *pu8Code; 425 if (SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS)425 if (SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, (PRTGCPTR)&pu8Code) == VINF_SUCCESS) 426 426 { 427 427 /* … … 711 711 X86EFLAGS eflags; 712 712 eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame); 713 if (eflags.Bits.u2IOPL == 0) 714 { 713 if (eflags.Bits.u2IOPL != 3) 714 { 715 Assert(eflags.Bits.u2IOPL == 0); 716 715 717 int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP); 716 718 Assert(rc == VINF_EM_RAW_GUEST_TRAP); 717 719 return trpmGCExitTrap(pVM, rc, pRegFrame); 718 720 } 719 720 return trpmGCExitTrap(pVM, VINF_EM_RAW_EMULATE_INSTR, pRegFrame); 721 /* iopl=3 means we can safely interpret e.g. io instructions. */ 721 722 } 722 723 … … 726 727 */ 727 728 RTGCPTR PC; 728 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC);729 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC); 729 730 if (VBOX_FAILURE(rc)) 730 731 { … … 763 764 764 765 /* 765 * Deal with Ring-3 GPs. 766 * Deal with Ring-3 GPs. (we currently ignore V86 code) 766 767 */ 767 768 if (!pRegFrame->eflags.Bits.u1VM) 768 769 return trpmGCTrap0dHandlerRing3(pVM, pRegFrame, &Cpu); 769 770 770 /** @todo what about V86 mode? */771 771 return trpmGCExitTrap(pVM, VINF_EM_RAW_GUEST_TRAP, pRegFrame); 772 772 } -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r1296 r1359 1478 1478 * Only allow 32-bit code. 1479 1479 */ 1480 if (SELMIsSelector32Bit(pVM, pRegFrame-> cs, &pRegFrame->csHid))1480 if (SELMIsSelector32Bit(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid)) 1481 1481 { 1482 1482 RTGCPTR pbCode; 1483 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame-> ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pbCode);1483 int rc = SELMValidateAndConvertCSAddr(pVM, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &pbCode); 1484 1484 if (VBOX_SUCCESS(rc)) 1485 1485 {
Note:
See TracChangeset
for help on using the changeset viewer.