Changeset 13816 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Nov 4, 2008 10:52:12 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r13566 r13816 115 115 { 116 116 uint8_t opcode; 117 if ( VBOX_SUCCESS(PATMR3QueryOpcode(pVM, (RTGCPTR)pSrc + i, &opcode)))117 if (RT_SUCCESS(PATMR3QueryOpcode(pVM, (RTGCPTR)pSrc + i, &opcode))) 118 118 { 119 119 *(pDest+i) = opcode; … … 152 152 RTGCPTR GCPtrInstr; 153 153 int rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pCtxCore, pCtxCore->rip, 0, &GCPtrInstr); 154 if ( VBOX_FAILURE(rc))154 if (RT_FAILURE(rc)) 155 155 { 156 156 Log(("EMInterpretDisasOne: Failed to convert %RTsel:%VGv (cpl=%d) - rc=%Vrc !!\n", … … 182 182 #endif 183 183 pCpu, pcbInstr); 184 if ( VBOX_SUCCESS(rc))184 if (RT_SUCCESS(rc)) 185 185 return VINF_SUCCESS; 186 186 AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%VGv rc=%Vrc\n", GCPtrInstr, rc)); … … 213 213 LogFlow(("EMInterpretInstruction %VGv fault %VGv\n", pRegFrame->rip, pvFault)); 214 214 int rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pRegFrame, pRegFrame->rip, 0, &pbCode); 215 if ( VBOX_SUCCESS(rc))215 if (RT_SUCCESS(rc)) 216 216 { 217 217 uint32_t cbOp; … … 219 219 Cpu.mode = SELMGetCpuModeFromSelector(pVM, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid); 220 220 rc = emDisCoreOne(pVM, &Cpu, (RTGCUINTPTR)pbCode, &cbOp); 221 if ( VBOX_SUCCESS(rc))221 if (RT_SUCCESS(rc)) 222 222 { 223 223 Assert(cbOp == Cpu.opsize); 224 224 rc = EMInterpretInstructionCPU(pVM, &Cpu, pRegFrame, pvFault, pcbSize); 225 if ( VBOX_SUCCESS(rc))225 if (RT_SUCCESS(rc)) 226 226 { 227 227 pRegFrame->rip += cbOp; /* Move on to the next instruction. */ … … 264 264 int rc = emInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, pcbSize); 265 265 STAM_PROFILE_STOP(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a); 266 if ( VBOX_SUCCESS(rc))266 if (RT_SUCCESS(rc)) 267 267 STAM_COUNTER_INC(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretSucceeded)); 268 268 else … … 427 427 /* Source to make DISQueryParamVal read the register value - ugly hack */ 428 428 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 429 if( VBOX_FAILURE(rc))429 if(RT_FAILURE(rc)) 430 430 return VERR_EM_INTERPRETER; 431 431 432 432 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 433 if( VBOX_FAILURE(rc))433 if(RT_FAILURE(rc)) 434 434 return VERR_EM_INTERPRETER; 435 435 … … 455 455 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER); 456 456 rc = emRamRead(pVM, &valpar1, pParam1, param1.size); 457 if ( VBOX_FAILURE(rc))457 if (RT_FAILURE(rc)) 458 458 { 459 459 AssertMsgFailed(("MMGCRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 474 474 EM_ASSERT_FAULT_RETURN(pParam2 == pvFault, VERR_EM_INTERPRETER); 475 475 rc = emRamRead(pVM, &valpar2, pParam2, param2.size); 476 if ( VBOX_FAILURE(rc))476 if (RT_FAILURE(rc)) 477 477 { 478 478 AssertMsgFailed(("MMGCRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 502 502 default: AssertFailedReturn(VERR_EM_INTERPRETER); 503 503 } 504 if ( VBOX_FAILURE(rc))504 if (RT_FAILURE(rc)) 505 505 return VERR_EM_INTERPRETER; 506 506 } … … 508 508 { 509 509 rc = emRamWrite(pVM, pParam1, &valpar2, param1.size); 510 if ( VBOX_FAILURE(rc))510 if (RT_FAILURE(rc)) 511 511 { 512 512 AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 528 528 default: AssertFailedReturn(VERR_EM_INTERPRETER); 529 529 } 530 if ( VBOX_FAILURE(rc))530 if (RT_FAILURE(rc)) 531 531 return VERR_EM_INTERPRETER; 532 532 } … … 534 534 { 535 535 rc = emRamWrite(pVM, pParam2, &valpar1, param2.size); 536 if ( VBOX_FAILURE(rc))536 if (RT_FAILURE(rc)) 537 537 { 538 538 AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 560 560 561 561 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 562 if( VBOX_FAILURE(rc))562 if(RT_FAILURE(rc)) 563 563 return VERR_EM_INTERPRETER; 564 564 … … 581 581 #endif 582 582 rc = emRamRead(pVM, &valpar1, pParam1, param1.size); 583 if ( VBOX_FAILURE(rc))583 if (RT_FAILURE(rc)) 584 584 { 585 585 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 599 599 /* Write result back */ 600 600 rc = emRamWrite(pVM, pParam1, &valpar1, param1.size); 601 if ( VBOX_FAILURE(rc))601 if (RT_FAILURE(rc)) 602 602 { 603 603 AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 628 628 OP_PARAMVAL param1; 629 629 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 630 if( VBOX_FAILURE(rc))630 if(RT_FAILURE(rc)) 631 631 return VERR_EM_INTERPRETER; 632 632 … … 651 651 652 652 rc = emRamRead(pVM, &valpar1, pStackVal, param1.size); 653 if ( VBOX_FAILURE(rc))653 if (RT_FAILURE(rc)) 654 654 { 655 655 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 672 672 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault || (RTGCPTR)pRegFrame->esp == pvFault, VERR_EM_INTERPRETER); 673 673 rc = emRamWrite(pVM, pParam1, &valpar1, param1.size); 674 if ( VBOX_FAILURE(rc))674 if (RT_FAILURE(rc)) 675 675 { 676 676 AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 708 708 OP_PARAMVAL param1, param2; 709 709 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 710 if( VBOX_FAILURE(rc))710 if(RT_FAILURE(rc)) 711 711 return VERR_EM_INTERPRETER; 712 712 713 713 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 714 if( VBOX_FAILURE(rc))714 if(RT_FAILURE(rc)) 715 715 return VERR_EM_INTERPRETER; 716 716 … … 743 743 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER); 744 744 rc = emRamRead(pVM, &valpar1, pParam1, param1.size); 745 if ( VBOX_FAILURE(rc))745 if (RT_FAILURE(rc)) 746 746 { 747 747 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 780 780 /* And write it back */ 781 781 rc = emRamWrite(pVM, pParam1, &valpar1, param1.size); 782 if ( VBOX_SUCCESS(rc))782 if (RT_SUCCESS(rc)) 783 783 { 784 784 /* All done! */ … … 804 804 OP_PARAMVAL param1, param2; 805 805 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 806 if( VBOX_FAILURE(rc))806 if(RT_FAILURE(rc)) 807 807 return VERR_EM_INTERPRETER; 808 808 809 809 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 810 if( VBOX_FAILURE(rc))810 if(RT_FAILURE(rc)) 811 811 return VERR_EM_INTERPRETER; 812 812 … … 831 831 #else 832 832 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 833 if ( VBOX_FAILURE(rc))833 if (RT_FAILURE(rc)) 834 834 { 835 835 AssertRC(rc); … … 883 883 OP_PARAMVAL param1, param2; 884 884 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 885 if( VBOX_FAILURE(rc))885 if(RT_FAILURE(rc)) 886 886 return VERR_EM_INTERPRETER; 887 887 888 888 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 889 if( VBOX_FAILURE(rc))889 if(RT_FAILURE(rc)) 890 890 return VERR_EM_INTERPRETER; 891 891 … … 918 918 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER); 919 919 rc = emRamRead(pVM, &valpar1, pParam1, param1.size); 920 if ( VBOX_FAILURE(rc))920 if (RT_FAILURE(rc)) 921 921 { 922 922 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 953 953 /* And write it back */ 954 954 rc = emRamWrite(pVM, pParam1, &valpar1, param1.size); 955 if ( VBOX_SUCCESS(rc))955 if (RT_SUCCESS(rc)) 956 956 { 957 957 /* All done! */ … … 987 987 OP_PARAMVAL param1, param2; 988 988 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 989 if( VBOX_FAILURE(rc))989 if(RT_FAILURE(rc)) 990 990 return VERR_EM_INTERPRETER; 991 991 992 992 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 993 if( VBOX_FAILURE(rc))993 if(RT_FAILURE(rc)) 994 994 return VERR_EM_INTERPRETER; 995 995 … … 1027 1027 EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)pParam1 & ~3) == pvFault, VERR_EM_INTERPRETER); 1028 1028 rc = emRamRead(pVM, &valpar1, pParam1, 1); 1029 if ( VBOX_FAILURE(rc))1029 if (RT_FAILURE(rc)) 1030 1030 { 1031 1031 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Vrc\n", pParam1, param1.size, rc)); … … 1045 1045 /* And write it back */ 1046 1046 rc = emRamWrite(pVM, pParam1, &valpar1, 1); 1047 if ( VBOX_SUCCESS(rc))1047 if (RT_SUCCESS(rc)) 1048 1048 { 1049 1049 /* All done! */ … … 1069 1069 OP_PARAMVAL param1, param2; 1070 1070 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 1071 if( VBOX_FAILURE(rc))1071 if(RT_FAILURE(rc)) 1072 1072 return VERR_EM_INTERPRETER; 1073 1073 1074 1074 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 1075 if( VBOX_FAILURE(rc))1075 if(RT_FAILURE(rc)) 1076 1076 return VERR_EM_INTERPRETER; 1077 1077 … … 1095 1095 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 1096 1096 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1097 if ( VBOX_FAILURE(rc))1097 if (RT_FAILURE(rc)) 1098 1098 { 1099 1099 AssertRC(rc); … … 1143 1143 OP_PARAMVAL param1, param2; 1144 1144 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_DEST); 1145 if( VBOX_FAILURE(rc))1145 if(RT_FAILURE(rc)) 1146 1146 return VERR_EM_INTERPRETER; 1147 1147 1148 1148 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 1149 if( VBOX_FAILURE(rc))1149 if(RT_FAILURE(rc)) 1150 1150 return VERR_EM_INTERPRETER; 1151 1151 … … 1200 1200 EM_ASSERT_FAULT_RETURN(pDest == pvFault, VERR_EM_INTERPRETER); 1201 1201 rc = emRamWrite(pVM, pDest, &val64, param2.size); 1202 if ( VBOX_FAILURE(rc))1202 if (RT_FAILURE(rc)) 1203 1203 return VERR_EM_INTERPRETER; 1204 1204 … … 1230 1230 EM_ASSERT_FAULT_RETURN(pSrc == pvFault, VERR_EM_INTERPRETER); 1231 1231 rc = emRamRead(pVM, &val64, pSrc, param1.size); 1232 if ( VBOX_FAILURE(rc))1232 if (RT_FAILURE(rc)) 1233 1233 return VERR_EM_INTERPRETER; 1234 1234 … … 1246 1246 return VERR_EM_INTERPRETER; 1247 1247 } 1248 if ( VBOX_FAILURE(rc))1248 if (RT_FAILURE(rc)) 1249 1249 return rc; 1250 1250 break; … … 1327 1327 1328 1328 rc = PGMPhysWriteGCPtr(pVM, GCDest, &pRegFrame->rax, cbSize); 1329 if ( VBOX_FAILURE(rc))1329 if (RT_FAILURE(rc)) 1330 1330 return VERR_EM_INTERPRETER; 1331 1331 Assert(rc == VINF_SUCCESS); … … 1368 1368 { 1369 1369 rc = PGMPhysWriteGCPtr(pVM, GCDest, &pRegFrame->rax, cbSize); 1370 if ( VBOX_FAILURE(rc))1370 if (RT_FAILURE(rc)) 1371 1371 { 1372 1372 rc = VERR_EM_INTERPRETER; … … 1417 1417 /* Source to make DISQueryParamVal read the register value - ugly hack */ 1418 1418 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1419 if( VBOX_FAILURE(rc))1419 if(RT_FAILURE(rc)) 1420 1420 return VERR_EM_INTERPRETER; 1421 1421 1422 1422 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 1423 if( VBOX_FAILURE(rc))1423 if(RT_FAILURE(rc)) 1424 1424 return VERR_EM_INTERPRETER; 1425 1425 … … 1436 1436 1437 1437 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1438 if ( VBOX_FAILURE(rc))1438 if (RT_FAILURE(rc)) 1439 1439 { 1440 1440 AssertRC(rc); … … 1485 1485 /* Source to make DISQueryParamVal read the register value - ugly hack */ 1486 1486 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1487 if( VBOX_FAILURE(rc))1487 if(RT_FAILURE(rc)) 1488 1488 return VERR_EM_INTERPRETER; 1489 1489 … … 1500 1500 1501 1501 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1502 if ( VBOX_FAILURE(rc))1502 if (RT_FAILURE(rc)) 1503 1503 { 1504 1504 AssertRC(rc); … … 1540 1540 /* Source to make DISQueryParamVal read the register value - ugly hack */ 1541 1541 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1542 if( VBOX_FAILURE(rc))1542 if(RT_FAILURE(rc)) 1543 1543 return VERR_EM_INTERPRETER; 1544 1544 1545 1545 rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param2, ¶m2, PARAM_SOURCE); 1546 if( VBOX_FAILURE(rc))1546 if(RT_FAILURE(rc)) 1547 1547 return VERR_EM_INTERPRETER; 1548 1548 … … 1586 1586 MMGCRamDeregisterTrapHandler(pVM); 1587 1587 1588 if ( VBOX_FAILURE(rc))1588 if (RT_FAILURE(rc)) 1589 1589 { 1590 1590 Log(("%s %VGv eax=%08x %08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar)); … … 1616 1616 /* Source to make DISQueryParamVal read the register value - ugly hack */ 1617 1617 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1618 if( VBOX_FAILURE(rc))1618 if(RT_FAILURE(rc)) 1619 1619 return VERR_EM_INTERPRETER; 1620 1620 … … 1648 1648 MMGCRamDeregisterTrapHandler(pVM); 1649 1649 1650 if ( VBOX_FAILURE(rc))1650 if (RT_FAILURE(rc)) 1651 1651 { 1652 1652 Log(("%s %VGv=%08x eax=%08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax)); … … 1682 1682 /* Source to make DISQueryParamVal read the register value - ugly hack */ 1683 1683 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1684 if( VBOX_FAILURE(rc))1684 if(RT_FAILURE(rc)) 1685 1685 return VERR_EM_INTERPRETER; 1686 1686 1687 1687 rc = DISQueryParamRegPtr(pRegFrame, pCpu, &pCpu->param2, (void **)&pParamReg2, &cbSizeParamReg2); 1688 1688 Assert(cbSizeParamReg2 <= 4); 1689 if( VBOX_FAILURE(rc))1689 if(RT_FAILURE(rc)) 1690 1690 return VERR_EM_INTERPRETER; 1691 1691 … … 1719 1719 MMGCRamDeregisterTrapHandler(pVM); 1720 1720 1721 if ( VBOX_FAILURE(rc))1721 if (RT_FAILURE(rc)) 1722 1722 { 1723 1723 Log(("XAdd %VGv reg=%08x -> emulation failed due to page fault!\n", pParam1, *pParamReg2)); … … 1854 1854 1855 1855 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 1856 if( VBOX_FAILURE(rc))1856 if(RT_FAILURE(rc)) 1857 1857 return VERR_EM_INTERPRETER; 1858 1858 … … 1949 1949 rc = DISWriteReg32(pRegFrame, DestRegGen, val64); 1950 1950 1951 if( VBOX_SUCCESS(rc))1951 if(RT_SUCCESS(rc)) 1952 1952 { 1953 1953 LogFlow(("MOV_CR: gen32=%d CR=%d val=%VX64\n", DestRegGen, SrcRegCrx, val64)); … … 2138 2138 } 2139 2139 2140 if ( VBOX_SUCCESS(rc))2140 if (RT_SUCCESS(rc)) 2141 2141 return EMUpdateCRx(pVM, pRegFrame, DestRegCrx, val); 2142 2142 … … 2173 2173 2174 2174 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 2175 if( VBOX_FAILURE(rc))2175 if(RT_FAILURE(rc)) 2176 2176 return VERR_EM_INTERPRETER; 2177 2177 … … 2270 2270 rc = DISWriteReg32(pRegFrame, DestRegGen, (uint32_t)val64); 2271 2271 2272 if ( VBOX_SUCCESS(rc))2272 if (RT_SUCCESS(rc)) 2273 2273 return VINF_SUCCESS; 2274 2274 … … 2309 2309 2310 2310 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 2311 if( VBOX_FAILURE(rc))2311 if(RT_FAILURE(rc)) 2312 2312 return VERR_EM_INTERPRETER; 2313 2313 … … 2356 2356 2357 2357 int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, ¶m1, PARAM_SOURCE); 2358 if( VBOX_FAILURE(rc))2358 if(RT_FAILURE(rc)) 2359 2359 return VERR_EM_INTERPRETER; 2360 2360 … … 2900 2900 else \ 2901 2901 rc = emInterpret##InstrFn(pVM, pCpu, pRegFrame, pvFault, pcbSize, pfnEmulate); \ 2902 if ( VBOX_SUCCESS(rc)) \2902 if (RT_SUCCESS(rc)) \ 2903 2903 STAM_COUNTER_INC(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Instr)); \ 2904 2904 else \ … … 2908 2908 case opcode:\ 2909 2909 rc = emInterpret##InstrFn(pVM, pCpu, pRegFrame, pvFault, pcbSize, pfnEmulate); \ 2910 if ( VBOX_SUCCESS(rc)) \2910 if (RT_SUCCESS(rc)) \ 2911 2911 STAM_COUNTER_INC(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Instr)); \ 2912 2912 else \ … … 2922 2922 case opcode:\ 2923 2923 rc = emInterpret##Instr(pVM, pCpu, pRegFrame, pvFault, pcbSize); \ 2924 if ( VBOX_SUCCESS(rc)) \2924 if (RT_SUCCESS(rc)) \ 2925 2925 STAM_COUNTER_INC(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Instr)); \ 2926 2926 else \ … … 2931 2931 case opcode:\ 2932 2932 rc = emInterpret##InstrFn(pVM, pCpu, pRegFrame, pvFault, pcbSize); \ 2933 if ( VBOX_SUCCESS(rc)) \2933 if (RT_SUCCESS(rc)) \ 2934 2934 STAM_COUNTER_INC(&pVM->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Instr)); \ 2935 2935 else \ -
trunk/src/VBox/VMM/VMMAll/MMAllHyper.cpp
r12989 r13816 835 835 #ifdef VBOX_WITH_STATISTICS 836 836 pStat->cFrees++; 837 if ( VBOX_SUCCESS(rc))837 if (RT_SUCCESS(rc)) 838 838 { 839 839 pStat->cbFreed += cbChunk; -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r13418 r13816 437 437 int rc = PGM_BTH_PFN(PrefetchPage, pVM)(pVM, (RTGCUINTPTR)GCPtrPage); 438 438 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,Prefetch), a); 439 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || VBOX_FAILURE(rc), ("rc=%Vrc\n", rc));439 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Vrc\n", rc)); 440 440 return rc; 441 441 } … … 491 491 uint64_t fPage; 492 492 int rc = PGMGstGetPage(pVM, (RTGCPTR)Addr, &fPage, NULL); 493 if ( VBOX_FAILURE(rc))493 if (RT_FAILURE(rc)) 494 494 { 495 495 Log(("PGMIsValidAccess: access violation for %VGv rc=%d\n", Addr, rc)); … … 512 512 return VINF_EM_RAW_GUEST_TRAP; 513 513 } 514 if ( VBOX_SUCCESS(rc)514 if ( RT_SUCCESS(rc) 515 515 && PAGE_ADDRESS(Addr) != PAGE_ADDRESS(Addr + cbSize)) 516 516 return PGMIsValidAccess(pVM, Addr + PAGE_SIZE, (cbSize > PAGE_SIZE) ? cbSize - PAGE_SIZE : 1, fAccess); … … 539 539 uint64_t fPageGst; 540 540 int rc = PGMGstGetPage(pVM, (RTGCPTR)Addr, &fPageGst, NULL); 541 if ( VBOX_FAILURE(rc))541 if (RT_FAILURE(rc)) 542 542 { 543 543 Log(("PGMVerifyAccess: access violation for %VGv rc=%d\n", Addr, rc)); … … 591 591 uint64_t fPageShw; 592 592 rc = PGMShwGetPage(pVM, (RTGCPTR)Addr, &fPageShw, NULL); 593 if ( (rc == VERR_PAGE_NOT_PRESENT || VBOX_FAILURE(rc))593 if ( (rc == VERR_PAGE_NOT_PRESENT || RT_FAILURE(rc)) 594 594 || (fWrite && !(fPageShw & X86_PTE_RW)) 595 595 || (fUser && !(fPageShw & X86_PTE_US)) ) … … 601 601 #endif 602 602 603 if ( VBOX_SUCCESS(rc)603 if ( RT_SUCCESS(rc) 604 604 && ( PAGE_ADDRESS(Addr) != PAGE_ADDRESS(Addr + cbSize - 1) 605 605 || Addr + cbSize < Addr)) … … 691 691 * Check if we have a pending update of the CR3 monitoring. 692 692 */ 693 if ( VBOX_SUCCESS(rc)693 if ( RT_SUCCESS(rc) 694 694 && (pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)) 695 695 { … … 1159 1159 { 1160 1160 int rc = PGMGstGetPage(pVM, GCPtr, NULL, NULL); 1161 return VBOX_SUCCESS(rc);1161 return RT_SUCCESS(rc); 1162 1162 } 1163 1163 … … 1475 1475 pVM->pgm.s.GCPhysCR3 = GCPhysCR3; 1476 1476 rc = PGM_GST_PFN(MapCR3, pVM)(pVM, GCPhysCR3); 1477 if ( VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)1477 if (RT_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed) 1478 1478 { 1479 1479 pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3; … … 1597 1597 int rc = PGM_BTH_PFN(SyncCR3, pVM)(pVM, cr0, cr3, cr4, fGlobal); 1598 1598 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,SyncCR3), a); 1599 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || VBOX_FAILURE(rc), ("rc=%VRc\n", rc));1599 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%VRc\n", rc)); 1600 1600 if (rc == VINF_SUCCESS) 1601 1601 { -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r13398 r13816 242 242 LogFlow(("=>SyncPT %04x = %08x\n", iPDSrc, PdeSrc.au32[0])); 243 243 rc = PGM_BTH_NAME(SyncPT)(pVM, iPDSrc, pPDSrc, (RTGCUINTPTR)pvFault); 244 if ( VBOX_SUCCESS(rc))244 if (RT_SUCCESS(rc)) 245 245 { 246 246 STAM_PROFILE_STOP(&pVM->pgm.s.StatRZTrap0eTimeSyncPT, f); … … 349 349 PGSTPT pPTSrc; 350 350 rc = PGM_GCPHYS_2_PTR(pVM, PdeSrc.u & GST_PDE_PG_MASK, &pPTSrc); 351 if ( VBOX_SUCCESS(rc))351 if (RT_SUCCESS(rc)) 352 352 { 353 353 unsigned iPTESrc = ((RTGCUINTPTR)pvFault >> GST_PT_SHIFT) & GST_PT_MASK; … … 370 370 PPGMPAGE pPage; 371 371 rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage); 372 if ( VBOX_SUCCESS(rc))372 if (RT_SUCCESS(rc)) 373 373 { 374 374 if ( PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage) … … 396 396 { 397 397 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, (RTGCUINTPTR)pvFault, PGM_SYNC_NR_PAGES, uErr); 398 if ( VBOX_FAILURE(rc)398 if ( RT_FAILURE(rc) 399 399 || !(uErr & X86_TRAP_PF_RW) 400 400 || rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE) … … 442 442 { 443 443 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, (RTGCUINTPTR)pvFault, PGM_SYNC_NR_PAGES, uErr); 444 if ( VBOX_FAILURE(rc)444 if ( RT_FAILURE(rc) 445 445 || rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE 446 446 || !(uErr & X86_TRAP_PF_RW)) … … 498 498 rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys + ((RTGCUINTPTR)pvFault & PAGE_OFFSET_MASK), 499 499 &pCur, &iPage); 500 Assert( VBOX_SUCCESS(rc) || !pCur);500 Assert(RT_SUCCESS(rc) || !pCur); 501 501 if ( pCur 502 502 && ( uErr & X86_TRAP_PF_RW … … 536 536 { 537 537 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, (RTGCUINTPTR)pvFault, PGM_SYNC_NR_PAGES, uErr); 538 if ( VBOX_FAILURE(rc)538 if ( RT_FAILURE(rc) 539 539 || rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE 540 540 || !(uErr & X86_TRAP_PF_RW)) … … 646 646 uint64_t fPageGst; 647 647 rc = PGMGstGetPage(pVM, pvFault, &fPageGst, NULL); 648 if ( VBOX_SUCCESS(rc)648 if ( RT_SUCCESS(rc) 649 649 && !(fPageGst & X86_PTE_US)) 650 650 { … … 718 718 # endif /* PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0) */ 719 719 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, (RTGCUINTPTR)pvFault, PGM_SYNC_NR_PAGES, uErr); 720 if ( VBOX_SUCCESS(rc))720 if (RT_SUCCESS(rc)) 721 721 { 722 722 /* The page was successfully synced, return to the guest. */ … … 733 733 * Assume for now it only applies to the read/write flag 734 734 */ 735 if ( VBOX_SUCCESS(rc) && (uErr & X86_TRAP_PF_RW))735 if (RT_SUCCESS(rc) && (uErr & X86_TRAP_PF_RW)) 736 736 { 737 737 if (uErr & X86_TRAP_PF_US) … … 745 745 */ 746 746 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, (RTGCUINTPTR)pvFault, 1, uErr); 747 if ( VBOX_SUCCESS(rc))747 if (RT_SUCCESS(rc)) 748 748 { 749 749 /* … … 754 754 uint64_t fPageGst; 755 755 rc = PGMGstGetPage(pVM, pvFault, &fPageGst, &GCPhys); 756 Assert( VBOX_SUCCESS(rc) && fPageGst & X86_PTE_RW);756 Assert(RT_SUCCESS(rc) && fPageGst & X86_PTE_RW); 757 757 LogFlow(("Obsolete physical monitor page out of sync %VGv - phys %VGp flags=%08llx\n", pvFault, GCPhys, (uint64_t)fPageGst)); 758 758 759 759 uint64_t fPageShw; 760 760 rc = PGMShwGetPage(pVM, pvFault, &fPageShw, NULL); 761 AssertMsg( VBOX_SUCCESS(rc) && fPageShw & X86_PTE_RW, ("rc=%Vrc fPageShw=%VX64\n", rc, fPageShw));761 AssertMsg(RT_SUCCESS(rc) && fPageShw & X86_PTE_RW, ("rc=%Vrc fPageShw=%VX64\n", rc, fPageShw)); 762 762 # endif /* VBOX_STRICT */ 763 763 STAM_PROFILE_STOP(&pVM->pgm.s.StatRZTrap0eTimeOutOfSync, c); … … 773 773 uint64_t fPageGst; 774 774 rc = PGMGstGetPage(pVM, pvFault, &fPageGst, NULL); 775 if ( VBOX_SUCCESS(rc)775 if ( RT_SUCCESS(rc) 776 776 && !(fPageGst & X86_PTE_RW)) 777 777 { 778 778 rc = PGMInterpretInstruction(pVM, pRegFrame, pvFault); 779 if ( VBOX_SUCCESS(rc))779 if (RT_SUCCESS(rc)) 780 780 STAM_COUNTER_INC(&pVM->pgm.s.StatRZTrap0eWPEmulInRZ); 781 781 else … … 793 793 * Currently only for debug purposes. 794 794 */ 795 if ( VBOX_SUCCESS(rc))795 if (RT_SUCCESS(rc)) 796 796 { 797 797 /* Get guest page flags. */ 798 798 uint64_t fPageGst; 799 799 rc = PGMGstGetPage(pVM, pvFault, &fPageGst, NULL); 800 if ( VBOX_SUCCESS(rc))800 if (RT_SUCCESS(rc)) 801 801 { 802 802 uint64_t fPageShw; … … 1197 1197 # else /* Syncing it here isn't 100% safe and it's probably not worth spending time syncing it. */ 1198 1198 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, GCPtrPage, 1, 0); 1199 if ( VBOX_SUCCESS(rc))1199 if (RT_SUCCESS(rc)) 1200 1200 rc = VINF_SUCCESS; 1201 1201 # endif … … 1417 1417 PPGMPAGE pPage; 1418 1418 int rc = pgmPhysGetPageEx(&pVM->pgm.s, PteSrc.u & GST_PTE_PG_MASK, &pPage); 1419 if ( VBOX_SUCCESS(rc))1419 if (RT_SUCCESS(rc)) 1420 1420 { 1421 1421 /** @todo investiage PWT, PCD and PAT. */ … … 1661 1661 PGSTPT pPTSrc; 1662 1662 int rc = PGM_GCPHYS_2_PTR(pVM, PdeSrc.u & GST_PDE_PG_MASK, &pPTSrc); 1663 if ( VBOX_SUCCESS(rc))1663 if (RT_SUCCESS(rc)) 1664 1664 { 1665 1665 # ifdef PGM_SYNC_N_PAGES … … 1750 1750 PPGMPAGE pPage; 1751 1751 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage); 1752 if ( VBOX_SUCCESS(rc))1752 if (RT_SUCCESS(rc)) 1753 1753 { 1754 1754 /* … … 2101 2101 PGSTPT pPTSrc; 2102 2102 rc = PGM_GCPHYS_2_PTR(pVM, pPdeSrc->u & GST_PDE_PG_MASK, &pPTSrc); 2103 if ( VBOX_SUCCESS(rc))2103 if (RT_SUCCESS(rc)) 2104 2104 { 2105 2105 /* … … 2260 2260 PGSTPT pPTSrc; 2261 2261 rc = PGM_GCPHYS_2_PTR(pVM, pPdeSrc->u & GST_PDE_PG_MASK, &pPTSrc); 2262 if ( VBOX_SUCCESS(rc))2262 if (RT_SUCCESS(rc)) 2263 2263 { 2264 2264 PGSTPTE pPteSrc = &pPTSrc->a[(GCPtrPage >> GST_PT_SHIFT) & GST_PT_MASK]; … … 2356 2356 AssertFailed(); /* can't happen for amd64 */ 2357 2357 # endif 2358 if ( VBOX_FAILURE(rc))2358 if (RT_FAILURE(rc)) 2359 2359 { 2360 2360 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,SyncPT), a); … … 2462 2462 PGSTPT pPTSrc; 2463 2463 rc = PGM_GCPHYS_2_PTR(pVM, PdeSrc.u & GST_PDE_PG_MASK, &pPTSrc); 2464 if ( VBOX_SUCCESS(rc))2464 if (RT_SUCCESS(rc)) 2465 2465 { 2466 2466 /* … … 2680 2680 2681 2681 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,SyncPT), a); 2682 if ( VBOX_FAILURE(rc))2682 if (RT_FAILURE(rc)) 2683 2683 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,SyncPTFailed)); 2684 2684 return rc; … … 2880 2880 */ 2881 2881 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, GCPtrPage, 1, 0); 2882 if ( VBOX_SUCCESS(rc))2882 if (RT_SUCCESS(rc)) 2883 2883 rc = VINF_SUCCESS; 2884 2884 } … … 3021 3021 3022 3022 rc = PGM_BTH_NAME(SyncPage)(pVM, PdeSrc, GCPtrPage, 1, 0); 3023 if ( VBOX_SUCCESS(rc))3023 if (RT_SUCCESS(rc)) 3024 3024 { 3025 3025 /* Page was successfully synced */ … … 3349 3349 int rc = pgmR3SyncPTResolveConflictPAE(pVM, pMapping, (iPdpte << GST_PDPT_SHIFT) + (iPD << GST_PD_SHIFT)); 3350 3350 # endif 3351 if ( VBOX_FAILURE(rc))3351 if (RT_FAILURE(rc)) 3352 3352 return rc; 3353 3353 … … 3531 3531 int rc = pgmR3SyncPTResolveConflictPAE(pVM, pMapping, (iPdpte << GST_PDPT_SHIFT) + (iPD << GST_PD_SHIFT)); 3532 3532 # endif 3533 if ( VBOX_FAILURE(rc))3533 if (RT_FAILURE(rc)) 3534 3534 return rc; 3535 3535 … … 3957 3957 const GSTPT *pPTSrc; 3958 3958 rc = PGM_GCPHYS_2_PTR(pVM, GCPhysGst & ~(RTGCPHYS)(PAGE_SIZE - 1), &pPTSrc); 3959 if ( VBOX_FAILURE(rc))3959 if (RT_FAILURE(rc)) 3960 3960 { 3961 3961 AssertMsgFailed(("Cannot map/convert guest physical address %VGp in the PDE at %VGv! PdeSrc=%#RX64\n", … … 4025 4025 # ifdef IN_RING3 4026 4026 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhysGst, &HCPhys); 4027 if ( VBOX_FAILURE(rc))4027 if (RT_FAILURE(rc)) 4028 4028 { 4029 4029 if (HCPhysShw != MMR3PageDummyHCPhys(pVM)) … … 4255 4255 # ifdef IN_RING3 4256 4256 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhysGst, &HCPhys); 4257 if ( VBOX_FAILURE(rc))4257 if (RT_FAILURE(rc)) 4258 4258 { 4259 4259 if (HCPhysShw != MMR3PageDummyHCPhys(pVM)) -
trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
r13582 r13816 220 220 PGSTPT pPT; 221 221 int rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & GST_PDE_PG_MASK, &pPT); 222 if ( VBOX_FAILURE(rc))222 if (RT_FAILURE(rc)) 223 223 return rc; 224 224 … … 333 333 PGSTPT pPT; 334 334 int rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & GST_PDE_PG_MASK, &pPT); 335 if ( VBOX_FAILURE(rc))335 if (RT_FAILURE(rc)) 336 336 return rc; 337 337 … … 441 441 RTHCPTR HCPtrGuestCR3; 442 442 int rc = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhysCR3 & GST_CR3_PAGE_MASK, &HCPtrGuestCR3, &HCPhysGuestCR3); 443 if ( VBOX_SUCCESS(rc))443 if (RT_SUCCESS(rc)) 444 444 { 445 445 rc = PGMMap(pVM, (RTGCUINTPTR)pVM->pgm.s.GCPtrCR3Mapping, HCPhysGuestCR3, PAGE_SIZE, 0); 446 if ( VBOX_SUCCESS(rc))446 if (RT_SUCCESS(rc)) 447 447 { 448 448 PGM_INVL_PG(pVM->pgm.s.GCPtrCR3Mapping); … … 469 469 RTGCPHYS GCPhys = pVM->pgm.s.CTXSUFF(pGstPaePDPT)->a[i].u & X86_PDPE_PG_MASK; 470 470 int rc2 = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhys, &HCPtr, &HCPhys); 471 if ( VBOX_SUCCESS(rc2))471 if (RT_SUCCESS(rc2)) 472 472 { 473 473 rc = PGMMap(pVM, GCPtr, HCPhys & X86_PTE_PAE_PG_MASK, PAGE_SIZE, 0); … … 624 624 GCPhysCR3); 625 625 # endif /* PGMPOOL_WITH_MIXED_PT_CR3 */ 626 if ( VBOX_FAILURE(rc))626 if (RT_FAILURE(rc)) 627 627 { 628 628 AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n", … … 644 644 { 645 645 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3); 646 if ( VBOX_FAILURE(rc))646 if (RT_FAILURE(rc)) 647 647 { 648 648 AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n", … … 668 668 } 669 669 670 if ( VBOX_FAILURE(rc))670 if (RT_FAILURE(rc)) 671 671 { 672 672 AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n", … … 744 744 int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i); 745 745 AssertRC(rc2); 746 if ( VBOX_FAILURE(rc2))746 if (RT_FAILURE(rc2)) 747 747 rc = rc2; 748 748 pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS; … … 813 813 PGSTPT pPT; 814 814 int rc = PGM_GCPHYS_2_PTR(pState->pVM, Pde.u & GST_PDE_PG_MASK, &pPT); 815 if ( VBOX_SUCCESS(rc))815 if (RT_SUCCESS(rc)) 816 816 { 817 817 for (unsigned iPTE = (GCPtr >> GST_PT_SHIFT) & GST_PT_MASK; … … 995 995 uint32_t cb; 996 996 int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb); 997 if ( VBOX_SUCCESS(rc) && cb)997 if (RT_SUCCESS(rc) && cb) 998 998 { 999 999 /* … … 1037 1037 else 1038 1038 { 1039 Assert( VBOX_FAILURE(rc));1039 Assert(RT_FAILURE(rc)); 1040 1040 if (rc == VERR_EM_INTERPRETER) 1041 1041 rc = VINF_EM_RAW_EMULATE_INSTR_PD_FAULT; … … 1073 1073 uint32_t cb; 1074 1074 int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb); 1075 if ( VBOX_SUCCESS(rc) && cb)1075 if (RT_SUCCESS(rc) && cb) 1076 1076 { 1077 1077 /* … … 1105 1105 else 1106 1106 { 1107 Assert( VBOX_FAILURE(rc));1107 Assert(RT_FAILURE(rc)); 1108 1108 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteUnhandled); 1109 1109 if (rc == VERR_EM_INTERPRETER) … … 1139 1139 uint32_t cb; 1140 1140 int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb); 1141 if ( VBOX_SUCCESS(rc) && cb)1141 if (RT_SUCCESS(rc) && cb) 1142 1142 { 1143 1143 /* … … 1188 1188 else 1189 1189 { 1190 Assert( VBOX_FAILURE(rc));1190 Assert(RT_FAILURE(rc)); 1191 1191 if (rc == VERR_EM_INTERPRETER) 1192 1192 rc = VINF_EM_RAW_EMULATE_INSTR_PD_FAULT; -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r13415 r13816 132 132 PPGMPHYSHANDLER pNew; 133 133 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew); 134 if ( VBOX_FAILURE(rc))134 if (RT_FAILURE(rc)) 135 135 return rc; 136 136 … … 645 645 PPGMPHYSHANDLER pNew; 646 646 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew); 647 if ( VBOX_FAILURE(rc))647 if (RT_FAILURE(rc)) 648 648 return rc; 649 649 -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r13565 r13816 195 195 PPGMPAGE pPage; 196 196 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage); 197 if ( VBOX_FAILURE(rc))197 if (RT_FAILURE(rc)) 198 198 return rc; 199 199 … … 377 377 */ 378 378 int rc = pgmPhysEnsureHandyPage(pVM); 379 if ( VBOX_FAILURE(rc))379 if (RT_FAILURE(rc)) 380 380 { 381 381 Assert(rc == VERR_EM_NO_MEMORY); … … 532 532 #else 533 533 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap); 534 if ( VBOX_FAILURE(rc))534 if (RT_FAILURE(rc)) 535 535 return rc; 536 536 #endif … … 601 601 PPGMPAGEMAP pMap; 602 602 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv); 603 if ( VBOX_FAILURE(rc))603 if (RT_FAILURE(rc)) 604 604 return rc; 605 605 pTlbe->pMap = pMap; … … 770 770 RTGCPHYS GCPhys; 771 771 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys); 772 if ( VBOX_SUCCESS(rc))772 if (RT_SUCCESS(rc)) 773 773 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock); 774 774 return rc; … … 803 803 RTGCPHYS GCPhys; 804 804 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys); 805 if ( VBOX_SUCCESS(rc))805 if (RT_SUCCESS(rc)) 806 806 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock); 807 807 return rc; … … 880 880 PPGMPAGE pPage; 881 881 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam); 882 if ( VBOX_FAILURE(rc))882 if (RT_FAILURE(rc)) 883 883 return rc; 884 884 … … 925 925 RTHCPTR HCPtr; 926 926 int rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys, cbRange, &HCPtr); 927 if ( VBOX_SUCCESS(rc))927 if (RT_SUCCESS(rc)) 928 928 return HCPtr; 929 929 return NIL_RTHCPTR; … … 944 944 { 945 945 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys); 946 if (pGCPhys && VBOX_SUCCESS(rc))946 if (pGCPhys && RT_SUCCESS(rc)) 947 947 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK; 948 948 return rc; … … 964 964 RTGCPHYS GCPhys; 965 965 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys); 966 if ( VBOX_SUCCESS(rc))966 if (RT_SUCCESS(rc)) 967 967 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys); 968 968 return rc; … … 988 988 RTGCPHYS GCPhys; 989 989 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys); 990 if ( VBOX_SUCCESS(rc))990 if (RT_SUCCESS(rc)) 991 991 rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr); 992 992 return rc; … … 1023 1023 PX86PD pPD; 1024 1024 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD); 1025 if ( VBOX_SUCCESS(rc))1025 if (RT_SUCCESS(rc)) 1026 1026 { 1027 1027 X86PDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT]; … … 1036 1036 PX86PT pPT; 1037 1037 rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT); 1038 if ( VBOX_SUCCESS(rc))1038 if (RT_SUCCESS(rc)) 1039 1039 { 1040 1040 X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK]; … … 1056 1056 PX86PDPT pPdpt; 1057 1057 rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdpt); 1058 if ( VBOX_SUCCESS(rc))1058 if (RT_SUCCESS(rc)) 1059 1059 { 1060 1060 X86PDPE Pdpe = pPdpt->a[((RTGCUINTPTR)GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE]; … … 1063 1063 PX86PDPAE pPD; 1064 1064 rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD); 1065 if ( VBOX_SUCCESS(rc))1065 if (RT_SUCCESS(rc)) 1066 1066 { 1067 1067 X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK]; … … 1076 1076 PX86PTPAE pPT; 1077 1077 rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT); 1078 if ( VBOX_SUCCESS(rc))1078 if (RT_SUCCESS(rc)) 1079 1079 { 1080 1080 X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK]; … … 1254 1254 unsigned iPage; 1255 1255 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage); 1256 if ( VBOX_SUCCESS(rc2) && pNode->pfnHandlerR3)1256 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3) 1257 1257 { 1258 1258 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1; … … 1502 1502 unsigned iPage; 1503 1503 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage); 1504 if ( VBOX_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)1504 if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3) 1505 1505 { 1506 1506 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1; … … 1518 1518 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT 1519 1519 && rc == VINF_PGM_HANDLER_DO_DEFAULT) 1520 || ( VBOX_FAILURE(rc2)1521 && VBOX_SUCCESS(rc)))1520 || ( RT_FAILURE(rc2) 1521 && RT_SUCCESS(rc))) 1522 1522 rc = rc2; 1523 1523 } … … 1551 1551 unsigned iPage; 1552 1552 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage); 1553 if ( VBOX_SUCCESS(rc2) && pNode->pfnHandlerR3)1553 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3) 1554 1554 { 1555 1555 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1; … … 2284 2284 uint64_t fFlags; 2285 2285 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys); 2286 if ( VBOX_SUCCESS(rc))2286 if (RT_SUCCESS(rc)) 2287 2287 { 2288 2288 /** @todo we should check reserved bits ... */ … … 2323 2323 RTGCPHYS GCPhys2; 2324 2324 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1); 2325 if ( VBOX_SUCCESS(rc))2325 if (RT_SUCCESS(rc)) 2326 2326 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2); 2327 if ( VBOX_SUCCESS(rc))2327 if (RT_SUCCESS(rc)) 2328 2328 { 2329 2329 /** @todo we should check reserved bits ... */ -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r13585 r13816 834 834 uint32_t cbWritten; 835 835 int rc2 = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cbWritten); 836 if ( VBOX_SUCCESS(rc2))836 if (RT_SUCCESS(rc2)) 837 837 pRegFrame->rip += pCpu->opsize; 838 838 else if (rc2 == VERR_EM_INTERPRETER) … … 951 951 uint32_t cb; 952 952 int rc = EMInterpretInstructionCPU(pVM, pCpu, pRegFrame, pvFault, &cb); 953 if ( VBOX_SUCCESS(rc))953 if (RT_SUCCESS(rc)) 954 954 pRegFrame->rip += pCpu->opsize; 955 955 else if (rc == VERR_EM_INTERPRETER) … … 1319 1319 { 1320 1320 int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable); 1321 if ( VBOX_SUCCESS(rc))1321 if (RT_SUCCESS(rc)) 1322 1322 { 1323 1323 *ppPage = pPage; … … 2094 2094 { 2095 2095 int rc2 = pgmPoolCacheFreeOne(pPool, iUser); 2096 if ( VBOX_FAILURE(rc2) && rc == VINF_SUCCESS)2096 if (RT_FAILURE(rc2) && rc == VINF_SUCCESS) 2097 2097 rc = rc2; 2098 2098 } while (pPool->iUserFreeHead == NIL_PGMPOOL_USER_INDEX); … … 2140 2140 { 2141 2141 int rc = pgmPoolTrackFreeOneUser(pPool, iUser); 2142 if ( VBOX_FAILURE(rc))2142 if (RT_FAILURE(rc)) 2143 2143 return rc; 2144 2144 i = pPool->iUserFreeHead; … … 2244 2244 { 2245 2245 int rc = pgmPoolTrackFreeOneUser(pPool, iUser); 2246 if ( VBOX_FAILURE(rc))2246 if (RT_FAILURE(rc)) 2247 2247 return rc; 2248 2248 i = pPool->iUserFreeHead; … … 3920 3920 int rc = CTXALLMID(VMM, CallHost)(pPool->CTX_SUFF(pVM), VMMCALLHOST_PGM_POOL_GROW, 0); 3921 3921 #endif 3922 if ( VBOX_FAILURE(rc))3922 if (RT_FAILURE(rc)) 3923 3923 return rc; 3924 3924 STAM_PROFILE_ADV_RESUME(&pPool->StatAlloc, a); … … 3976 3976 { 3977 3977 int rc2 = pgmPoolCacheAlloc(pPool, GCPhys, enmKind, iUser, iUserTable, ppPage); 3978 if ( VBOX_SUCCESS(rc2))3978 if (RT_SUCCESS(rc2)) 3979 3979 { 3980 3980 STAM_PROFILE_ADV_STOP(&pPool->StatAlloc, a); … … 3993 3993 { 3994 3994 rc = pgmPoolMakeMoreFreePages(pPool, iUser); 3995 if ( VBOX_FAILURE(rc))3995 if (RT_FAILURE(rc)) 3996 3996 { 3997 3997 if (rc != VERR_PGM_POOL_CLEARED) … … 4037 4037 */ 4038 4038 int rc3 = pgmPoolTrackInsert(pPool, pPage, GCPhys, iUser, iUserTable); 4039 if ( VBOX_FAILURE(rc3))4039 if (RT_FAILURE(rc3)) 4040 4040 { 4041 4041 if (rc3 != VERR_PGM_POOL_CLEARED) -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r13415 r13816 157 157 PX86PDPT pPDPT; 158 158 int rc = PGM_HCPHYS_2_PTR(pVM, Pml4e.u & X86_PML4E_PG_MASK, &pPDPT); 159 if ( VBOX_FAILURE(rc))159 if (RT_FAILURE(rc)) 160 160 return rc; 161 161 const unsigned iPDPT = (GCPtr >> SHW_PDPT_SHIFT) & SHW_PDPT_MASK; … … 167 167 PX86PDPAE pPd; 168 168 rc = PGM_HCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPd); 169 if ( VBOX_FAILURE(rc))169 if (RT_FAILURE(rc)) 170 170 return rc; 171 171 const unsigned iPd = (GCPtr >> SHW_PD_SHIFT) & SHW_PD_MASK; … … 214 214 { 215 215 int rc = PGM_HCPHYS_2_PTR(pVM, Pde.u & SHW_PDE_PG_MASK, &pPT); 216 if ( VBOX_FAILURE(rc))216 if (RT_FAILURE(rc)) 217 217 return rc; 218 218 } … … 304 304 PX86PDPT pPDPT; 305 305 rc = PGM_HCPHYS_2_PTR(pVM, Pml4e.u & X86_PML4E_PG_MASK, &pPDPT); 306 if ( VBOX_FAILURE(rc))306 if (RT_FAILURE(rc)) 307 307 return rc; 308 308 const unsigned iPDPT = (GCPtr >> SHW_PDPT_SHIFT) & SHW_PDPT_MASK; … … 314 314 PX86PDPAE pPd; 315 315 rc = PGM_HCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPd); 316 if ( VBOX_FAILURE(rc))316 if (RT_FAILURE(rc)) 317 317 return rc; 318 318 const unsigned iPd = (GCPtr >> SHW_PD_SHIFT) & SHW_PD_MASK; … … 350 350 PSHWPT pPT; 351 351 rc = PGM_HCPHYS_2_PTR(pVM, Pde.u & SHW_PDE_PG_MASK, &pPT); 352 if ( VBOX_FAILURE(rc))352 if (RT_FAILURE(rc)) 353 353 return rc; 354 354 -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r13577 r13816 1003 1003 # endif 1004 1004 1005 if ( VBOX_FAILURE(rc))1005 if (RT_FAILURE(rc)) 1006 1006 { 1007 1007 if (!fTriedAlready) … … 1022 1022 /* Reading too much. Could be cheaper than two seperate calls though. */ 1023 1023 rc = PGMPhysSimpleReadGCPtr(pVM, &tss, GCPtrTss, sizeof(VBOXTSS)); 1024 if ( VBOX_FAILURE(rc))1024 if (RT_FAILURE(rc)) 1025 1025 { 1026 1026 AssertReleaseMsgFailed(("Unable to read TSS structure at %08X\n", GCPtrTss)); -
trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
r13782 r13816 638 638 PVMREQ pReq; 639 639 int rc = VMR3ReqCall(pVM, VMREQDEST_ANY, &pReq, RT_INDEFINITE_WAIT, (PFNRT)tmVirtualSetWarpDrive, 2, pVM, u32Percent); 640 if ( VBOX_SUCCESS(rc))640 if (RT_SUCCESS(rc)) 641 641 rc = pReq->iStatus; 642 642 VMR3ReqFree(pReq); -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r13635 r13816 385 385 rc = PGMPhysSimpleReadGCPtr(pVM, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC)); 386 386 #endif 387 if ( VBOX_SUCCESS(rc))387 if (RT_SUCCESS(rc)) 388 388 { 389 389 Log(("TRPMForwardTrap: caller=%VGv\n", pCallerGC)); … … 454 454 rc = PGMPhysSimpleReadGCPtr(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte)); 455 455 #endif 456 if ( VBOX_FAILURE(rc))456 if (RT_FAILURE(rc)) 457 457 { 458 458 /* The page might be out of sync. */ /** @todo might cross a page boundary) */ … … 470 470 #endif 471 471 } 472 if ( VBOX_SUCCESS(rc)472 if ( RT_SUCCESS(rc) 473 473 && GuestIdte.Gen.u1Present 474 474 && (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32) … … 514 514 rc = PGMPhysSimpleReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc)); 515 515 #endif 516 if ( VBOX_FAILURE(rc))516 if (RT_FAILURE(rc)) 517 517 { 518 518 /* The page might be out of sync. */ /** @todo might cross a page boundary) */ … … 529 529 rc = PGMPhysSimpleReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc)); 530 530 #endif 531 if ( VBOX_FAILURE(rc))531 if (RT_FAILURE(rc)) 532 532 { 533 533 Log(("MMGCRamRead failed with %Vrc\n", rc)); … … 548 548 { 549 549 rc = SELMGetRing1Stack(pVM, &ss_r0, &esp_r0); 550 if ( VBOX_FAILURE(rc))550 if (RT_FAILURE(rc)) 551 551 goto failure; 552 552 … … 597 597 PGMPAGEMAPLOCK PageMappingLock; 598 598 rc = PGMPhysGCPtr2CCPtr(pVM, pTrapStackGC, (void **)&pTrapStack, &PageMappingLock); 599 if ( VBOX_FAILURE(rc))599 if (RT_FAILURE(rc)) 600 600 { 601 601 AssertRC(rc); -
trunk/src/VBox/VMM/VMMAll/VMAll.cpp
r13782 r13816 140 140 void *pv; 141 141 int rc2 = MMHyperAlloc(pVM, cb, 0, MM_TAG_VM, &pv); 142 if ( VBOX_SUCCESS(rc2))142 if (RT_SUCCESS(rc2)) 143 143 { 144 144 /* initialize it. */ … … 317 317 void *pv; 318 318 int rc2 = MMHyperAlloc(pVM, cb, 0, MM_TAG_VM, &pv); 319 if ( VBOX_SUCCESS(rc2))319 if (RT_SUCCESS(rc2)) 320 320 { 321 321 /* initialize it. */
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