Index: /trunk/src/VBox/VMM/DBGFDisas.cpp
===================================================================
--- /trunk/src/VBox/VMM/DBGFDisas.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/DBGFDisas.cpp	(revision 13820)
@@ -443,5 +443,5 @@
                 RTStrPrintf(pszOutput, cchOutput, "%VGv  %s", GCPtr, szBuf);
             else
-                RTStrPrintf(pszOutput, cchOutput, "%VRv  %s", (RTRCPTR)GCPtr, szBuf);
+                RTStrPrintf(pszOutput, cchOutput, "%08RX32  %s", (uint32_t)GCPtr, szBuf);
         }
         else
@@ -450,5 +450,5 @@
                 RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv  %s", Sel, GCPtr, szBuf);
             else
-                RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv  %s", Sel, (RTRCPTR)GCPtr, szBuf);
+                RTStrPrintf(pszOutput, cchOutput, "%04x:%08RX32  %s", Sel, (uint32_t)GCPtr, szBuf);
         }
     }
@@ -476,6 +476,6 @@
                             szBuf);
             else
-                RTStrPrintf(pszOutput, cchOutput, "%VRv %.*Vhxs%*s %s",
-                            (RTRCPTR)GCPtr,
+                RTStrPrintf(pszOutput, cchOutput, "%08RX32 %.*Vhxs%*s %s",
+                            (uint32_t)GCPtr,
                             cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
                             szBuf);
@@ -489,6 +489,6 @@
                             szBuf);
             else
-                RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv %.*Vhxs%*s %s",
-                            Sel, (RTRCPTR)GCPtr,
+                RTStrPrintf(pszOutput, cchOutput, "%04x:%08RX32 %.*Vhxs%*s %s",
+                            Sel, (uint32_t)GCPtr,
                             cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
                             szBuf);
Index: /trunk/src/VBox/VMM/EM.cpp
===================================================================
--- /trunk/src/VBox/VMM/EM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/EM.cpp	(revision 13820)
@@ -577,11 +577,11 @@
  * Just a braindead function to keep track of cli addresses.
  * @param   pVM         VM handle.
- * @param   pInstrGC    The EIP of the cli instruction.
- */
-static void emR3RecordCli(PVM pVM, RTGCPTR pInstrGC)
+ * @param   GCPtrInstr  The EIP of the cli instruction.
+ */
+static void emR3RecordCli(PVM pVM, RTGCPTR GCPtrInstr)
 {
     PCLISTAT pRec;
 
-    pRec = (PCLISTAT)RTAvlPVGet(&pVM->em.s.pCliStatTree, (AVLPVKEY)pInstrGC);
+    pRec = (PCLISTAT)RTAvlPVGet(&pVM->em.s.pCliStatTree, (AVLPVKEY)GCPtrInstr);
     if (!pRec)
     {
@@ -591,8 +591,8 @@
         if (!pRec)
             return;
-        pRec->Core.Key = (AVLPVKEY)pInstrGC;
+        pRec->Core.Key = (AVLPVKEY)GCPtrInstr;
 
         char szCliStatName[32];
-        RTStrPrintf(szCliStatName, sizeof(szCliStatName), "/EM/Cli/0x%VGv", pInstrGC);
+        RTStrPrintf(szCliStatName, sizeof(szCliStatName), "/EM/Cli/0x%VGv", GCPtrInstr);
         STAM_REG(pVM, &pRec->Counter, STAMTYPE_COUNTER, szCliStatName, STAMUNIT_OCCURENCES, "Number of times cli was executed.");
 
@@ -1752,13 +1752,13 @@
                         if (rc == VINF_SUCCESS)
                         {
-                            Log(("Patch code: IRET->VM stack frame: return address %04X:%VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));
+                            Log(("Patch code: IRET->VM stack frame: return address %04X:%08RX32 eflags=%08x ss:esp=%04X:%08RX32\n", selCS, eip, uEFlags, selSS, esp));
                             Log(("Patch code: IRET->VM stack frame: DS=%04X ES=%04X FS=%04X GS=%04X\n", selDS, selES, selFS, selGS));
                         }
                     }
                     else
-                        Log(("Patch code: IRET stack frame: return address %04X:%VGv eflags=%08x ss:esp=%04X:%VGv\n", selCS, eip, uEFlags, selSS, esp));
+                        Log(("Patch code: IRET stack frame: return address %04X:%08RX32 eflags=%08x ss:esp=%04X:%08RX32\n", selCS, eip, uEFlags, selSS, esp));
                 }
                 else
-                    Log(("Patch code: IRET stack frame: return address %04X:%VGv eflags=%08x\n", selCS, eip, uEFlags));
+                    Log(("Patch code: IRET stack frame: return address %04X:%08RX32 eflags=%08x\n", selCS, eip, uEFlags));
             }
         }
@@ -1793,5 +1793,5 @@
                     {
                         /** @todo move to PATMR3HandleTrap */
-                        Log(("Possible Windows XP iret fault at %VGv\n", pCtx->eip));
+                        Log(("Possible Windows XP iret fault at %08RX32\n", pCtx->eip));
                         PATMR3RemovePatch(pVM, pCtx->eip);
                     }
@@ -2023,5 +2023,5 @@
                             Assert(rc == VERR_PATCH_DISABLED);
                             /* Conflict detected, patch disabled */
-                            Log(("emR3RawPrivileged: detected conflict -> disabled patch at %VGv\n", pCtx->eip));
+                            Log(("emR3RawPrivileged: detected conflict -> disabled patch at %08RX32\n", pCtx->eip));
 
                             enmState = PATMTRANS_SAFE;
@@ -2029,5 +2029,5 @@
 
                         /* The translation had better be successful. Otherwise we can't recover. */
-                        AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %VGv\n", pCtx->eip));
+                        AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %08RX32\n", pCtx->eip));
                         if (enmState != PATMTRANS_OVERWRITTEN)
                             pCtx->eip = pOrgInstrGC;
@@ -2071,9 +2071,9 @@
                                     Assert(rc == VERR_PATCH_DISABLED);
                                     /* Conflict detected, patch disabled */
-                                    Log(("emR3RawPrivileged: detected conflict -> disabled patch at %VGv\n", pCtx->rip));
+                                    Log(("emR3RawPrivileged: detected conflict -> disabled patch at %VGv\n", (RTGCPTR)pCtx->rip));
                                     enmState = PATMTRANS_SAFE;
                                 }
                                 /* The translation had better be successful. Otherwise we can't recover. */
-                                AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %VGv\n", pCtx->rip));
+                                AssertReleaseMsg(pOrgInstrGC && enmState != PATMTRANS_OVERWRITTEN, ("Unable to translate instruction address at %VGv\n", (RTGCPTR)pCtx->rip));
                                 if (enmState != PATMTRANS_OVERWRITTEN)
                                     pCtx->rip = pOrgInstrGC;
@@ -2769,5 +2769,5 @@
     PCPUMCTX pCtx = pVM->em.s.pCtx;
 
-    LogFlow(("emR3HwAccExecute: (cs:eip=%04x:%VGv)\n", pCtx->cs, pCtx->rip));
+    LogFlow(("emR3HwAccExecute: (cs:eip=%04x:%VGv)\n", pCtx->cs, (RTGCPTR)pCtx->rip));
     *pfFFDone = false;
 
@@ -2801,5 +2801,5 @@
          */
         if (TRPMHasTrap(pVM))
-            Log(("Pending hardware interrupt=0x%x cs:eip=%04X:%VGv\n", TRPMGetTrapNo(pVM), pCtx->cs, pCtx->rip));
+            Log(("Pending hardware interrupt=0x%x cs:rip=%04X:%VGv\n", TRPMGetTrapNo(pVM), pCtx->cs, (RTGCPTR)pCtx->rip));
 
         uint32_t cpl = CPUMGetGuestCPL(pVM, CPUMCTX2CORE(pCtx));
@@ -2807,7 +2807,7 @@
             Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
         else if (CPUMIsGuestIn64BitCode(pVM, CPUMCTX2CORE(pCtx)))
-            Log(("HWR%d: %04X:%VGv ESP=%VGv IF=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
+            Log(("HWR%d: %04X:%VGv ESP=%VGv IF=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
         else
-            Log(("HWR%d: %04X:%08X ESP=%08X IF=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
+            Log(("HWR%d: %04X:%08X ESP=%08X IF=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs,          pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
 #endif /* LOG_ENABLED */
 
Index: /trunk/src/VBox/VMM/IOM.cpp
===================================================================
--- /trunk/src/VBox/VMM/IOM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/IOM.cpp	(revision 13820)
@@ -601,5 +601,5 @@
                                       RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
 {
-    LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VRv pfnOutCallback=%VGv pfnInCallback=%VRv pfnOutStrCallback=%VRv  pfnInStrCallback=%VRv pszDesc=%s\n",
+    LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv  pfnInStrCallback=%RRv pszDesc=%s\n",
              pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
 
@@ -1329,5 +1329,5 @@
     {
         PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
-        pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %VGv %s\n",
+        pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
                         pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
     }
Index: /trunk/src/VBox/VMM/MMHyper.cpp
===================================================================
--- /trunk/src/VBox/VMM/MMHyper.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/MMHyper.cpp	(revision 13820)
@@ -229,6 +229,6 @@
         if (RT_FAILURE(rc))
         {
-            AssertMsgFailed(("rc=%Rrc cb=%d GCPtr=%VGv enmType=%d pszDesc=%s\n",
-                             rc, pLookup->cb, pLookup->enmType, pLookup->pszDesc));
+            AssertMsgFailed(("rc=%Rrc cb=%d off=%#RX32 enmType=%d pszDesc=%s\n",
+                             rc, pLookup->cb, pLookup->off, pLookup->enmType, pLookup->pszDesc));
             return rc;
         }
@@ -409,5 +409,5 @@
             if (RT_FAILURE(rc))
             {
-                AssertMsgFailed(("rc=%Rrc GCPhys=%VGv off=%#x %s\n", rc, GCPhys, off, pszDesc));
+                AssertMsgFailed(("rc=%Rrc GCPhys=%VGp off=%#x %s\n", rc, GCPhys, off, pszDesc));
                 break;
             }
@@ -418,5 +418,5 @@
                 if (RT_FAILURE(rc))
                 {
-                    AssertMsgFailed(("rc=%Rrc GCPhys=%VGv off=%#x %s\n", rc, GCPhys, off, pszDesc));
+                    AssertMsgFailed(("rc=%Rrc GCPhys=%VGp off=%#x %s\n", rc, GCPhys, off, pszDesc));
                     break;
                 }
Index: /trunk/src/VBox/VMM/PATM/CSAM.cpp
===================================================================
--- /trunk/src/VBox/VMM/PATM/CSAM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PATM/CSAM.cpp	(revision 13820)
@@ -1670,5 +1670,5 @@
     }
 
-    Log(("csamCreatePageRecord %VRv HCPhys=%VGp\n", GCPtr, pPage->page.GCPhys));
+    Log(("csamCreatePageRecord %VRv GCPhys=%VGp\n", GCPtr, pPage->page.GCPhys));
 
 #ifdef VBOX_WITH_STATISTICS
@@ -1941,5 +1941,5 @@
 
     Assert(enmAccessType == PGMACCESSTYPE_WRITE);
-    Log(("CSAMCodePageWriteHandler: write to %VGv size=%d\n", GCPtr, cbBuf));
+    Log(("CSAMCodePageWriteHandler: write to %VGv size=%zu\n", GCPtr, cbBuf));
 
     if (VM_IS_EMT(pVM))
Index: /trunk/src/VBox/VMM/PATM/PATMSSM.cpp
===================================================================
--- /trunk/src/VBox/VMM/PATM/PATMSSM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PATM/PATMSSM.cpp	(revision 13820)
@@ -574,5 +574,5 @@
                 /* We actually generated code for this patch. */
                 ret = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTreeByPatchAddr, &pPatchRec->CoreOffset);
-                AssertMsg(ret, ("Inserting patch %VGv offset %VGv failed!!\n", pPatchRec->patch.pPrivInstrGC, pPatchRec->CoreOffset.Key));
+                AssertMsg(ret, ("Inserting patch %RRv offset %08RX32 failed!!\n", pPatchRec->patch.pPrivInstrGC, pPatchRec->CoreOffset.Key));
             }
         }
Index: /trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp	(revision 13820)
@@ -60,5 +60,5 @@
     register uint32_t efl = pCtxCore->eflags.u32;
     CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK;
-    AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VRv eflags=%08x fPATM=%d pPATMGC=%VGv-%VGv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));
+    AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%VRv eflags=%08x fPATM=%d pPATMGC=%RRv-%RRv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));
 
     AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=%VRv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip));
Index: /trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp
===================================================================
--- /trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp	(revision 13820)
@@ -82,5 +82,5 @@
     if (!pPATMGCState->fPIF && fPatchCode)
     {
-        Log(("CSAMGCCodePageWriteHandler: fPIF=0 -> stack fault in patch generated code at %VGv!\n", pRegFrame->eip));
+        Log(("CSAMGCCodePageWriteHandler: fPIF=0 -> stack fault in patch generated code at %08RX32!\n", pRegFrame->eip));
         /** @note there are cases when pages previously used for code are now used for stack; patch generated code will fault (pushf))
          *  Just make the page r/w and continue.
Index: /trunk/src/VBox/VMM/PDMDevMiscHlp.cpp
===================================================================
--- /trunk/src/VBox/VMM/PDMDevMiscHlp.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PDMDevMiscHlp.cpp	(revision 13820)
@@ -96,5 +96,5 @@
     AssertReleaseRC(rc);
     AssertRelease(pRCHelpers);
-    LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %VGv\n",
+    LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
     return pRCHelpers;
@@ -227,5 +227,5 @@
     AssertReleaseRC(rc);
     AssertRelease(pRCHelpers);
-    LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %VGv\n",
+    LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
     return pRCHelpers;
@@ -314,5 +314,5 @@
     AssertReleaseRC(rc);
     AssertRelease(pRCHelpers);
-    LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %VGv\n",
+    LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
     return pRCHelpers;
Index: /trunk/src/VBox/VMM/PDMLdr.cpp
===================================================================
--- /trunk/src/VBox/VMM/PDMLdr.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PDMLdr.cpp	(revision 13820)
@@ -592,5 +592,5 @@
         else
             pUVM->pdm.s.pModules = pModule; /* (pNext is zeroed by alloc) */
-        Log(("PDM: GC Module at %VGvx %s (%s)\n", (RTGCPTR)pModule->ImageBase, pszName, pszFilename));
+        Log(("PDM: R0 Module at %RHv %s (%s)\n", (RTR0PTR)pModule->ImageBase, pszName, pszFilename));
         RTMemTmpFree(pszFile);
         return VINF_SUCCESS;
Index: /trunk/src/VBox/VMM/PGM.cpp
===================================================================
--- /trunk/src/VBox/VMM/PGM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PGM.cpp	(revision 13820)
@@ -2614,5 +2614,5 @@
                                 "%04X - %VGp P=%d U=%d RW=%d [G=%d]\n",
                                 iPD,
-                                PdeSrc.u & X86_PDE_PG_MASK,
+                                (RTGCPHYS)(PdeSrc.u & X86_PDE_PG_MASK),
                                 PdeSrc.n.u1Present, PdeSrc.n.u1User, PdeSrc.n.u1Write, PdeSrc.b.u1Global && fPGE);
         }
Index: /trunk/src/VBox/VMM/PGMMap.cpp
===================================================================
--- /trunk/src/VBox/VMM/PGMMap.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/PGMMap.cpp	(revision 13820)
@@ -1070,6 +1070,6 @@
                 {
                     STAM_COUNTER_INC(&pVM->pgm.s.StatR3DetectedConflicts);
-                    Log(("PGMR3HasMappingConflicts: Conflict was detected at %VGv for mapping %s (32 bits)\n"
-                        "                          iPDE=%#x iPT=%#x PDE=%VGp.\n",
+                    Log(("PGMR3HasMappingConflicts: Conflict was detected at %08RX32 for mapping %s (32 bits)\n"
+                         "                          iPDE=%#x iPT=%#x PDE=%VGp.\n",
                         (iPT + iPDE) << X86_PD_SHIFT, pCur->pszDesc,
                         iPDE, iPT, pPD->a[iPDE + iPT].au32[0]));
@@ -1096,5 +1096,5 @@
                     STAM_COUNTER_INC(&pVM->pgm.s.StatR3DetectedConflicts);
                     Log(("PGMR3HasMappingConflicts: Conflict was detected at %VGv for mapping %s (PAE)\n"
-                        "                          PDE=%VGp.\n",
+                         "                          PDE=%016RX64.\n",
                         GCPtr, pCur->pszDesc, Pde.u));
                     return true;
Index: /trunk/src/VBox/VMM/SELM.cpp
===================================================================
--- /trunk/src/VBox/VMM/SELM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/SELM.cpp	(revision 13820)
@@ -888,5 +888,5 @@
                 else
                 {
-                    AssertReleaseMsgFailed(("Couldn't read GDT at %VGv, rc=%Rrc!\n", GDTR.pGdt, rc));
+                    AssertReleaseMsgFailed(("Couldn't read GDT at %016RX64, rc=%Rrc!\n", GDTR.pGdt, rc));
                     STAM_PROFILE_STOP(&pVM->selm.s.StatUpdateFromCPUM, a);
                     return VERR_NOT_IMPLEMENTED;
@@ -1051,5 +1051,5 @@
             ||  GDTR.cbGdt != pVM->selm.s.GuestGdtr.cbGdt)
         {
-            Log(("SELMR3UpdateFromCPUM: Guest's GDT is changed to pGdt=%VGv cbGdt=%08X\n", GDTR.pGdt, GDTR.cbGdt));
+            Log(("SELMR3UpdateFromCPUM: Guest's GDT is changed to pGdt=%016RX64 cbGdt=%08X\n", GDTR.pGdt, GDTR.cbGdt));
 
             /*
@@ -1180,5 +1180,5 @@
                 ||  cbLdt != pVM->selm.s.cbLdtLimit)
             {
-                Log(("SELMR3UpdateFromCPUM: Guest LDT changed to from %VGv:%04x to %VGv:%04x. (GDTR=%VGv:%04x)\n",
+                Log(("SELMR3UpdateFromCPUM: Guest LDT changed to from %VGv:%04x to %VGv:%04x. (GDTR=%016RX64:%04x)\n",
                      pVM->selm.s.GCPtrGuestLdt, pVM->selm.s.cbLdtLimit, GCPtrLdt, cbLdt, pVM->selm.s.GuestGdtr.pGdt, pVM->selm.s.GuestGdtr.cbGdt));
 
@@ -1202,5 +1202,5 @@
                     /** @todo investigate the various cases where conflicts happen and try avoid them by enh. the instruction emulation. */
                     pVM->selm.s.GCPtrGuestLdt = RTRCPTR_MAX;
-                    Log(("WARNING: Guest LDT (%VGv:%04x) conflicted with existing access range!! Assumes LDT is begin updated. (GDTR=%VGv:%04x)\n",
+                    Log(("WARNING: Guest LDT (%VGv:%04x) conflicted with existing access range!! Assumes LDT is begin updated. (GDTR=%016RX64:%04x)\n",
                          GCPtrLdt, cbLdt, pVM->selm.s.GuestGdtr.pGdt, pVM->selm.s.GuestGdtr.cbGdt));
                 }
@@ -1783,11 +1783,11 @@
         if (!pVM->selm.s.fSyncTSSRing0Stack)
         {
-            RTGCPTR     pGuestTSS = pVM->selm.s.GCPtrGuestTss;
+            RTGCPTR     GCPtrGuestTSS = pVM->selm.s.GCPtrGuestTss;
             uint32_t    ESPR0;
-            int rc = PGMPhysSimpleReadGCPtr(pVM, &ESPR0, pGuestTSS + RT_OFFSETOF(VBOXTSS, esp0), sizeof(ESPR0));
+            int rc = PGMPhysSimpleReadGCPtr(pVM, &ESPR0, GCPtrGuestTSS + RT_OFFSETOF(VBOXTSS, esp0), sizeof(ESPR0));
             if (RT_SUCCESS(rc))
             {
                 RTSEL SelSS0;
-                rc = PGMPhysSimpleReadGCPtr(pVM, &SelSS0, pGuestTSS + RT_OFFSETOF(VBOXTSS, ss0), sizeof(SelSS0));
+                rc = PGMPhysSimpleReadGCPtr(pVM, &SelSS0, GCPtrGuestTSS + RT_OFFSETOF(VBOXTSS, ss0), sizeof(SelSS0));
                 if (RT_SUCCESS(rc))
                 {
@@ -1799,8 +1799,8 @@
                     uint64_t fFlags;
 
-                    rc = PGMGstGetPage(pVM, pGuestTSS, &fFlags, &GCPhys);
+                    rc = PGMGstGetPage(pVM, GCPtrGuestTSS, &fFlags, &GCPhys);
                     AssertRC(rc);
                     AssertMsgFailed(("TSS out of sync!! (%04X:%08X vs %04X:%08X (guest)) Tss=%VGv Phys=%VGp\n",
-                                     (pVM->selm.s.Tss.ss1 & ~1), pVM->selm.s.Tss.esp1, SelSS0, ESPR0, pGuestTSS, GCPhys));
+                                     (pVM->selm.s.Tss.ss1 & ~1), pVM->selm.s.Tss.esp1, SelSS0, ESPR0, GCPtrGuestTSS, GCPhys));
                 }
                 else
@@ -2270,5 +2270,5 @@
 static DECLCALLBACK(void) selmR3InfoGdt(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
 {
-    pHlp->pfnPrintf(pHlp, "Shadow GDT (GCAddr=%VGv):\n", MMHyperHC2GC(pVM, pVM->selm.s.paGdtR3));
+    pHlp->pfnPrintf(pHlp, "Shadow GDT (GCAddr=%RRv):\n", MMHyperR3ToRC(pVM, pVM->selm.s.paGdtR3));
     for (unsigned iGDT = 0; iGDT < SELM_GDT_ELEMENTS; iGDT++)
     {
@@ -2305,12 +2305,12 @@
     VBOXGDTR    GDTR;
     CPUMGetGuestGDTR(pVM, &GDTR);
-    RTGCPTR     pGDTGC = GDTR.pGdt;
+    RTGCPTR     GCPtrGDT = GDTR.pGdt;
     unsigned    cGDTs = ((unsigned)GDTR.cbGdt + 1) / sizeof(X86DESC);
 
-    pHlp->pfnPrintf(pHlp, "Guest GDT (GCAddr=%VGv limit=%x):\n", pGDTGC, GDTR.cbGdt);
-    for (unsigned iGDT = 0; iGDT < cGDTs; iGDT++, pGDTGC += sizeof(X86DESC))
+    pHlp->pfnPrintf(pHlp, "Guest GDT (GCAddr=%VGv limit=%x):\n", GCPtrGDT, GDTR.cbGdt);
+    for (unsigned iGDT = 0; iGDT < cGDTs; iGDT++, GCPtrGDT += sizeof(X86DESC))
     {
         X86DESC GDTE;
-        int rc = PGMPhysSimpleReadGCPtr(pVM, &GDTE, pGDTGC, sizeof(GDTE));
+        int rc = PGMPhysSimpleReadGCPtr(pVM, &GDTE, GCPtrGDT, sizeof(GDTE));
         if (RT_SUCCESS(rc))
         {
@@ -2324,9 +2324,9 @@
         else if (rc == VERR_PAGE_NOT_PRESENT)
         {
-            if ((pGDTGC & PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
-                pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%VGv)\n", iGDT << X86_SEL_SHIFT, pGDTGC);
+            if ((GCPtrGDT & PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
+                pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%VGv)\n", iGDT << X86_SEL_SHIFT, GCPtrGDT);
         }
         else
-            pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%VGv\n", iGDT << X86_SEL_SHIFT, rc, pGDTGC);
+            pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%VGv\n", iGDT << X86_SEL_SHIFT, rc, GCPtrGDT);
     }
 }
@@ -2344,5 +2344,5 @@
     unsigned    cLDTs = ((unsigned)pVM->selm.s.cbLdtLimit + 1) >> X86_SEL_SHIFT;
     PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.pvLdtR3 + pVM->selm.s.offLdtHyper);
-    pHlp->pfnPrintf(pHlp, "Shadow LDT (GCAddr=%VGv limit=%d):\n", pVM->selm.s.pvLdtRC + pVM->selm.s.offLdtHyper, pVM->selm.s.cbLdtLimit);
+    pHlp->pfnPrintf(pHlp, "Shadow LDT (GCAddr=%RRv limit=%#x):\n", pVM->selm.s.pvLdtRC + pVM->selm.s.offLdtHyper, pVM->selm.s.cbLdtLimit);
     for (unsigned iLDT = 0; iLDT < cLDTs; iLDT++)
     {
@@ -2373,7 +2373,7 @@
     }
 
-    RTGCPTR     pLdtGC;
+    RTGCPTR     GCPtrLdt;
     unsigned    cbLdt;
-    int rc = SELMGetLDTFromSel(pVM, SelLdt, &pLdtGC, &cbLdt);
+    int rc = SELMGetLDTFromSel(pVM, SelLdt, &GCPtrLdt, &cbLdt);
     if (RT_FAILURE(rc))
     {
@@ -2382,10 +2382,10 @@
     }
 
-    pHlp->pfnPrintf(pHlp, "Guest LDT (Sel=%x GCAddr=%VGv limit=%x):\n", SelLdt, pLdtGC, cbLdt);
+    pHlp->pfnPrintf(pHlp, "Guest LDT (Sel=%x GCAddr=%VGv limit=%x):\n", SelLdt, GCPtrLdt, cbLdt);
     unsigned    cLdts  = (cbLdt + 1) >> X86_SEL_SHIFT;
-    for (unsigned iLdt = 0; iLdt < cLdts; iLdt++, pLdtGC += sizeof(X86DESC))
+    for (unsigned iLdt = 0; iLdt < cLdts; iLdt++, GCPtrLdt += sizeof(X86DESC))
     {
         X86DESC LdtE;
-        int rc = PGMPhysSimpleReadGCPtr(pVM, &LdtE, pLdtGC, sizeof(LdtE));
+        int rc = PGMPhysSimpleReadGCPtr(pVM, &LdtE, GCPtrLdt, sizeof(LdtE));
         if (RT_SUCCESS(rc))
         {
@@ -2399,9 +2399,9 @@
         else if (rc == VERR_PAGE_NOT_PRESENT)
         {
-            if ((pLdtGC & PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
-                pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%VGv)\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, pLdtGC);
+            if ((GCPtrLdt & PAGE_OFFSET_MASK) + sizeof(X86DESC) - 1 < sizeof(X86DESC))
+                pHlp->pfnPrintf(pHlp, "%04x - page not present (GCAddr=%VGv)\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, GCPtrLdt);
         }
         else
-            pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%VGv\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, rc, pLdtGC);
+            pHlp->pfnPrintf(pHlp, "%04x - read error rc=%Rrc GCAddr=%VGv\n", (iLdt << X86_SEL_SHIFT) | X86_SEL_LDT, rc, GCPtrLdt);
     }
 }
Index: /trunk/src/VBox/VMM/TRPM.cpp
===================================================================
--- /trunk/src/VBox/VMM/TRPM.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/TRPM.cpp	(revision 13820)
@@ -661,5 +661,5 @@
         if (pVM->trpm.s.aGuestTrapHandler[iTrap] != TRPM_INVALID_HANDLER)
         {
-            Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
+            Log(("TRPMR3Relocate: iGate=%2X Handler %RRv -> %RRv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
             pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
         }
Index: /trunk/src/VBox/VMM/VMMAll/EMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 13820)
@@ -155,5 +155,5 @@
     {
         Log(("EMInterpretDisasOne: Failed to convert %RTsel:%VGv (cpl=%d) - rc=%Rrc !!\n",
-             pCtxCore->cs, pCtxCore->rip, pCtxCore->ss & X86_SEL_RPL, rc));
+             pCtxCore->cs, (RTGCPTR)pCtxCore->rip, pCtxCore->ss & X86_SEL_RPL, rc));
         return rc;
     }
@@ -211,5 +211,5 @@
     RTGCPTR pbCode;
 
-    LogFlow(("EMInterpretInstruction %VGv fault %VGv\n", pRegFrame->rip, pvFault));
+    LogFlow(("EMInterpretInstruction %RGv fault %VGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
     int rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pRegFrame, pRegFrame->rip, 0, &pbCode);
     if (RT_SUCCESS(rc))
@@ -728,5 +728,5 @@
                 if (pCpu->param1.size < pCpu->param2.size)
                 {
-                    AssertMsgFailed(("%s at %VGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), pRegFrame->rip, pCpu->param1.size, pCpu->param2.size)); /* should never happen! */
+                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), (RTGCPTR)pRegFrame->rip, pCpu->param1.size, pCpu->param2.size)); /* should never happen! */
                     return VERR_EM_INTERPRETER;
                 }
@@ -814,5 +814,5 @@
     {
         AssertMsgReturn(pCpu->param1.size >= pCpu->param2.size, /* should never happen! */
-                        ("%s at %VGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), pRegFrame->rip, pCpu->param1.size, pCpu->param2.size),
+                        ("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), (RTGCPTR)pRegFrame->rip, pCpu->param1.size, pCpu->param2.size),
                         VERR_EM_INTERPRETER);
 
@@ -903,5 +903,5 @@
                 if (pCpu->param1.size < pCpu->param2.size)
                 {
-                    AssertMsgFailed(("%s at %VGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), pRegFrame->rip, pCpu->param1.size, pCpu->param2.size)); /* should never happen! */
+                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pCpu), (RTGCPTR)pRegFrame->rip, pCpu->param1.size, pCpu->param2.size)); /* should never happen! */
                     return VERR_EM_INTERPRETER;
                 }
@@ -1187,12 +1187,12 @@
 
             default:
-                Log(("emInterpretMov: unexpected type=%d eip=%VGv\n", param2.type, pRegFrame->rip));
+                Log(("emInterpretMov: unexpected type=%d rip=%RGv\n", param2.type, (RTGCPTR)pRegFrame->rip));
                 return VERR_EM_INTERPRETER;
             }
 #ifdef LOG_ENABLED
             if (pCpu->mode == CPUMODE_64BIT)
-                LogFlow(("EMInterpretInstruction at %VGv: OP_MOV %VGv <- %RX64 (%d) &val64=%RHv\n", pRegFrame->rip, pDest, val64, param2.size, &val64));
+                LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %VGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64));
             else
-                LogFlow(("EMInterpretInstruction at %VGv: OP_MOV %VGv <- %08X  (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64));
+                LogFlow(("EMInterpretInstruction at %08RX64: OP_MOV %VGv <- %08X  (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64));
 #endif
 
@@ -2000,5 +2000,5 @@
 
     /** @todo Clean up this mess. */
-    LogFlow(("EMInterpretCRxWrite at %VGv CR%d <- %VX64\n", pRegFrame->rip, DestRegCrx, val));
+    LogFlow(("EMInterpretCRxWrite at %RGv CR%d <- %VX64\n", (RTGCPTR)pRegFrame->rip, DestRegCrx, val));
     switch (DestRegCrx)
     {
@@ -2349,5 +2349,5 @@
     X86XDTR32   dtr32;
 
-    Log(("Emulate %s at %VGv\n", emGetMnemonic(pCpu), pRegFrame->rip));
+    Log(("Emulate %s at %RGv\n", emGetMnemonic(pCpu), (RTGCPTR)pRegFrame->rip));
 
     /* Only for the VT-x real-mode emulation case. */
Index: /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 13820)
@@ -1018,6 +1018,6 @@
 {
     STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a);
-    Log(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%VGv eip=%VGv\n",
-          GCPhysFault, (uint32_t)uErrorCode, pvFault, pCtxCore->rip));
+    Log(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%VGv rip=%RGv\n",
+         GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
 
     PIOMMMIORANGE pRange = (PIOMMMIORANGE)pvUser;
@@ -1740,5 +1740,5 @@
 VMMDECL(int) IOMMMIOModifyPage(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags)
 {
-    Assert(fPageFlags == (X86_PTE_RW|X86_PTE_P));
+    Assert(fPageFlags == (X86_PTE_RW | X86_PTE_P));
 
     Log(("IOMMMIOModifyPage %VGp -> %VGp flags=%RX64\n", GCPhys, GCPhysRemapped, fPageFlags));
Index: /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 13820)
@@ -360,5 +360,5 @@
 VMMDECL(int)     PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
 {
-    LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%VGv eip=%VGv\n", uErr, pvFault, pRegFrame->rip));
+    LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%VGv eip=%VGv\n", uErr, pvFault, (RTGCPTR)pRegFrame->rip));
     STAM_PROFILE_START(&pVM->pgm.s.StatRZTrap0e, a);
     STAM_STATS({ pVM->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = NULL; } );
@@ -1927,5 +1927,5 @@
         *ppv = pv;
         STAM_COUNTER_INC(&pVM->pgm.s.StatRCDynMapCacheHits);
-        //Log(("PGMGCDynMapHCPage: HCPhys=%RHp pv=%VGv iPage=%d iCache=%d\n", HCPhys, pv, iPage, iCache));
+        //Log(("PGMGCDynMapHCPage: HCPhys=%RHp pv=%p iPage=%d iCache=%d\n", HCPhys, pv, iPage, iCache));
         return VINF_SUCCESS;
     }
@@ -1947,5 +1947,5 @@
     *ppv = pv;
     ASMInvalidatePage(pv);
-    Log4(("PGMGCDynMapHCPage: HCPhys=%RHp pv=%VGv iPage=%d\n", HCPhys, pv, iPage));
+    Log4(("PGMGCDynMapHCPage: HCPhys=%RHp pv=%p iPage=%d\n", HCPhys, pv, iPage));
     return VINF_SUCCESS;
 
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllBth.h	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllBth.h	(revision 13820)
@@ -658,5 +658,5 @@
                            )
                         {
-                            LogFlow(("CSAMExecFault %VGv\n", pRegFrame->eip));
+                            LogFlow(("CSAMExecFault %RX32\n", pRegFrame->eip));
                             rc = CSAMExecFault(pVM, (RTRCPTR)pRegFrame->eip);
                             if (rc != VINF_SUCCESS)
@@ -1020,5 +1020,5 @@
     {
         LogFlow(("InvalidatePage: Out-of-sync PML4E (P/GCPhys) at %VGv GCPhys=%VGp vs %VGp Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
-                    GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
+                 GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
         pgmPoolFreeByPage(pPool, pShwPdpt, pVM->pgm.s.pHCShwAmd64CR3->idx, iPml4e);
         pPml4eDst->u = 0;
@@ -1444,5 +1444,5 @@
                 else
                 {
-                    LogFlow(("SyncPageWorker: monitored page (%VGp) -> mark not present\n", HCPhys));
+                    LogFlow(("SyncPageWorker: monitored page (%VHp) -> mark not present\n", HCPhys));
                     PteDst.u = 0;
                 }
@@ -1561,5 +1561,5 @@
 PGM_BTH_DECL(int, SyncPage)(PVM pVM, GSTPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uErr)
 {
-    LogFlow(("SyncPage: GCPtrPage=%VGv cPages=%d uErr=%#x\n", GCPtrPage, cPages, uErr));
+    LogFlow(("SyncPage: GCPtrPage=%VGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr));
 
 #if    (   PGM_GST_TYPE == PGM_TYPE_32BIT  \
@@ -2531,5 +2531,5 @@
                               (uint64_t)PteSrc.u,
                               pPTDst->a[iPTDst].u & PGM_PTFLAGS_TRACK_DIRTY ? " Track-Dirty" : "", pPTDst->a[iPTDst].u, iPTSrc, PdeSrc.au32[0],
-                              (PdeSrc.u & GST_PDE_PG_MASK) + iPTSrc*sizeof(PteSrc)));
+                              (RTGCPHYS)((PdeSrc.u & GST_PDE_PG_MASK) + iPTSrc*sizeof(PteSrc)) ));
                     }
                 } /* for PTEs */
@@ -3206,5 +3206,5 @@
         {
             /* Free it. */
-            LogFlow(("SyncCR3: Out-of-sync PML4E (GCPhys) GCPtr=%VGv %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
+            LogFlow(("SyncCR3: Out-of-sync PML4E (GCPhys) GCPtr=%RX64 %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
                      (uint64_t)iPml4e << X86_PML4_SHIFT, pShwPdpt->GCPhys, GCPhysPdptSrc, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
             pgmPoolFreeByPage(pPool, pShwPdpt, pVM->pgm.s.pHCShwAmd64CR3->idx, iPml4e);
@@ -3291,5 +3291,5 @@
             {
                 /* Free it. */
-                LogFlow(("SyncCR3: Out-of-sync PDPE (GCPhys) GCPtr=%VGv %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
+                LogFlow(("SyncCR3: Out-of-sync PDPE (GCPhys) GCPtr=%RX64 %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
                         ((uint64_t)iPml4e << X86_PML4_SHIFT) + ((uint64_t)iPdpte << X86_PDPT_SHIFT), pShwPde->GCPhys, GCPhysPdeSrc, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
 
@@ -3869,5 +3869,5 @@
                     if (!pPoolPage)
                     {
-                        AssertMsgFailed(("Invalid page table address %VGp at %VGv! PdeDst=%#RX64\n",
+                        AssertMsgFailed(("Invalid page table address %VHp at %VGv! PdeDst=%#RX64\n",
                                         HCPhysShw, GCPtr, (uint64_t)PdeDst.u));
                         cErrors++;
@@ -4079,5 +4079,5 @@
                                     if (PteDst.n.u1Write)
                                     {
-                                        AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%VGv PteSrc=%#RX64 PteDst=%#RX64\n",
+                                        AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%RHp PteSrc=%#RX64 PteDst=%#RX64\n",
                                                         GCPtr + off, pPhysPage->HCPhys, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
                                         cErrors++;
@@ -4309,5 +4309,5 @@
                                         if (PteDst.n.u1Write)
                                         {
-                                            AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%VGv PdeSrc=%#RX64 PteDst=%#RX64\n",
+                                            AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
                                                             GCPtr + off, pPhysPage->HCPhys, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
                                             cErrors++;
@@ -4321,5 +4321,5 @@
                                     if (PteDst.n.u1Present)
                                     {
-                                        AssertMsgFailed(("ALL access flagged at %VGv but the page is present! HCPhys=%VGv PdeSrc=%#RX64 PteDst=%#RX64\n",
+                                        AssertMsgFailed(("ALL access flagged at %VGv but the page is present! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
                                                         GCPtr + off, pPhysPage->HCPhys, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
                                         cErrors++;
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllGst.h	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllGst.h	(revision 13820)
@@ -1009,7 +1009,7 @@
 
 #ifdef DEBUG
-        Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%VGv\n", iPD1, iPD1 << X86_PD_SHIFT));
+        Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%x\n", iPD1, iPD1 << X86_PD_SHIFT));
         if (iPD1 != iPD2)
-            Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%VGv\n", iPD2, iPD2 << X86_PD_SHIFT));
+            Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%x\n", iPD2, iPD2 << X86_PD_SHIFT));
 #endif
 
@@ -1158,8 +1158,8 @@
 
 #ifdef DEBUG
-                Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD1=%#05x (%VGv)\n",
+                Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD1=%#05x (%x)\n",
                      i, iPD1, (i << X86_PDPT_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)));
                 if (iPD1 != iPD2)
-                    Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD2=%#05x (%VGv)\n",
+                    Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD2=%#05x (%x)\n",
                          i, iPD2, (i << X86_PDPT_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)));
 #endif
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 13820)
@@ -1345,5 +1345,5 @@
 
                             /** @todo fix me later. */
-                            AssertReleaseMsgFailed(("Unknown read at %VGp size %d implement the complex physical reading case %x\n",
+                            AssertReleaseMsgFailed(("Unknown read at %VGp size %u implement the complex physical reading case %RHp\n",
                                                     GCPhys, cbRead,
                                                     pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
@@ -1361,5 +1361,5 @@
         else
         {
-            LogFlow(("PGMPhysRead: Unassigned %VGp size=%d\n", GCPhys, cbRead));
+            LogFlow(("PGMPhysRead: Unassigned %VGp size=%u\n", GCPhys, cbRead));
 
             /*
@@ -1683,5 +1683,5 @@
 
                             /** @todo fix me later. */
-                            AssertReleaseMsgFailed(("Unknown write at %VGp size %d implement the complex physical writing case %x\n",
+                            AssertReleaseMsgFailed(("Unknown write at %VGp size %u implement the complex physical writing case %RHp\n",
                                                     GCPhys, cbWrite,
                                                     (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
@@ -2114,5 +2114,5 @@
         return VINF_SUCCESS;
 
-    LogFlow(("PGMPhysReadGCPtr: %VGv %d\n", GCPtrSrc, cb));
+    LogFlow(("PGMPhysReadGCPtr: %VGv %zu\n", GCPtrSrc, cb));
 
     /*
@@ -2186,5 +2186,5 @@
         return VINF_SUCCESS;
 
-    LogFlow(("PGMPhysWriteGCPtr: %VGv %d\n", GCPtrDst, cb));
+    LogFlow(("PGMPhysWriteGCPtr: %VGv %zu\n", GCPtrDst, cb));
 
     /*
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 13820)
@@ -317,5 +317,5 @@
 #  ifdef PGMPOOL_WITH_GCPHYS_TRACKING
                     PCX86PTE pGstPte = (PCX86PTE)pgmPoolMonitorGCPtr2CCPtr(pPool, pvAddress, GCPhysFault, sizeof(*pGstPte));
-                    Log4(("pgmPoolMonitorChainChanging 32_32: deref %RHp GCPhys %VGp\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PG_MASK));
+                    Log4(("pgmPoolMonitorChainChanging 32_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PG_MASK));
                     pgmPoolTracDerefGCPhysHint(pPool, pPage,
                                                uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK,
@@ -336,5 +336,5 @@
 #  ifdef PGMPOOL_WITH_GCPHYS_TRACKING
                         PCX86PTE pGstPte = (PCX86PTE)pgmPoolMonitorGCPtr2CCPtr(pPool, pvAddress, GCPhysFault, sizeof(*pGstPte));
-                        Log4(("pgmPoolMonitorChainChanging pae_32: deref %RHp GCPhys %VGp\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PG_MASK));
+                        Log4(("pgmPoolMonitorChainChanging pae_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PG_MASK));
                         pgmPoolTracDerefGCPhysHint(pPool, pPage,
                                                    uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
@@ -353,5 +353,5 @@
 #  ifdef PGMPOOL_WITH_GCPHYS_TRACKING
                     PCX86PTEPAE pGstPte = (PCX86PTEPAE)pgmPoolMonitorGCPtr2CCPtr(pPool, pvAddress, GCPhysFault, sizeof(*pGstPte));
-                    Log4(("pgmPoolMonitorChainChanging pae: deref %RHp GCPhys %VGp\n", uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PAE_PG_MASK));
+                    Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PAE_PG_MASK));
                     pgmPoolTracDerefGCPhysHint(pPool, pPage,
                                                uShw.pPTPae->a[iShw].u & X86_PTE_PAE_PG_MASK,
@@ -373,5 +373,5 @@
 #  ifdef PGMPOOL_WITH_GCPHYS_TRACKING
                         PCX86PTEPAE pGstPte = (PCX86PTEPAE)pgmPoolMonitorGCPtr2CCPtr(pPool, pvAddress, GCPhysFault, sizeof(*pGstPte));
-                        Log4(("pgmPoolMonitorChainChanging pae: deref %RHp GCPhys %VGp\n", uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PAE_PG_MASK));
+                        Log4(("pgmPoolMonitorChainChanging pae: deref %016RX64 GCPhys %016RX64\n", uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK, pGstPte->u & X86_PTE_PAE_PG_MASK));
                         pgmPoolTracDerefGCPhysHint(pPool, pPage,
                                                 uShw.pPTPae->a[iShw2].u & X86_PTE_PAE_PG_MASK,
@@ -1055,6 +1055,6 @@
         /* REP prefix, don't bother. */
         STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
-        Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x eip=%VGv opcode=%d prefix=%#x\n",
-              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
+        Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%VGv opcode=%d prefix=%#x\n",
+              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
     }
 
@@ -3816,5 +3816,6 @@
     if (PGMGetHyperCR3(pPool->CTX_SUFF(pVM)) == pPage->Core.Key)
     {
-        AssertMsg(pPage->enmKind == PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4, ("Can't free the shadow CR3! (%VGp vs %VGp kind=%d\n", PGMGetHyperCR3(pPool->CTX_SUFF(pVM)), pPage->Core.Key, pPage->enmKind));
+        AssertMsg(pPage->enmKind == PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4,
+                  ("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(pPool->CTX_SUFF(pVM)), pPage->Core.Key, pPage->enmKind));
         Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%d idx=%d\n", pPage->enmKind, pPage->idx));
         return VINF_SUCCESS;
Index: /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp	(revision 13820)
@@ -208,5 +208,5 @@
 VMMDECL(void)  TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode)
 {
-    Log2(("TRPMSetErrorCode: uErrorCode=%VGv\n", uErrorCode));
+    Log2(("TRPMSetErrorCode: uErrorCode=%VGv\n", uErrorCode)); /** @todo RTGCUINT mess! */
     AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
     pVM->trpm.s.uActiveErrorCode = uErrorCode;
@@ -368,5 +368,5 @@
     STAM_PROFILE_ADV_START(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
 
-#ifdef DEBUG
+# if defined(VBOX_STRICT) || defined(LOG_ENABLED)
     if (pRegFrame->eflags.Bits.u1VM)
         Log(("TRPMForwardTrap-VM: eip=%04X:%04X iGate=%d\n", pRegFrame->cs, pRegFrame->eip, iGate));
@@ -380,13 +380,11 @@
             int rc;
             RTGCPTR pCallerGC;
-#ifdef IN_GC
+#  ifdef IN_GC
             rc = MMGCRamRead(pVM, &pCallerGC, (void *)pRegFrame->esp, sizeof(pCallerGC));
-#else
+#  else
             rc = PGMPhysSimpleReadGCPtr(pVM, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));
-#endif
+#  endif
             if (RT_SUCCESS(rc))
-            {
                 Log(("TRPMForwardTrap: caller=%VGv\n", pCallerGC));
-            }
         }
         /* no break */
@@ -404,5 +402,5 @@
         break;
     }
-#endif /* DEBUG */
+# endif /* VBOX_STRICT || LOG_ENABLED */
 
     /* Retrieve the eflags including the virtualized bits. */
Index: /trunk/src/VBox/VMM/VMMGC/SELMGC.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMGC/SELMGC.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMGC/SELMGC.cpp	(revision 13820)
@@ -294,5 +294,5 @@
         {
             Log(("selmRCGuestTSSWriteHandler: R0 stack: %RTsel:%VGv -> %RTsel:%VGv\n",
-                 (RTSEL)(pVM->selm.s.Tss.ss1 & ~1), pVM->selm.s.Tss.esp1, (RTSEL)pGuestTSS->ss0, pGuestTSS->esp0));
+                 (RTSEL)(pVM->selm.s.Tss.ss1 & ~1), (RTGCPTR)pVM->selm.s.Tss.esp1, (RTSEL)pGuestTSS->ss0, (RTGCPTR)pGuestTSS->esp0));
             pVM->selm.s.Tss.esp1 = pGuestTSS->esp0;
             pVM->selm.s.Tss.ss1 = pGuestTSS->ss0 | 1;
@@ -319,10 +319,10 @@
                         if (RT_FAILURE(rc))
                         {
-                            AssertMsg(rc == VINF_SUCCESS, ("PGMPrefetchPage %VGv failed with %Rrc\n", (uint8_t *)pGuestTSS + offIntRedirBitmap + i*8, rc));
+                            AssertMsg(rc == VINF_SUCCESS, ("PGMPrefetchPage %VGv failed with %Rrc\n", (RTGCPTR)((uintptr_t)pGuestTSS + offIntRedirBitmap + i*8), rc));
                             break;
                         }
                         rc = MMGCRamRead(pVM, &pVM->selm.s.Tss.IntRedirBitmap[i * 8], (uint8_t *)pGuestTSS + offIntRedirBitmap + i * 8, 8);
                     }
-                    AssertMsg(rc == VINF_SUCCESS, ("MMGCRamRead %VGv failed with %Rrc\n", (uint8_t *)pGuestTSS + offIntRedirBitmap + i * 8, rc));
+                    AssertMsg(rc == VINF_SUCCESS, ("MMGCRamRead %VGv failed with %Rrc\n", (RTGCPTR)((uintptr_t)pGuestTSS + offIntRedirBitmap + i * 8), rc));
                 }
                 STAM_COUNTER_INC(&pVM->selm.s.StatRCWriteGuestTSSRedir);
Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 13820)
@@ -358,11 +358,11 @@
 #ifdef VBOX_STRICT
     if (pEvent->n.u8Vector == 0xE)
-        Log(("SVM: Inject int %d at %VGv error code=%02x CR2=%VGv intInfo=%08x\n", pEvent->n.u8Vector, pCtx->rip, pEvent->n.u32ErrorCode, pCtx->cr2, pEvent->au64[0]));
+        Log(("SVM: Inject int %d at %RGv error code=%02x CR2=%RGv intInfo=%08x\n", pEvent->n.u8Vector, (RTGCPTR)pCtx->rip, pEvent->n.u32ErrorCode, (RTGCPTR)pCtx->cr2, pEvent->au64[0]));
     else
     if (pEvent->n.u8Vector < 0x20)
-        Log(("SVM: Inject int %d at %VGv error code=%08x\n", pEvent->n.u8Vector, pCtx->rip, pEvent->n.u32ErrorCode));
+        Log(("SVM: Inject int %d at %RGv error code=%08x\n", pEvent->n.u8Vector, (RTGCPTR)pCtx->rip, pEvent->n.u32ErrorCode));
     else
     {
-        Log(("INJ-EI: %x at %VGv\n", pEvent->n.u8Vector, pCtx->rip));
+        Log(("INJ-EI: %x at %RGv\n", pEvent->n.u8Vector, (RTGCPTR)pCtx->rip));
         Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
         Assert(pCtx->eflags.u32 & X86_EFL_IF);
@@ -392,5 +392,5 @@
         SVM_EVENT Event;
 
-        Log(("Reinjecting event %08x %08x at %VGv\n", pVM->hwaccm.s.Event.intInfo, pVM->hwaccm.s.Event.errCode, pCtx->rip));
+        Log(("Reinjecting event %08x %08x at %RGv\n", pVM->hwaccm.s.Event.intInfo, pVM->hwaccm.s.Event.errCode, (RTGCPTR)pCtx->rip));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
         Event.au64[0] = pVM->hwaccm.s.Event.intInfo;
@@ -413,5 +413,5 @@
                     LogFlow(("Enable irq window exit!\n"));
                 else
-                    Log(("Pending interrupt blocked at %VGv by VM_FF_INHIBIT_INTERRUPTS -> irq window exit\n", pCtx->rip));
+                    Log(("Pending interrupt blocked at %RGv by VM_FF_INHIBIT_INTERRUPTS -> irq window exit\n", (RTGCPTR)pCtx->rip));
 
                 /** @todo use virtual interrupt method to inject a pending irq; dispatched as soon as guest.IF is set. */
@@ -823,5 +823,5 @@
     if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
     {
-        Log(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pCtx->rip, EMGetInhibitInterruptsPC(pVM)));
+        Log(("VM_FF_INHIBIT_INTERRUPTS at %RGv successor %VGv\n", (RTGCPTR)pCtx->rip, EMGetInhibitInterruptsPC(pVM)));
         if (pCtx->rip != EMGetInhibitInterruptsPC(pVM))
         {
@@ -1209,5 +1209,5 @@
     if (pVMCB->ctrl.u64IntShadow & SVM_INTERRUPT_SHADOW_ACTIVE)
     {
-        Log(("uInterruptState %x eip=%VGv\n", pVMCB->ctrl.u64IntShadow, pCtx->rip));
+        Log(("uInterruptState %x rip=%RGv\n", pVMCB->ctrl.u64IntShadow, (RTGCPTR)pCtx->rip));
         EMSetInhibitInterruptsPC(pVM, pCtx->rip);
     }
@@ -1227,5 +1227,5 @@
         &&  pVMCB->ctrl.ExitIntInfo.n.u3Type != SVM_EVENT_SOFTWARE_INT /* we don't care about 'int xx' as the instruction will be restarted. */)
     {
-        Log(("Pending inject %VX64 at %VGv exit=%08x\n", pVM->hwaccm.s.Event.intInfo, pCtx->rip, exitCode));
+        Log(("Pending inject %VX64 at %RGv exit=%08x\n", pVM->hwaccm.s.Event.intInfo, (RTGCPTR)pCtx->rip, exitCode));
 
 #ifdef LOG_ENABLED
@@ -1291,5 +1291,5 @@
             if (rc == VINF_EM_RAW_GUEST_TRAP)
             {
-                Log(("Trap %x (debug) at %VGv\n", vector, pCtx->rip));
+                Log(("Trap %x (debug) at %016RX64\n", vector, pCtx->rip));
 
                 /* Reinject the exception. */
@@ -1310,5 +1310,5 @@
         case X86_XCPT_NM:
         {
-            Log(("#NM fault at %VGv\n", pCtx->rip));
+            Log(("#NM fault at %RGv\n", (RTGCPTR)pCtx->rip));
 
             /** @todo don't intercept #NM exceptions anymore when we've activated the guest FPU state. */
@@ -1350,5 +1350,5 @@
                  * Forward the trap to the guest by injecting the exception and resuming execution.
                  */
-                Log(("Guest page fault at %VGv cr2=%VGv error code %x rsp=%VGv\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode, (RTGCPTR)pCtx->rsp));
+                Log(("Guest page fault at %RGv cr2=%RGv error code %x rsp=%RGv\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode, (RTGCPTR)pCtx->rsp));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestPF);
 
@@ -1371,5 +1371,5 @@
             Assert(!pVM->hwaccm.s.fNestedPaging);
 
-            Log2(("Page fault at %VGv cr2=%VGv error code %x\n", pCtx->rip, uFaultAddress, errCode));
+            Log2(("Page fault at %RGv cr2=%VGv error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
             /* Exit qualification contains the linear address of the page fault. */
             TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
@@ -1379,8 +1379,8 @@
             /* Forward it to our trap handler first, in case our shadow pages are out of sync. */
             rc = PGMTrap0eHandler(pVM, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)uFaultAddress);
-            Log2(("PGMTrap0eHandler %VGv returned %Rrc\n", pCtx->rip, rc));
+            Log2(("PGMTrap0eHandler %RGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc));
             if (rc == VINF_SUCCESS)
             {   /* We've successfully synced our shadow pages, so let's just continue execution. */
-                Log2(("Shadow page fault at %VGv cr2=%VGv error code %x\n", pCtx->rip, uFaultAddress, errCode));
+                Log2(("Shadow page fault at %RGv cr2=%VGv error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
 
@@ -1436,5 +1436,5 @@
                 break;
             }
-            Log(("Trap %x at %VGv\n", vector, pCtx->rip));
+            Log(("Trap %x at %RGv\n", vector, (RTGCPTR)pCtx->rip));
 
             Event.au64[0]    = 0;
@@ -1485,5 +1485,5 @@
                 break;
             }
-            Log(("Trap %x at %VGv esi=%x\n", vector, pCtx->rip, pCtx->esi));
+            Log(("Trap %x at %RGv esi=%x\n", vector, (RTGCPTR)pCtx->rip, pCtx->esi));
             SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
@@ -1508,5 +1508,5 @@
 
         Assert(pVM->hwaccm.s.fNestedPaging);
-        Log(("Nested page fault at %VGv cr2=%VGp error code %x\n", pCtx->rip, uFaultAddress, errCode));
+        Log(("Nested page fault at %RGv cr2=%VGp error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
         /* Exit qualification contains the linear address of the page fault. */
         TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
@@ -1516,8 +1516,8 @@
         /* Handle the pagefault trap for the nested shadow table. */
         rc = PGMR0Trap0eHandlerNestedPaging(pVM, PGMGetHostMode(pVM), errCode, CPUMCTX2CORE(pCtx), uFaultAddress);
-        Log2(("PGMR0Trap0eHandlerNestedPaging %VGv returned %Rrc\n", pCtx->rip, rc));
+        Log2(("PGMR0Trap0eHandlerNestedPaging %RGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc));
         if (rc == VINF_SUCCESS)
         {   /* We've successfully synced our shadow pages, so let's just continue execution. */
-            Log2(("Shadow page fault at %VGv cr2=%VGp error code %x\n", pCtx->rip, uFaultAddress, errCode));
+            Log2(("Shadow page fault at %RGv cr2=%VGp error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
             STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
 
@@ -1564,5 +1564,5 @@
     case SVM_EXIT_CPUID:                /* Guest software attempted to execute CPUID. */
     {
-        Log2(("SVM: Cpuid at %VGv for %x\n", pCtx->rip, pCtx->eax));
+        Log2(("SVM: Cpuid at %RGv for %x\n", (RTGCPTR)pCtx->rip, pCtx->eax));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCpuid);
         rc = EMInterpretCpuId(pVM, CPUMCTX2CORE(pCtx));
@@ -1620,5 +1620,5 @@
         uint32_t cbSize;
 
-        Log2(("SVM: %VGv mov cr%d, \n", pCtx->rip, exitCode - SVM_EXIT_WRITE_CR0));
+        Log2(("SVM: %RGv mov cr%d, \n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_WRITE_CR0));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxWrite);
         rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize);
@@ -1674,5 +1674,5 @@
         uint32_t cbSize;
 
-        Log2(("SVM: %VGv mov x, cr%d\n", pCtx->rip, exitCode - SVM_EXIT_READ_CR0));
+        Log2(("SVM: %RGv mov x, cr%d\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_READ_CR0));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxRead);
         rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize);
@@ -1696,5 +1696,5 @@
         uint32_t cbSize;
 
-        Log2(("SVM: %VGv mov dr%d, x\n", pCtx->rip, exitCode - SVM_EXIT_WRITE_DR0));
+        Log2(("SVM: %RGv mov dr%d, x\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_WRITE_DR0));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
 
@@ -1736,5 +1736,5 @@
         uint32_t cbSize;
 
-        Log2(("SVM: %VGv mov dr%d, x\n", pCtx->rip, exitCode - SVM_EXIT_READ_DR0));
+        Log2(("SVM: %RGv mov dr%d, x\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_READ_DR0));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
 
@@ -1810,5 +1810,5 @@
             if (IoExitInfo.n.u1Type == 0)
             {
-                Log2(("IOMInterpretOUTSEx %VGv %x size=%d\n", pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
+                Log2(("IOMInterpretOUTSEx %VGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringWrite);
                 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, prefix, uIOSize);
@@ -1816,5 +1816,5 @@
             else
             {
-                Log2(("IOMInterpretINSEx  %VGv %x size=%d\n", pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
+                Log2(("IOMInterpretINSEx  %VGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringRead);
                 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, prefix, uIOSize);
@@ -1828,5 +1828,5 @@
             if (IoExitInfo.n.u1Type == 0)
             {
-                Log2(("IOMIOPortWrite %VGv %x %x size=%d\n", pCtx->rip, IoExitInfo.n.u16Port, pCtx->eax & uAndVal, uIOSize));
+                Log2(("IOMIOPortWrite %VGv %x %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, pCtx->eax & uAndVal, uIOSize));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOWrite);
                 rc = IOMIOPortWrite(pVM, IoExitInfo.n.u16Port, pCtx->eax & uAndVal, uIOSize);
@@ -1842,5 +1842,5 @@
                     /* Write back to the EAX register. */
                     pCtx->eax = (pCtx->eax & ~uAndVal) | (u32Val & uAndVal);
-                    Log2(("IOMIOPortRead %VGv %x %x size=%d\n", pCtx->rip, IoExitInfo.n.u16Port, u32Val & uAndVal, uIOSize));
+                    Log2(("IOMIOPortRead %VGv %x %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, u32Val & uAndVal, uIOSize));
                 }
             }
@@ -1893,5 +1893,5 @@
 
                             /* Inject the exception. */
-                            Log(("Inject IO debug trap at %VGv\n", pCtx->rip));
+                            Log(("Inject IO debug trap at %VGv\n", (RTGCPTR)pCtx->rip));
 
                             Event.au64[0]    = 0;
@@ -1911,5 +1911,5 @@
                 goto ResumeExecution;
             }
-            Log2(("EM status from IO at %VGv %x size %d: %Rrc\n", pCtx->rip, IoExitInfo.n.u16Port, uIOSize, rc));
+            Log2(("EM status from IO at %VGv %x size %d: %Rrc\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize, rc));
             break;
         }
@@ -1923,5 +1923,5 @@
             AssertMsg(RT_FAILURE(rc) || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED, ("%Rrc\n", rc));
 #endif
-        Log2(("Failed IO at %VGv %x size %d\n", pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
+        Log2(("Failed IO at %VGv %x size %d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
         break;
     }
@@ -1956,5 +1956,5 @@
         Event.n.u8Vector = X86_XCPT_UD;
 
-        Log(("Forced #UD trap at %VGv\n", pCtx->rip));
+        Log(("Forced #UD trap at %VGv\n", (RTGCPTR)pCtx->rip));
         SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 13820)
@@ -530,11 +530,11 @@
 #ifdef VBOX_STRICT
     if (iGate == 0xE)
-        LogFlow(("VMXR0InjectEvent: Injecting interrupt %d at %VGv error code=%08x CR2=%08x intInfo=%08x\n", iGate, pCtx->rip, errCode, pCtx->cr2, intInfo));
+        LogFlow(("VMXR0InjectEvent: Injecting interrupt %d at %VGv error code=%08x CR2=%08x intInfo=%08x\n", iGate, (RTGCPTR)pCtx->rip, errCode, pCtx->cr2, intInfo));
     else
     if (iGate < 0x20)
-        LogFlow(("VMXR0InjectEvent: Injecting interrupt %d at %VGv error code=%08x\n", iGate, pCtx->rip, errCode));
+        LogFlow(("VMXR0InjectEvent: Injecting interrupt %d at %VGv error code=%08x\n", iGate, (RTGCPTR)pCtx->rip, errCode));
     else
     {
-        LogFlow(("INJ-EI: %x at %VGv\n", iGate, pCtx->rip));
+        LogFlow(("INJ-EI: %x at %VGv\n", iGate, (RTGCPTR)pCtx->rip));
         Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
         Assert(pCtx->eflags.u32 & X86_EFL_IF);
@@ -637,5 +637,5 @@
     if (pVM->hwaccm.s.Event.fPending)
     {
-        Log(("Reinjecting event %VX64 %08x at %VGv cr2=%RX64\n", pVM->hwaccm.s.Event.intInfo, pVM->hwaccm.s.Event.errCode, pCtx->rip, pCtx->cr2));
+        Log(("Reinjecting event %VX64 %08x at %VGv cr2=%RX64\n", pVM->hwaccm.s.Event.intInfo, pVM->hwaccm.s.Event.errCode, (RTGCPTR)pCtx->rip, pCtx->cr2));
         STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
         rc = VMXR0InjectEvent(pVM, pCtx, pVM->hwaccm.s.Event.intInfo, 0, pVM->hwaccm.s.Event.errCode);
@@ -667,5 +667,5 @@
 
             rc = PDMGetInterrupt(pVM, &u8Interrupt);
-            Log(("Dispatch interrupt: u8Interrupt=%x (%d) rc=%Rrc cs:eip=%04X:%VGv\n", u8Interrupt, u8Interrupt, rc, pCtx->cs, pCtx->rip));
+            Log(("Dispatch interrupt: u8Interrupt=%x (%d) rc=%Rrc cs:rip=%04X:%VGv\n", u8Interrupt, u8Interrupt, rc, pCtx->cs, (RTGCPTR)pCtx->rip));
             if (RT_SUCCESS(rc))
             {
@@ -682,5 +682,5 @@
         }
         else
-            Log(("Pending interrupt blocked at %VGv by VM_FF_INHIBIT_INTERRUPTS!!\n", pCtx->rip));
+            Log(("Pending interrupt blocked at %VGv by VM_FF_INHIBIT_INTERRUPTS!!\n", (RTGCPTR)pCtx->rip));
     }
 
@@ -1771,5 +1771,5 @@
     if (VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
     {
-        Log(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", pCtx->rip, EMGetInhibitInterruptsPC(pVM)));
+        Log(("VM_FF_INHIBIT_INTERRUPTS at %VGv successor %VGv\n", (RTGCPTR)pCtx->rip, EMGetInhibitInterruptsPC(pVM)));
         if (pCtx->rip != EMGetInhibitInterruptsPC(pVM))
         {
@@ -1986,9 +1986,9 @@
             AssertRC(rc);
             pVM->hwaccm.s.Event.errCode  = val;
-            Log(("Pending inject %VX64 at %VGv exit=%08x intInfo=%08x exitQualification=%08x pending error=%RX64\n", pVM->hwaccm.s.Event.intInfo, pCtx->rip, exitReason, intInfo, exitQualification, val));
+            Log(("Pending inject %VX64 at %VGv exit=%08x intInfo=%08x exitQualification=%08x pending error=%RX64\n", pVM->hwaccm.s.Event.intInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification, val));
         }
         else
         {
-            Log(("Pending inject %VX64 at %VGv exit=%08x intInfo=%08x exitQualification=%08x\n", pVM->hwaccm.s.Event.intInfo, pCtx->rip, exitReason, intInfo, exitQualification));
+            Log(("Pending inject %VX64 at %VGv exit=%08x intInfo=%08x exitQualification=%08x\n", pVM->hwaccm.s.Event.intInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification));
             pVM->hwaccm.s.Event.errCode  = 0;
         }
@@ -2005,5 +2005,5 @@
     Log2(("Interruption error code %d\n", errCode));
     Log2(("IntInfo = %08x\n", intInfo));
-    Log2(("New EIP=%VGv\n", pCtx->rip));
+    Log2(("New EIP=%VGv\n", (RTGCPTR)pCtx->rip));
 
     if (fSyncTPR)
@@ -2048,5 +2048,5 @@
             case X86_XCPT_NM:
             {
-                Log(("#NM fault at %VGv error code %x\n", pCtx->rip, errCode));
+                Log(("#NM fault at %VGv error code %x\n", (RTGCPTR)pCtx->rip, errCode));
 
                 /** @todo don't intercept #NM exceptions anymore when we've activated the guest FPU state. */
@@ -2106,8 +2106,8 @@
                 /* Forward it to our trap handler first, in case our shadow pages are out of sync. */
                 rc = PGMTrap0eHandler(pVM, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)exitQualification);
-                Log2(("PGMTrap0eHandler %VGv returned %Rrc\n", pCtx->rip, rc));
+                Log2(("PGMTrap0eHandler %VGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc));
                 if (rc == VINF_SUCCESS)
                 {   /* We've successfully synced our shadow pages, so let's just continue execution. */
-                    Log2(("Shadow page fault at %VGv cr2=%VGv error code %x\n", pCtx->rip, exitQualification ,errCode));
+                    Log2(("Shadow page fault at %VGv cr2=%VGv error code %x\n", (RTGCPTR)pCtx->rip, exitQualification ,errCode));
                     STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
 
@@ -2157,5 +2157,5 @@
                     break;
                 }
-                Log(("Trap %x at %04X:%VGv\n", vector, pCtx->cs, pCtx->rip));
+                Log(("Trap %x at %04X:%VGv\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip));
                 rc = VMXR0InjectEvent(pVM, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                 AssertRC(rc);
@@ -2205,5 +2205,5 @@
                     AssertRC(rc);
 
-                    Log(("Trap %x (debug) at %VGv exit qualification %VX64\n", vector, pCtx->rip, exitQualification));
+                    Log(("Trap %x (debug) at %VGv exit qualification %VX64\n", vector, (RTGCPTR)pCtx->rip, exitQualification));
                     rc = VMXR0InjectEvent(pVM, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                     AssertRC(rc);
@@ -2224,5 +2224,5 @@
                 if (!CPUMIsGuestInRealModeEx(pCtx))
                 {
-                    Log(("Trap %x at %04X:%VGv errorCode=%x\n", vector, pCtx->cs, pCtx->rip, errCode));
+                    Log(("Trap %x at %04X:%VGv errorCode=%x\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip, errCode));
                     rc = VMXR0InjectEvent(pVM, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                     AssertRC(rc);
@@ -2233,5 +2233,5 @@
                 Assert(CPUMIsGuestInRealModeEx(pCtx));
 
-                LogFlow(("Real mode X86_XCPT_GP instruction emulation at %VGv\n", pCtx->rip));
+                LogFlow(("Real mode X86_XCPT_GP instruction emulation at %VGv\n", (RTGCPTR)pCtx->rip));
                 rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize);
                 if (rc == VINF_SUCCESS)
@@ -2272,5 +2272,5 @@
                 }
 
-                Log(("Trap %x at %04X:%VGv\n", vector, pCtx->cs, pCtx->rip));
+                Log(("Trap %x at %04X:%VGv\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip));
                 rc = VMXR0InjectEvent(pVM, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                 AssertRC(rc);
@@ -2354,8 +2354,8 @@
         /* Handle the pagefault trap for the nested shadow table. */
         rc = PGMR0Trap0eHandlerNestedPaging(pVM, PGMMODE_EPT, errCode, CPUMCTX2CORE(pCtx), GCPhys);
-        Log2(("PGMR0Trap0eHandlerNestedPaging %VGv returned %Rrc\n", pCtx->rip, rc));
+        Log2(("PGMR0Trap0eHandlerNestedPaging %VGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc));
         if (rc == VINF_SUCCESS)
         {   /* We've successfully synced our shadow pages, so let's just continue execution. */
-            Log2(("Shadow page fault at %VGv cr2=%VGp error code %x\n", pCtx->rip, exitQualification , errCode));
+            Log2(("Shadow page fault at %VGv cr2=%VGp error code %x\n", (RTGCPTR)pCtx->rip, exitQualification , errCode));
             STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
 
@@ -2377,5 +2377,5 @@
     case VMX_EXIT_IRQ_WINDOW:           /* 7 Interrupt window. */
         /* Clear VM-exit on IF=1 change. */
-        LogFlow(("VMX_EXIT_IRQ_WINDOW %VGv pending=%d IF=%d\n", pCtx->rip, VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)), pCtx->eflags.Bits.u1IF));
+        LogFlow(("VMX_EXIT_IRQ_WINDOW %VGv pending=%d IF=%d\n", (RTGCPTR)pCtx->rip, VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)), pCtx->eflags.Bits.u1IF));
         pVM->hwaccm.s.vmx.proc_ctls &= ~VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT;
         rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVM->hwaccm.s.vmx.proc_ctls);
@@ -2472,5 +2472,5 @@
         {
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_WRITE:
-            Log2(("VMX: %VGv mov cr%d, x\n", pCtx->rip, VMX_EXIT_QUALIFICATION_CRX_REGISTER(exitQualification)));
+            Log2(("VMX: %VGv mov cr%d, x\n", (RTGCPTR)pCtx->rip, VMX_EXIT_QUALIFICATION_CRX_REGISTER(exitQualification)));
             STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxWrite);
             rc = EMInterpretCRxWrite(pVM, CPUMCTX2CORE(pCtx),
@@ -2644,5 +2644,5 @@
             if (fIOWrite)
             {
-                Log2(("IOMInterpretOUTSEx %VGv %x size=%d\n", pCtx->rip, uPort, cbSize));
+                Log2(("IOMInterpretOUTSEx %VGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringWrite);
                 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, prefix, cbSize);
@@ -2650,5 +2650,5 @@
             else
             {
-                Log2(("IOMInterpretINSEx  %VGv %x size=%d\n", pCtx->rip, uPort, cbSize));
+                Log2(("IOMInterpretINSEx  %VGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
                 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringRead);
                 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, prefix, cbSize);
@@ -2735,5 +2735,5 @@
                             intInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HWEXCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
 
-                            Log(("Inject IO debug trap at %VGv\n", pCtx->rip));
+                            Log(("Inject IO debug trap at %VGv\n", (RTGCPTR)pCtx->rip));
                             rc = VMXR0InjectEvent(pVM, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), 0, 0);
                             AssertRC(rc);
@@ -2876,5 +2876,5 @@
 
         VMXReadVMCS(VMX_VMCS_GUEST_RIP, &val);
-        Log(("Old eip %VGv new %VGv\n", pCtx->rip, (RTGCPTR)val));
+        Log(("Old eip %VGv new %VGv\n", (RTGCPTR)pCtx->rip, (RTGCPTR)val));
 
         VMXReadVMCS(VMX_VMCS_GUEST_CR0, &val);
@@ -3148,5 +3148,5 @@
 
             VMXReadVMCS(VMX_VMCS_GUEST_RIP, &val);
-            Log(("Old eip %VGv new %VGv\n", pCtx->rip, (RTGCPTR)val));
+            Log(("Old eip %VGv new %VGv\n", (RTGCPTR)pCtx->rip, (RTGCPTR)val));
             VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val);
             Log(("VMX_VMCS_CTRL_PIN_EXEC_CONTROLS   %08x\n", val));
Index: /trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/PGMR0.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMR0/PGMR0.cpp	(revision 13820)
@@ -82,5 +82,5 @@
     int rc;
 
-    LogFlow(("PGMTrap0eHandler: uErr=%#x pvFault=%VGp eip=%VGv\n", uErr, pvFault, pRegFrame->rip));
+    LogFlow(("PGMTrap0eHandler: uErr=%#x pvFault=%VGp eip=%VGv\n", uErr, pvFault, (RTGCPTR)pRegFrame->rip));
     STAM_PROFILE_START(&pVM->pgm.s.StatRZTrap0e, a);
     STAM_STATS({ pVM->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = NULL; } );
Index: /trunk/src/VBox/VMM/VMMSwitcher.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMSwitcher.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMSwitcher.cpp	(revision 13820)
@@ -196,5 +196,5 @@
 
         /* shit */
-        AssertMsgFailed(("PGMR3Map(,%VRv, %VGp, %#x, 0) failed with rc=%Rrc\n", pVM->vmm.s.pvCoreCodeRC, pVM->vmm.s.HCPhysCoreCode, cbCoreCode, rc));
+        AssertMsgFailed(("PGMR3Map(,%RRv, %RHp, %#x, 0) failed with rc=%Rrc\n", pVM->vmm.s.pvCoreCodeRC, pVM->vmm.s.HCPhysCoreCode, cbCoreCode, rc));
         SUPContFree(pVM->vmm.s.pvCoreCodeR3, pVM->vmm.s.cbCoreCode >> PAGE_SHIFT);
     }
@@ -711,11 +711,11 @@
                     "   GCPtrCode   = %VGv\n"
                     "   u32IDCode   = %08x\n"
-                    "   pVMGC       = %VGv\n"
-                    "   pCPUMGC     = %VGv\n"
-                    "   pVMHC       = %p\n"
-                    "   pCPUMHC     = %p\n"
+                    "   pVMRC       = %RRv\n"
+                    "   pCPUMRC     = %RRv\n"
+                    "   pVMR3       = %p\n"
+                    "   pCPUMR3     = %p\n"
                     "   GCPtrGDT    = %VGv\n"
-                    "   InterCR3s   = %08x, %08x, %08x (32-Bit, PAE, AMD64)\n"
-                    "   HyperCR3s   = %08x, %08x, %08x (32-Bit, PAE, AMD64)\n"
+                    "   InterCR3s   = %08RHp, %08RHp, %08RHp (32-Bit, PAE, AMD64)\n"
+                    "   HyperCR3s   = %08RHp, %08RHp, %08RHp (32-Bit, PAE, AMD64)\n"
                     "   SelCS       = %04x\n"
                     "   SelDS       = %04x\n"
@@ -723,9 +723,15 @@
                     "   SelTSS      = %04x\n",
                     pSwitcher->enmType, pSwitcher->pszDesc, pSwitcher->cbCode,
-                    R0PtrCode, pu8CodeR3, GCPtrCode, u32IDCode, VM_GUEST_ADDR(pVM, pVM),
-                    VM_GUEST_ADDR(pVM, &pVM->cpum), pVM, &pVM->cpum,
+                    R0PtrCode,
+                    pu8CodeR3,
+                    GCPtrCode,
+                    u32IDCode,
+                    VM_RC_ADDR(pVM, pVM),
+                    VM_RC_ADDR(pVM, &pVM->cpum),
+                    pVM,
+                    &pVM->cpum,
                     GCPtrGDT,
+                    PGMGetInter32BitCR3(pVM), PGMGetInterPaeCR3(pVM), PGMGetInterAmd64CR3(pVM),
                     PGMGetHyper32BitCR3(pVM), PGMGetHyperPaeCR3(pVM), PGMGetHyperAmd64CR3(pVM),
-                    PGMGetInter32BitCR3(pVM), PGMGetInterPaeCR3(pVM), PGMGetInterAmd64CR3(pVM),
                     SelCS, SelDS, SelCS64, SelTSS);
 
Index: /trunk/src/VBox/VMM/VMMTests.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMTests.cpp	(revision 13819)
+++ /trunk/src/VBox/VMM/VMMTests.cpp	(revision 13820)
@@ -134,5 +134,5 @@
         else if (RCPtrFault != CPUMGetHyperEIP(pVM))
         {
-            RTPrintf("VMM: FAILURE - EIP=%VGv expected %VGv (%s)\n", CPUMGetHyperEIP(pVM), RCPtrFault, pszFaultEIP);
+            RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVM), RCPtrFault, pszFaultEIP);
             fDump = true;
         }
@@ -187,5 +187,5 @@
     if (RT_SUCCESS(rc))
     {
-        RTPrintf("VMM: VMMGCEntry=%VGv\n", RCPtrEP);
+        RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
 
         /*
@@ -498,5 +498,5 @@
     if (RT_SUCCESS(rc))
     {
-        RTPrintf("VMM: VMMGCEntry=%VGv\n", RCPtrEP);
+        RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
 
         CPUMQueryHyperCtxPtr(pVM, &pHyperCtx);
