- Timestamp:
- Nov 5, 2008 1:08:56 AM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/EM.cpp
r13821 r13822 1213 1213 if (PATMIsPatchGCAddr(pVM, pCtx->eip)) 1214 1214 { 1215 Log(("emR3RawExecuteInstruction: In patch block. eip=% VRv\n", (RTRCPTR)pCtx->eip));1215 Log(("emR3RawExecuteInstruction: In patch block. eip=%RRv\n", (RTRCPTR)pCtx->eip)); 1216 1216 1217 1217 RTGCPTR pNewEip; … … 2680 2680 default: 2681 2681 if (PATMIsPatchGCAddr(pVM, pCtx->eip) && !(pCtx->eflags.u32 & X86_EFL_TF)) 2682 LogIt(NULL, 0, LOG_GROUP_PATM, ("Patch code interrupted at % VRv for reason %Rrc\n", (RTRCPTR)CPUMGetGuestEIP(pVM), rc));2682 LogIt(NULL, 0, LOG_GROUP_PATM, ("Patch code interrupted at %RRv for reason %Rrc\n", (RTRCPTR)CPUMGetGuestEIP(pVM), rc)); 2683 2683 break; 2684 2684 } -
trunk/src/VBox/VMM/IOM.cpp
r13820 r13822 601 601 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc) 602 602 { 603 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=% VRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",603 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n", 604 604 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc)); 605 605 … … 1209 1209 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser; 1210 1210 pHlp->pfnPrintf(pHlp, 1211 "%04x-%04x % VRv %VRv %VRv %VRv %s\n",1211 "%04x-%04x %RRv %RRv %RRv %RRv %s\n", 1212 1212 pRange->Core.Key, 1213 1213 pRange->Core.KeyLast, … … 1264 1264 { 1265 1265 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC); 1266 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x % VRv %s\n",1266 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n", 1267 1267 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc); 1268 1268 } … … 1270 1270 { 1271 1271 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC); 1272 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x % VRv\n",1272 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n", 1273 1273 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC); 1274 1274 } … … 1277 1277 { 1278 1278 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC); 1279 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x % VRv %s\n",1279 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n", 1280 1280 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc); 1281 1281 } … … 1283 1283 { 1284 1284 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC); 1285 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x % VRv\n",1285 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n", 1286 1286 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC); 1287 1287 } -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r13820 r13822 581 581 if (rc != VINF_SUCCESS) 582 582 { 583 //// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for % VRv\n", pGCPtr));583 //// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr)); 584 584 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a); 585 585 return NULL; … … 741 741 if (pCurInstrHC == NULL) 742 742 { 743 Log(("CSAMGCVirtToHCVirt failed for % VRv\n", pCurInstrGC));743 Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC)); 744 744 break; 745 745 } … … 775 775 { 776 776 case OP_STR: 777 Log(("Privileged instruction at % VRv: str!!\n", pCurInstrGC));777 Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC)); 778 778 break; 779 779 case OP_LSL: 780 Log(("Privileged instruction at % VRv: lsl!!\n", pCurInstrGC));780 Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC)); 781 781 break; 782 782 case OP_LAR: 783 Log(("Privileged instruction at % VRv: lar!!\n", pCurInstrGC));783 Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC)); 784 784 break; 785 785 case OP_SGDT: 786 Log(("Privileged instruction at % VRv: sgdt!!\n", pCurInstrGC));786 Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC)); 787 787 break; 788 788 case OP_SLDT: 789 Log(("Privileged instruction at % VRv: sldt!!\n", pCurInstrGC));789 Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC)); 790 790 break; 791 791 case OP_SIDT: 792 Log(("Privileged instruction at % VRv: sidt!!\n", pCurInstrGC));792 Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC)); 793 793 break; 794 794 case OP_SMSW: 795 Log(("Privileged instruction at % VRv: smsw!!\n", pCurInstrGC));795 Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC)); 796 796 break; 797 797 case OP_VERW: 798 Log(("Privileged instruction at % VRv: verw!!\n", pCurInstrGC));798 Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC)); 799 799 break; 800 800 case OP_VERR: 801 Log(("Privileged instruction at % VRv: verr!!\n", pCurInstrGC));801 Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC)); 802 802 break; 803 803 case OP_CPUID: 804 Log(("Privileged instruction at % VRv: cpuid!!\n", pCurInstrGC));804 Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC)); 805 805 break; 806 806 case OP_PUSH: 807 Log(("Privileged instruction at % VRv: push cs!!\n", pCurInstrGC));807 Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC)); 808 808 break; 809 809 case OP_IRET: 810 Log(("Privileged instruction at % VRv: iret!!\n", pCurInstrGC));810 Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC)); 811 811 break; 812 812 } … … 837 837 { 838 838 case OP_JMP: 839 Log(("Control Flow instruction at % VRv: jmp!!\n", pCurInstrGC));839 Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC)); 840 840 break; 841 841 case OP_CALL: 842 Log(("Control Flow instruction at % VRv: call!!\n", pCurInstrGC));842 Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC)); 843 843 break; 844 844 } … … 922 922 if (pCurInstrHC == NULL) 923 923 { 924 Log(("CSAMGCVirtToHCVirt failed for % VRv\n", pCurInstrGC));924 Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC)); 925 925 goto done; 926 926 } … … 938 938 if (RT_FAILURE(rc2)) 939 939 { 940 Log(("Disassembly failed at % VRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));940 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2)); 941 941 goto done; 942 942 } … … 952 952 { 953 953 /// @todo fault in the page 954 Log(("Page for current instruction % VRv is not present!!\n", pCurInstrGC));954 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC)); 955 955 goto done; 956 956 } … … 1006 1006 1007 1007 /* Analyse the function. */ 1008 Log(("Found new function at % VRv\n", pCurInstrGC));1008 Log(("Found new function at %RRv\n", pCurInstrGC)); 1009 1009 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction); 1010 1010 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec); … … 1032 1032 1033 1033 /* Analyse the function. */ 1034 Log(("Found new function at % VRv\n", pCurInstrGC));1034 Log(("Found new function at %RRv\n", pCurInstrGC)); 1035 1035 STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction); 1036 1036 csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec); … … 1085 1085 #endif 1086 1086 1087 LogFlow(("csamAnalyseCodeStream: code at % VRv depth=%d\n", pCurInstrGC, pCacheRec->depth));1087 LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth)); 1088 1088 1089 1089 pVM->csam.s.fScanningStarted = true; … … 1098 1098 if (pCacheRec->depth > 512) 1099 1099 { 1100 LogFlow(("CSAM: maximum calldepth reached for % VRv\n", pCurInstrGC));1100 LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC)); 1101 1101 pCacheRec->depth--; 1102 1102 return VINF_SUCCESS; //let's not go on forever … … 1123 1123 else 1124 1124 { 1125 LogFlow(("Code at % VRv has been scanned before\n", pCurInstrGC));1125 LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC)); 1126 1126 rc = VINF_SUCCESS; 1127 1127 goto done; … … 1131 1131 if (pCurInstrHC == NULL) 1132 1132 { 1133 Log(("CSAMGCVirtToHCVirt failed for % VRv\n", pCurInstrGC));1133 Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC)); 1134 1134 rc = VERR_PATCHING_REFUSED; 1135 1135 goto done; … … 1148 1148 if (RT_FAILURE(rc2)) 1149 1149 { 1150 Log(("Disassembly failed at % VRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));1150 Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2)); 1151 1151 rc = VINF_SUCCESS; 1152 1152 goto done; … … 1165 1165 { 1166 1166 /// @todo fault in the page 1167 Log(("Page for current instruction % VRv is not present!!\n", pCurInstrGC));1167 Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC)); 1168 1168 rc = VWRN_CONTINUE_ANALYSIS; 1169 1169 goto next_please; … … 1227 1227 if (!PGMGstIsPagePresent(pVM, addr)) 1228 1228 { 1229 Log(("Page for current instruction % VRv is not present!!\n", addr));1229 Log(("Page for current instruction %RRv is not present!!\n", addr)); 1230 1230 rc = VWRN_CONTINUE_ANALYSIS; 1231 1231 goto next_please; … … 1300 1300 break; 1301 1301 1302 Log(("Jump to % VRv\n", addr));1302 Log(("Jump to %RRv\n", addr)); 1303 1303 1304 1304 pJmpPage = NULL; … … 1361 1361 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1362 1362 { 1363 Log(("csamR3CalcPageHash: page % VRv not present!!\n", pInstr));1363 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr)); 1364 1364 return ~0ULL; 1365 1365 } … … 1369 1369 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1370 1370 { 1371 Log(("csamR3CalcPageHash: page % VRv not present!!\n", pInstr));1371 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr)); 1372 1372 return ~0ULL; 1373 1373 } … … 1377 1377 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1378 1378 { 1379 Log(("csamR3CalcPageHash: page % VRv not present!!\n", pInstr));1379 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr)); 1380 1380 return ~0ULL; 1381 1381 } … … 1385 1385 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1386 1386 { 1387 Log(("csamR3CalcPageHash: page % VRv not present!!\n", pInstr));1387 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr)); 1388 1388 return ~0ULL; 1389 1389 } … … 1393 1393 if (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1394 1394 { 1395 Log(("csamR3CalcPageHash: page % VRv not present!!\n", pInstr));1395 Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr)); 1396 1396 return ~0ULL; 1397 1397 } … … 1459 1459 else 1460 1460 if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT) 1461 AssertMsgFailed(("PGMR3GetPage % VRv failed with %Rrc\n", addr, rc));1461 AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc)); 1462 1462 1463 1463 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)addr); … … 1472 1472 } 1473 1473 1474 Log(("CSAMR3FlushPage: page % VRv has changed -> FLUSH (rc=%Rrc) (Phys: %VGp vs %VGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));1474 Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %VGp vs %VGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys)); 1475 1475 1476 1476 STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1); … … 1611 1611 bool ret; 1612 1612 1613 Log(("New page record for % VRv\n", GCPtr & PAGE_BASE_GC_MASK));1613 Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK)); 1614 1614 1615 1615 pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC)); … … 1649 1649 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0, 1650 1650 csamGetMonitorDescription(enmTag)); 1651 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx % VRv failed with %Rrc\n", GCPtr, rc));1651 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc)); 1652 1652 if (RT_FAILURE(rc)) 1653 Log(("PGMR3HandlerVirtualRegisterEx for % VRv failed with %Rrc\n", GCPtr, rc));1653 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc)); 1654 1654 1655 1655 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */ … … 1670 1670 } 1671 1671 1672 Log(("csamCreatePageRecord % VRv GCPhys=%VGp\n", GCPtr, pPage->page.GCPhys));1672 Log(("csamCreatePageRecord %RRv GCPhys=%VGp\n", GCPtr, pPage->page.GCPhys)); 1673 1673 1674 1674 #ifdef VBOX_WITH_STATISTICS … … 1720 1720 pPageAddrGC &= PAGE_BASE_GC_MASK; 1721 1721 1722 Log(("CSAMR3MonitorPage % VRv %d\n", pPageAddrGC, enmTag));1722 Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag)); 1723 1723 1724 1724 /** @todo implicit assumption */ … … 1754 1754 if (!pPageRec->page.fMonitorActive) 1755 1755 { 1756 Log(("CSAMR3MonitorPage: activate monitoring for % VRv\n", pPageAddrGC));1756 Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC)); 1757 1757 1758 1758 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */, 1759 1759 (fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0, 1760 1760 csamGetMonitorDescription(enmTag)); 1761 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx % VRv failed with %Rrc\n", pPageAddrGC, rc));1761 AssertMsg(RT_SUCCESS(rc) || rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc)); 1762 1762 if (RT_FAILURE(rc)) 1763 Log(("PGMR3HandlerVirtualRegisterEx for % VRv failed with %Rrc\n", pPageAddrGC, rc));1763 Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc)); 1764 1764 1765 1765 /* Could fail, because it's already monitored. Don't treat that condition as fatal. */ … … 1803 1803 // AssertMsg( (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT) 1804 1804 // || !(fPageShw & X86_PTE_RW) 1805 // || (pPageRec->page.GCPhys == 0), ("Shadow page flags for % VRv (%RHp) aren't readonly (%VX64)!!\n", pPageAddrGC, GCPhys, fPageShw));1805 // || (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%VX64)!!\n", pPageAddrGC, GCPhys, fPageShw)); 1806 1806 } 1807 1807 #endif … … 1832 1832 pPageAddrGC &= PAGE_BASE_GC_MASK; 1833 1833 1834 Log(("CSAMR3UnmonitorPage % VRv %d\n", pPageAddrGC, enmTag));1834 Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag)); 1835 1835 1836 1836 Assert(enmTag == CSAM_TAG_REM); … … 1856 1856 PCSAMPAGEREC pPageRec; 1857 1857 1858 Log(("csamRemovePageRecord % VRv\n", GCPtr));1858 Log(("csamRemovePageRecord %RRv\n", GCPtr)); 1859 1859 pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr); 1860 1860 … … 2041 2041 static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned) 2042 2042 { 2043 LogFlow(("csamMarkCodeAsScanned % VRv opsize=%d\n", pInstr, opsize));2043 LogFlow(("csamMarkCodeAsScanned %RRv opsize=%d\n", pInstr, opsize)); 2044 2044 CSAMMarkPage(pVM, pInstr, fScanned); 2045 2045 … … 2058 2058 if (pPage->uSize >= PAGE_SIZE) 2059 2059 { 2060 Log(("Scanned full page (% VRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));2060 Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK)); 2061 2061 MMR3HeapFree(pPage->pBitmap); 2062 2062 pPage->pBitmap = NULL; … … 2091 2091 } 2092 2092 2093 Log(("CSAMR3MarkCode: % VRv size=%d fScanned=%d\n", pInstr, opsize, fScanned));2093 Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, opsize, fScanned)); 2094 2094 csamMarkCode(pVM, pPage, pInstr, opsize, fScanned); 2095 2095 return VINF_SUCCESS; … … 2184 2184 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT); 2185 2185 2186 Log(("CSAMR3FlushDirtyPages: flush % VRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));2186 Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc)); 2187 2187 2188 2188 pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr); … … 2221 2221 GCPtr = GCPtr & PAGE_BASE_GC_MASK; 2222 2222 2223 Log(("csamR3FlushCodePages: % VRv\n", GCPtr));2223 Log(("csamR3FlushCodePages: %RRv\n", GCPtr)); 2224 2224 PGMShwSetPage(pVM, GCPtr, 1, 0); 2225 2225 /* Resync the page to make sure instruction fetch will fault */ … … 2296 2296 PCSAMPAGE pPage = NULL; 2297 2297 2298 Log(("CSAMCheckGates: checking previous call instruction % VRv\n", pHandler));2298 Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler)); 2299 2299 STAM_PROFILE_START(&pVM->csam.s.StatTime, a); 2300 2300 rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec); … … 2374 2374 { 2375 2375 /* Refuse to patch a handler whose idt cs selector isn't wide open. */ 2376 Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=% VRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));2376 Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit)); 2377 2377 continue; 2378 2378 } … … 2381 2381 if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) 2382 2382 { 2383 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat % VRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));2383 Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler)); 2384 2384 } 2385 2385 else 2386 2386 { 2387 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat % VRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));2387 Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler)); 2388 2388 } 2389 2389 … … 2444 2444 } 2445 2445 2446 Log(("Installing %s gate handler for 0x%X at % VRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));2446 Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler)); 2447 2447 2448 2448 rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags); … … 2480 2480 } 2481 2481 2482 Log(("CSAMR3RecordCallAddress % VRv\n", GCPtrCall));2482 Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall)); 2483 2483 2484 2484 pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall; -
trunk/src/VBox/VMM/PATM/PATMPatch.cpp
r13816 r13822 71 71 Assert(uType == FIXUP_ABSOLUTE || ((uType == FIXUP_REL_JMPTOPATCH || uType == FIXUP_REL_JMPTOGUEST) && pSource && pDest)); 72 72 73 LogFlow(("patmPatchAddReloc32 type=%d pRelocGC=% VRv source=%VRv dest=%VRv\n", uType, pRelocHC - pVM->patm.s.pPatchMemGC + pVM->patm.s.pPatchMemGC , pSource, pDest));73 LogFlow(("patmPatchAddReloc32 type=%d pRelocGC=%RRv source=%RRv dest=%RRv\n", uType, pRelocHC - pVM->patm.s.pPatchMemGC + pVM->patm.s.pPatchMemGC , pSource, pDest)); 74 74 75 75 pRec = (PRELOCREC)MMR3HeapAllocZ(pVM, MM_TAG_PATM_PATCH, sizeof(*pRec)); … … 471 471 uint32_t size; 472 472 473 Log(("patmPatchGenSti at % VRv; next %VRv\n", pCurInstrGC, pNextInstrGC));473 Log(("patmPatchGenSti at %RRv; next %RRv\n", pCurInstrGC, pNextInstrGC)); 474 474 PATCHGEN_PROLOG(pVM, pPatch); 475 475 callInfo.pNextInstrGC = pNextInstrGC; … … 490 490 callInfo.pNextInstrGC = pReturnAddrGC; 491 491 492 Log(("patmPatchGenPopf at % VRv\n", pReturnAddrGC));492 Log(("patmPatchGenPopf at %RRv\n", pReturnAddrGC)); 493 493 494 494 /* Note: keep IOPL in mind when changing any of this!! (see comments in PATMA.asm, PATMPopf32Replacement) */ … … 725 725 else 726 726 { 727 AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (% VRv)?!?\n", pTargetGC));727 AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (%RRv)?!?\n", pTargetGC)); 728 728 Assert(pTargetGC); 729 729 Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J); … … 732 732 733 733 /* Relative call to patch code (patch to patch -> no fixup). */ 734 Log(("PatchGenCall from % VRv (next=%VRv) to %VRv\n", pCurInstrGC, pCurInstrGC + pCpu->opsize, pTargetGC));734 Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->opsize, pTargetGC)); 735 735 736 736 /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause … … 860 860 pPatchRetInstrGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset; 861 861 862 Log(("patmPatchGenRet % VRv\n", pCurInstrGC));862 Log(("patmPatchGenRet %RRv\n", pCurInstrGC)); 863 863 864 864 /** @note optimization: multiple identical ret instruction in a single patch can share a single patched ret. */ … … 944 944 PATCHGEN_EPILOG(pPatch, size); 945 945 946 Log(("pfnHelperCallGC % VRv\n", pVM->patm.s.pfnHelperCallGC));947 Log(("pfnHelperRetGC % VRv\n", pVM->patm.s.pfnHelperRetGC));948 Log(("pfnHelperJumpGC % VRv\n", pVM->patm.s.pfnHelperJumpGC));949 Log(("pfnHelperIretGC % VRv\n", pVM->patm.s.pfnHelperIretGC));946 Log(("pfnHelperCallGC %RRv\n", pVM->patm.s.pfnHelperCallGC)); 947 Log(("pfnHelperRetGC %RRv\n", pVM->patm.s.pfnHelperRetGC)); 948 Log(("pfnHelperJumpGC %RRv\n", pVM->patm.s.pfnHelperJumpGC)); 949 Log(("pfnHelperIretGC %RRv\n", pVM->patm.s.pfnHelperIretGC)); 950 950 951 951 return VINF_SUCCESS; … … 1273 1273 uint32_t size, offset; 1274 1274 1275 Log(("patmPatchGenMovFromSS % VRv\n", pCurInstrGC));1275 Log(("patmPatchGenMovFromSS %RRv\n", pCurInstrGC)); 1276 1276 1277 1277 Assert(pPatch->flags & PATMFL_CODE32); -
trunk/src/VBox/VMM/PATM/PATMSSM.cpp
r13820 r13822 436 436 Assert(patmInfo.ulCallDepth == 0 && pVM->patm.s.ulCallDepth == 0); 437 437 438 Log(("pPatchMemGC % VRv vs old %VRv\n", pVM->patm.s.pPatchMemGC, patmInfo.pPatchMemGC));439 Log(("pGCStateGC % VRv vs old %VRv\n", pVM->patm.s.pGCStateGC, patmInfo.pGCStateGC));440 Log(("pGCStackGC % VRv vs old %VRv\n", pVM->patm.s.pGCStackGC, patmInfo.pGCStackGC));441 Log(("pCPUMCtxGC % VRv vs old %VRv\n", pVM->patm.s.pCPUMCtxGC, patmInfo.pCPUMCtxGC));438 Log(("pPatchMemGC %RRv vs old %RRv\n", pVM->patm.s.pPatchMemGC, patmInfo.pPatchMemGC)); 439 Log(("pGCStateGC %RRv vs old %RRv\n", pVM->patm.s.pGCStateGC, patmInfo.pGCStateGC)); 440 Log(("pGCStackGC %RRv vs old %RRv\n", pVM->patm.s.pGCStackGC, patmInfo.pGCStackGC)); 441 Log(("pCPUMCtxGC %RRv vs old %RRv\n", pVM->patm.s.pCPUMCtxGC, patmInfo.pCPUMCtxGC)); 442 442 443 443 … … 447 447 * Restore patch memory contents 448 448 */ 449 Log(("Restore patch memory: new % VRv old %VRv\n", pVM->patm.s.pPatchMemGC, patmInfo.pPatchMemGC));449 Log(("Restore patch memory: new %RRv old %RRv\n", pVM->patm.s.pPatchMemGC, patmInfo.pPatchMemGC)); 450 450 rc = SSMR3GetMem(pSSM, pVM->patm.s.pPatchMemHC, pVM->patm.s.cbPatchMem); 451 451 AssertRCReturn(rc, rc); … … 565 565 pPatchRec->CoreOffset.Key = patch.CoreOffset.Key; 566 566 567 Log(("Restoring patch % VRv -> %VRv\n", pPatchRec->patch.pPrivInstrGC, patmInfo.pPatchMemGC + pPatchRec->patch.pPatchBlockOffset));567 Log(("Restoring patch %RRv -> %RRv\n", pPatchRec->patch.pPrivInstrGC, patmInfo.pPatchMemGC + pPatchRec->patch.pPatchBlockOffset)); 568 568 bool ret = RTAvloU32Insert(&pVM->patm.s.PatchLookupTreeHC->PatchTree, &pPatchRec->Core); 569 569 Assert(ret); … … 734 734 && *pFixup < patmInfo.pGCStateGC + sizeof(PATMGCSTATE)) 735 735 { 736 LogFlow(("Changing absolute GCState at % VRv from %VRv to %VRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pGCStateGC) + pVM->patm.s.pGCStateGC));736 LogFlow(("Changing absolute GCState at %RRv from %RRv to %RRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pGCStateGC) + pVM->patm.s.pGCStateGC)); 737 737 *pFixup = (*pFixup - patmInfo.pGCStateGC) + pVM->patm.s.pGCStateGC; 738 738 } … … 741 741 && *pFixup < patmInfo.pCPUMCtxGC + sizeof(CPUMCTX)) 742 742 { 743 LogFlow(("Changing absolute CPUMCTX at % VRv from %VRv to %VRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pCPUMCtxGC) + pVM->patm.s.pCPUMCtxGC));743 LogFlow(("Changing absolute CPUMCTX at %RRv from %RRv to %RRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pCPUMCtxGC) + pVM->patm.s.pCPUMCtxGC)); 744 744 745 745 /* The CPUMCTX structure has completely changed, so correct the offsets too. */ … … 851 851 && *pFixup < patmInfo.pStatsGC + PATM_STAT_MEMSIZE) 852 852 { 853 LogFlow(("Changing absolute Stats at % VRv from %VRv to %VRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pStatsGC) + pVM->patm.s.pStatsGC));853 LogFlow(("Changing absolute Stats at %RRv from %RRv to %RRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pStatsGC) + pVM->patm.s.pStatsGC)); 854 854 *pFixup = (*pFixup - patmInfo.pStatsGC) + pVM->patm.s.pStatsGC; 855 855 } … … 858 858 && *pFixup < patmInfo.pGCStackGC + PATM_STACK_TOTAL_SIZE) 859 859 { 860 LogFlow(("Changing absolute Stack at % VRv from %VRv to %VRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pGCStackGC) + pVM->patm.s.pGCStackGC));860 LogFlow(("Changing absolute Stack at %RRv from %RRv to %RRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pGCStackGC) + pVM->patm.s.pGCStackGC)); 861 861 *pFixup = (*pFixup - patmInfo.pGCStackGC) + pVM->patm.s.pGCStackGC; 862 862 } … … 865 865 && *pFixup < patmInfo.pPatchMemGC + patmInfo.cbPatchMem) 866 866 { 867 LogFlow(("Changing absolute PatchMem at % VRv from %VRv to %VRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pPatchMemGC) + pVM->patm.s.pPatchMemGC));867 LogFlow(("Changing absolute PatchMem at %RRv from %RRv to %RRv\n", patmInfo.pPatchMemGC + offset, *pFixup, (*pFixup - patmInfo.pPatchMemGC) + pVM->patm.s.pPatchMemGC)); 868 868 *pFixup = (*pFixup - patmInfo.pPatchMemGC) + pVM->patm.s.pPatchMemGC; 869 869 } -
trunk/src/VBox/VMM/PATM/VMMAll/CSAMAll.cpp
r13819 r13822 115 115 #ifdef LOG_ENABLED 116 116 if (fScanned && !CSAMIsPageScanned(pVM, pPage)) 117 Log(("CSAMMarkPage % VRv\n", pPage));117 Log(("CSAMMarkPage %RRv\n", pPage)); 118 118 #endif 119 119 … … 141 141 if (!pVM->csam.s.pPDHCBitmapGC[pgdir]) 142 142 { 143 Log(("MMHyperHC2GC failed for % VRv\n", pVM->csam.s.pPDBitmapGC[pgdir]));143 Log(("MMHyperHC2GC failed for %RRv\n", pVM->csam.s.pPDBitmapGC[pgdir])); 144 144 return rc; 145 145 } -
trunk/src/VBox/VMM/PATM/VMMAll/PATMAll.cpp
r13820 r13822 60 60 register uint32_t efl = pCtxCore->eflags.u32; 61 61 CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK; 62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=% VRv eflags=%08x fPATM=%d pPATMGC=%RRv-%RRv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));63 64 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=% VRv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip));62 AssertMsg((efl & X86_EFL_IF) || PATMShouldUseRawMode(pVM, (RTRCPTR)pCtxCore->eip), ("X86_EFL_IF is clear and PATM is disabled! (eip=%RRv eflags=%08x fPATM=%d pPATMGC=%RRv-%RRv\n", pCtxCore->eip, pCtxCore->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC, pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem)); 63 64 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode, ("fPIF=%d eip=%RRv\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip)); 65 65 66 66 efl &= ~PATM_VIRTUAL_FLAGS_MASK; … … 83 83 pVM->patm.s.pfnSysEnterGC = 0; 84 84 85 Log2(("PATMRawEnter: installing sysenter patch for % VRv\n", pCtx->SysEnter.eip));85 Log2(("PATMRawEnter: installing sysenter patch for %RRv\n", pCtx->SysEnter.eip)); 86 86 pVM->patm.s.pfnSysEnterPatchGC = PATMR3QueryPatchGCPtr(pVM, pCtx->SysEnter.eip); 87 87 if (pVM->patm.s.pfnSysEnterPatchGC == 0) … … 132 132 CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = X86_EFL_IF; 133 133 134 AssertReleaseMsg((efl & X86_EFL_IF) || fPatchCode || rawRC == VINF_PATM_PENDING_IRQ_AFTER_IRET || RT_FAILURE(rawRC), ("Inconsistent state at % VRv rc=%Rrc\n", pCtxCore->eip, rawRC));135 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode || RT_FAILURE(rawRC), ("fPIF=%d eip=% VRv rc=%Rrc\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip, rawRC));134 AssertReleaseMsg((efl & X86_EFL_IF) || fPatchCode || rawRC == VINF_PATM_PENDING_IRQ_AFTER_IRET || RT_FAILURE(rawRC), ("Inconsistent state at %RRv rc=%Rrc\n", pCtxCore->eip, rawRC)); 135 AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF || fPatchCode || RT_FAILURE(rawRC), ("fPIF=%d eip=%RRv rc=%Rrc\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtxCore->eip, rawRC)); 136 136 137 137 #ifdef IN_RING3 … … 162 162 { 163 163 Assert(!PATMFindActivePatchByEntrypoint(pVM, pOrgInstrGC)); 164 Log(("Switchback from % VRv to %VRv (Psp=%x)\n", pCtxCore->eip, pOrgInstrGC, CTXSUFF(pVM->patm.s.pGCState)->Psp));164 Log(("Switchback from %RRv to %RRv (Psp=%x)\n", pCtxCore->eip, pOrgInstrGC, CTXSUFF(pVM->patm.s.pGCState)->Psp)); 165 165 STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBack); 166 166 pCtxCore->eip = pOrgInstrGC; … … 171 171 else 172 172 { 173 LogFlow(("Patch address % VRv can't be interrupted (state=%d)!\n", pCtxCore->eip, enmState));173 LogFlow(("Patch address %RRv can't be interrupted (state=%d)!\n", pCtxCore->eip, enmState)); 174 174 STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBackFail); 175 175 } … … 177 177 else 178 178 { 179 LogFlow(("Patch address % VRv can't be interrupted (fPIF=%d)!\n", pCtxCore->eip, CTXSUFF(pVM->patm.s.pGCState)->fPIF));179 LogFlow(("Patch address %RRv can't be interrupted (fPIF=%d)!\n", pCtxCore->eip, CTXSUFF(pVM->patm.s.pGCState)->fPIF)); 180 180 STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBackFail); 181 181 } … … 394 394 goto end; 395 395 396 Log2(("PATMSysCall: sysenter from % VRv to %VRv\n", pRegFrame->eip, pVM->patm.s.pfnSysEnterPatchGC));396 Log2(("PATMSysCall: sysenter from %RRv to %RRv\n", pRegFrame->eip, pVM->patm.s.pfnSysEnterPatchGC)); 397 397 /** @todo the base and limit are forced to 0 & 4G-1 resp. We assume the selector is wide open here. */ 398 398 /** @note The Intel manual suggests that the OS is responsible for this. */ … … 420 420 goto end; 421 421 422 Log2(("PATMSysCall: sysexit from % VRv to %VRv\n", pRegFrame->eip, pRegFrame->edx));422 Log2(("PATMSysCall: sysexit from %RRv to %RRv\n", pRegFrame->eip, pRegFrame->edx)); 423 423 424 424 pRegFrame->cs = ((pCtx->SysEnter.cs + 16) & ~X86_SEL_RPL) | 3; … … 459 459 PPATCHJUMPTABLE pJumpTable; 460 460 461 Log(("PATMAddBranchToLookupCache: Adding (% VRv->%VRv (%VRv)) to table %VRv\n", pBranchTarget, pRelBranchPatch + pVM->patm.s.pPatchMemGC, pRelBranchPatch, pJumpTableGC));461 Log(("PATMAddBranchToLookupCache: Adding (%RRv->%RRv (%RRv)) to table %RRv\n", pBranchTarget, pRelBranchPatch + pVM->patm.s.pPatchMemGC, pRelBranchPatch, pJumpTableGC)); 462 462 463 463 AssertReturn(PATMIsPatchGCAddr(pVM, pJumpTableGC), VERR_INVALID_PARAMETER); -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r13818 r13822 107 107 #ifdef LOG_ENABLED 108 108 if (pPatchPage) 109 Log(("PATMIsWriteToPatchPage: Found page % VRv for write to %VRv %d bytes (page low:high %VRv:%VRv\n", pPatchPage->Core.Key, GCPtr, cbWrite, pPatchPage->pLowestAddrGC, pPatchPage->pHighestAddrGC));109 Log(("PATMIsWriteToPatchPage: Found page %RRv for write to %RRv %d bytes (page low:high %RRv:%RRv\n", pPatchPage->Core.Key, GCPtr, cbWrite, pPatchPage->pLowestAddrGC, pPatchPage->pHighestAddrGC)); 110 110 #endif 111 111 … … 118 118 uint32_t cb; 119 119 120 LogFlow(("PATMHandleWriteToPatchPage: Interpret %x accessing % VRv\n", pRegFrame->eip, GCPtr));120 LogFlow(("PATMHandleWriteToPatchPage: Interpret %x accessing %RRv\n", pRegFrame->eip, GCPtr)); 121 121 int rc = EMInterpretInstruction(pVM, pRegFrame, (RTGCPTR)(RTRCUINTPTR)GCPtr, &cb); 122 122 if (rc == VINF_SUCCESS) … … 201 201 if (rc == VINF_SUCCESS) 202 202 { 203 Log(("Patch block % VRv called as function\n", pRec->patch.pPrivInstrGC));203 Log(("Patch block %RRv called as function\n", pRec->patch.pPrivInstrGC)); 204 204 pRec->patch.flags |= PATMFL_CODE_REFERENCED; 205 205 … … 418 418 419 419 case PATM_ACTION_LOG_CALL: 420 Log(("PATMGC: CALL to % VRv return addr %VRv ESP=%x iopl=%d\n", pVM->patm.s.CTXSUFF(pGCState)->GCCallPatchTargetAddr, pVM->patm.s.CTXSUFF(pGCState)->GCCallReturnAddr, pRegFrame->edx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags)));420 Log(("PATMGC: CALL to %RRv return addr %RRv ESP=%x iopl=%d\n", pVM->patm.s.CTXSUFF(pGCState)->GCCallPatchTargetAddr, pVM->patm.s.CTXSUFF(pGCState)->GCCallReturnAddr, pRegFrame->edx, X86_EFL_GET_IOPL(pVM->patm.s.CTXSUFF(pGCState)->uVMFlags))); 421 421 pRegFrame->eip += PATM_ILLEGAL_INSTR_SIZE; 422 422 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMM.cpp
r13818 r13822 1176 1176 VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args) 1177 1177 { 1178 Log2(("VMMR3CallGCV: RCPtrEntry=% VRv cArgs=%d\n", RCPtrEntry, cArgs));1178 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs)); 1179 1179 1180 1180 /* … … 1247 1247 VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM) 1248 1248 { 1249 Log(("VMMR3ResumeHyper: eip=% VRv esp=%VRv\n", CPUMGetHyperEIP(pVM), CPUMGetHyperESP(pVM)));1249 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVM), CPUMGetHyperESP(pVM))); 1250 1250 1251 1251 /* -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r13820 r13822 1577 1577 } 1578 1578 1579 LogFlow(("%s % VRv eax=%08x %08x\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar));1579 LogFlow(("%s %RRv eax=%08x %08x\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar)); 1580 1580 1581 1581 MMGCRamRegisterTrapHandler(pVM); … … 1592 1592 } 1593 1593 1594 LogFlow(("%s % VRv eax=%08x %08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar, !!(eflags & X86_EFL_ZF)));1594 LogFlow(("%s %RRv eax=%08x %08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar, !!(eflags & X86_EFL_ZF))); 1595 1595 1596 1596 /* Update guest's eflags and finish. */ … … 1639 1639 } 1640 1640 1641 LogFlow(("%s % VRv=%08x eax=%08x\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax));1641 LogFlow(("%s %RRv=%08x eax=%08x\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax)); 1642 1642 1643 1643 MMGCRamRegisterTrapHandler(pVM); … … 1710 1710 } 1711 1711 1712 LogFlow(("XAdd % VRv=%08x reg=%08x\n", pParam1, *pParamReg2));1712 LogFlow(("XAdd %RRv=%08x reg=%08x\n", pParam1, *pParamReg2)); 1713 1713 1714 1714 MMGCRamRegisterTrapHandler(pVM); -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r13821 r13822 658 658 #ifdef DEBUG 659 659 for (int j = idx; j < 0; j++) 660 Log4(("Stack % VRv pos %02d: %08x\n", &pTrapStack[j], j, pTrapStack[j]));660 Log4(("Stack %RRv pos %02d: %08x\n", &pTrapStack[j], j, pTrapStack[j])); 661 661 662 662 Log4(("eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n" … … 669 669 #endif 670 670 671 Log(("PATM Handler % VRv Adjusted stack %08X new EFLAGS=%08X idx=%d dpl=%d cpl=%d\n", pVM->trpm.s.aGuestTrapHandler[iGate], esp_r0, eflags.u32, idx, dpl, cpl));671 Log(("PATM Handler %RRv Adjusted stack %08X new EFLAGS=%08X idx=%d dpl=%d cpl=%d\n", pVM->trpm.s.aGuestTrapHandler[iGate], esp_r0, eflags.u32, idx, dpl, cpl)); 672 672 673 673 /* Make sure the internal guest context structure is up-to-date. */ -
trunk/src/VBox/VMM/VMMSwitcher.cpp
r13821 r13822 183 183 pVM->vmm.s.pvCoreCodeRC = GCPtr; 184 184 MMR3HyperReserve(pVM, PAGE_SIZE, "fence", NULL); 185 LogRel(("CoreCode: R3=%RHv R0=%RHv RC=% VRv Phys=%RHp cb=%#x\n",185 LogRel(("CoreCode: R3=%RHv R0=%RHv RC=%RRv Phys=%RHp cb=%#x\n", 186 186 pVM->vmm.s.pvCoreCodeR3, pVM->vmm.s.pvCoreCodeR0, pVM->vmm.s.pvCoreCodeRC, pVM->vmm.s.HCPhysCoreCode, pVM->vmm.s.cbCoreCode)); 187 187
Note:
See TracChangeset
for help on using the changeset viewer.