VirtualBox

Changeset 13823 in vbox for trunk/src/VBox/VMM/VMMAll


Ignore:
Timestamp:
Nov 5, 2008 1:10:20 AM (16 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
38814
Message:

VMM: %VGv -> %RGv

Location:
trunk/src/VBox/VMM/VMMAll
Files:
11 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r13822 r13823  
    103103# ifdef IN_RING0
    104104    int rc = PGMPhysSimpleReadGCPtr(pVM, pDest, pSrc, cb);
    105     AssertMsgRC(rc, ("PGMPhysSimpleReadGCPtr failed for pSrc=%VGv cb=%x\n", pSrc, cb));
     105    AssertMsgRC(rc, ("PGMPhysSimpleReadGCPtr failed for pSrc=%RGv cb=%x\n", pSrc, cb));
    106106# else /* IN_RING3 */
    107107    if (!PATMIsPatchGCAddr(pVM, pSrc))
     
    154154    if (RT_FAILURE(rc))
    155155    {
    156         Log(("EMInterpretDisasOne: Failed to convert %RTsel:%VGv (cpl=%d) - rc=%Rrc !!\n",
     156        Log(("EMInterpretDisasOne: Failed to convert %RTsel:%RGv (cpl=%d) - rc=%Rrc !!\n",
    157157             pCtxCore->cs, (RTGCPTR)pCtxCore->rip, pCtxCore->ss & X86_SEL_RPL, rc));
    158158        return rc;
     
    184184    if (RT_SUCCESS(rc))
    185185        return VINF_SUCCESS;
    186     AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%VGv rc=%Rrc\n", GCPtrInstr, rc));
     186    AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%RGv rc=%Rrc\n", GCPtrInstr, rc));
    187187    return VERR_INTERNAL_ERROR;
    188188}
     
    211211    RTGCPTR pbCode;
    212212
    213     LogFlow(("EMInterpretInstruction %RGv fault %VGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
     213    LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
    214214    int rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pRegFrame, pRegFrame->rip, 0, &pbCode);
    215215    if (RT_SUCCESS(rc))
     
    457457                if (RT_FAILURE(rc))
    458458                {
    459                     AssertMsgFailed(("MMGCRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     459                    AssertMsgFailed(("MMGCRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    460460                    return VERR_EM_INTERPRETER;
    461461                }
     
    476476                if (RT_FAILURE(rc))
    477477                {
    478                     AssertMsgFailed(("MMGCRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     478                    AssertMsgFailed(("MMGCRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    479479                }
    480480                break;
     
    510510                if (RT_FAILURE(rc))
    511511                {
    512                     AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     512                    AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    513513                    return VERR_EM_INTERPRETER;
    514514                }
     
    536536                if (RT_FAILURE(rc))
    537537                {
    538                     AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     538                    AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    539539                    return VERR_EM_INTERPRETER;
    540540                }
     
    583583                if (RT_FAILURE(rc))
    584584                {
    585                     AssertMsgFailed(("emRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     585                    AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    586586                    return VERR_EM_INTERPRETER;
    587587                }
     
    601601            if (RT_FAILURE(rc))
    602602            {
    603                 AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     603                AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    604604                return VERR_EM_INTERPRETER;
    605605            }
     
    653653            if (RT_FAILURE(rc))
    654654            {
    655                 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     655                AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    656656                return VERR_EM_INTERPRETER;
    657657            }
     
    674674                if (RT_FAILURE(rc))
    675675                {
    676                     AssertMsgFailed(("emRamWrite %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     676                    AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    677677                    return VERR_EM_INTERPRETER;
    678678                }
     
    745745                if (RT_FAILURE(rc))
    746746                {
    747                     AssertMsgFailed(("emRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     747                    AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    748748                    return VERR_EM_INTERPRETER;
    749749                }
     
    767767            }
    768768
    769             LogFlow(("emInterpretOrXorAnd %s %VGv %RX64 - %RX64 size %d (%d)\n", emGetMnemonic(pCpu), pParam1, valpar1, valpar2, param2.size, param1.size));
     769            LogFlow(("emInterpretOrXorAnd %s %RGv %RX64 - %RX64 size %d (%d)\n", emGetMnemonic(pCpu), pParam1, valpar1, valpar2, param2.size, param1.size));
    770770
    771771            /* Data read, emulate instruction. */
     
    850850
    851851    /* Try emulate it with a one-shot #PF handler in place. */
    852     Log2(("%s %VGv imm%d=%RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));
     852    Log2(("%s %RGv imm%d=%RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));
    853853
    854854    RTGCUINTREG32 eflags = 0;
     
    862862    if (RT_FAILURE(rc))
    863863    {
    864         Log(("%s %VGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));
     864        Log(("%s %RGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));
    865865        return VERR_EM_INTERPRETER;
    866866    }
     
    920920                if (RT_FAILURE(rc))
    921921                {
    922                     AssertMsgFailed(("emRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     922                    AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    923923                    return VERR_EM_INTERPRETER;
    924924                }
     
    10231023            }
    10241024
    1025             Log2(("emInterpret%s: pvFault=%VGv pParam1=%VGv val2=%x\n", emGetMnemonic(pCpu), pvFault, pParam1, valpar2));
     1025            Log2(("emInterpret%s: pvFault=%RGv pParam1=%RGv val2=%x\n", emGetMnemonic(pCpu), pvFault, pParam1, valpar2));
    10261026            pParam1 = (RTGCPTR)((RTGCUINTPTR)pParam1 + valpar2/8);
    10271027            EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)pParam1 & ~3) == pvFault, VERR_EM_INTERPRETER);
     
    10291029            if (RT_FAILURE(rc))
    10301030            {
    1031                 AssertMsgFailed(("emRamRead %VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
     1031                AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));
    10321032                return VERR_EM_INTERPRETER;
    10331033            }
     
    11021102#endif
    11031103
    1104     Log2(("emInterpretLockBitTest %s: pvFault=%VGv GCPtrPar1=%VGv imm=%RX64\n", emGetMnemonic(pCpu), pvFault, GCPtrPar1, ValPar2));
     1104    Log2(("emInterpretLockBitTest %s: pvFault=%RGv GCPtrPar1=%RGv imm=%RX64\n", emGetMnemonic(pCpu), pvFault, GCPtrPar1, ValPar2));
    11051105
    11061106#ifdef IN_GC
     
    11201120    if (RT_FAILURE(rc))
    11211121    {
    1122         Log(("emInterpretLockBitTest %s: %VGv imm%d=%RX64 -> emulation failed due to page fault!\n",
     1122        Log(("emInterpretLockBitTest %s: %RGv imm%d=%RX64 -> emulation failed due to page fault!\n",
    11231123             emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));
    11241124        return VERR_EM_INTERPRETER;
    11251125    }
    11261126
    1127     Log2(("emInterpretLockBitTest %s: GCPtrPar1=%VGv imm=%VX64 CF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, ValPar2, !!(eflags & X86_EFL_CF)));
     1127    Log2(("emInterpretLockBitTest %s: GCPtrPar1=%RGv imm=%VX64 CF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, ValPar2, !!(eflags & X86_EFL_CF)));
    11281128
    11291129    /* Update guest's eflags and finish. */
     
    11921192#ifdef LOG_ENABLED
    11931193            if (pCpu->mode == CPUMODE_64BIT)
    1194                 LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %VGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64));
     1194                LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %RGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64));
    11951195            else
    1196                 LogFlow(("EMInterpretInstruction at %08RX64: OP_MOV %VGv <- %08X  (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64));
     1196                LogFlow(("EMInterpretInstruction at %08RX64: OP_MOV %RGv <- %08X  (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64));
    11971197#endif
    11981198
     
    12551255#ifdef LOG_ENABLED
    12561256            if (pCpu->mode == CPUMODE_64BIT)
    1257                 LogFlow(("EMInterpretInstruction: OP_MOV %VGv -> %RX64 (%d)\n", pSrc, val64, param1.size));
     1257                LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %RX64 (%d)\n", pSrc, val64, param1.size));
    12581258            else
    1259                 LogFlow(("EMInterpretInstruction: OP_MOV %VGv -> %08X (%d)\n", pSrc, (uint32_t)val64, param1.size));
     1259                LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %08X (%d)\n", pSrc, (uint32_t)val64, param1.size));
    12601260#endif
    12611261        }
     
    13241324    if (!(pCpu->prefix & PREFIX_REP))
    13251325    {
    1326         LogFlow(("emInterpretStosWD dest=%04X:%VGv (%VGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize));
     1326        LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize));
    13271327
    13281328        rc = PGMPhysWriteGCPtr(pVM, GCDest, &pRegFrame->rax, cbSize);
     
    13541354            return VINF_SUCCESS;
    13551355
    1356         LogFlow(("emInterpretStosWD dest=%04X:%VGv (%VGv) cbSize=%d cTransfers=%x DF=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize, cTransfers, pRegFrame->eflags.Bits.u1DF));
     1356        LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d cTransfers=%x DF=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize, cTransfers, pRegFrame->eflags.Bits.u1DF));
    13571357
    13581358        /* Access verification first; we currently can't recover properly from traps inside this instruction */
     
    14571457    }
    14581458
    1459     LogFlow(("%s %VGv rax=%RX64 %RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar));
     1459    LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar));
    14601460
    14611461    if (pCpu->prefix & PREFIX_LOCK)
     
    14641464        eflags = EMEmulateCmpXchg(pvParam1, &pRegFrame->rax, valpar, pCpu->param2.size);
    14651465
    1466     LogFlow(("%s %VGv rax=%RX64 %RX64 ZF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar, !!(eflags & X86_EFL_ZF)));
     1466    LogFlow(("%s %RGv rax=%RX64 %RX64 ZF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar, !!(eflags & X86_EFL_ZF)));
    14671467
    14681468    /* Update guest's eflags and finish. */
     
    15111511    }
    15121512
    1513     LogFlow(("%s %VGv=%08x eax=%08x\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax));
     1513    LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax));
    15141514
    15151515    if (pCpu->prefix & PREFIX_LOCK)
     
    15181518        eflags = EMEmulateCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx);
    15191519
    1520     LogFlow(("%s %VGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));
     1520    LogFlow(("%s %RGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));
    15211521
    15221522    /* Update guest's eflags and finish; note that *only* ZF is affected. */
     
    15881588            if (RT_FAILURE(rc))
    15891589            {
    1590                 Log(("%s %VGv eax=%08x %08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar));
     1590                Log(("%s %RGv eax=%08x %08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar));
    15911591                return VERR_EM_INTERPRETER;
    15921592            }
     
    16501650            if (RT_FAILURE(rc))
    16511651            {
    1652                 Log(("%s %VGv=%08x eax=%08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax));
     1652                Log(("%s %RGv=%08x eax=%08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax));
    16531653                return VERR_EM_INTERPRETER;
    16541654            }
    16551655
    1656             LogFlow(("%s %VGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));
     1656            LogFlow(("%s %RGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));
    16571657
    16581658            /* Update guest's eflags and finish; note that *only* ZF is affected. */
     
    17211721            if (RT_FAILURE(rc))
    17221722            {
    1723                 Log(("XAdd %VGv reg=%08x -> emulation failed due to page fault!\n", pParam1, *pParamReg2));
     1723                Log(("XAdd %RGv reg=%08x -> emulation failed due to page fault!\n", pParam1, *pParamReg2));
    17241724                return VERR_EM_INTERPRETER;
    17251725            }
    17261726
    1727             LogFlow(("XAdd %VGv reg=%08x ZF=%d\n", pParam1, *pParamReg2, !!(eflags & X86_EFL_ZF)));
     1727            LogFlow(("XAdd %RGv reg=%08x ZF=%d\n", pParam1, *pParamReg2, !!(eflags & X86_EFL_ZF)));
    17281728
    17291729            /* Update guest's eflags and finish. */
  • trunk/src/VBox/VMM/VMMAll/IOMAll.cpp

    r13818 r13823  
    750750        if (rc != VINF_SUCCESS)
    751751        {
    752             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%VGv %Rrc\n",
     752            Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv %Rrc\n",
    753753                 Port, cb, GCPtrTss, rc));
    754754            return rc;
     
    769769        if (rc != VINF_SUCCESS)
    770770        {
    771             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%VGv offTss=%#x -> %Rrc\n",
     771            Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv offTss=%#x -> %Rrc\n",
    772772                 Port, cb, GCPtrTss, offTss, rc));
    773773            return rc;
  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r13820 r13823  
    10181018{
    10191019    STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a);
    1020     Log(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%VGv rip=%RGv\n",
     1020    Log(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
    10211021         GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
    10221022
  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r13821 r13823  
    360360VMMDECL(int)     PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
    361361{
    362     LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%VGv eip=%VGv\n", uErr, pvFault, (RTGCPTR)pRegFrame->rip));
     362    LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%RGv eip=%RGv\n", uErr, pvFault, (RTGCPTR)pRegFrame->rip));
    363363    STAM_PROFILE_START(&pVM->pgm.s.StatRZTrap0e, a);
    364364    STAM_STATS({ pVM->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = NULL; } );
     
    493493    if (RT_FAILURE(rc))
    494494    {
    495         Log(("PGMIsValidAccess: access violation for %VGv rc=%d\n", Addr, rc));
     495        Log(("PGMIsValidAccess: access violation for %RGv rc=%d\n", Addr, rc));
    496496        return VINF_EM_RAW_GUEST_TRAP;
    497497    }
     
    509509        || (fUser  && !(fPage & X86_PTE_US)) )
    510510    {
    511         Log(("PGMIsValidAccess: access violation for %VGv attr %#llx vs %d:%d\n", Addr, fPage, fWrite, fUser));
     511        Log(("PGMIsValidAccess: access violation for %RGv attr %#llx vs %d:%d\n", Addr, fPage, fWrite, fUser));
    512512        return VINF_EM_RAW_GUEST_TRAP;
    513513    }
     
    541541    if (RT_FAILURE(rc))
    542542    {
    543         Log(("PGMVerifyAccess: access violation for %VGv rc=%d\n", Addr, rc));
     543        Log(("PGMVerifyAccess: access violation for %RGv rc=%d\n", Addr, rc));
    544544        return VINF_EM_RAW_GUEST_TRAP;
    545545    }
     
    557557        || (fUser   && !(fPageGst & X86_PTE_US)) )
    558558    {
    559         Log(("PGMVerifyAccess: access violation for %VGv attr %#llx vs %d:%d\n", Addr, fPageGst, fWrite, fUser));
     559        Log(("PGMVerifyAccess: access violation for %RGv attr %#llx vs %d:%d\n", Addr, fPageGst, fWrite, fUser));
    560560        return VINF_EM_RAW_GUEST_TRAP;
    561561    }
     
    581581        }
    582582        else
    583             AssertMsg(rc == VINF_SUCCESS, ("PGMShwGetPage %VGv failed with %Rrc\n", Addr, rc));
     583            AssertMsg(rc == VINF_SUCCESS, ("PGMShwGetPage %RGv failed with %Rrc\n", Addr, rc));
    584584    }
    585585
     
    595595        || (fUser  && !(fPageShw & X86_PTE_US)) )
    596596    {
    597         AssertMsgFailed(("Unexpected access violation for %VGv! rc=%Rrc write=%d user=%d\n",
     597        AssertMsgFailed(("Unexpected access violation for %RGv! rc=%Rrc write=%d user=%d\n",
    598598                         Addr, rc, fWrite && !(fPageShw & X86_PTE_RW), fUser && !(fPageShw & X86_PTE_US)));
    599599        return VINF_EM_RAW_GUEST_TRAP;
     
    643643{
    644644    int rc;
    645     Log3(("PGMInvalidatePage: GCPtrPage=%VGv\n", GCPtrPage));
     645    Log3(("PGMInvalidatePage: GCPtrPage=%RGv\n", GCPtrPage));
    646646
    647647#ifndef IN_RING3
     
    727727        rc = VINF_EM_RAW_EMULATE_INSTR;
    728728    if (rc != VINF_SUCCESS)
    729         Log(("PGMInterpretInstruction: returns %Rrc (pvFault=%VGv)\n", rc, pvFault));
     729        Log(("PGMInterpretInstruction: returns %Rrc (pvFault=%RGv)\n", rc, pvFault));
    730730    return rc;
    731731}
     
    12011201    Assert(cb);
    12021202
    1203     LogFlow(("PGMGstModifyPage %VGv %d bytes fFlags=%08llx fMask=%08llx\n", GCPtr, cb, fFlags, fMask));
     1203    LogFlow(("PGMGstModifyPage %RGv %d bytes fFlags=%08llx fMask=%08llx\n", GCPtr, cb, fFlags, fMask));
    12041204
    12051205    /*
     
    20102010            if (rc != VERR_PAGE_TABLE_NOT_PRESENT)
    20112011            {
    2012                 AssertMsgFailed(("Conflict at %VGv with %s\n", GCPtr, R3STRING(pMapping->pszDesc)));
     2012                AssertMsgFailed(("Conflict at %RGv with %s\n", GCPtr, R3STRING(pMapping->pszDesc)));
    20132013                cErrors++;
    20142014                break;
  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r13820 r13823  
    281281                        {
    282282                            STAM_COUNTER_INC(&pVM->pgm.s.StatRZTrap0eConflicts);
    283                             Log(("Trap0e: Detected Conflict %VGv-%VGv\n", pMapping->GCPtr, pMapping->GCPtrLast));
     283                            Log(("Trap0e: Detected Conflict %RGv-%RGv\n", pMapping->GCPtr, pMapping->GCPtrLast));
    284284                            VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); /** @todo no need to do global sync,right? */
    285285                            STAM_PROFILE_STOP(&pVM->pgm.s.StatRZTrap0eTimeMapping, a);
     
    471471                                           || !(uErr & X86_TRAP_PF_P)
    472472                                           || (pCur->enmType == PGMVIRTHANDLERTYPE_WRITE && (uErr & X86_TRAP_PF_RW))),
    473                                       ("Unexpected trap for virtual handler: %VGv (phys=%VGp) HCPhys=%HGp uErr=%X, enum=%d\n", pvFault, GCPhys, pPage->HCPhys, uErr, pCur->enmType));
     473                                      ("Unexpected trap for virtual handler: %RGv (phys=%VGp) HCPhys=%HGp uErr=%X, enum=%d\n", pvFault, GCPhys, pPage->HCPhys, uErr, pCur->enmType));
    474474
    475475                            if (    (RTGCUINTPTR)pvFault - (RTGCUINTPTR)pCur->Core.Key < pCur->cb
     
    637637                uint64_t   fPageGst;
    638638                PGMGstGetPage(pVM, pvFault, &fPageGst, &GCPhys);
    639                 Log(("Page out of sync: %VGv eip=%08x PdeSrc.n.u1User=%d fPageGst=%08llx GCPhys=%VGp scan=%d\n",
     639                Log(("Page out of sync: %RGv eip=%08x PdeSrc.n.u1User=%d fPageGst=%08llx GCPhys=%VGp scan=%d\n",
    640640                     pvFault, pRegFrame->eip, PdeSrc.n.u1User, fPageGst, GCPhys, CSAMDoesPageNeedScanning(pVM, (RTRCPTR)pRegFrame->eip)));
    641641#   endif /* LOG_ENABLED */
     
    712712                         */
    713713                        /** @todo not correct for pages that contain both code and data!! */
    714                         Log2(("CSAMMarkPage %VGv; scanned=%d\n", pvFault, true));
     714                        Log2(("CSAMMarkPage %RGv; scanned=%d\n", pvFault, true));
    715715                        CSAMMarkPage(pVM, (RTRCPTR)pvFault, true);
    716716                    }
     
    755755                        rc = PGMGstGetPage(pVM, pvFault, &fPageGst, &GCPhys);
    756756                        Assert(RT_SUCCESS(rc) && fPageGst & X86_PTE_RW);
    757                         LogFlow(("Obsolete physical monitor page out of sync %VGv - phys %VGp flags=%08llx\n", pvFault, GCPhys, (uint64_t)fPageGst));
     757                        LogFlow(("Obsolete physical monitor page out of sync %RGv - phys %VGp flags=%08llx\n", pvFault, GCPhys, (uint64_t)fPageGst));
    758758
    759759                        uint64_t fPageShw;
     
    808808                         */
    809809                        AssertMsg((fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)) == (fPageGst & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)),
    810                                   ("Page flags mismatch! pvFault=%VGv GCPhys=%VGp fPageShw=%08llx fPageGst=%08llx\n", pvFault, GCPhys, fPageShw, fPageGst));
     810                                  ("Page flags mismatch! pvFault=%RGv GCPhys=%VGp fPageShw=%08llx fPageGst=%08llx\n", pvFault, GCPhys, fPageShw, fPageGst));
    811811                    }
    812812                    else
     
    886886    int             rc;
    887887
    888     LogFlow(("InvalidatePage %VGv\n", GCPtrPage));
     888    LogFlow(("InvalidatePage %RGv\n", GCPtrPage));
    889889    /*
    890890     * Get the shadow PD entry and skip out if this PD isn't present.
     
    10191019        ||  pShwPdpt->GCPhys != GCPhysPdpt)
    10201020    {
    1021         LogFlow(("InvalidatePage: Out-of-sync PML4E (P/GCPhys) at %VGv GCPhys=%VGp vs %VGp Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
     1021        LogFlow(("InvalidatePage: Out-of-sync PML4E (P/GCPhys) at %RGv GCPhys=%VGp vs %VGp Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
    10221022                 GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
    10231023        pgmPoolFreeByPage(pPool, pShwPdpt, pVM->pgm.s.pHCShwAmd64CR3->idx, iPml4e);
     
    10331033         * Mark not present so we can resync the PML4E when it's used.
    10341034         */
    1035         LogFlow(("InvalidatePage: Out-of-sync PML4E at %VGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
     1035        LogFlow(("InvalidatePage: Out-of-sync PML4E at %RGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
    10361036                 GCPtrPage, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
    10371037        pgmPoolFreeByPage(pPool, pShwPdpt, pVM->pgm.s.pHCShwAmd64CR3->idx, iPml4e);
     
    10451045         * Mark not present so we can set the accessed bit.
    10461046         */
    1047         LogFlow(("InvalidatePage: Out-of-sync PML4E (A) at %VGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
     1047        LogFlow(("InvalidatePage: Out-of-sync PML4E (A) at %RGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
    10481048                 GCPtrPage, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
    10491049        pgmPoolFreeByPage(pPool, pShwPdpt, pVM->pgm.s.pHCShwAmd64CR3->idx, iPml4e);
     
    10591059        ||  pShwPde->GCPhys != GCPhysPd)
    10601060    {
    1061         LogFlow(("InvalidatePage: Out-of-sync PDPE (P/GCPhys) at %VGv GCPhys=%VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
     1061        LogFlow(("InvalidatePage: Out-of-sync PDPE (P/GCPhys) at %RGv GCPhys=%VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
    10621062                    GCPtrPage, pShwPde->GCPhys, GCPhysPd, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
    10631063        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpte);
     
    10731073         * Mark not present so we can resync the PDPTE when it's used.
    10741074         */
    1075         LogFlow(("InvalidatePage: Out-of-sync PDPE at %VGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
     1075        LogFlow(("InvalidatePage: Out-of-sync PDPE at %RGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
    10761076                 GCPtrPage, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
    10771077        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpte);
     
    10851085         * Mark not present so we can set the accessed bit.
    10861086         */
    1087         LogFlow(("InvalidatePage: Out-of-sync PDPE (A) at %VGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
     1087        LogFlow(("InvalidatePage: Out-of-sync PDPE (A) at %RGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
    10881088                 GCPtrPage, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
    10891089        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpte);
     
    12421242                         || (PdeDst.u & PGM_PDFLAGS_TRACK_DIRTY)))
    12431243                {
    1244                     LogFlow(("Skipping flush for big page containing %VGv (PD=%X .u=%VX64)-> nothing has changed!\n", GCPtrPage, iPDSrc, PdeSrc.u));
     1244                    LogFlow(("Skipping flush for big page containing %RGv (PD=%X .u=%VX64)-> nothing has changed!\n", GCPtrPage, iPDSrc, PdeSrc.u));
    12451245                    STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,InvalidatePage4MBPagesSkip));
    12461246                    return VINF_SUCCESS;
     
    15611561PGM_BTH_DECL(int, SyncPage)(PVM pVM, GSTPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uErr)
    15621562{
    1563     LogFlow(("SyncPage: GCPtrPage=%VGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr));
     1563    LogFlow(("SyncPage: GCPtrPage=%RGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr));
    15641564
    15651565#if    (   PGM_GST_TYPE == PGM_TYPE_32BIT  \
     
    17081708#endif /* else: CSAM not active */
    17091709                                    PGM_BTH_NAME(SyncPageWorker)(pVM, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    1710                                 Log2(("SyncPage: 4K+ %VGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n",
     1710                                Log2(("SyncPage: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n",
    17111711                                      GCPtrCurPage, PteSrc.n.u1Present,
    17121712                                      PteSrc.n.u1Write & PdeSrc.n.u1Write,
     
    17251725                        const unsigned iPTDst = (GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK;
    17261726                        PGM_BTH_NAME(SyncPageWorker)(pVM, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    1727                         Log2(("SyncPage: 4K  %VGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s\n",
     1727                        Log2(("SyncPage: 4K  %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s\n",
    17281728                              GCPtrPage, PteSrc.n.u1Present,
    17291729                              PteSrc.n.u1Write & PdeSrc.n.u1Write,
     
    18031803                    pPDDst->a[iPDDst] = PdeDst;
    18041804#  endif
    1805                     Log2(("SyncPage: BIG %VGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx} GCPhys=%VGp%s\n",
     1805                    Log2(("SyncPage: BIG %RGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx} GCPhys=%VGp%s\n",
    18061806                          GCPtrPage, PdeSrc.n.u1Present, PdeSrc.n.u1Write, PdeSrc.n.u1User, (uint64_t)PdeSrc.u, GCPhys,
    18071807                          PdeDst.u & PGM_PDFLAGS_TRACK_DIRTY ? " Track-Dirty" : ""));
     
    19191919                PGM_BTH_NAME(SyncPageWorker)(pVM, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    19201920
    1921                 Log2(("SyncPage: 4K+ %VGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n",
     1921                Log2(("SyncPage: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n",
    19221922                      GCPtrCurPage, PteSrc.n.u1Present,
    19231923                      PteSrc.n.u1Write & PdeSrc.n.u1Write,
     
    19281928            }
    19291929            else
    1930                 Log4(("%VGv iPTDst=%x pPTDst->a[iPTDst] %RX64\n", ((RTGCUINTPTR)GCPtrPage & ~(RTGCUINTPTR)(SHW_PT_MASK << SHW_PT_SHIFT)) | (iPTDst << PAGE_SHIFT), iPTDst, pPTDst->a[iPTDst].u));
     1930                Log4(("%RGv iPTDst=%x pPTDst->a[iPTDst] %RX64\n", ((RTGCUINTPTR)GCPtrPage & ~(RTGCUINTPTR)(SHW_PT_MASK << SHW_PT_SHIFT)) | (iPTDst << PAGE_SHIFT), iPTDst, pPTDst->a[iPTDst].u));
    19311931        }
    19321932    }
     
    19471947        PGM_BTH_NAME(SyncPageWorker)(pVM, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    19481948
    1949         Log2(("SyncPage: 4K  %VGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}PteDst=%08llx%s\n",
     1949        Log2(("SyncPage: 4K  %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}PteDst=%08llx%s\n",
    19501950              GCPtrPage, PteSrc.n.u1Present,
    19511951              PteSrc.n.u1Write & PdeSrc.n.u1Write,
     
    19931993
    19941994    STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a);
    1995     LogFlow(("CheckPageFault: GCPtrPage=%VGv uErr=%#x PdeSrc=%08x\n", GCPtrPage, uErr, pPdeSrc->u));
     1995    LogFlow(("CheckPageFault: GCPtrPage=%RGv uErr=%#x PdeSrc=%08x\n", GCPtrPage, uErr, pPdeSrc->u));
    19961996
    19971997# if    PGM_GST_TYPE == PGM_TYPE_PAE \
     
    21182118            STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyTrackRealPF));
    21192119            STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a);
    2120             LogFlow(("CheckPageFault: real page fault at %VGv PteSrc.u=%08x (2)\n", GCPtrPage, PteSrc.u));
     2120            LogFlow(("CheckPageFault: real page fault at %RGv PteSrc.u=%08x (2)\n", GCPtrPage, PteSrc.u));
    21212121
    21222122            /* Check the present bit as the shadow tables can cause different error codes by being out of sync.
     
    21292129            return VINF_EM_RAW_GUEST_TRAP;
    21302130        }
    2131         LogFlow(("CheckPageFault: page fault at %VGv PteSrc.u=%08x\n", GCPtrPage, PteSrc.u));
     2131        LogFlow(("CheckPageFault: page fault at %RGv PteSrc.u=%08x\n", GCPtrPage, PteSrc.u));
    21322132
    21332133        /*
     
    21642164                if (MMHyperIsInsideArea(pVM, (RTGCPTR)GCPtrPage))
    21652165                {
    2166                     LogRel(("CheckPageFault: write to hypervisor region %VGv\n", GCPtrPage));
     2166                    LogRel(("CheckPageFault: write to hypervisor region %RGv\n", GCPtrPage));
    21672167                    STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a);
    21682168                    return VINF_SUCCESS;
     
    21802180                        &&  (pPteDst->u & PGM_PTFLAGS_TRACK_DIRTY))
    21812181                    {
    2182                         LogFlow(("DIRTY page trap addr=%VGv\n", GCPtrPage));
     2182                        LogFlow(("DIRTY page trap addr=%RGv\n", GCPtrPage));
    21832183#  ifdef VBOX_STRICT
    21842184                        PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, pPteSrc->u & GST_PTE_PG_MASK);
    21852185                        if (pPage)
    21862186                            AssertMsg(!PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage),
    2187                                       ("Unexpected dirty bit tracking on monitored page %VGv (phys %VGp)!!!!!!\n", GCPtrPage, pPteSrc->u & X86_PTE_PAE_PG_MASK));
     2187                                      ("Unexpected dirty bit tracking on monitored page %RGv (phys %VGp)!!!!!!\n", GCPtrPage, pPteSrc->u & X86_PTE_PAE_PG_MASK));
    21882188#  endif
    21892189                        STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyPageTrap));
     
    22192219            if (    pPteDst->n.u1Present
    22202220                &&  pPteDst->n.u1Write)
    2221                 LogFlow(("Writable present page %VGv not marked for dirty bit tracking!!!\n", GCPtrPage));
     2221                LogFlow(("Writable present page %RGv not marked for dirty bit tracking!!!\n", GCPtrPage));
    22222222        }
    22232223#  endif /* VBOX_STRICT */
     
    22372237    STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyTrackRealPF));
    22382238    STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a);
    2239     Log(("CheckPageFault: real page fault at %VGv (%d)\n", GCPtrPage, uPageFaultLevel));
     2239    Log(("CheckPageFault: real page fault at %RGv (%d)\n", GCPtrPage, uPageFaultLevel));
    22402240
    22412241    if (
     
    22922292    STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,SyncPT), a);
    22932293    STAM_COUNTER_INC(&pVM->pgm.s.StatSyncPtPD[iPDSrc]);
    2294     LogFlow(("SyncPT: GCPtrPage=%VGv\n", GCPtrPage));
     2294    LogFlow(("SyncPT: GCPtrPage=%RGv\n", GCPtrPage));
    22952295
    22962296#if   (   PGM_GST_TYPE == PGM_TYPE_32BIT  \
     
    23052305     * Validate input a little bit.
    23062306     */
    2307     AssertMsg(iPDSrc == ((GCPtrPage >> GST_PD_SHIFT) & GST_PD_MASK), ("iPDSrc=%x GCPtrPage=%VGv\n", iPDSrc, GCPtrPage));
     2307    AssertMsg(iPDSrc == ((GCPtrPage >> GST_PD_SHIFT) & GST_PD_MASK), ("iPDSrc=%x GCPtrPage=%RGv\n", iPDSrc, GCPtrPage));
    23082308# if PGM_SHW_TYPE == PGM_TYPE_32BIT
    23092309    const unsigned  iPDDst   = GCPtrPage >> SHW_PD_SHIFT;
     
    23432343        Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s));
    23442344#  ifndef IN_RING3
    2345         Log(("SyncPT: Conflict at %VGv\n", GCPtrPage));
     2345        Log(("SyncPT: Conflict at %RGv\n", GCPtrPage));
    23462346        STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,SyncPT), a);
    23472347        return VERR_ADDRESS_CONFLICT;
     
    24582458             * Sync all or just a few entries depending on PGM_SYNC_N_PAGES.
    24592459             */
    2460             Log2(("SyncPT:   4K  %VGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx}\n",
     2460            Log2(("SyncPT:   4K  %RGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx}\n",
    24612461                  GCPtrPage, PdeSrc.b.u1Present, PdeSrc.b.u1Write, PdeSrc.b.u1User, (uint64_t)PdeSrc.u));
    24622462            PGSTPT pPTSrc;
     
    25242524# endif
    25252525                            PGM_BTH_NAME(SyncPageWorker)(pVM, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    2526                         Log2(("SyncPT:   4K+ %VGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s dst.raw=%08llx iPTSrc=%x PdeSrc.u=%x physpte=%VGp\n",
     2526                        Log2(("SyncPT:   4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s dst.raw=%08llx iPTSrc=%x PdeSrc.u=%x physpte=%VGp\n",
    25272527                              (RTGCPTR)((iPDSrc << GST_PD_SHIFT) | (iPTSrc << PAGE_SHIFT)),
    25282528                              PteSrc.n.u1Present,
     
    25832583            /* Loop thru the entries in the shadow PT. */
    25842584            const RTGCUINTPTR GCPtr  = (GCPtrPage >> SHW_PD_SHIFT) << SHW_PD_SHIFT; NOREF(GCPtr);
    2585             Log2(("SyncPT:   BIG %VGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx} Shw=%VGv GCPhys=%VGp %s\n",
     2585            Log2(("SyncPT:   BIG %RGv PdeSrc:{P=%d RW=%d U=%d raw=%08llx} Shw=%RGv GCPhys=%VGp %s\n",
    25862586                  GCPtrPage, PdeSrc.b.u1Present, PdeSrc.b.u1Write, PdeSrc.b.u1User, (uint64_t)PdeSrc.u, GCPtr,
    25872587                  GCPhys, PdeDst.u & PGM_PDFLAGS_TRACK_DIRTY ? " Track-Dirty" : ""));
     
    26452645                        /* commit it */
    26462646                        pPTDst->a[iPTDst] = PteDst;
    2647                         Log4(("SyncPT: BIG %VGv PteDst:{P=%d RW=%d U=%d raw=%08llx}%s\n",
     2647                        Log4(("SyncPT: BIG %RGv PteDst:{P=%d RW=%d U=%d raw=%08llx}%s\n",
    26482648                              (RTGCPTR)(GCPtr | (iPTDst << SHW_PT_SHIFT)), PteDst.n.u1Present, PteDst.n.u1Write, PteDst.n.u1User, (uint64_t)PteDst.u,
    26492649                              PteDst.u & PGM_PTFLAGS_TRACK_DIRTY ? " Track-Dirty" : ""));
     
    29052905PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fPage, unsigned uErr)
    29062906{
    2907     LogFlow(("VerifyAccessSyncPage: GCPtrPage=%VGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr));
     2907    LogFlow(("VerifyAccessSyncPage: GCPtrPage=%RGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr));
    29082908
    29092909    Assert(!HWACCMIsNestedPagingActive(pVM));
     
    29182918         */
    29192919        /** @todo not correct for pages that contain both code and data!! */
    2920         Log(("CSAMMarkPage %VGv; scanned=%d\n", GCPtrPage, true));
     2920        Log(("CSAMMarkPage %RGv; scanned=%d\n", GCPtrPage, true));
    29212921        CSAMMarkPage(pVM, (RTRCPTR)GCPtrPage, true);
    29222922    }
     
    29362936    if (pPDSrc)
    29372937    {
    2938         Log(("PGMVerifyAccess: access violation for %VGv due to non-present PDPTR\n", GCPtrPage));
     2938        Log(("PGMVerifyAccess: access violation for %RGv due to non-present PDPTR\n", GCPtrPage));
    29392939        return VINF_EM_RAW_GUEST_TRAP;
    29402940    }
     
    29462946    if (!pPDSrc)
    29472947    {
    2948         Log(("PGMVerifyAccess: access violation for %VGv due to non-present PDPTR\n", GCPtrPage));
     2948        Log(("PGMVerifyAccess: access violation for %RGv due to non-present PDPTR\n", GCPtrPage));
    29492949        return VINF_EM_RAW_GUEST_TRAP;
    29502950    }
     
    30293029        else
    30303030        {
    3031             Log(("PGMVerifyAccess: access violation for %VGv rc=%d\n", GCPtrPage, rc));
     3031            Log(("PGMVerifyAccess: access violation for %RGv rc=%d\n", GCPtrPage, rc));
    30323032            return VINF_EM_RAW_GUEST_TRAP;
    30333033        }
     
    38693869                    if (!pPoolPage)
    38703870                    {
    3871                         AssertMsgFailed(("Invalid page table address %VHp at %VGv! PdeDst=%#RX64\n",
     3871                        AssertMsgFailed(("Invalid page table address %VHp at %RGv! PdeDst=%#RX64\n",
    38723872                                        HCPhysShw, GCPtr, (uint64_t)PdeDst.u));
    38733873                        cErrors++;
     
    38783878                    if (PdeDst.u & (X86_PDE4M_PWT | X86_PDE4M_PCD))
    38793879                    {
    3880                         AssertMsgFailed(("PDE flags PWT and/or PCD is set at %VGv! These flags are not virtualized! PdeDst=%#RX64\n",
     3880                        AssertMsgFailed(("PDE flags PWT and/or PCD is set at %RGv! These flags are not virtualized! PdeDst=%#RX64\n",
    38813881                                        GCPtr, (uint64_t)PdeDst.u));
    38823882                        cErrors++;
     
    38853885                    if (PdeDst.u & (X86_PDE4M_G | X86_PDE4M_D))
    38863886                    {
    3887                         AssertMsgFailed(("4K PDE reserved flags at %VGv! PdeDst=%#RX64\n",
     3887                        AssertMsgFailed(("4K PDE reserved flags at %RGv! PdeDst=%#RX64\n",
    38883888                                        GCPtr, (uint64_t)PdeDst.u));
    38893889                        cErrors++;
     
    38933893                    if (!PdeSrc.n.u1Present)
    38943894                    {
    3895                         AssertMsgFailed(("Guest PDE at %VGv is not present! PdeDst=%#RX64 PdeSrc=%#RX64\n",
     3895                        AssertMsgFailed(("Guest PDE at %RGv is not present! PdeDst=%#RX64 PdeSrc=%#RX64\n",
    38963896                                        GCPtr, (uint64_t)PdeDst.u, (uint64_t)PdeSrc.u));
    38973897                        cErrors++;
     
    39123912                        if (PdeSrc.u & X86_PDE4M_PG_HIGH_MASK)
    39133913                        {
    3914                             AssertMsgFailed(("Guest PDE at %VGv is using PSE36 or similar! PdeSrc=%#RX64\n",
     3914                            AssertMsgFailed(("Guest PDE at %RGv is using PSE36 or similar! PdeSrc=%#RX64\n",
    39153915                                            GCPtr, (uint64_t)PdeSrc.u));
    39163916                            cErrors++;
     
    39273927                        !=  (!PdeSrc.b.u1Size || !fBigPagesSupported ? BTH_PGMPOOLKIND_PT_FOR_PT : BTH_PGMPOOLKIND_PT_FOR_BIG))
    39283928                    {
    3929                         AssertMsgFailed(("Invalid shadow page table kind %d at %VGv! PdeSrc=%#RX64\n",
     3929                        AssertMsgFailed(("Invalid shadow page table kind %d at %RGv! PdeSrc=%#RX64\n",
    39303930                                        pPoolPage->enmKind, GCPtr, (uint64_t)PdeSrc.u));
    39313931                        cErrors++;
     
    39353935                    if (!pPhysPage)
    39363936                    {
    3937                         AssertMsgFailed(("Cannot find guest physical address %VGp in the PDE at %VGv! PdeSrc=%#RX64\n",
     3937                        AssertMsgFailed(("Cannot find guest physical address %VGp in the PDE at %RGv! PdeSrc=%#RX64\n",
    39383938                                        GCPhysGst, GCPtr, (uint64_t)PdeSrc.u));
    39393939                        cErrors++;
     
    39433943                    if (GCPhysGst != pPoolPage->GCPhys)
    39443944                    {
    3945                         AssertMsgFailed(("GCPhysGst=%VGp != pPage->GCPhys=%VGp at %VGv\n",
     3945                        AssertMsgFailed(("GCPhysGst=%VGp != pPage->GCPhys=%VGp at %RGv\n",
    39463946                                        GCPhysGst, pPoolPage->GCPhys, GCPtr));
    39473947                        cErrors++;
     
    39593959                        if (RT_FAILURE(rc))
    39603960                        {
    3961                             AssertMsgFailed(("Cannot map/convert guest physical address %VGp in the PDE at %VGv! PdeSrc=%#RX64\n",
     3961                            AssertMsgFailed(("Cannot map/convert guest physical address %VGp in the PDE at %RGv! PdeSrc=%#RX64\n",
    39623962                                            GCPhysGst, GCPtr, (uint64_t)PdeSrc.u));
    39633963                            cErrors++;
     
    39693969                            /// @todo We get here a lot on out-of-sync CR3 entries. The access handler should zap them to avoid false alarms here!
    39703970                            // (This problem will go away when/if we shadow multiple CR3s.)
    3971                             AssertMsgFailed(("4K PDE flags mismatch at %VGv! PdeSrc=%#RX64 PdeDst=%#RX64\n",
     3971                            AssertMsgFailed(("4K PDE flags mismatch at %RGv! PdeSrc=%#RX64 PdeDst=%#RX64\n",
    39723972                                            GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    39733973                            cErrors++;
     
    39763976                        if (PdeDst.u & PGM_PDFLAGS_TRACK_DIRTY)
    39773977                        {
    3978                             AssertMsgFailed(("4K PDEs cannot have PGM_PDFLAGS_TRACK_DIRTY set! GCPtr=%VGv PdeDst=%#RX64\n",
     3978                            AssertMsgFailed(("4K PDEs cannot have PGM_PDFLAGS_TRACK_DIRTY set! GCPtr=%RGv PdeDst=%#RX64\n",
    39793979                                            GCPtr, (uint64_t)PdeDst.u));
    39803980                            cErrors++;
     
    40074007                                PGMR3DumpHierarchyGC(pVM, cr3, cr4, (PdeSrc.u & GST_PDE_PG_MASK));
    40084008# endif
    4009                                 AssertMsgFailed(("Out of sync (!P) PTE at %VGv! PteSrc=%#RX64 PteDst=%#RX64 pPTSrc=%VGv iPTSrc=%x PdeSrc=%x physpte=%VGp\n",
     4009                                AssertMsgFailed(("Out of sync (!P) PTE at %RGv! PteSrc=%#RX64 PteDst=%#RX64 pPTSrc=%RGv iPTSrc=%x PdeSrc=%x physpte=%VGp\n",
    40104010                                                GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u, pPTSrc, iPT + offPTSrc, PdeSrc.au32[0],
    40114011                                                (PdeSrc.u & GST_PDE_PG_MASK) + (iPT + offPTSrc)*sizeof(PteSrc)));
     
    40294029                                if (HCPhysShw != MMR3PageDummyHCPhys(pVM))
    40304030                                {
    4031                                     AssertMsgFailed(("Cannot find guest physical address %VGp at %VGv! PteSrc=%#RX64 PteDst=%#RX64\n",
     4031                                    AssertMsgFailed(("Cannot find guest physical address %VGp at %RGv! PteSrc=%#RX64 PteDst=%#RX64\n",
    40324032                                                    GCPhysGst, GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40334033                                    cErrors++;
     
    40374037                            else if (HCPhysShw != (HCPhys & SHW_PTE_PG_MASK))
    40384038                            {
    4039                                 AssertMsgFailed(("Out of sync (phys) at %VGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
     4039                                AssertMsgFailed(("Out of sync (phys) at %RGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
    40404040                                                GCPtr + off, HCPhysShw, HCPhys, GCPhysGst, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40414041                                cErrors++;
     
    40504050                                if (HCPhysShw != MMR3PageDummyHCPhys(pVM))
    40514051                                {
    4052                                     AssertMsgFailed(("Cannot find guest physical address %VGp at %VGv! PteSrc=%#RX64 PteDst=%#RX64\n",
     4052                                    AssertMsgFailed(("Cannot find guest physical address %VGp at %RGv! PteSrc=%#RX64 PteDst=%#RX64\n",
    40534053                                                    GCPhysGst, GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40544054                                    cErrors++;
     
    40584058                                if (PteDst.n.u1Write)
    40594059                                {
    4060                                     AssertMsgFailed(("Invalid guest page at %VGv is writable! GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
     4060                                    AssertMsgFailed(("Invalid guest page at %RGv is writable! GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
    40614061                                                    GCPtr + off, GCPhysGst, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40624062                                    cErrors++;
     
    40664066                            else if (HCPhysShw != (PGM_PAGE_GET_HCPHYS(pPhysPage) & SHW_PTE_PG_MASK))
    40674067                            {
    4068                                 AssertMsgFailed(("Out of sync (phys) at %VGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
     4068                                AssertMsgFailed(("Out of sync (phys) at %RGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PteSrc=%#RX64 PteDst=%#RX64\n",
    40694069                                                GCPtr + off, HCPhysShw, pPhysPage->HCPhys, GCPhysGst, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40704070                                cErrors++;
     
    40794079                                    if (PteDst.n.u1Write)
    40804080                                    {
    4081                                         AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%RHp PteSrc=%#RX64 PteDst=%#RX64\n",
     4081                                        AssertMsgFailed(("WRITE access flagged at %RGv but the page is writable! HCPhys=%RHp PteSrc=%#RX64 PteDst=%#RX64\n",
    40824082                                                        GCPtr + off, pPhysPage->HCPhys, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40834083                                        cErrors++;
     
    40904090                                    if (PteDst.n.u1Present)
    40914091                                    {
    4092                                         AssertMsgFailed(("ALL access flagged at %VGv but the page is present! HCPhys=%RHp PteSrc=%#RX64 PteDst=%#RX64\n",
     4092                                        AssertMsgFailed(("ALL access flagged at %RGv but the page is present! HCPhys=%RHp PteSrc=%#RX64 PteDst=%#RX64\n",
    40934093                                                        GCPtr + off, pPhysPage->HCPhys, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    40944094                                        cErrors++;
     
    41044104                                    if (PteDst.n.u1Write)
    41054105                                    {
    4106                                         AssertMsgFailed(("!DIRTY page at %VGv is writable! PteSrc=%#RX64 PteDst=%#RX64\n",
     4106                                        AssertMsgFailed(("!DIRTY page at %RGv is writable! PteSrc=%#RX64 PteDst=%#RX64\n",
    41074107                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41084108                                        cErrors++;
     
    41114111                                    if (!(PteDst.u & PGM_PTFLAGS_TRACK_DIRTY))
    41124112                                    {
    4113                                         AssertMsgFailed(("!DIRTY page at %VGv is not marked TRACK_DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
     4113                                        AssertMsgFailed(("!DIRTY page at %RGv is not marked TRACK_DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
    41144114                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41154115                                        cErrors++;
     
    41184118                                    if (PteDst.n.u1Dirty)
    41194119                                    {
    4120                                         AssertMsgFailed(("!DIRTY page at %VGv is marked DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
     4120                                        AssertMsgFailed(("!DIRTY page at %RGv is marked DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
    41214121                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41224122                                        cErrors++;
     
    41254125                                    if (PteDst.n.u1Accessed != PteSrc.n.u1Accessed)
    41264126                                    {
    4127                                         AssertMsgFailed(("!DIRTY page at %VGv is has mismatching accessed bit! PteSrc=%#RX64 PteDst=%#RX64\n",
     4127                                        AssertMsgFailed(("!DIRTY page at %RGv is has mismatching accessed bit! PteSrc=%#RX64 PteDst=%#RX64\n",
    41284128                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41294129                                        cErrors++;
     
    41394139                                    if (PteSrc.n.u1Accessed || PteDst.n.u1Present)
    41404140                                    {
    4141                                         AssertMsgFailed(("PGM_PTFLAGS_TRACK_DIRTY set at %VGv but no accessed bit emulation! PteSrc=%#RX64 PteDst=%#RX64\n",
     4141                                        AssertMsgFailed(("PGM_PTFLAGS_TRACK_DIRTY set at %RGv but no accessed bit emulation! PteSrc=%#RX64 PteDst=%#RX64\n",
    41424142                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41434143                                        cErrors++;
     
    41464146                                    if (!PteDst.n.u1Accessed)
    41474147                                    {
    4148                                         AssertMsgFailed(("!ACCESSED page at %VGv is has the accessed bit set! PteSrc=%#RX64 PteDst=%#RX64\n",
     4148                                        AssertMsgFailed(("!ACCESSED page at %RGv is has the accessed bit set! PteSrc=%#RX64 PteDst=%#RX64\n",
    41494149                                                        GCPtr + off, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
    41504150                                        cErrors++;
     
    41614161                            )
    41624162                            {
    4163                                 AssertMsgFailed(("Flags mismatch at %VGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PteSrc=%#RX64 PteDst=%#RX64\n",
     4163                                AssertMsgFailed(("Flags mismatch at %RGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PteSrc=%#RX64 PteDst=%#RX64\n",
    41644164                                                GCPtr + off, (uint64_t)PteSrc.u & ~fIgnoreFlags, (uint64_t)PteDst.u & ~fIgnoreFlags,
    41654165                                                fIgnoreFlags, (uint64_t)PteSrc.u, (uint64_t)PteDst.u));
     
    41794179                            if (PdeDst.n.u1Write)
    41804180                            {
    4181                                 AssertMsgFailed(("!DIRTY page at %VGv is writable! PdeSrc=%#RX64 PdeDst=%#RX64\n",
     4181                                AssertMsgFailed(("!DIRTY page at %RGv is writable! PdeSrc=%#RX64 PdeDst=%#RX64\n",
    41824182                                                GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    41834183                                cErrors++;
     
    41864186                            if (!(PdeDst.u & PGM_PDFLAGS_TRACK_DIRTY))
    41874187                            {
    4188                                 AssertMsgFailed(("!DIRTY page at %VGv is not marked TRACK_DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
     4188                                AssertMsgFailed(("!DIRTY page at %RGv is not marked TRACK_DIRTY! PteSrc=%#RX64 PteDst=%#RX64\n",
    41894189                                                GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    41904190                                cErrors++;
     
    41944194                            if (PdeDst.n.u1Accessed != PdeSrc.b.u1Accessed)
    41954195                            {
    4196                                 AssertMsgFailed(("!DIRTY page at %VGv is has mismatching accessed bit! PteSrc=%#RX64 PteDst=%#RX64\n",
     4196                                AssertMsgFailed(("!DIRTY page at %RGv is has mismatching accessed bit! PteSrc=%#RX64 PteDst=%#RX64\n",
    41974197                                                GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    41984198                                cErrors++;
     
    42084208                            if (PdeSrc.b.u1Accessed || PdeDst.n.u1Present)
    42094209                            {
    4210                                 AssertMsgFailed(("PGM_PDFLAGS_TRACK_DIRTY set at %VGv but no accessed bit emulation! PdeSrc=%#RX64 PdeDst=%#RX64\n",
     4210                                AssertMsgFailed(("PGM_PDFLAGS_TRACK_DIRTY set at %RGv but no accessed bit emulation! PdeSrc=%#RX64 PdeDst=%#RX64\n",
    42114211                                                GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    42124212                                cErrors++;
     
    42154215                            if (!PdeDst.n.u1Accessed)
    42164216                            {
    4217                                 AssertMsgFailed(("!ACCESSED page at %VGv is has the accessed bit set! PdeSrc=%#RX64 PdeDst=%#RX64\n",
     4217                                AssertMsgFailed(("!ACCESSED page at %RGv is has the accessed bit set! PdeSrc=%#RX64 PdeDst=%#RX64\n",
    42184218                                                GCPtr, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
    42194219                                cErrors++;
     
    42244224                        if ((PdeSrc.u & ~fIgnoreFlags) != (PdeDst.u & ~fIgnoreFlags))
    42254225                        {
    4226                             AssertMsgFailed(("Flags mismatch (B) at %VGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PdeSrc=%#RX64 PdeDst=%#RX64\n",
     4226                            AssertMsgFailed(("Flags mismatch (B) at %RGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PdeSrc=%#RX64 PdeDst=%#RX64\n",
    42274227                                            GCPtr, (uint64_t)PdeSrc.u & ~fIgnoreFlags, (uint64_t)PdeDst.u & ~fIgnoreFlags,
    42284228                                            fIgnoreFlags, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
     
    42394239                            if (PteDst.u & PGM_PTFLAGS_TRACK_DIRTY)
    42404240                            {
    4241                                 AssertMsgFailed(("The PTE at %VGv emulating a 2/4M page is marked TRACK_DIRTY! PdeSrc=%#RX64 PteDst=%#RX64\n",
     4241                                AssertMsgFailed(("The PTE at %RGv emulating a 2/4M page is marked TRACK_DIRTY! PdeSrc=%#RX64 PteDst=%#RX64\n",
    42424242                                                GCPtr + off, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42434243                                cErrors++;
     
    42594259                                if (HCPhysShw != MMR3PageDummyHCPhys(pVM))
    42604260                                {
    4261                                     AssertMsgFailed(("Cannot find guest physical address %VGp at %VGv! PdeSrc=%#RX64 PteDst=%#RX64\n",
     4261                                    AssertMsgFailed(("Cannot find guest physical address %VGp at %RGv! PdeSrc=%#RX64 PteDst=%#RX64\n",
    42624262                                                    GCPhysGst, GCPtr + off, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42634263                                    cErrors++;
     
    42664266                            else if (HCPhysShw != (HCPhys & X86_PTE_PAE_PG_MASK))
    42674267                            {
    4268                                 AssertMsgFailed(("Out of sync (phys) at %VGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
     4268                                AssertMsgFailed(("Out of sync (phys) at %RGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
    42694269                                                GCPtr + off, HCPhysShw, HCPhys, GCPhysGst, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42704270                                cErrors++;
     
    42784278                                if (HCPhysShw != MMR3PageDummyHCPhys(pVM))
    42794279                                {
    4280                                     AssertMsgFailed(("Cannot find guest physical address %VGp at %VGv! PdeSrc=%#RX64 PteDst=%#RX64\n",
     4280                                    AssertMsgFailed(("Cannot find guest physical address %VGp at %RGv! PdeSrc=%#RX64 PteDst=%#RX64\n",
    42814281                                                    GCPhysGst, GCPtr + off, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42824282                                    cErrors++;
     
    42864286                                if (PteDst.n.u1Write)
    42874287                                {
    4288                                     AssertMsgFailed(("Invalid guest page at %VGv is writable! GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
     4288                                    AssertMsgFailed(("Invalid guest page at %RGv is writable! GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
    42894289                                                    GCPtr + off, GCPhysGst, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42904290                                    cErrors++;
     
    42944294                            else if (HCPhysShw != (pPhysPage->HCPhys & X86_PTE_PAE_PG_MASK))
    42954295                            {
    4296                                 AssertMsgFailed(("Out of sync (phys) at %VGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
     4296                                AssertMsgFailed(("Out of sync (phys) at %RGv! HCPhysShw=%RHp HCPhys=%RHp GCPhysGst=%VGp PdeSrc=%#RX64 PteDst=%#RX64\n",
    42974297                                                GCPtr + off, HCPhysShw, pPhysPage->HCPhys, GCPhysGst, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    42984298                                cErrors++;
     
    43094309                                        if (PteDst.n.u1Write)
    43104310                                        {
    4311                                             AssertMsgFailed(("WRITE access flagged at %VGv but the page is writable! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
     4311                                            AssertMsgFailed(("WRITE access flagged at %RGv but the page is writable! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
    43124312                                                            GCPtr + off, pPhysPage->HCPhys, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    43134313                                            cErrors++;
     
    43214321                                    if (PteDst.n.u1Present)
    43224322                                    {
    4323                                         AssertMsgFailed(("ALL access flagged at %VGv but the page is present! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
     4323                                        AssertMsgFailed(("ALL access flagged at %RGv but the page is present! HCPhys=%RHp PdeSrc=%#RX64 PteDst=%#RX64\n",
    43244324                                                        GCPtr + off, pPhysPage->HCPhys, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
    43254325                                        cErrors++;
     
    43344334                            )
    43354335                            {
    4336                                 AssertMsgFailed(("Flags mismatch (BT) at %VGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PdeSrc=%#RX64 PteDst=%#RX64\n",
     4336                                AssertMsgFailed(("Flags mismatch (BT) at %RGv! %#RX64 != %#RX64 fIgnoreFlags=%#RX64 PdeSrc=%#RX64 PteDst=%#RX64\n",
    43374337                                                GCPtr + off, (uint64_t)PdeSrc.u & ~fIgnoreFlags, (uint64_t)PteDst.u & ~fIgnoreFlags,
    43384338                                                fIgnoreFlags, (uint64_t)PdeSrc.u, (uint64_t)PteDst.u));
  • trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

    r13820 r13823  
    455455            pVM->pgm.s.pGstPaePDPTHC = (R3R0PTRTYPE(PX86PDPT)) HCPtrGuestCR3;
    456456            pVM->pgm.s.pGstPaePDPTGC = (RCPTRTYPE(PX86PDPT))   ((RCPTRTYPE(uint8_t *))pVM->pgm.s.GCPtrCR3Mapping + offset);
    457             Log(("Cached mapping %VGv\n", pVM->pgm.s.pGstPaePDPTGC));
     457            Log(("Cached mapping %RGv\n", pVM->pgm.s.pGstPaePDPTGC));
    458458
    459459            /*
  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r13819 r13823  
    13601360            if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
    13611361            {
    1362                 AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysNew=~0 iPage=%#x %VGv %s\n",
     1362                AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
    13631363                                 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
    13641364                pState->cErrors++;
     
    13701370        if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
    13711371        {
    1372             AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysGst=%VGp iPage=%#x %VGv %s\n",
     1372            AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysGst=%VGp iPage=%#x %RGv %s\n",
    13731373                             pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
    13741374            pState->cErrors++;
     
    13791379        if (!pPage)
    13801380        {
    1381             AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%VGp iPage=%#x %VGv %s\n",
     1381            AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%VGp iPage=%#x %RGv %s\n",
    13821382                             GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
    13831383            pState->cErrors++;
     
    13871387        if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
    13881388        {
    1389             AssertMsgFailed(("virt handler state mismatch. HCPhys=%RHp GCPhysGst=%VGp iPage=%#x %VGv state=%d expected>=%d %s\n",
     1389            AssertMsgFailed(("virt handler state mismatch. HCPhys=%RHp GCPhysGst=%VGp iPage=%#x %RGv state=%d expected>=%d %s\n",
    13901390                             pPage->HCPhys, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
    13911391            pState->cErrors++;
  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r13820 r13823  
    21142114        return VINF_SUCCESS;
    21152115
    2116     LogFlow(("PGMPhysReadGCPtr: %VGv %zu\n", GCPtrSrc, cb));
     2116    LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
    21172117
    21182118    /*
     
    21862186        return VINF_SUCCESS;
    21872187
    2188     LogFlow(("PGMPhysWriteGCPtr: %VGv %zu\n", GCPtrDst, cb));
     2188    LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
    21892189
    21902190    /*
     
    23282328        {
    23292329            /** @todo we should check reserved bits ... */
    2330             AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%VGv\n", cb, cb1, cb2, GCPtrSrc));
     2330            AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
    23312331            void *pvSrc1;
    23322332            rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
     
    23902390
    23912391        default:
    2392             AssertMsgFailed(("rc=%Rrc GCPtrSrc=%VGv cb=%#x\n", rc, GCPtrSrc, cb));
     2392            AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
    23932393            return rc;
    23942394    }
    2395     Log(("PGMPhysInterpretedRead: GCPtrSrc=%VGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
     2395    Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
    23962396    return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
    23972397}
  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r13820 r13823  
    292292    const unsigned cbWrite = (pCpu) ? pgmPoolDisasWriteSize(pCpu) : 0;
    293293
    294     LogFlow(("pgmPoolMonitorChainChanging: %VGv phys=%VGp kind=%d cbWrite=%d\n", pvAddress, GCPhysFault, pPage->enmKind, cbWrite));
     294    LogFlow(("pgmPoolMonitorChainChanging: %RGv phys=%VGp kind=%d cbWrite=%d\n", pvAddress, GCPhysFault, pPage->enmKind, cbWrite));
    295295
    296296    for (;;)
     
    752752    {
    753753        /* Fault caused by stack writes while trying to inject an interrupt event. */
    754         Log(("pgmPoolMonitorIsReused: reused %VGv for interrupt stack (rsp=%VGv).\n", pvFault, pRegFrame->rsp));
     754        Log(("pgmPoolMonitorIsReused: reused %RGv for interrupt stack (rsp=%RGv).\n", pvFault, pRegFrame->rsp));
    755755        return true;
    756756    }
     
    997997    PPGMPOOL        pPool = pVM->pgm.s.CTX_SUFF(pPool);
    998998    PPGMPOOLPAGE    pPage = (PPGMPOOLPAGE)pvUser;
    999     LogFlow(("pgmPoolAccessHandler: pvFault=%VGv pPage=%p:{.idx=%d} GCPhysFault=%VGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
     999    LogFlow(("pgmPoolAccessHandler: pvFault=%RGv pPage=%p:{.idx=%d} GCPhysFault=%VGp\n", pvFault, pPage, pPage->idx, GCPhysFault));
    10001000
    10011001    /*
     
    10551055        /* REP prefix, don't bother. */
    10561056        STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
    1057         Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%VGv opcode=%d prefix=%#x\n",
     1057        Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
    10581058              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, Cpu.pCurInstr->opcode, Cpu.prefix));
    10591059    }
  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r13816 r13823  
    226226
    227227        PPGMMAPPING pMap = pgmGetMapping(pVM, (RTGCPTR)GCPtr);
    228         AssertMsgReturn(pMap, ("GCPtr=%VGv\n", GCPtr), VERR_INTERNAL_ERROR);
     228        AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_INTERNAL_ERROR);
    229229#  if PGM_SHW_TYPE == PGM_TYPE_32BIT
    230230        pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(pPT);
  • trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

    r13822 r13823  
    208208VMMDECL(void)  TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode)
    209209{
    210     Log2(("TRPMSetErrorCode: uErrorCode=%VGv\n", uErrorCode)); /** @todo RTGCUINT mess! */
     210    Log2(("TRPMSetErrorCode: uErrorCode=%RGv\n", uErrorCode)); /** @todo RTGCUINT mess! */
    211211    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
    212212    pVM->trpm.s.uActiveErrorCode = uErrorCode;
     
    240240VMMDECL(void)  TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2)
    241241{
    242     Log2(("TRPMSetFaultAddress: uCR2=%VGv\n", uCR2));
     242    Log2(("TRPMSetFaultAddress: uCR2=%RGv\n", uCR2));
    243243    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
    244244    AssertMsg(pVM->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
     
    386386#  endif
    387387            if (RT_SUCCESS(rc))
    388                 Log(("TRPMForwardTrap: caller=%VGv\n", pCallerGC));
     388                Log(("TRPMForwardTrap: caller=%RGv\n", pCallerGC));
    389389        }
    390390        /* no break */
     
    455455        {
    456456            /* The page might be out of sync. */ /** @todo might cross a page boundary) */
    457             Log(("Page %VGv out of sync -> prefetch and try again\n", pIDTEntry));
     457            Log(("Page %RGv out of sync -> prefetch and try again\n", pIDTEntry));
    458458            rc = PGMPrefetchPage(pVM, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
    459459            if (rc != VINF_SUCCESS)
     
    515515                {
    516516                    /* The page might be out of sync. */ /** @todo might cross a page boundary) */
    517                     Log(("Page %VGv out of sync -> prefetch and try again\n", pGdtEntry));
     517                    Log(("Page %RGv out of sync -> prefetch and try again\n", pGdtEntry));
    518518                    rc = PGMPrefetchPage(pVM, pGdtEntry);  /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
    519519                    if (rc != VINF_SUCCESS)
     
    606606                    if (eflags.Bits.u1VM)
    607607                    {
    608                         Log(("TRAP%02X: (VM) Handler %04X:%VGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
     608                        Log(("TRAP%02X: (VM) Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
    609609                        pTrapStack[--idx] = pRegFrame->gs;
    610610                        pTrapStack[--idx] = pRegFrame->fs;
     
    616616                    }
    617617                    else
    618                         Log(("TRAP%02X: Handler %04X:%VGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
     618                        Log(("TRAP%02X: Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
    619619
    620620                    if (!fConforming && dpl < cpl)
     
    712712                }
    713713                else
    714                     Log(("TRAP%02X: PGMVerifyAccess %VGv failed with %Rrc -> forward to REM\n", iGate, pTrapStackGC, rc));
     714                    Log(("TRAP%02X: PGMVerifyAccess %RGv failed with %Rrc -> forward to REM\n", iGate, pTrapStackGC, rc));
    715715            }
    716716            else
     
    718718        }
    719719        else
    720             Log(("MMRamRead %VGv size %d failed with %Rrc\n", (RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate, sizeof(GuestIdte), rc));
     720            Log(("MMRamRead %RGv size %d failed with %Rrc\n", (RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate, sizeof(GuestIdte), rc));
    721721    }
    722722    else
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette