VirtualBox

Changeset 13837 in vbox for trunk/src/recompiler


Ignore:
Timestamp:
Nov 5, 2008 2:54:02 AM (16 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
38828
Message:

s/%Vr\([acfs]\)/%Rr\1/g - since I'm upsetting everyone anyway, better make the most of it...

Location:
trunk/src/recompiler
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/recompiler/VBoxREMWrapper.cpp

    r13835 r13837  
    18441844                    RTUINTPTR Value;
    18451845                    rc = RTLdrGetSymbolEx(g_ModREM2, g_pvREM2, (RTUINTPTR)g_pvREM2, g_aExports[i].pszName, &Value);
    1846                     AssertMsgRC(rc, ("%s rc=%Vrc\n", g_aExports[i].pszName, rc));
     1846                    AssertMsgRC(rc, ("%s rc=%Rrc\n", g_aExports[i].pszName, rc));
    18471847                    if (RT_FAILURE(rc))
    18481848                        break;
     
    18591859        g_ModREM2 = NIL_RTLDRMOD;
    18601860    }
    1861     LogRel(("REM: failed loading '%s', rc=%Vrc\n", szPath, rc));
     1861    LogRel(("REM: failed loading '%s', rc=%Rrc\n", szPath, rc));
    18621862    return rc;
    18631863}
  • trunk/src/recompiler/VBoxRecompiler.c

    r13836 r13837  
    801801                        break;
    802802                    }
    803                 Log2(("REMR3EmulateInstruction: cpu_exec -> EXCP_DEBUG rc=%Vrc iBP=%d GCPtrPC=%VGv\n", rc, iBP, GCPtrPC));
     803                Log2(("REMR3EmulateInstruction: cpu_exec -> EXCP_DEBUG rc=%Rrc iBP=%d GCPtrPC=%VGv\n", rc, iBP, GCPtrPC));
    804804                break;
    805805            }
     
    942942             */
    943943            case EXCP_RC:
    944                 Log2(("REMR3EmulateInstruction: cpu_exec -> EXCP_RC rc=%Vrc\n", pVM->rem.s.rc));
     944                Log2(("REMR3EmulateInstruction: cpu_exec -> EXCP_RC rc=%Rrc\n", pVM->rem.s.rc));
    945945                rc = pVM->rem.s.rc;
    946946                pVM->rem.s.rc = VERR_INTERNAL_ERROR;
     
    967967    }
    968968
    969     Log2(("REMR3EmulateInstruction: returns %Vrc (cs:eip=%04x:%VGv)\n",
     969    Log2(("REMR3EmulateInstruction: returns %Rrc (cs:eip=%04x:%VGv)\n",
    970970          rc, pVM->rem.s.Env.segs[R_CS].selector, pVM->rem.s.Env.eip));
    971971    return rc;
     
    10551055                    break;
    10561056                }
    1057             Log2(("REMR3Run: cpu_exec -> EXCP_DEBUG rc=%Vrc iBP=%d GCPtrPC=%VGv\n", rc, iBP, GCPtrPC));
     1057            Log2(("REMR3Run: cpu_exec -> EXCP_DEBUG rc=%Rrc iBP=%d GCPtrPC=%VGv\n", rc, iBP, GCPtrPC));
    10581058#endif
    10591059            break;
     
    10901090         */
    10911091        case EXCP_RC:
    1092             Log2(("REMR3Run: cpu_exec -> EXCP_RC rc=%Vrc\n", pVM->rem.s.rc));
     1092            Log2(("REMR3Run: cpu_exec -> EXCP_RC rc=%Rrc\n", pVM->rem.s.rc));
    10931093            rc = pVM->rem.s.rc;
    10941094            pVM->rem.s.rc = VERR_INTERNAL_ERROR;
     
    11051105    }
    11061106
    1107     Log2(("REMR3Run: returns %Vrc (cs:eip=%04x:%VGv)\n", rc, pVM->rem.s.Env.segs[R_CS].selector, pVM->rem.s.Env.eip));
     1107    Log2(("REMR3Run: returns %Rrc (cs:eip=%04x:%VGv)\n", rc, pVM->rem.s.Env.segs[R_CS].selector, pVM->rem.s.Env.eip));
    11081108    return rc;
    11091109}
     
    15091509    rc = PGMChangeMode(pVM, env->cr[0], env->cr[4], env->efer);
    15101510    if (rc != VINF_SUCCESS)
    1511         cpu_abort(env, "PGMChangeMode(, %RX64, %RX64, %RX64) -> %Vrc\n", env->cr[0], env->cr[4], env->efer, rc);
     1511        cpu_abort(env, "PGMChangeMode(, %RX64, %RX64, %RX64) -> %Rrc\n", env->cr[0], env->cr[4], env->efer, rc);
    15121512#else
    15131513    rc = PGMChangeMode(pVM, env->cr[0], env->cr[4], 0);
    15141514    if (rc != VINF_SUCCESS)
    1515         cpu_abort(env, "PGMChangeMode(, %RX64, %RX64, %RX64) -> %Vrc\n", env->cr[0], env->cr[4], 0LL, rc);
     1515        cpu_abort(env, "PGMChangeMode(, %RX64, %RX64, %RX64) -> %Rrc\n", env->cr[0], env->cr[4], 0LL, rc);
    15161516#endif
    15171517}
     
    32713271    uint32_t u32 = 0;
    32723272    int rc = IOMMMIORead((PVM)pvVM, GCPhys, &u32, 1);
    3273     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3273    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    32743274    Log2(("remR3MMIOReadU8: GCPhys=%VGp -> %02x\n", GCPhys, u32));
    32753275    return u32;
     
    32813281    uint32_t u32 = 0;
    32823282    int rc = IOMMMIORead((PVM)pvVM, GCPhys, &u32, 2);
    3283     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3283    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    32843284    Log2(("remR3MMIOReadU16: GCPhys=%VGp -> %04x\n", GCPhys, u32));
    32853285    return u32;
     
    32913291    uint32_t u32 = 0;
    32923292    int rc = IOMMMIORead((PVM)pvVM, GCPhys, &u32, 4);
    3293     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3293    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    32943294    Log2(("remR3MMIOReadU32: GCPhys=%VGp -> %08x\n", GCPhys, u32));
    32953295    return u32;
     
    33013301    Log2(("remR3MMIOWriteU8: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
    33023302    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 1);
    3303     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3303    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    33043304}
    33053305
     
    33093309    Log2(("remR3MMIOWriteU16: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
    33103310    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 2);
    3311     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3311    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    33123312}
    33133313
     
    33173317    Log2(("remR3MMIOWriteU32: GCPhys=%VGp u32=%#x\n", GCPhys, u32));
    33183318    int rc = IOMMMIOWrite((PVM)pvVM, GCPhys, u32, 4);
    3319     AssertMsg(rc == VINF_SUCCESS, ("rc=%Vrc\n", rc)); NOREF(rc);
     3319    AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc);
    33203320}
    33213321
     
    40134013void remR3RaiseRC(PVM pVM, int rc)
    40144014{
    4015     Log(("remR3RaiseRC: rc=%Vrc\n", rc));
     4015    Log(("remR3RaiseRC: rc=%Rrc\n", rc));
    40164016    Assert(pVM->rem.s.fInREM);
    40174017    VM_ASSERT_EMT(pVM);
     
    40614061        rc = PDMGetInterrupt(env->pVM, &u8Interrupt);
    40624062
    4063     LogFlow(("cpu_get_pic_interrupt: u8Interrupt=%d rc=%Vrc\n", u8Interrupt, rc));
     4063    LogFlow(("cpu_get_pic_interrupt: u8Interrupt=%d rc=%Rrc\n", u8Interrupt, rc));
    40644064    if (RT_SUCCESS(rc))
    40654065    {
     
    40774077{
    40784078    int rc = PDMApicSetBase(env->pVM, val);
    4079     LogFlow(("cpu_set_apic_base: val=%#llx rc=%Vrc\n", val, rc)); NOREF(rc);
     4079    LogFlow(("cpu_set_apic_base: val=%#llx rc=%Rrc\n", val, rc)); NOREF(rc);
    40804080}
    40814081
     
    40894089        return u64;
    40904090    }
    4091     LogFlow(("cpu_get_apic_base: returns 0 (rc=%Vrc)\n", rc));
     4091    LogFlow(("cpu_get_apic_base: returns 0 (rc=%Rrc)\n", rc));
    40924092    return 0;
    40934093}
     
    40964096{
    40974097    int rc = PDMApicSetTPR(env->pVM, val);
    4098     LogFlow(("cpu_set_apic_tpr: val=%#x rc=%Vrc\n", val, rc)); NOREF(rc);
     4098    LogFlow(("cpu_set_apic_tpr: val=%#x rc=%Rrc\n", val, rc)); NOREF(rc);
    40994099}
    41004100
     
    41084108        return u8;
    41094109    }
    4110     LogFlow(("cpu_get_apic_tpr: returns 0 (rc=%Vrc)\n", rc));
     4110    LogFlow(("cpu_get_apic_tpr: returns 0 (rc=%Rrc)\n", rc));
    41114111    return 0;
    41124112}
     
    41234123    }
    41244124    /** @todo: exception ? */
    4125     LogFlow(("cpu_apic_rdms returns 0 (rc=%Vrc)\n", rc));
     4125    LogFlow(("cpu_apic_rdms returns 0 (rc=%Rrc)\n", rc));
    41264126    return value;
    41274127}
     
    41314131    int rc = PDMApicWriteMSR(env->pVM, 0 /* cpu */, reg, value);
    41324132    /** @todo: exception if error ? */
    4133     LogFlow(("cpu_apic_wrmsr: rc=%Vrc\n", rc)); NOREF(rc);
     4133    LogFlow(("cpu_apic_wrmsr: rc=%Rrc\n", rc)); NOREF(rc);
    41344134}
    41354135/* -+- I/O Ports -+- */
     
    41484148    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    41494149    {
    4150         Log(("cpu_outb: addr=%#06x val=%#x -> %Vrc\n", addr, val, rc));
     4150        Log(("cpu_outb: addr=%#06x val=%#x -> %Rrc\n", addr, val, rc));
    41514151        remR3RaiseRC(env->pVM, rc);
    41524152        return;
     
    41634163    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    41644164    {
    4165         Log(("cpu_outw: addr=%#06x val=%#x -> %Vrc\n", addr, val, rc));
     4165        Log(("cpu_outw: addr=%#06x val=%#x -> %Rrc\n", addr, val, rc));
    41664166        remR3RaiseRC(env->pVM, rc);
    41674167        return;
     
    41784178    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    41794179    {
    4180         Log(("cpu_outl: addr=%#06x val=%#x -> %Vrc\n", addr, val, rc));
     4180        Log(("cpu_outl: addr=%#06x val=%#x -> %Rrc\n", addr, val, rc));
    41814181        remR3RaiseRC(env->pVM, rc);
    41824182        return;
     
    41974197    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    41984198    {
    4199         Log(("cpu_inb: addr=%#06x -> %#x rc=%Vrc\n", addr, u32, rc));
     4199        Log(("cpu_inb: addr=%#06x -> %#x rc=%Rrc\n", addr, u32, rc));
    42004200        remR3RaiseRC(env->pVM, rc);
    42014201        return (int)u32;
     
    42164216    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    42174217    {
    4218         Log(("cpu_inw: addr=%#06x -> %#x rc=%Vrc\n", addr, u32, rc));
     4218        Log(("cpu_inw: addr=%#06x -> %#x rc=%Rrc\n", addr, u32, rc));
    42194219        remR3RaiseRC(env->pVM, rc);
    42204220        return (int)u32;
     
    42374237    if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
    42384238    {
    4239         Log(("cpu_inl: addr=%#06x -> %#x rc=%Vrc\n", addr, u32, rc));
     4239        Log(("cpu_inl: addr=%#06x -> %#x rc=%Rrc\n", addr, u32, rc));
    42404240        remR3RaiseRC(env->pVM, rc);
    42414241        return (int)u32;
     
    43414341     * Bitch about it.
    43424342     */
    4343     RTLogPrintf("internal REM fatal error: rc=%Vrc %s\n", rc, pszTip);
    4344     AssertReleaseMsgFailed(("internal REM fatal error: rc=%Vrc %s\n", rc, pszTip));
     4343    RTLogPrintf("internal REM fatal error: rc=%Rrc %s\n", rc, pszTip);
     4344    AssertReleaseMsgFailed(("internal REM fatal error: rc=%Rrc %s\n", rc, pszTip));
    43454345
    43464346    /*
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette