Changeset 13898 in vbox for trunk/src/VBox/VMM

Timestamp:

Nov 6, 2008 9:44:29 AM (16 years ago)

Author:

vboxsync

Message:

Moved more data to VMCPU.

Location:

trunk/src/VBox/VMM

Files:

• HWACCM.cpp (modified) (6 diffs)
• HWACCMInternal.h (modified) (4 diffs)
• VMMAll/HWACCMAll.cpp (modified) (4 diffs)
• VMMAll/PDMAllCritSect.cpp (modified) (6 diffs)
• VMMAll/VMMAll.cpp (modified) (2 diffs)
• VMMR0/HWACCMR0.cpp (modified) (3 diffs)
• VMMR0/HWSVMR0.cpp (modified) (63 diffs)
• VMMR0/HWVMXR0.cpp (modified) (65 diffs)
• testcase/tstVMStructSize.cpp (modified) (1 diff)

trunk/src/VBox/VMM/HWACCM.cpp

@@ -104 +104 @@
     pVM->hwaccm.s.fNestedPaging  = false;
 
-    /*
-     * Statistics.
-     */
-    STAM_REG(pVM, &pVM->hwaccm.s.StatEntry,    STAMTYPE_PROFILE, "/PROF/HWACCM/SwitchToGC",     STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode entry");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExit,     STAMTYPE_PROFILE, "/PROF/HWACCM/SwitchFromGC",   STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode exit");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatInGC,     STAMTYPE_PROFILE, "/PROF/HWACCM/InGC",           STAMUNIT_TICKS_PER_CALL, "Profiling of vmlaunch");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitShadowNM,  STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Shadow/#NM",   STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestNM,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#NM",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitShadowPF,  STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Shadow/#PF",   STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestPF,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#PF",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestUD,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#UD",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestSS,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#SS",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestNP,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#NP",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestGP,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#GP",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestMF,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#MF",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestDE,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#DE",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitGuestDB,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#DB",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitInvpg,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Invlpg",      STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitInvd,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Invd",        STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitCpuid,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Cpuid",       STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitRdtsc,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Rdtsc",       STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitCRxWrite,  STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CRx/Write",   STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitCRxRead,   STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CRx/Read",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitDRxWrite,  STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/DRx/Write",   STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitDRxRead,   STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/DRx/Read",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitCLTS,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CLTS",        STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitLMSW,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/LMSW",        STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitIOWrite,   STAMTYPE_COUNTER, "/HWACCM/Exit/IO/Write",          STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitIORead,    STAMTYPE_COUNTER, "/HWACCM/Exit/IO/Read",           STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitIOStringWrite,   STAMTYPE_COUNTER, "/HWACCM/Exit/IO/WriteString",          STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitIOStringRead,    STAMTYPE_COUNTER, "/HWACCM/Exit/IO/ReadString",           STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitIrqWindow, STAMTYPE_COUNTER, "/HWACCM/Exit/GuestIrq/Pending",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatExitMaxResume, STAMTYPE_COUNTER, "/HWACCM/Exit/Safety/MaxResume",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatSwitchGuestIrq,STAMTYPE_COUNTER, "/HWACCM/Switch/IrqPending",      STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatSwitchToR3,    STAMTYPE_COUNTER, "/HWACCM/Switch/ToR3",            STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatIntInject,     STAMTYPE_COUNTER, "/HWACCM/Irq/Inject",             STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatIntReinject,   STAMTYPE_COUNTER, "/HWACCM/Irq/Reinject",           STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatPendingHostIrq,STAMTYPE_COUNTER, "/HWACCM/Irq/PendingOnHost",      STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushPageManual,       STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Virt/Manual", STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushPhysPageManual,   STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Phys/Manual", STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushTLBManual,        STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Manual",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushTLBCRxChange,     STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/CRx",     STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushPageInvlpg,       STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Invlpg", STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushTLBWorldSwitch,   STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Switch",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatNoFlushTLBWorldSwitch, STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Skipped", STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushASID,             STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/ASID",    STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatFlushTLBInvlpga,       STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/PhysInvlpg",  STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatTSCOffset,             STAMTYPE_COUNTER, "/HWACCM/TSC/Offset",        STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatTSCIntercept,          STAMTYPE_COUNTER, "/HWACCM/TSC/Intercept",     STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    STAM_REG(pVM, &pVM->hwaccm.s.StatDRxArmed,              STAMTYPE_COUNTER, "/HWACCM/Debug/Armed",           STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatDRxContextSwitch,      STAMTYPE_COUNTER, "/HWACCM/Debug/ContextSwitch",   STAMUNIT_OCCURENCES,    "Nr of occurances");
-    STAM_REG(pVM, &pVM->hwaccm.s.StatDRxIOCheck,            STAMTYPE_COUNTER, "/HWACCM/Debug/IOCheck",         STAMUNIT_OCCURENCES,    "Nr of occurances");
-
-    pVM->hwaccm.s.paStatExitReason = NULL;
-
-#ifdef VBOX_WITH_STATISTICS
-    rc = MMHyperAlloc(pVM, MAX_EXITREASON_STAT*sizeof(*pVM->hwaccm.s.paStatExitReason), 0, MM_TAG_HWACCM, (void **)&pVM->hwaccm.s.paStatExitReason);
-    AssertRC(rc);
-    if (RT_SUCCESS(rc))
-    {
-        for (int i=0;i<MAX_EXITREASON_STAT;i++)
-        {
-            int rc = STAMR3RegisterF(pVM, &pVM->hwaccm.s.paStatExitReason[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Exit reason",
-                                     "/HWACCM/Exit/Reason/%02x", i);
-            AssertRC(rc);
-        }
-        int rc = STAMR3Register(pVM, &pVM->hwaccm.s.StatExitReasonNPF, STAMTYPE_COUNTER, STAMVISIBILITY_USED, "/HWACCM/Exit/Reason/#NPF", STAMUNIT_OCCURENCES, "Exit reason");
-        AssertRC(rc);
-    }
-    pVM->hwaccm.s.paStatExitReasonR0 = MMHyperR3ToR0(pVM, pVM->hwaccm.s.paStatExitReason);
-    Assert(pVM->hwaccm.s.paStatExitReasonR0);
-#endif
-
     /* Disabled by default. */
     pVM->fHWACCMEnabled = false;
@@ -194 +115 @@
 
     /* VT-x VPID: disabled by default. */
-    rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "EnableVPID", &pVM->hwaccm.s.fAllowVPID, false);
+    rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "EnableVPID", &pVM->hwaccm.s.vmx.fAllowVPID, false);
     AssertRC(rc);
 
@@ -213 +134 @@
 {
     LogFlow(("HWACCMR3InitCPU\n"));
+
+    /*
+     * Statistics.
+     */
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PVMCPU pVCpu = &pVM->aCpus[i];
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatEntry,    STAMTYPE_PROFILE, "/PROF/HWACCM/SwitchToGC",     STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode entry");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExit,     STAMTYPE_PROFILE, "/PROF/HWACCM/SwitchFromGC",   STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode exit");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatInGC,     STAMTYPE_PROFILE, "/PROF/HWACCM/InGC",           STAMUNIT_TICKS_PER_CALL, "Profiling of vmlaunch");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitShadowNM,  STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Shadow/#NM",   STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestNM,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#NM",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitShadowPF,  STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Shadow/#PF",   STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestPF,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#PF",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestUD,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#UD",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestSS,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#SS",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestNP,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#NP",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestGP,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#GP",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestMF,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#MF",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestDE,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#DE",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitGuestDB,   STAMTYPE_COUNTER, "/HWACCM/Exit/Trap/Guest/#DB",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitInvpg,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Invlpg",      STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitInvd,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Invd",        STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitCpuid,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Cpuid",       STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitRdtsc,     STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/Rdtsc",       STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitCRxWrite,  STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CRx/Write",   STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitCRxRead,   STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CRx/Read",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitDRxWrite,  STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/DRx/Write",   STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitDRxRead,   STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/DRx/Read",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitCLTS,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/CLTS",        STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitLMSW,      STAMTYPE_COUNTER, "/HWACCM/Exit/Instr/LMSW",        STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitIOWrite,   STAMTYPE_COUNTER, "/HWACCM/Exit/IO/Write",          STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitIORead,    STAMTYPE_COUNTER, "/HWACCM/Exit/IO/Read",           STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitIOStringWrite,   STAMTYPE_COUNTER, "/HWACCM/Exit/IO/WriteString",          STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitIOStringRead,    STAMTYPE_COUNTER, "/HWACCM/Exit/IO/ReadString",           STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitIrqWindow, STAMTYPE_COUNTER, "/HWACCM/Exit/GuestIrq/Pending",  STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatExitMaxResume, STAMTYPE_COUNTER, "/HWACCM/Exit/Safety/MaxResume",  STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatSwitchGuestIrq,STAMTYPE_COUNTER, "/HWACCM/Switch/IrqPending",      STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatSwitchToR3,    STAMTYPE_COUNTER, "/HWACCM/Switch/ToR3",            STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatIntInject,     STAMTYPE_COUNTER, "/HWACCM/Irq/Inject",             STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatIntReinject,   STAMTYPE_COUNTER, "/HWACCM/Irq/Reinject",           STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatPendingHostIrq,STAMTYPE_COUNTER, "/HWACCM/Irq/PendingOnHost",      STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushPageManual,       STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Virt/Manual", STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushPhysPageManual,   STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Phys/Manual", STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushTLBManual,        STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Manual",  STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushTLBCRxChange,     STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/CRx",     STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushPageInvlpg,       STAMTYPE_COUNTER, "/HWACCM/Flush/Page/Invlpg", STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushTLBWorldSwitch,   STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Switch",  STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatNoFlushTLBWorldSwitch, STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/Skipped", STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushASID,             STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/ASID",    STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatFlushTLBInvlpga,       STAMTYPE_COUNTER, "/HWACCM/Flush/TLB/PhysInvlpg",  STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatTSCOffset,             STAMTYPE_COUNTER, "/HWACCM/TSC/Offset",        STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatTSCIntercept,          STAMTYPE_COUNTER, "/HWACCM/TSC/Intercept",     STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatDRxArmed,              STAMTYPE_COUNTER, "/HWACCM/Debug/Armed",           STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatDRxContextSwitch,      STAMTYPE_COUNTER, "/HWACCM/Debug/ContextSwitch",   STAMUNIT_OCCURENCES,    "Nr of occurances");
+        STAM_REG(pVM, &pVCpu->hwaccm.s.StatDRxIOCheck,            STAMTYPE_COUNTER, "/HWACCM/Debug/IOCheck",         STAMUNIT_OCCURENCES,    "Nr of occurances");
+
+        pVCpu->hwaccm.s.paStatExitReason = NULL;
+
+#ifdef VBOX_WITH_STATISTICS
+        int rc = MMHyperAlloc(pVM, MAX_EXITREASON_STAT*sizeof(*pVCpu->hwaccm.s.paStatExitReason), 0, MM_TAG_HWACCM, (void **)&pVCpu->hwaccm.s.paStatExitReason);
+        AssertRC(rc);
+        if (RT_SUCCESS(rc))
+        {
+            for (int i=0;i<MAX_EXITREASON_STAT;i++)
+            {
+                rc = STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.paStatExitReason[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Exit reason",
+                                         "/HWACCM/Exit/Reason/%02x", i);
+                AssertRC(rc);
+            }
+            rc = STAMR3Register(pVM, &pVCpu->hwaccm.s.StatExitReasonNPF, STAMTYPE_COUNTER, STAMVISIBILITY_USED, "/HWACCM/Exit/Reason/#NPF", STAMUNIT_OCCURENCES, "Exit reason");
+            AssertRC(rc);
+        }
+        pVCpu->hwaccm.s.paStatExitReasonR0 = MMHyperR3ToR0(pVM, pVCpu->hwaccm.s.paStatExitReason);
+        Assert(pVCpu->hwaccm.s.paStatExitReasonR0);
+#endif
+    }
     return VINF_SUCCESS;
 }
@@ -593 +598 @@
             if (    (pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VPID)
                 &&  !pVM->hwaccm.s.fNestedPaging)    /* VPID and EPT are mutually exclusive. */
-                pVM->hwaccm.s.vmx.fVPID = pVM->hwaccm.s.fAllowVPID;
+                pVM->hwaccm.s.vmx.fVPID = pVM->hwaccm.s.vmx.fAllowVPID;
 #endif /* HWACCM_VTX_WITH_VPID */
 
@@ -833 +838 @@
         pVM->hwaccm.s.vmx.pRealModeTSS       = 0;
     }
-
-    if (pVM->hwaccm.s.paStatExitReason)
-    {
-        MMHyperFree(pVM, pVM->hwaccm.s.paStatExitReason);
-        pVM->hwaccm.s.paStatExitReason = NULL;
-    }
     return 0;
 }
@@ -853 +852 @@
 VMMR3DECL(int) HWACCMR3TermCPU(PVM pVM)
 {
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PVMCPU pVCpu = &pVM->aCpus[i];
+
+        if (pVCpu->hwaccm.s.paStatExitReason)
+        {
+            MMHyperFree(pVM, pVCpu->hwaccm.s.paStatExitReason);
+            pVCpu->hwaccm.s.paStatExitReason   = NULL;
+            pVCpu->hwaccm.s.paStatExitReasonR0 = NULL;
+        }
+    }
     return 0;
 }

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -185 +185 @@
     /** Set if nested paging is allowed. */
     bool                        fAllowNestedPaging;
-    /** Set if VT-x VPID is allowed. */
-    bool                        fAllowVPID;
 
     /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask
      *  naturally. */
-    bool                        padding[1];
+    bool                        padding[2];
 
     /** And mask for copying register contents. */
@@ -212 +210 @@
         /** Set if VPID is supported. */
         bool                        fVPID;
+
+        /** Set if VT-x VPID is allowed. */
+        bool                        fAllowVPID;
 
         /** Virtual address of the TSS page used for real mode emulation. */
@@ -344 +345 @@
     /** Currenty shadow paging mode. */
     PGMMODE                 enmShadowMode;
-
-    /** Explicit alignment padding of StatEntry (32-bit g++ again). */
-    int32_t                 padding2;
+} HWACCM;
+/** Pointer to HWACCM VM instance data. */
+typedef HWACCM *PHWACCM;
+
+/**
+ * HWACCM VMCPU Instance data.
+ */
+typedef struct HWACCMCPU
+{
+    /** Old style FPU reporting trap mask override performed (optimization) */
+    bool                        fFPUOldStyleOverride;
+
+    /** Set if we don't have to flush the TLB on VM entry. */
+    bool                        fResumeVM;
+
+    /** Set if we need to flush the TLB during the world switch. */
+    bool                        fForceTLBFlush;
+
+    /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask
+     *  naturally. */
+    bool                        padding[1];
+
+    /** HWACCM_CHANGED_* flags. */
+    RTUINT                      fContextUseFlags;
+
+    /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */
+    RTCPUID                     idLastCpu;
+
+    /* TLB flush count */
+    RTUINT                      cTLBFlushes;
+
+    /* Current ASID in use by the VM */
+    RTUINT                      uCurrentASID;
+
+    struct
+    {
+        /** R0 memory object for the VM control structure (VMCS). */
+        RTR0MEMOBJ                  pMemObjVMCS;
+        /** Physical address of the VM control structure (VMCS). */
+        RTHCPHYS                    pVMCSPhys;
+        /** Virtual address of the VM control structure (VMCS). */
+        R0PTRTYPE(void *)           pVMCS;
+
+        /** Ring 0 handlers for VT-x. */
+        DECLR0CALLBACKMEMBER(int,  pfnStartVM,(RTHCUINT fResume, PCPUMCTX pCtx));
+
+        /** Current VMX_VMCS_CTRL_PROC_EXEC_CONTROLS. */
+        uint64_t                    proc_ctls;
+
+        /** Current CR0 mask. */
+        uint64_t                    cr0_mask;
+        /** Current CR4 mask. */
+        uint64_t                    cr4_mask;
+
+        /** Current EPTP. */
+        RTHCPHYS                    GCPhysEPTP;
+
+        /** Real-mode emulation state. */
+        struct
+        {
+            X86EFLAGS                   eflags;
+            uint32_t                    fValid;
+        } RealMode;
+
+        struct
+        {
+            uint64_t                u64VMCSPhys;
+            uint32_t                ulVMCSRevision;
+            uint32_t                ulLastInstrError;
+            uint32_t                ulLastExitReason;
+            uint32_t                padding;
+        } lasterror;
+
+    } vmx;
+
+    struct
+    {
+        /** R0 memory object for the VM control block (VMCB). */
+        RTR0MEMOBJ                  pMemObjVMCB;
+        /** Physical address of the VM control block (VMCB). */
+        RTHCPHYS                    pVMCBPhys;
+        /** Virtual address of the VM control block (VMCB). */
+        R0PTRTYPE(void *)           pVMCB;
+
+        /** Ring 0 handlers for VT-x. */
+        DECLR0CALLBACKMEMBER(int, pfnVMRun,(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx));
+
+    } svm;
+
+#if HC_ARCH_BITS == 32
+    uint32_t                        Alignment;
+#endif
+
+    /** Event injection state. */
+    struct
+    {
+        uint32_t                    fPending;
+        uint32_t                    errCode;
+        uint64_t                    intInfo;
+    } Event;
 
 #ifdef VBOX_STRICT
@@ -418 +516 @@
     R3PTRTYPE(PSTAMCOUNTER) paStatExitReason;
     R0PTRTYPE(PSTAMCOUNTER) paStatExitReasonR0;
-} HWACCM;
-/** Pointer to HWACCM VM instance data. */
-typedef HWACCM *PHWACCM;
-
-/**
- * HWACCM VMCPU Instance data.
- */
-typedef struct HWACCMCPU
-{
-    /** Old style FPU reporting trap mask override performed (optimization) */
-    bool                        fFPUOldStyleOverride;
-
-    /** Set if we don't have to flush the TLB on VM entry. */
-    bool                        fResumeVM;
-
-    /** Set if we need to flush the TLB during the world switch. */
-    bool                        fForceTLBFlush;
-
-    /** Explicit alignment padding to make 32-bit gcc align u64RegisterMask
-     *  naturally. */
-    bool                        padding[1];
-
-    /** HWACCM_CHANGED_* flags. */
-    RTUINT                      fContextUseFlags;
-
-    /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */
-    RTCPUID                     idLastCpu;
-
-    /* TLB flush count */
-    RTUINT                      cTLBFlushes;
-
-    /* Current ASID in use by the VM */
-    RTUINT                      uCurrentASID;
-
-    struct
-    {
-        /** R0 memory object for the VM control structure (VMCS). */
-        RTR0MEMOBJ                  pMemObjVMCS;
-        /** Physical address of the VM control structure (VMCS). */
-        RTHCPHYS                    pVMCSPhys;
-        /** Virtual address of the VM control structure (VMCS). */
-        R0PTRTYPE(void *)           pVMCS;
-
-        /** Ring 0 handlers for VT-x. */
-        DECLR0CALLBACKMEMBER(int,  pfnStartVM,(RTHCUINT fResume, PCPUMCTX pCtx));
-
-        /** Current VMX_VMCS_CTRL_PROC_EXEC_CONTROLS. */
-        uint64_t                    proc_ctls;
-
-        /** Current CR0 mask. */
-        uint64_t                    cr0_mask;
-        /** Current CR4 mask. */
-        uint64_t                    cr4_mask;
-
-        /** Current EPTP. */
-        RTHCPHYS                    GCPhysEPTP;
-
-        /** Real-mode emulation state. */
-        struct
-        {
-            X86EFLAGS                   eflags;
-            uint32_t                    fValid;
-        } RealMode;
-
-        struct
-        {
-            uint64_t                u64VMCSPhys;
-            uint32_t                ulVMCSRevision;
-            uint32_t                ulLastInstrError;
-            uint32_t                ulLastExitReason;
-            uint32_t                padding;
-        } lasterror;
-
-    } vmx;
-
-    struct
-    {
-        /** R0 memory object for the VM control block (VMCB). */
-        RTR0MEMOBJ                  pMemObjVMCB;
-        /** Physical address of the VM control block (VMCB). */
-        RTHCPHYS                    pVMCBPhys;
-        /** Virtual address of the VM control block (VMCB). */
-        R0PTRTYPE(void *)           pVMCB;
-
-        /** Ring 0 handlers for VT-x. */
-        DECLR0CALLBACKMEMBER(int, pfnVMRun,(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx));
-
-    } svm;
-
-#if HC_ARCH_BITS == 32
-    uint32_t                        Alignment;
-#endif
-
-    /** Event injection state. */
-    struct
-    {
-        uint32_t                    fPending;
-        uint32_t                    errCode;
-        uint64_t                    intInfo;
-    } Event;
-
 } HWACCMCPU;
 /** Pointer to HWACCM VM instance data. */

trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp

@@ -54 +54 @@
 {
 #ifdef IN_RING0
-    PVMCPU pVCpu = &pVM->aCpus[HWACCMGetVMCPUId(pVM)];
+    PVMCPU pVCpu = VMMGetCpu(pVM);
     if (pVM->hwaccm.s.vmx.fSupported)
         return VMXR0InvalidatePage(pVM, pVCpu, GCVirt);
@@ -73 +73 @@
 VMMDECL(int) HWACCMFlushTLB(PVM pVM)
 {
+    PVMCPU pVCpu = VMMGetCpu(pVM);
+
     LogFlow(("HWACCMFlushTLB\n"));
 
-    pVM->aCpus[HWACCMGetVMCPUId(pVM)].hwaccm.s.fForceTLBFlush = true;
-    STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBManual);
+    pVCpu->hwaccm.s.fForceTLBFlush = true;
+    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBManual);
     return VINF_SUCCESS;
 }
@@ -121 +123 @@
 
 #ifdef IN_RING0
-    PVMCPU pVCpu = &pVM->aCpus[HWACCMGetVMCPUId(pVM)];
+    PVMCPU pVCpu = VMMGetCpu(pVM);
     if (pVM->hwaccm.s.vmx.fSupported)
         return VMXR0InvalidatePhysPage(pVM, pVCpu, GCPhys);
@@ -141 +143 @@
 VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM)
 {
-    /* @todo SMP */
-    return !!pVM->aCpus[0].hwaccm.s.Event.fPending;
+    PVMCPU pVCpu = VMMGetCpu(pVM);
+    return !!pVCpu->hwaccm.s.Event.fPending;
 }
 

trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp

@@ -67 +67 @@
     PVM pVM = pCritSect->s.CTX_SUFF(pVM);
     Assert(pVM);
-
-    RTCPUID idCPU = VM_GET_VMCPUID(pVM);
+    PVMCPU pVCpu = VMMGetCpu(pVM);
 
     /*
@@ -76 +75 @@
     {
         pCritSect->s.Core.cNestings = 1;
-        Assert(pVM->aCpus[idCPU].hNativeThread);
-        ASMAtomicXchgSize(&pCritSect->s.Core.NativeThreadOwner, pVM->aCpus[idCPU].hNativeThread);
+        Assert(pVCpu->hNativeThread);
+        ASMAtomicXchgSize(&pCritSect->s.Core.NativeThreadOwner, pVCpu->hNativeThread);
         STAM_PROFILE_ADV_START(&pCritSect->s.StatLocked, l);
         return VINF_SUCCESS;
@@ -85 +84 @@
      * Nested?
      */
-    if (pCritSect->s.Core.NativeThreadOwner == pVM->aCpus[idCPU].hNativeThread)
+    if (pCritSect->s.Core.NativeThreadOwner == pVCpu->hNativeThread)
     {
         pCritSect->s.Core.cNestings++;
@@ -163 +162 @@
     PVM pVM = pCritSect->s.CTX_SUFF(pVM);
     Assert(pVM);
-    AssertMsg(pCritSect->s.Core.NativeThreadOwner == pVM->aCpus[VM_GET_VMCPUID(pVM)].hNativeThread, ("Owner %RX64 emt=%RX64\n", pCritSect->s.Core.NativeThreadOwner, pVM->aCpus[VM_GET_VMCPUID(pVM)].hNativeThread));
+    PVMCPU pVCpu = VMMGetCpu(pVM);
+    Assert(pVCpu);
+    AssertMsg(pCritSect->s.Core.NativeThreadOwner == pVCpu->hNativeThread, ("Owner %RX64 emt=%RX64\n", pCritSect->s.Core.NativeThreadOwner, pVCpu->hNativeThread));
 
     /*
@@ -187 +188 @@
 
         /* darn, someone raced in on us. */
-        Assert(pVM->aCpus[VM_GET_VMCPUID(pVM)].hNativeThread);
-        ASMAtomicXchgSize(&pCritSect->s.Core.NativeThreadOwner, pVM->aCpus[VM_GET_VMCPUID(pVM)].hNativeThread);
+        Assert(pVCpu->hNativeThread);
+        ASMAtomicXchgSize(&pCritSect->s.Core.NativeThreadOwner, pVCpu->hNativeThread);
         STAM_PROFILE_ADV_START(&pCritSect->s.StatLocked, l);
     }
@@ -222 +223 @@
     PVM pVM = pCritSect->s.CTX_SUFF(pVM);
     Assert(pVM);
-    return pCritSect->s.Core.NativeThreadOwner == pVM->aCpus[VM_GET_VMCPUID(pVM)].hNativeThread;
+    return pCritSect->s.Core.NativeThreadOwner == VMMGetCpu(pVM)->hNativeThread;
 #endif
 }

trunk/src/VBox/VMM/VMMAll/VMMAll.cpp

@@ -29 +29 @@
 #include <VBox/vm.h>
 #include <VBox/param.h>
+#include <VBox/hwaccm.h>
 
 
@@ -57 +58 @@
 VMCPUID VMMGetCpuId(PVM pVM)
 {
-#ifdef VBOX_WITH_SMP_GUESTS
     /* Only emulation thread(s) allowed to ask for CPU id */
     VM_ASSERT_EMT(pVM);
 
-# if defined(IN_RC)
+#if defined(IN_RC)
     /* There is only one CPU if we're in GC. */
     return 0;
 
-# elif defined(IN_RING3)
+#elif defined(IN_RING3)
     return VMR3GetVMCPUId(pVM);
 
-# else  /* IN_RING0 */
-    /** @todo SMP: Get the real CPU ID and use a table in the VM structure to
-     *  translate it. */
-    return 0;
-# endif /* IN_RING0 */
-
-#else
-    VM_ASSERT_EMT(pVM);
-    return 0;
-#endif
+#else  /* IN_RING0 */
+    return HWACCMGetVMCPUId(pVM);
+#endif /* IN_RING0 */
 }
 
+/**
+ * Returns the VMCPU of the current EMT thread.
+ *
+ * @returns The VMCPU pointer.
+ * @param   pVM         The VM to operate on.
+ */
+PVMCPU VMMGetCpu(PVM pVM)
+{
+    /* Only emulation thread(s) allowed to ask for CPU id */
+    VM_ASSERT_EMT(pVM);
+
+#if defined(IN_RC)
+    /* There is only one CPU if we're in GC. */
+    return &pVM->aCpus[0];
+
+#elif defined(IN_RING3)
+    return &pVM->aCpus[VMR3GetVMCPUId(pVM)];
+
+#else  /* IN_RING0 */
+    return &pVM->aCpus[HWACCMGetVMCPUId(pVM)];
+#endif /* IN_RING0 */
+}
 
 /**

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -774 +774 @@
     pVM->hwaccm.s.cpuid.u32AMDFeatureEDX    = HWACCMR0Globals.cpuid.u32AMDFeatureEDX;
     pVM->hwaccm.s.lLastError                = HWACCMR0Globals.lLastError;
+
+    pVM->hwaccm.s.uMaxASID                  = HWACCMR0Globals.uMaxASID;
+
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PVMCPU pVCpu = &pVM->aCpus[i];
+
 #ifdef VBOX_STRICT
-    pVM->hwaccm.s.idEnteredCpu              = NIL_RTCPUID;
+        pVCpu->hwaccm.s.idEnteredCpu              = NIL_RTCPUID;
 #endif
-
-    pVM->hwaccm.s.uMaxASID                  = HWACCMR0Globals.uMaxASID;
-
-    for (unsigned i=0;i<pVM->cCPUs;i++)
-    {
         /* Invalidate the last cpu we were running on. */
-        pVM->aCpus[i].hwaccm.s.idLastCpu                 = NIL_RTCPUID;
+        pVCpu->hwaccm.s.idLastCpu                 = NIL_RTCPUID;
 
         /* we'll aways increment this the first time (host uses ASID 0) */
-        pVM->aCpus[i].hwaccm.s.uCurrentASID              = 0;
+        pVCpu->hwaccm.s.uCurrentASID              = 0;
     }
 
@@ -916 +918 @@
     if (RT_SUCCESS(rc))
     {
-        AssertMsg(pVM->hwaccm.s.idEnteredCpu == NIL_RTCPUID, ("%d", (int)pVM->hwaccm.s.idEnteredCpu));
-        pVM->hwaccm.s.idEnteredCpu = idCpu;
+        AssertMsg(pVCpu->hwaccm.s.idEnteredCpu == NIL_RTCPUID, ("%d", (int)pVCpu->hwaccm.s.idEnteredCpu));
+        pVCpu->hwaccm.s.idEnteredCpu = idCpu;
     }
 #endif
@@ -959 +961 @@
 #ifdef VBOX_STRICT
     /* keep track of the CPU owning the VMCS for debugging scheduling weirdness and ring-3 calls. */
-    AssertMsg(pVM->hwaccm.s.idEnteredCpu == idCpu, ("owner is %d, I'm %d", (int)pVM->hwaccm.s.idEnteredCpu, (int)idCpu));
-    pVM->hwaccm.s.idEnteredCpu = NIL_RTCPUID;
+    AssertMsg(pVCpu->hwaccm.s.idEnteredCpu == idCpu, ("owner is %d, I'm %d", (int)pVCpu->hwaccm.s.idEnteredCpu, (int)idCpu));
+    pVCpu->hwaccm.s.idEnteredCpu = NIL_RTCPUID;
 #endif
 

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -405 +405 @@
 
         Log(("Reinjecting event %08x %08x at %RGv\n", pVCpu->hwaccm.s.Event.intInfo, pVCpu->hwaccm.s.Event.errCode, (RTGCPTR)pCtx->rip));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntReinject);
         Event.au64[0] = pVCpu->hwaccm.s.Event.intInfo;
         SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
@@ -448 +448 @@
                 /* Can only happen in rare cases where a pending interrupt is cleared behind our back */
                 Assert(!VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatSwitchGuestIrq);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchGuestIrq);
                 /* Just continue */
             }
@@ -514 +514 @@
             Event.n.u3Type = SVM_EVENT_EXTERNAL_IRQ;
 
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntInject);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntInject);
         SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
     } /* if (interrupts can be dispatched) */
@@ -716 +716 @@
             &&  !DBGFIsStepping(pVM))
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxArmed);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxArmed);
 
             /* Disable drx move intercepts. */
@@ -766 +766 @@
     {
         pVMCB->ctrl.u32InterceptCtrl1 &= ~SVM_CTRL1_INTERCEPT_RDTSC;
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatTSCOffset);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCOffset);
     }
     else
     {
         pVMCB->ctrl.u32InterceptCtrl1 |= SVM_CTRL1_INTERCEPT_RDTSC;
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatTSCIntercept);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCIntercept);
     }
 
@@ -817 +817 @@
 #endif
 
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
 
     pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB;
@@ -830 +830 @@
     if (++cResume > HWACCM_MAX_RESUME_LOOPS)
     {
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitMaxResume);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitMaxResume);
         rc = VINF_EM_RAW_INTERRUPT;
         goto end;
@@ -866 +866 @@
         {
             VM_FF_CLEAR(pVM, VM_FF_TO_R3);
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatSwitchToR3);
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
             rc = VINF_EM_RAW_TO_R3;
             goto end;
@@ -876 +876 @@
     if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         rc = VINF_EM_PENDING_REQUEST;
         goto end;
@@ -886 +886 @@
     if (RT_FAILURE(rc))
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
     }
@@ -917 +917 @@
 
     /* All done! Let's start VM execution. */
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatInGC, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, x);
 
     /* Enable nested paging if necessary (disabled each time after #VMEXIT). */
@@ -949 +949 @@
     if (rc != VINF_SUCCESS)
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
     }
@@ -981 +981 @@
         }
         else
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushASID);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushASID);
 
         pVCpu->hwaccm.s.cTLBFlushes  = pCpu->cTLBFlushes;
@@ -1004 +1004 @@
 #ifdef VBOX_WITH_STATISTICS
     if (pVMCB->ctrl.TLBCtrl.n.u1TLBFlush)
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBWorldSwitch);
     else
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatNoFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatNoFlushTLBWorldSwitch);
 #endif
 
@@ -1036 +1036 @@
     pVCpu->hwaccm.s.svm.pfnVMRun(pVM->hwaccm.s.svm.pVMCBHostPhys, pVCpu->hwaccm.s.svm.pVMCBPhys, pCtx);
     TMNotifyEndOfExecution(pVM);
-    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatInGC, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, x);
 
     /*
@@ -1044 +1044 @@
      */
 
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatExit, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit, x);
 
     /* Reason for the VM exit */
@@ -1266 +1266 @@
 #ifdef VBOX_WITH_STATISTICS
     if (exitCode == SVM_EXIT_NPF)
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitReasonNPF);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitReasonNPF);
     else
-        STAM_COUNTER_INC(&pVM->hwaccm.s.paStatExitReasonR0[exitCode & MASK_EXITREASON_STAT]);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.paStatExitReasonR0[exitCode & MASK_EXITREASON_STAT]);
 #endif
 
@@ -1298 +1298 @@
         case X86_XCPT_DB:
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestDB);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestDB);
 
             /* Note that we don't support guest and host-initiated debugging at the same time. */
@@ -1316 +1316 @@
                 SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -1333 +1333 @@
             {
                 Assert(CPUMIsGuestFPUStateActive(pVM));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowNM);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowNM);
 
                 /* Continue execution. */
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
 
@@ -1343 +1343 @@
 
             Log(("Forward #NM fault to the guest\n"));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestNM);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestNM);
 
             Event.au64[0]    = 0;
@@ -1351 +1351 @@
 
             SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1366 +1366 @@
                  */
                 Log(("Guest page fault at %RGv cr2=%RGv error code %x rsp=%RGv\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode, (RTGCPTR)pCtx->rsp));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestPF);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
 
                 /* Now we must update CR2. */
@@ -1380 +1380 @@
                 SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -1398 +1398 @@
             {   /* We've successfully synced our shadow pages, so let's just continue execution. */
                 Log2(("Shadow page fault at %RGv cr2=%RGv error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
                 TRPMResetTrap(pVM);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -1411 +1411 @@
                  */
                 Log2(("Forward page fault to the guest\n"));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestPF);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
                 /* The error code might have been changed. */
                 errCode = TRPMGetErrorCode(pVM);
@@ -1429 +1429 @@
                 SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -1443 +1443 @@
         case X86_XCPT_MF: /* Floating point exception. */
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestMF);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestMF);
             if (!(pCtx->cr0 & X86_CR0_NE))
             {
@@ -1460 +1460 @@
             SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1479 +1479 @@
             {
             case X86_XCPT_GP:
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestGP);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestGP);
                 Event.n.u1ErrorCodeValid    = 1;
                 Event.n.u32ErrorCode        = pVMCB->ctrl.u64ExitInfo1; /* EXITINFO1 = error code */
                 break;
             case X86_XCPT_DE:
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestDE);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestDE);
                 break;
             case X86_XCPT_UD:
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestUD);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestUD);
                 break;
             case X86_XCPT_SS:
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestSS);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestSS);
                 Event.n.u1ErrorCodeValid    = 1;
                 Event.n.u32ErrorCode        = pVMCB->ctrl.u64ExitInfo1; /* EXITINFO1 = error code */
                 break;
             case X86_XCPT_NP:
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestNP);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestNP);
                 Event.n.u1ErrorCodeValid    = 1;
                 Event.n.u32ErrorCode        = pVMCB->ctrl.u64ExitInfo1; /* EXITINFO1 = error code */
@@ -1503 +1503 @@
             SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1535 +1535 @@
         {   /* We've successfully synced our shadow pages, so let's just continue execution. */
             Log2(("Shadow page fault at %RGv cr2=%RGp error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
             TRPMResetTrap(pVM);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1570 +1570 @@
     case SVM_EXIT_WBINVD:
     case SVM_EXIT_INVD:                 /* Guest software attempted to execute INVD. */
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvd);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitInvd);
         /* Skip instruction and continue directly. */
         pCtx->rip += 2;     /* Note! hardcoded opcode size! */
         /* Continue execution.*/
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
         goto ResumeExecution;
 
@@ -1580 +1580 @@
     {
         Log2(("SVM: Cpuid at %RGv for %x\n", (RTGCPTR)pCtx->rip, pCtx->eax));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCpuid);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCpuid);
         rc = EMInterpretCpuId(pVM, CPUMCTX2CORE(pCtx));
         if (rc == VINF_SUCCESS)
@@ -1586 +1586 @@
             /* Update EIP and continue execution. */
             pCtx->rip += 2;             /* Note! hardcoded opcode size! */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1597 +1597 @@
     {
         Log2(("SVM: Rdtsc\n"));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitRdtsc);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitRdtsc);
         rc = EMInterpretRdtsc(pVM, CPUMCTX2CORE(pCtx));
         if (rc == VINF_SUCCESS)
@@ -1603 +1603 @@
             /* Update EIP and continue execution. */
             pCtx->rip += 2;             /* Note! hardcoded opcode size! */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1614 +1614 @@
     {
         Log2(("SVM: invlpg\n"));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvpg);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitInvpg);
 
         Assert(!pVM->hwaccm.s.fNestedPaging);
@@ -1622 +1622 @@
         if (rc == VINF_SUCCESS)
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushPageInvlpg);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushPageInvlpg);
             goto ResumeExecution;   /* eip already updated */
         }
@@ -1636 +1636 @@
 
         Log2(("SVM: %RGv mov cr%d, \n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_WRITE_CR0));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxWrite);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxWrite);
         rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize);
 
@@ -1665 +1665 @@
             AssertRC(rc);
 
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBCRxChange);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBCRxChange);
 
             /* Must be set by PGMSyncCR3 */
@@ -1675 +1675 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1690 +1690 @@
 
         Log2(("SVM: %RGv mov x, cr%d\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_READ_CR0));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxRead);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxRead);
         rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize);
         if (rc == VINF_SUCCESS)
@@ -1697 +1697 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1712 +1712 @@
 
         Log2(("SVM: %RGv mov dr%d, x\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_WRITE_DR0));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxRead);
 
         if (!DBGFIsStepping(pVM))
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxContextSwitch);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxContextSwitch);
 
             /* Disable drx move intercepts. */
@@ -1726 +1726 @@
             AssertRC(rc);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1737 +1737 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1752 +1752 @@
 
         Log2(("SVM: %RGv mov dr%d, x\n", (RTGCPTR)pCtx->rip, exitCode - SVM_EXIT_READ_DR0));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxRead);
 
         if (!DBGFIsStepping(pVM))
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxContextSwitch);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxContextSwitch);
 
             /* Disable drx move intercepts. */
@@ -1766 +1766 @@
             AssertRC(rc);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1776 +1776 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -1826 +1826 @@
             {
                 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringWrite);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
                 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, prefix, uIOSize);
             }
@@ -1832 +1832 @@
             {
                 Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringRead);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
                 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, prefix, uIOSize);
             }
@@ -1844 +1844 @@
             {
                 Log2(("IOMIOPortWrite %RGv %x %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, pCtx->eax & uAndVal, uIOSize));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOWrite);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOWrite);
                 rc = IOMIOPortWrite(pVM, IoExitInfo.n.u16Port, pCtx->eax & uAndVal, uIOSize);
             }
@@ -1851 +1851 @@
                 uint32_t u32Val = 0;
 
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIORead);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIORead);
                 rc = IOMIOPortRead(pVM, IoExitInfo.n.u16Port, &u32Val, uIOSize);
                 if (IOM_SUCCESS(rc))
@@ -1874 +1874 @@
                 if (pCtx->dr[7] & X86_DR7_ENABLED_MASK)
                 {
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxIOCheck);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxIOCheck);
                     for (unsigned i=0;i<4;i++)
                     {
@@ -1917 +1917 @@
                             SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-                            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                             goto ResumeExecution;
                         }
@@ -1923 +1923 @@
                 }
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -1974 +1974 @@
         SVMR0InjectEvent(pVM, pVMCB, pCtx, &Event);
 
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
         goto ResumeExecution;
     }
@@ -1991 +1991 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2035 +2035 @@
     if (exitCode == SVM_EXIT_INTR)
     {
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatPendingHostIrq);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatPendingHostIrq);
         /* On the next entry we'll only sync the host context. */
         pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_HOST_CONTEXT;
@@ -2051 +2051 @@
         rc = VINF_EM_RAW_EMULATE_INSTR;
 
-    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
     return rc;
 }
@@ -2220 +2220 @@
         AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_EM_INTERNAL_ERROR);
 
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushPageManual);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushPageManual);
         SVMInvlpgA(GCVirt, pVMCB->ctrl.TLBCtrl.n.u32ASID);
     }
@@ -2240 +2240 @@
     /* invlpga only invalidates TLB entries for guest virtual addresses; we have no choice but to force a TLB flush here. */
     pVCpu->hwaccm.s.fForceTLBFlush = true;
-    STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBInvlpga);
+    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBInvlpga);
     return VINF_SUCCESS;
 }

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -655 +655 @@
     {
         Log(("Reinjecting event %RX64 %08x at %RGv cr2=%RX64\n", pVCpu->hwaccm.s.Event.intInfo, pVCpu->hwaccm.s.Event.errCode, (RTGCPTR)pCtx->rip, pCtx->cr2));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntReinject);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntReinject);
         rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, pVCpu->hwaccm.s.Event.intInfo, 0, pVCpu->hwaccm.s.Event.errCode);
         AssertRC(rc);
@@ -694 +694 @@
                 /* Can only happen in rare cases where a pending interrupt is cleared behind our back */
                 Assert(!VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatSwitchGuestIrq);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchGuestIrq);
                 /* Just continue */
             }
@@ -759 +759 @@
             intInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
 
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatIntInject);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntInject);
         rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, intInfo, 0, errCode);
         AssertRC(rc);
@@ -1329 +1329 @@
             &&  !DBGFIsStepping(pVM))
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxArmed);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxArmed);
 
             /* Disable drx move intercepts. */
@@ -1389 +1389 @@
         rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls);
         AssertRC(rc);
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatTSCOffset);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCOffset);
     }
     else
@@ -1396 +1396 @@
         rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls);
         AssertRC(rc);
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatTSCIntercept);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCIntercept);
     }
 
@@ -1614 +1614 @@
 #ifdef VBOX_WITH_STATISTICS
     if (pVCpu->hwaccm.s.fForceTLBFlush)
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBWorldSwitch);
     else
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatNoFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatNoFlushTLBWorldSwitch);
 #endif
 }
@@ -1663 +1663 @@
         else
         {
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushASID);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushASID);
             pVCpu->hwaccm.s.fForceTLBFlush     = false;
         }
@@ -1689 +1689 @@
 #ifdef VBOX_WITH_STATISTICS
     if (pVCpu->hwaccm.s.fForceTLBFlush)
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBWorldSwitch);
     else
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatNoFlushTLBWorldSwitch);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatNoFlushTLBWorldSwitch);
 #endif
 }
@@ -1721 +1721 @@
     Log2(("\nE"));
 
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
 
 #ifdef VBOX_STRICT
@@ -1782 +1782 @@
      */
 ResumeExecution:
-    AssertMsg(pVM->hwaccm.s.idEnteredCpu == RTMpCpuId(),
+    AssertMsg(pVCpu->hwaccm.s.idEnteredCpu == RTMpCpuId(),
               ("Expected %d, I'm %d; cResume=%d exitReason=%RTreg exitQualification=%RTreg\n",
-               (int)pVM->hwaccm.s.idEnteredCpu, (int)RTMpCpuId(), cResume, exitReason, exitQualification));
+               (int)pVCpu->hwaccm.s.idEnteredCpu, (int)RTMpCpuId(), cResume, exitReason, exitQualification));
     Assert(!HWACCMR0SuspendPending());
 
@@ -1790 +1790 @@
     if (++cResume > HWACCM_MAX_RESUME_LOOPS)
     {
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitMaxResume);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitMaxResume);
         rc = VINF_EM_RAW_INTERRUPT;
         goto end;
@@ -1823 +1823 @@
     {
         VM_FF_CLEAR(pVM, VM_FF_TO_R3);
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatSwitchToR3);
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         rc = VINF_EM_RAW_TO_R3;
         goto end;
@@ -1831 +1831 @@
     if (VM_FF_ISPENDING(pVM, VM_FF_REQUEST))
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         rc = VINF_EM_PENDING_REQUEST;
         goto end;
@@ -1841 +1841 @@
     if (RT_FAILURE(rc))
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
     }
@@ -1913 +1913 @@
     if (rc != VINF_SUCCESS)
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
     }
@@ -1920 +1920 @@
     if (rc != VINF_SUCCESS)
     {
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
     }
@@ -1932 +1932 @@
     AssertRC(rc);
 
-    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatEntry, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
 
     /* Manual save and restore:
@@ -1947 +1947 @@
 
     /* All done! Let's start VM execution. */
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatInGC, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, x);
 #ifdef VBOX_STRICT
     Assert(idCpuCheck == RTMpCpuId());
@@ -1965 +1965 @@
      */
 
-    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatInGC, x);
-    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatExit, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, x);
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit, x);
 
     if (rc != VINF_SUCCESS)
@@ -1977 +1977 @@
     /* Investigate why there was a VM-exit. */
     rc  = VMXReadVMCS(VMX_VMCS_RO_EXIT_REASON, &exitReason);
-    STAM_COUNTER_INC(&pVM->hwaccm.s.paStatExitReasonR0[exitReason & MASK_EXITREASON_STAT]);
+    STAM_COUNTER_INC(&pVCpu->hwaccm.s.paStatExitReasonR0[exitReason & MASK_EXITREASON_STAT]);
 
     exitReason &= 0xffff;   /* bit 0-15 contain the exit code. */
@@ -2084 +2084 @@
                     Assert(CPUMIsGuestFPUStateActive(pVM));
 
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowNM);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowNM);
 
                     /* Continue execution. */
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
 
@@ -2094 +2094 @@
 
                 Log(("Forward #NM fault to the guest\n"));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestNM);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestNM);
                 rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, 0);
                 AssertRC(rc);
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -2112 +2112 @@
                     Assert(CPUMIsGuestInPagedProtectedModeEx(pCtx));
 
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestPF);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
 
                     /* Now we must update CR2. */
@@ -2119 +2119 @@
                     AssertRC(rc);
 
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2137 +2137 @@
                 {   /* We've successfully synced our shadow pages, so let's just continue execution. */
                     Log2(("Shadow page fault at %RGv cr2=%RGv error code %x\n", (RTGCPTR)pCtx->rip, exitQualification ,errCode));
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
                     TRPMResetTrap(pVM);
 
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2151 +2151 @@
                     Log2(("Forward page fault to the guest\n"));
 
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestPF);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
                     /* The error code might have been changed. */
                     errCode = TRPMGetErrorCode(pVM);
@@ -2162 +2162 @@
                     AssertRC(rc);
 
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2176 +2176 @@
             case X86_XCPT_MF: /* Floating point exception. */
             {
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestMF);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestMF);
                 if (!(pCtx->cr0 & X86_CR0_NE))
                 {
@@ -2188 +2188 @@
                 AssertRC(rc);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -2205 +2205 @@
                  * 63:15    Reserved (0)
                  */
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestDB);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestDB);
 
                 /* Note that we don't support guest and host-initiated debugging at the same time. */
@@ -2236 +2236 @@
                     AssertRC(rc);
 
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2247 +2247 @@
                 uint32_t cbSize;
 
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestGP);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestGP);
 #ifdef VBOX_STRICT
                 if (!CPUMIsGuestInRealModeEx(pCtx))
@@ -2254 +2254 @@
                     rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                     AssertRC(rc);
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2270 +2270 @@
 
                     /* Only resume if successful. */
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2286 +2286 @@
                 {
                 case X86_XCPT_DE:
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestDE);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestDE);
                     break;
                 case X86_XCPT_UD:
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestUD);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestUD);
                     break;
                 case X86_XCPT_SS:
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestSS);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestSS);
                     break;
                 case X86_XCPT_NP:
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitGuestNP);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestNP);
                     break;
                 }
@@ -2303 +2303 @@
                 AssertRC(rc);
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -2320 +2320 @@
                         break;
 
-                    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                     goto ResumeExecution;
                 }
@@ -2385 +2385 @@
         {   /* We've successfully synced our shadow pages, so let's just continue execution. */
             Log2(("Shadow page fault at %RGv cr2=%RGp error code %x\n", (RTGCPTR)pCtx->rip, exitQualification , errCode));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitShadowPF);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
             TRPMResetTrap(pVM);
 
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2408 +2408 @@
         rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls);
         AssertRC(rc);
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIrqWindow);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIrqWindow);
         goto ResumeExecution;   /* we check for pending guest interrupts there */
 
     case VMX_EXIT_WBINVD:               /* 54 Guest software attempted to execute WBINVD. (conditional) */
     case VMX_EXIT_INVD:                 /* 13 Guest software attempted to execute INVD. (unconditional) */
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvd);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitInvd);
         /* Skip instruction and continue directly. */
         pCtx->rip += cbInstr;
         /* Continue execution.*/
-        STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
         goto ResumeExecution;
 
@@ -2423 +2423 @@
     {
         Log2(("VMX: Cpuid %x\n", pCtx->eax));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCpuid);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCpuid);
         rc = EMInterpretCpuId(pVM, CPUMCTX2CORE(pCtx));
         if (rc == VINF_SUCCESS)
@@ -2430 +2430 @@
             Assert(cbInstr == 2);
             pCtx->rip += cbInstr;
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2441 +2441 @@
     {
         Log2(("VMX: Rdtsc\n"));
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitRdtsc);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitRdtsc);
         rc = EMInterpretRdtsc(pVM, CPUMCTX2CORE(pCtx));
         if (rc == VINF_SUCCESS)
@@ -2448 +2448 @@
             Assert(cbInstr == 2);
             pCtx->rip += cbInstr;
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2461 +2461 @@
         Assert(!pVM->hwaccm.s.fNestedPaging);
 
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitInvpg);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitInvpg);
         rc = EMInterpretInvlpg(pVM, CPUMCTX2CORE(pCtx), exitQualification);
         if (rc == VINF_SUCCESS)
@@ -2467 +2467 @@
             /* Update EIP and continue execution. */
             pCtx->rip += cbInstr;
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2487 +2487 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2500 +2500 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_WRITE:
             Log2(("VMX: %RGv mov cr%d, x\n", (RTGCPTR)pCtx->rip, VMX_EXIT_QUALIFICATION_CRX_REGISTER(exitQualification)));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxWrite);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxWrite);
             rc = EMInterpretCRxWrite(pVM, CPUMCTX2CORE(pCtx),
                                      VMX_EXIT_QUALIFICATION_CRX_REGISTER(exitQualification),
@@ -2539 +2539 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_READ:
             Log2(("VMX: mov x, crx\n"));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCRxRead);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCRxRead);
 
             Assert(!pVM->hwaccm.s.fNestedPaging || !CPUMIsGuestInPagedProtectedModeEx(pCtx) || VMX_EXIT_QUALIFICATION_CRX_REGISTER(exitQualification) != USE_REG_CR3);
@@ -2553 +2553 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_CLTS:
             Log2(("VMX: clts\n"));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitCLTS);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitCLTS);
             rc = EMInterpretCLTS(pVM);
             pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
@@ -2560 +2560 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_LMSW:
             Log2(("VMX: lmsw %x\n", VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(exitQualification)));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitLMSW);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitLMSW);
             rc = EMInterpretLMSW(pVM, CPUMCTX2CORE(pCtx), VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(exitQualification));
             pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
@@ -2573 +2573 @@
         {
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2594 +2594 @@
 
 #ifdef VBOX_WITH_STATISTICS
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxContextSwitch);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxContextSwitch);
             if (VMX_EXIT_QUALIFICATION_DRX_DIRECTION(exitQualification) == VMX_EXIT_QUALIFICATION_DRX_DIRECTION_WRITE)
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxWrite);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxWrite);
             else
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
-#endif
-
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxRead);
+#endif
+
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2609 +2609 @@
         {
             Log2(("VMX: mov drx%d, genreg%d\n", VMX_EXIT_QUALIFICATION_DRX_REGISTER(exitQualification), VMX_EXIT_QUALIFICATION_DRX_GENREG(exitQualification)));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxWrite);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxWrite);
             rc = EMInterpretDRxWrite(pVM, CPUMCTX2CORE(pCtx),
                                      VMX_EXIT_QUALIFICATION_DRX_REGISTER(exitQualification),
@@ -2619 +2619 @@
         {
             Log2(("VMX: mov x, drx\n"));
-            STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitDRxRead);
+            STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitDRxRead);
             rc = EMInterpretDRxRead(pVM, CPUMCTX2CORE(pCtx),
                                     VMX_EXIT_QUALIFICATION_DRX_GENREG(exitQualification),
@@ -2631 +2631 @@
         {
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
             goto ResumeExecution;
         }
@@ -2672 +2672 @@
             {
                 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringWrite);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
                 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, prefix, cbSize);
             }
@@ -2678 +2678 @@
             {
                 Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOStringRead);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
                 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, prefix, cbSize);
             }
@@ -2691 +2691 @@
             if (fIOWrite)
             {
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIOWrite);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOWrite);
                 rc = IOMIOPortWrite(pVM, uPort, pCtx->eax & uAndVal, cbSize);
             }
@@ -2698 +2698 @@
                 uint32_t u32Val = 0;
 
-                STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIORead);
+                STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIORead);
                 rc = IOMIOPortRead(pVM, uPort, &u32Val, cbSize);
                 if (IOM_SUCCESS(rc))
@@ -2720 +2720 @@
                 if (pCtx->dr[7] & X86_DR7_ENABLED_MASK)
                 {
-                    STAM_COUNTER_INC(&pVM->hwaccm.s.StatDRxIOCheck);
+                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatDRxIOCheck);
                     for (unsigned i=0;i<4;i++)
                     {
@@ -2766 +2766 @@
                             AssertRC(rc);
 
-                            STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                             goto ResumeExecution;
                         }
@@ -2772 +2772 @@
                 }
 
-                STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
                 goto ResumeExecution;
             }
@@ -2952 +2952 @@
         &&  !VMX_EXIT_INTERRUPTION_INFO_VALID(intInfo))
     {
-        STAM_COUNTER_INC(&pVM->hwaccm.s.StatPendingHostIrq);
+        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatPendingHostIrq);
         /* On the next entry we'll only sync the host context. */
         pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_HOST_CONTEXT;
@@ -2975 +2975 @@
     }
 
-    STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit, x);
 
     Log2(("X"));

trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

@@ -265 +265 @@
     CHECK_MEMBER_ALIGNMENT(HWACCM, vmx.hostCR4, 8);
     CHECK_MEMBER_ALIGNMENT(HWACCM, vmx.msr.feature_ctrl, 8);
-    CHECK_MEMBER_ALIGNMENT(HWACCM, StatEntry, 8);
+    CHECK_MEMBER_ALIGNMENT(HWACCMCPU, StatEntry, 8);
     CHECK_MEMBER_ALIGNMENT(HWACCMCPU, vmx.proc_ctls, 8);
     CHECK_MEMBER_ALIGNMENT(HWACCMCPU, Event.intInfo, 8);