Changeset 14741 in vbox

Timestamp:

Nov 27, 2008 8:39:54 PM (16 years ago)

Author:

vboxsync

Message:

x86.h: Added X86_PTE_BIT_* for use with ASMAtomicBit*.

File:

• trunk/include/VBox/x86.h (modified) (1 diff)

trunk/include/VBox/x86.h

@@ -971 +971 @@
  */
 /** Bit 0 -  P  - Present bit. */
+#define X86_PTE_BIT_P                       0
+/** Bit 1 - R/W - Read (clear) / Write (set) bit. */
+#define X86_PTE_BIT_RW                      1)
+/** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
+#define X86_PTE_BIT_US                      2
+/** Bit 3 - PWT - Page level write thru bit. */
+#define X86_PTE_BIT_PWT                     3
+/** Bit 4 - PCD - Page level cache disable bit. */
+#define X86_PTE_BIT_PCD                     4
+/** Bit 5 -  A  - Access bit. */
+#define X86_PTE_BIT_A                       5
+/** Bit 6 -  D  - Dirty bit. */
+#define X86_PTE_BIT_D                       6
+/** Bit 7 - PAT - Page Attribute Table index bit. Reserved and 0 if not supported. */
+#define X86_PTE_BIT_PAT                     7
+/** Bit 8 -  G  - Global flag. */
+#define X86_PTE_BIT_G                       8
+
+/** Bit 0 -  P  - Present bit mask. */
 #define X86_PTE_P                           RT_BIT(0)
-/** Bit 1 - R/W - Read (clear) / Write (set) bit. */
+/** Bit 1 - R/W - Read (clear) / Write (set) bit mask. */
 #define X86_PTE_RW                          RT_BIT(1)
-/** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
+/** Bit 2 - U/S - User (set) / Supervisor (clear) bit mask. */
 #define X86_PTE_US                          RT_BIT(2)
-/** Bit 3 - PWT - Page level write thru bit. */
+/** Bit 3 - PWT - Page level write thru bit mask. */
 #define X86_PTE_PWT                         RT_BIT(3)
-/** Bit 4 - PCD - Page level cache disable bit. */
+/** Bit 4 - PCD - Page level cache disable bit mask. */
 #define X86_PTE_PCD                         RT_BIT(4)
-/** Bit 5 -  A  - Access bit. */
+/** Bit 5 -  A  - Access bit mask. */
 #define X86_PTE_A                           RT_BIT(5)
-/** Bit 6 -  D  - Dirty bit. */
+/** Bit 6 -  D  - Dirty bit mask. */
 #define X86_PTE_D                           RT_BIT(6)
-/** Bit 7 - PAT - Page Attribute Table index bit. Reserved and 0 if not supported. */
+/** Bit 7 - PAT - Page Attribute Table index bit mask. Reserved and 0 if not supported. */
 #define X86_PTE_PAT                         RT_BIT(7)
-/** Bit 8 -  G  - Global flag. */
+/** Bit 8 -  G  - Global bit mask. */
 #define X86_PTE_G                           RT_BIT(8)
+
 /** Bits 9-11 - - Available for use to system software. */
 #define X86_PTE_AVL_MASK                    (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))