Changeset 14755 in vbox for trunk/src/VBox
- Timestamp:
- Nov 28, 2008 2:58:01 AM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/PATM/CSAM.cpp
r14075 r14755 578 578 } 579 579 580 rc = PGMPhysGCPtr2 HCPtr(pVM, pGCPtr, &pHCPtr);580 rc = PGMPhysGCPtr2R3Ptr(pVM, pGCPtr, &pHCPtr); 581 581 if (rc != VINF_SUCCESS) 582 582 { … … 1279 1279 Log(("Jump through jump table\n")); 1280 1280 1281 rc2 = PGMPhysGCPtr2 HCPtr(pVM, pJumpTableGC, (PRTHCPTR)&pJumpTableHC);1281 rc2 = PGMPhysGCPtr2R3Ptr(pVM, pJumpTableGC, (PRTHCPTR)&pJumpTableHC); 1282 1282 if (rc2 == VINF_SUCCESS) 1283 1283 { … … 2328 2328 if (PAGE_ADDRESS(GCPtrIDT) == PAGE_ADDRESS(GCPtrIDT+cGates*sizeof(VBOXIDTE))) 2329 2329 { 2330 /* Just convert the IDT address to a HCpointer. The whole IDT fits in one page. */2331 rc = PGMPhysGCPtr2 HCPtr(pVM, GCPtrIDT, (PRTHCPTR)&pGuestIdte);2330 /* Just convert the IDT address to a R3 pointer. The whole IDT fits in one page. */ 2331 rc = PGMPhysGCPtr2R3Ptr(pVM, GCPtrIDT, (PRTR3PTR)&pGuestIdte); 2332 2332 if (RT_FAILURE(rc)) 2333 2333 { -
trunk/src/VBox/VMM/PATM/PATM.cpp
r13960 r14755 604 604 { 605 605 /** @note pPrivInstrHC is probably not valid anymore */ 606 rc = PGMPhysGCPtr2 HCPtr(pVM, pPatch->patch.pPrivInstrGC, (PRTHCPTR)&pPatch->patch.pPrivInstrHC);606 rc = PGMPhysGCPtr2R3Ptr(pVM, pPatch->patch.pPrivInstrGC, (PRTR3PTR)&pPatch->patch.pPrivInstrHC); 607 607 if (rc == VINF_SUCCESS) 608 608 { … … 790 790 { 791 791 /** @note pPrivInstrHC is probably not valid anymore */ 792 rc = PGMPhysGCPtr2 HCPtr(pVM, pPatch->patch.pPrivInstrGC, (PRTHCPTR)&pPatch->patch.pPrivInstrHC);792 rc = PGMPhysGCPtr2R3Ptr(pVM, pPatch->patch.pPrivInstrGC, (PRTR3PTR)&pPatch->patch.pPrivInstrHC); 793 793 if (rc == VINF_SUCCESS) 794 794 { … … 995 995 } 996 996 997 rc = PGMPhysGCPtr2 HCPtr(pVM, pGCPtr, (void **)&pHCPtr);997 rc = PGMPhysGCPtr2R3Ptr(pVM, pGCPtr, (void **)&pHCPtr); 998 998 if (rc != VINF_SUCCESS) 999 999 { … … 4121 4121 } 4122 4122 GCPhys = GCPhys + (pInstrGC & PAGE_OFFSET_MASK); 4123 rc = PGMPhysGCPhys2 HCPtr(pVM, GCPhys, MAX_INSTR_SIZE, (void **)&pInstrHC);4123 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, MAX_INSTR_SIZE, (void **)&pInstrHC); 4124 4124 AssertRCReturn(rc, rc); 4125 4125 … … 4402 4402 uint8_t *pInstrHC; 4403 4403 4404 int rc = PGMPhysGCPtr2 HCPtr(pVM, pInstrGC, (RTHCPTR *)&pInstrHC);4404 int rc = PGMPhysGCPtr2R3Ptr(pVM, pInstrGC, (PRTR3PTR)&pInstrHC); 4405 4405 if (rc == VINF_SUCCESS) 4406 4406 { … … 4999 4999 5000 5000 /** pPrivInstrHC is probably not valid anymore */ 5001 rc = PGMPhysGCPtr2 HCPtr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTHCPTR)&pPatchRec->patch.pPrivInstrHC);5001 rc = PGMPhysGCPtr2R3Ptr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTR3PTR)&pPatchRec->patch.pPrivInstrHC); 5002 5002 if (rc == VINF_SUCCESS) 5003 5003 { … … 5218 5218 Assert(!(pPatch->flags & PATMFL_PATCHED_GUEST_CODE)); 5219 5219 /** @todo -> pPrivInstrHC is probably not valid anymore */ 5220 rc = PGMPhysGCPtr2 HCPtr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTHCPTR)&pPatchRec->patch.pPrivInstrHC);5220 rc = PGMPhysGCPtr2R3Ptr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTR3PTR)&pPatchRec->patch.pPrivInstrHC); 5221 5221 if (rc == VINF_SUCCESS) 5222 5222 { -
trunk/src/VBox/VMM/PATM/PATMSSM.cpp
r13830 r14755 582 582 pPatchRec->patch.pPrivInstrHC = 0; 583 583 /* The GC virtual ptr is fixed, but we must convert it manually again to HC. */ 584 rc = PGMPhysGCPtr2 HCPtr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTHCPTR)&pPatchRec->patch.pPrivInstrHC);584 rc = PGMPhysGCPtr2R3Ptr(pVM, pPatchRec->patch.pPrivInstrGC, (PRTR3PTR)&pPatchRec->patch.pPrivInstrHC); 585 585 /* Can fail due to page or page table not present. */ 586 586 -
trunk/src/VBox/VMM/PGM.cpp
r14301 r14755 1533 1533 pVM->pgm.s.HCPhysShwPaePdpt, 1534 1534 pVM->pgm.s.HCPhysShwPaePml4)); 1535 # endif 1535 # endif 1536 1536 LogRel(("Debug: HCPhysInterPD=%RHp HCPhysInterPaePDPT=%RHp HCPhysInterPaePML4=%RHp\n", 1537 1537 pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPT, pVM->pgm.s.HCPhysInterPaePML4)); … … 2643 2643 PX86PD pPDSrc = pVM->pgm.s.pGst32BitPdR3; 2644 2644 Assert(pPDSrc); 2645 Assert(PGMPhysGCPhys2 HCPtrAssert(pVM, (RTGCPHYS)(CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK), sizeof(*pPDSrc)) == pPDSrc);2645 Assert(PGMPhysGCPhys2R3PtrAssert(pVM, (RTGCPHYS)(CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK), sizeof(*pPDSrc)) == pPDSrc); 2646 2646 2647 2647 /* -
trunk/src/VBox/VMM/PGMInternal.h
r14750 r14755 251 251 #else 252 252 # define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) \ 253 PGMPhysGCPhys2 HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */253 PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1 /* one page only */, (PRTR3PTR)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */ 254 254 #endif 255 255 … … 271 271 #else 272 272 # define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) \ 273 PGMPhysGCPhys2 HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */273 PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1 /* one page only */, (PRTR3PTR)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */ 274 274 #endif 275 275 … … 3182 3182 * @param pHCPtr Where to store the corresponding HC virtual address. 3183 3183 * 3184 * @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr. 3184 * @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr. Only user is 3185 * pgmPoolMonitorGCPtr2CCPtr. 3185 3186 */ 3186 3187 DECLINLINE(int) pgmRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr) … … 3204 3205 if (pRam->pvR3) 3205 3206 { 3206 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off); /** @todo @bugref{1865,3202}: Code is converting R3 pointer and maybe using it in R0! */3207 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off); 3207 3208 return VINF_SUCCESS; 3208 3209 } … … 3211 3212 } 3212 3213 # endif /* !VBOX_WITH_NEW_PHYS_CODE */ 3213 3214 3215 /**3216 * Convert GC Phys to HC Virt.3217 *3218 * @returns VBox status.3219 * @param PVM VM handle.3220 * @param pRam Ram range3221 * @param GCPhys The GC physical address.3222 * @param pHCPtr Where to store the corresponding HC virtual address.3223 *3224 * @deprecated This will be eliminated. Don't use it.3225 */3226 DECLINLINE(int) pgmRamGCPhys2HCPtrWithRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)3227 {3228 RTGCPHYS off = GCPhys - pRam->GCPhys;3229 Assert(off < pRam->cb);3230 3231 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)3232 {3233 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);3234 /* Physical chunk in dynamically allocated range not present? */3235 if (RT_UNLIKELY(!pRam->paChunkR3Ptrs[idx]))3236 {3237 #ifdef IN_RING33238 int rc = pgmr3PhysGrowRange(pVM, GCPhys);3239 #else3240 int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);3241 #endif3242 if (rc != VINF_SUCCESS)3243 {3244 *pHCPtr = 0; /* GCC crap */3245 return rc;3246 }3247 }3248 *pHCPtr = (RTHCPTR)(pRam->paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));3249 return VINF_SUCCESS;3250 }3251 if (pRam->pvR3)3252 {3253 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off); /** @todo @bugref{1865,3202}: Code is converting R3 pointer and maybe using it in R0! */3254 return VINF_SUCCESS;3255 }3256 *pHCPtr = 0; /* GCC crap */3257 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;3258 }3259 3260 3214 #endif /* !IN_RC && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) */ 3261 3215 … … 3299 3253 if (pRam->pvR3) 3300 3254 { 3301 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off); /** @todo @bugref{1865,3202}: Code is converting R3 pointer and maybe using it in R0! */3255 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off); 3302 3256 return VINF_SUCCESS; 3303 3257 } -
trunk/src/VBox/VMM/PGMMap.cpp
r14716 r14755 1097 1097 PX86PD pPD = pVM->pgm.s.pGst32BitPdR3; 1098 1098 Assert(pPD); 1099 Assert(pPD == (PX86PD)PGMPhysGCPhys2 HCPtrAssert(pVM, cr3 & X86_CR3_PAGE_MASK, sizeof(*pPD)));1099 Assert(pPD == (PX86PD)PGMPhysGCPhys2R3PtrAssert(pVM, cr3 & X86_CR3_PAGE_MASK, sizeof(*pPD))); 1100 1100 1101 1101 for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3; pCur; pCur = pCur->pNextR3) -
trunk/src/VBox/VMM/TRPM.cpp
r14351 r14755 1319 1319 */ 1320 1320 PVBOXIDTE pIDTE; 1321 int rc = PGMPhysGCPtr2 HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);1321 int rc = PGMPhysGCPtr2R3Ptr(pVM, GCPtrIDTE, (void **)&pIDTE); 1322 1322 if (RT_SUCCESS(rc)) 1323 1323 { -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r14562 r14755 352 352 353 353 354 /* Convert sel:addr to a flat GC address*/355 static RTGCPTRemConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, POP_PARAMETER pParam, RTGCPTR pvAddr)354 /** Convert sel:addr to a flat GC address. */ 355 DECLINLINE(RTGCPTR) emConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, POP_PARAMETER pParam, RTGCPTR pvAddr) 356 356 { 357 357 DIS_SELREG enmPrefixSeg = DISDetectSegReg(pCpu, pParam); … … 822 822 } 823 823 824 /* The destination is always a virtual address */825 AssertReturn(param1.type == PARMTYPE_ADDRESS, VERR_EM_INTERPRETER);826 827 RTGCPTR GCPtrPar1 = param1.val.val64;828 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1);829 #ifdef IN_RC830 pvParam1 = (void *)GCPtrPar1;831 #else832 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1);833 if (RT_FAILURE(rc))834 {835 AssertRC(rc);836 return VERR_EM_INTERPRETER;837 }838 #endif839 840 824 #ifdef IN_RC 841 825 /* Safety check (in theory it could cross a page boundary and fault there though) */ … … 849 833 RTGCUINTREG ValPar2 = param2.val.val64; 850 834 851 /* Try emulate it with a one-shot #PF handler in place. */ 835 /* The destination is always a virtual address */ 836 AssertReturn(param1.type == PARMTYPE_ADDRESS, VERR_EM_INTERPRETER); 837 838 RTGCPTR GCPtrPar1 = param1.val.val64; 839 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 840 #ifdef IN_RC 841 pvParam1 = (void *)GCPtrPar1; 842 #else 843 PGMPAGEMAPLOCK Lock; 844 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrPar1, &pvParam1, &Lock); 845 AssertRCReturn(rc, VERR_EM_INTERPRETER); 846 #endif 847 848 /* Try emulate it with a one-shot #PF handler in place. (RC) */ 852 849 Log2(("%s %RGv imm%d=%RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2)); 853 850 … … 859 856 #ifdef IN_RC 860 857 MMGCRamDeregisterTrapHandler(pVM); 858 #else 859 PGMPhysReleasePageMappingLock(pVM, &Lock); 861 860 #endif 862 861 if (RT_FAILURE(rc)) … … 1089 1088 ValPar2 &= 7; 1090 1089 1091 #ifdef IN_RC1092 1090 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 1091 #ifdef IN_RC 1092 Assert(TRPMHasTrap(pVM)); 1093 EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)GCPtrPar1 & ~(RTGCUINTPTR)3) == pvFault, VERR_EM_INTERPRETER); 1094 #endif 1095 1096 #ifdef IN_RC 1093 1097 pvParam1 = (void *)GCPtrPar1; 1094 1098 #else 1095 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 1096 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1097 if (RT_FAILURE(rc)) 1098 { 1099 AssertRC(rc); 1100 return VERR_EM_INTERPRETER; 1101 } 1099 PGMPAGEMAPLOCK Lock; 1100 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrPar1, &pvParam1, &Lock); 1101 AssertRCReturn(rc, VERR_EM_INTERPRETER); 1102 1102 #endif 1103 1103 1104 1104 Log2(("emInterpretLockBitTest %s: pvFault=%RGv GCPtrPar1=%RGv imm=%RX64\n", emGetMnemonic(pCpu), pvFault, GCPtrPar1, ValPar2)); 1105 1105 1106 #ifdef IN_RC 1107 Assert(TRPMHasTrap(pVM)); 1108 EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)GCPtrPar1 & ~(RTGCUINTPTR)3) == pvFault, VERR_EM_INTERPRETER); 1109 #endif 1110 1111 /* Try emulate it with a one-shot #PF handler in place. */ 1106 /* Try emulate it with a one-shot #PF handler in place. (RC) */ 1112 1107 RTGCUINTREG32 eflags = 0; 1113 1108 #ifdef IN_RC … … 1117 1112 #ifdef IN_RC 1118 1113 MMGCRamDeregisterTrapHandler(pVM); 1114 #else 1115 PGMPhysReleasePageMappingLock(pVM, &Lock); 1119 1116 #endif 1120 1117 if (RT_FAILURE(rc)) … … 1423 1420 return VERR_EM_INTERPRETER; 1424 1421 1422 uint64_t valpar; 1423 switch(param2.type) 1424 { 1425 case PARMTYPE_IMMEDIATE: /* register actually */ 1426 valpar = param2.val.val64; 1427 break; 1428 1429 default: 1430 return VERR_EM_INTERPRETER; 1431 } 1432 1433 PGMPAGEMAPLOCK Lock; 1425 1434 RTGCPTR GCPtrPar1; 1426 1435 void *pvParam1; 1427 uint64_t valpar,eflags;1436 uint64_t eflags; 1428 1437 1429 1438 AssertReturn(pCpu->param1.size == pCpu->param2.size, VERR_EM_INTERPRETER); … … 1434 1443 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 1435 1444 1436 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1437 if (RT_FAILURE(rc)) 1438 { 1439 AssertRC(rc); 1440 return VERR_EM_INTERPRETER; 1441 } 1442 break; 1443 1444 default: 1445 return VERR_EM_INTERPRETER; 1446 } 1447 1448 switch(param2.type) 1449 { 1450 case PARMTYPE_IMMEDIATE: /* register actually */ 1451 valpar = param2.val.val64; 1445 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrPar1, &pvParam1, &Lock); 1446 AssertRCReturn(rc, VERR_EM_INTERPRETER); 1452 1447 break; 1453 1448 … … 1470 1465 1471 1466 *pcbSize = param2.size; 1467 PGMPhysReleasePageMappingLock(pVM, &Lock); 1472 1468 return VINF_SUCCESS; 1473 1469 } … … 1490 1486 void *pvParam1; 1491 1487 uint64_t eflags; 1488 PGMPAGEMAPLOCK Lock; 1492 1489 1493 1490 AssertReturn(pCpu->param1.size == 8, VERR_EM_INTERPRETER); … … 1498 1495 GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pCpu, &pCpu->param1, GCPtrPar1); 1499 1496 1500 rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrPar1, &pvParam1); 1501 if (RT_FAILURE(rc)) 1502 { 1503 AssertRC(rc); 1504 return VERR_EM_INTERPRETER; 1505 } 1497 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrPar1, &pvParam1, &Lock); 1498 AssertRCReturn(rc, VERR_EM_INTERPRETER); 1506 1499 break; 1507 1500 … … 1524 1517 1525 1518 *pcbSize = 8; 1519 PGMPhysReleasePageMappingLock(pVM, &Lock); 1526 1520 return VINF_SUCCESS; 1527 1521 } -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r14681 r14755 3167 3167 Assert(pPDSrc); 3168 3168 # if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) 3169 Assert(PGMPhysGCPhys2 HCPtrAssert(pVM, (RTGCPHYS)(cr3 & GST_CR3_PAGE_MASK), sizeof(*pPDSrc)) ==pPDSrc);3169 Assert(PGMPhysGCPhys2R3PtrAssert(pVM, (RTGCPHYS)(cr3 & GST_CR3_PAGE_MASK), sizeof(*pPDSrc)) == (RTR3PTR)pPDSrc); 3170 3170 # endif 3171 3171 # endif /* PGM_GST_TYPE == PGM_TYPE_32BIT */ -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r14560 r14755 705 705 return PGMDynMapGCPageOff(pVM, GCPhys, ppv); 706 706 # else 707 return PGMPhysGCPhys2 HCPtr(pVM, GCPhys, 1,ppv);707 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv); 708 708 # endif 709 709 #endif … … 850 850 851 851 /** 852 * Converts a GC physical address to a HC pointer.852 * Converts a GC physical address to a HC ring-3 pointer. 853 853 * 854 854 * @returns VINF_SUCCESS on success. … … 859 859 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses 860 860 * a dynamic ram chunk boundary 861 * @param pVM The VM handle. 862 * @param GCPhys The GC physical address to convert. 863 * @param cbRange Physical range 864 * @param pHCPtr Where to store the HC pointer on success. 865 */ 866 VMMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */ 861 * 862 * @param pVM The VM handle. 863 * @param GCPhys The GC physical address to convert. 864 * @param cbRange Physical range 865 * @param pR3Ptr Where to store the R3 pointer on success. 866 */ 867 VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr) 867 868 { 868 869 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 900 901 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */ 901 902 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs); 902 *p HCPtr = (RTHCPTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));903 *pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)); 903 904 #else 904 *p HCPtr = (RTHCPTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));905 *pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)); 905 906 #endif 906 907 } 907 908 else if (RT_LIKELY(pRam->pvR3)) 908 *p HCPtr = (RTHCPTR)((RTR3UINTPTR)pRam->pvR3 + off);909 *pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off); 909 910 else 910 911 return VERR_PGM_PHYS_PAGE_RESERVED; … … 914 915 915 916 /** 916 * PGMPhysGCPhys2 HCPtr convenience for use with assertions.917 * 918 * @returns The HCPtr, NIL_RTHCPTR on failure.917 * PGMPhysGCPhys2R3Ptr convenience for use with assertions. 918 * 919 * @returns The R3Ptr, NIL_RTR3PTR on failure. 919 920 * @param pVM The VM handle. 920 921 * @param GCPhys The GC Physical addresss. 921 922 * @param cbRange Physical range. 922 923 */ 923 VMMDECL(RT HCPTR) PGMPhysGCPhys2HCPtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange) /** @todo @bugref{1865}: HCPtr -> R3Ptr */924 { 925 RT HCPTR HCPtr;926 int rc = PGMPhysGCPhys2 HCPtr(pVM, GCPhys, cbRange, &HCPtr);924 VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange) 925 { 926 RTR3PTR R3Ptr; 927 int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr); 927 928 if (RT_SUCCESS(rc)) 928 return HCPtr;929 return NIL_RT HCPTR;929 return R3Ptr; 930 return NIL_RTR3PTR; 930 931 } 931 932 … … 971 972 972 973 /** 973 * Converts a guest pointer to a HCpointer.974 * Converts a guest pointer to a R3 pointer. 974 975 * 975 976 * This uses the current CR3/CR0/CR4 of the guest. … … 978 979 * @param pVM The VM Handle 979 980 * @param GCPtr The guest pointer to convert. 980 * @param p HCPtr Where to store the HCvirtual address.981 */ 982 VMMDECL(int) PGMPhysGCPtr2 HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */981 * @param pR3Ptr Where to store the R3 virtual address. 982 */ 983 VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr) 983 984 { 984 985 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 989 990 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys); 990 991 if (RT_SUCCESS(rc)) 991 rc = PGMPhysGCPhys2 HCPtr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);992 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr); 992 993 return rc; 993 994 } … … 995 996 996 997 /** 997 * Converts a guest virtual address to a HC pointer by specfied CR3 and flags. 998 * Converts a guest virtual address to a HC ring-3 pointer by specfied CR3 and 999 * flags. 998 1000 * 999 1001 * @returns VBox status code. … … 1002 1004 * @param cr3 The guest CR3. 1003 1005 * @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE 1004 * @param p HCPtr Where to store the HCpointer.1006 * @param pR3Ptr Where to store the R3 pointer. 1005 1007 * 1006 1008 * @remark This function is used by the REM at a time where PGM could … … 1008 1010 * future DBGF API to cpu state independent conversions. 1009 1011 */ 1010 VMMDECL(int) PGMPhysGCPtr2 HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */1012 VMMDECL(int) PGMPhysGCPtr2R3PtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTR3PTR pR3Ptr) 1011 1013 { 1012 1014 #ifdef VBOX_WITH_NEW_PHYS_CODE … … 1030 1032 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size) 1031 1033 { /* (big page) */ 1032 rc = PGMPhysGCPhys2HCPtr(pVM, pgmGstGet4MBPhysPage(&pVM->pgm.s, Pde) | ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr); 1034 rc = PGMPhysGCPhys2R3Ptr(pVM, pgmGstGet4MBPhysPage(&pVM->pgm.s, Pde) | ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1035 1 /* we always stay within one page */, pR3Ptr); 1033 1036 } 1034 1037 else … … 1040 1043 X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK]; 1041 1044 if (Pte.n.u1Present) 1042 return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr); 1045 return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1046 1 /* we always stay within one page */, pR3Ptr); 1043 1047 rc = VERR_PAGE_NOT_PRESENT; 1044 1048 } … … 1070 1074 if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size) 1071 1075 { /* (big page) */ 1072 rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr); 1076 rc = PGMPhysGCPhys2R3Ptr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK), 1077 1 /* we always stay within one page */, pR3Ptr); 1073 1078 } 1074 1079 else … … 1080 1085 X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK]; 1081 1086 if (Pte.n.u1Present) 1082 return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr); 1087 return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1088 1 /* we always stay within one page */, pR3Ptr); 1083 1089 rc = VERR_PAGE_NOT_PRESENT; 1084 1090 }
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