- Timestamp:
- Dec 7, 2008 4:42:49 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r15031 r15071 2248 2248 2249 2249 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushPageManual); 2250 SVMR0InvlpgA(GCVirt, pVMCB->ctrl.TLBCtrl.n.u32ASID); 2250 #if HC_ARCH_BITS == 32 2251 /* If we get a flush in 64 bits guest mode, then force a full TLB flush. Invlpga takes only 32 bits addresses. */ 2252 if (CPUMIsGuestInLongMode(pVM) 2253 pVCpu->hwaccm.s.fForceTLBFlush = true; 2254 else 2255 #endif 2256 SVMR0InvlpgA(GCVirt, pVMCB->ctrl.TLBCtrl.n.u32ASID); 2251 2257 } 2252 2258 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r15040 r15071 3193 3193 static void vmxR0FlushVPID(PVM pVM, PVMCPU pVCpu, VMX_FLUSH enmFlush, RTGCPTR GCPtr) 3194 3194 { 3195 uint64_t descriptor[2]; 3196 3197 Assert(pVM->hwaccm.s.vmx.fVPID); 3198 descriptor[0] = pVCpu->hwaccm.s.uCurrentASID; 3199 descriptor[1] = GCPtr; 3200 int rc = VMXR0InvVPID(enmFlush, &descriptor[0]); 3201 AssertRC(rc); 3195 #if HC_ARCH_BITS == 32 3196 /* If we get a flush in 64 bits guest mode, then force a full TLB flush. Invvpid probably takes only 32 bits addresses. (@todo) */ 3197 if (CPUMIsGuestInLongMode(pVM) 3198 { 3199 pVCpu->hwaccm.s.fForceTLBFlush = true; 3200 } 3201 else 3202 #endif 3203 { 3204 uint64_t descriptor[2]; 3205 3206 Assert(pVM->hwaccm.s.vmx.fVPID); 3207 descriptor[0] = pVCpu->hwaccm.s.uCurrentASID; 3208 descriptor[1] = GCPtr; 3209 int rc = VMXR0InvVPID(enmFlush, &descriptor[0]); 3210 AssertRC(rc); 3211 } 3202 3212 } 3203 3213 #endif /* HWACCM_VTX_WITH_VPID */
Note:
See TracChangeset
for help on using the changeset viewer.