VirtualBox

Changeset 15291 in vbox


Ignore:
Timestamp:
Dec 11, 2008 8:22:18 AM (16 years ago)
Author:
vboxsync
Message:

Flush pending writes when leaving ring 0.

Location:
trunk/src/VBox/VMM/VMMR0
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r15289 r15291  
    18611861
    18621862#ifdef VBOX_STRICT
    1863 
    1864 # ifdef VMX_USE_CACHED_VMCS_ACCESSES
    1865     {
    1866         PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
    1867         /* Flush the queued writes first. */
    1868         for (unsigned i=0;i<pCache->Write.cValidEntries;i++)
    1869         {
    1870             VMXWriteVMCS(pCache->Write.aField[i], pCache->Write.aFieldVal[i]);
    1871         }
    1872         pCache->Write.cValidEntries = 0;
    1873     }
    1874 # endif
     1863    VMXFlushWriteCache(pVCpu);
    18751864
    18761865    rc = VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val);
     
    32263215        Assert(pVCpu->hwaccm.s.vmx.proc_ctls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT);
    32273216
     3217    /* Flush all pending VMCS writes. */
     3218    VMXFlushWriteCache(pVCpu);
     3219
    32283220    /* Clear VM Control Structure. Marking it inactive, clearing implementation specific data and writing back VMCS data to memory. */
    32293221    int rc = VMXClearVMCS(pVCpu->hwaccm.s.vmx.pVMCSPhys);
     
    35933585
    35943586
     3587#ifdef VMX_USE_CACHED_VMCS_ACCESSES
     3588/**
     3589 * Flush the write cache in order not to overflow it with frequent ring switches.
     3590 *
     3591 * @param   pVCpu       The VMCPU to operate on.
     3592 */
     3593VMMR0DECL(void) VMXFlushWriteCache(PVMCPU pVCpu)
     3594{
     3595    PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
     3596    /* Flush the queued writes first. */
     3597    for (unsigned i=0;i<pCache->Write.cValidEntries;i++)
     3598        VMXWriteVMCS(pCache->Write.aField[i], pCache->Write.aFieldVal[i]);
     3599
     3600    pCache->Write.cValidEntries = 0;
     3601}
     3602#endif
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

    r15288 r15291  
    284284    return VINF_SUCCESS;
    285285}
     286
     287/**
     288 * Flush the write cache in order not to overflow it with frequent ring switches.
     289 *
     290 * @param   pVCpu       The VMCPU to operate on.
     291 */
     292VMMR0DECL(void) VMXFlushWriteCache(PVMCPU pVCpu);
     293
     294#else
     295# define VMXFlushWriteCache(a)     do { } while (0)
    286296#endif
    287297
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