- Timestamp:
- Dec 12, 2008 12:49:10 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r15197 r15362 2331 2331 { 2332 2332 int rc; 2333 RT CCUINTREG uFlags;2333 RTHCUINTREG uFlags; 2334 2334 2335 2335 /* @todo This code is not guest SMP safe (hyper context) */ -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r15359 r15362 1586 1586 DECLINLINE(int) VMXR0SaveGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 1587 1587 { 1588 RT CCUINTREG val, valShadow;1588 RTGCUINTREG val, valShadow; 1589 1589 RTGCUINTPTR uInterruptState; 1590 1590 int rc; … … 1840 1840 { 1841 1841 int rc = VINF_SUCCESS; 1842 RT CCUINTREG val;1843 RT CCUINTREG exitReason, instrError, cbInstr;1842 RTGCUINTREG val; 1843 RTGCUINTREG exitReason, instrError, cbInstr; 1844 1844 RTGCUINTPTR exitQualification; 1845 1845 RTGCUINTPTR intInfo = 0; /* shut up buggy gcc 4 */ … … 1861 1861 1862 1862 #ifdef VBOX_STRICT 1863 VMXFlushWriteCache(pVCpu); 1864 1865 rc = VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val); 1866 AssertRC(rc); 1867 Log2(("VMX_VMCS_CTRL_PIN_EXEC_CONTROLS = %08x\n", val)); 1868 1869 /* allowed zero */ 1870 if ((val & pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.disallowed0) 1871 Log(("Invalid VMX_VMCS_CTRL_PIN_EXEC_CONTROLS: zero\n")); 1872 1873 /* allowed one */ 1874 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.allowed1) != 0) 1875 Log(("Invalid VMX_VMCS_CTRL_PIN_EXEC_CONTROLS: one\n")); 1876 1877 rc = VMXReadVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, &val); 1878 AssertRC(rc); 1879 Log2(("VMX_VMCS_CTRL_PROC_EXEC_CONTROLS = %08x\n", val)); 1880 1881 /* Must be set according to the MSR, but can be cleared in case of EPT. */ 1882 if (pVM->hwaccm.s.fNestedPaging) 1883 val |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT 1884 | VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_LOAD_EXIT 1885 | VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_STORE_EXIT; 1886 1887 /* allowed zero */ 1888 if ((val & pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.disallowed0) 1889 Log(("Invalid VMX_VMCS_CTRL_PROC_EXEC_CONTROLS: zero\n")); 1890 1891 /* allowed one */ 1892 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.allowed1) != 0) 1893 Log(("Invalid VMX_VMCS_CTRL_PROC_EXEC_CONTROLS: one\n")); 1894 1895 rc = VMXReadVMCS(VMX_VMCS_CTRL_ENTRY_CONTROLS, &val); 1896 AssertRC(rc); 1897 Log2(("VMX_VMCS_CTRL_ENTRY_CONTROLS = %08x\n", val)); 1898 1899 /* allowed zero */ 1900 if ((val & pVM->hwaccm.s.vmx.msr.vmx_entry.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_entry.n.disallowed0) 1901 Log(("Invalid VMX_VMCS_CTRL_ENTRY_CONTROLS: zero\n")); 1902 1903 /* allowed one */ 1904 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_entry.n.allowed1) != 0) 1905 Log(("Invalid VMX_VMCS_CTRL_ENTRY_CONTROLS: one\n")); 1906 1907 rc = VMXReadVMCS(VMX_VMCS_CTRL_EXIT_CONTROLS, &val); 1908 AssertRC(rc); 1909 Log2(("VMX_VMCS_CTRL_EXIT_CONTROLS = %08x\n", val)); 1910 1911 /* allowed zero */ 1912 if ((val & pVM->hwaccm.s.vmx.msr.vmx_exit.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_exit.n.disallowed0) 1913 Log(("Invalid VMX_VMCS_CTRL_EXIT_CONTROLS: zero\n")); 1914 1915 /* allowed one */ 1916 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_exit.n.allowed1) != 0) 1917 Log(("Invalid VMX_VMCS_CTRL_EXIT_CONTROLS: one\n")); 1863 { 1864 RTCCUINTREG val; 1865 VMXFlushWriteCache(pVCpu); 1866 1867 rc = VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val); 1868 AssertRC(rc); 1869 Log2(("VMX_VMCS_CTRL_PIN_EXEC_CONTROLS = %08x\n", val)); 1870 1871 /* allowed zero */ 1872 if ((val & pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.disallowed0) 1873 Log(("Invalid VMX_VMCS_CTRL_PIN_EXEC_CONTROLS: zero\n")); 1874 1875 /* allowed one */ 1876 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_pin_ctls.n.allowed1) != 0) 1877 Log(("Invalid VMX_VMCS_CTRL_PIN_EXEC_CONTROLS: one\n")); 1878 1879 rc = VMXReadVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, &val); 1880 AssertRC(rc); 1881 Log2(("VMX_VMCS_CTRL_PROC_EXEC_CONTROLS = %08x\n", val)); 1882 1883 /* Must be set according to the MSR, but can be cleared in case of EPT. */ 1884 if (pVM->hwaccm.s.fNestedPaging) 1885 val |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT 1886 | VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_LOAD_EXIT 1887 | VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_STORE_EXIT; 1888 1889 /* allowed zero */ 1890 if ((val & pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.disallowed0) 1891 Log(("Invalid VMX_VMCS_CTRL_PROC_EXEC_CONTROLS: zero\n")); 1892 1893 /* allowed one */ 1894 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.allowed1) != 0) 1895 Log(("Invalid VMX_VMCS_CTRL_PROC_EXEC_CONTROLS: one\n")); 1896 1897 rc = VMXReadVMCS(VMX_VMCS_CTRL_ENTRY_CONTROLS, &val); 1898 AssertRC(rc); 1899 Log2(("VMX_VMCS_CTRL_ENTRY_CONTROLS = %08x\n", val)); 1900 1901 /* allowed zero */ 1902 if ((val & pVM->hwaccm.s.vmx.msr.vmx_entry.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_entry.n.disallowed0) 1903 Log(("Invalid VMX_VMCS_CTRL_ENTRY_CONTROLS: zero\n")); 1904 1905 /* allowed one */ 1906 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_entry.n.allowed1) != 0) 1907 Log(("Invalid VMX_VMCS_CTRL_ENTRY_CONTROLS: one\n")); 1908 1909 rc = VMXReadVMCS(VMX_VMCS_CTRL_EXIT_CONTROLS, &val); 1910 AssertRC(rc); 1911 Log2(("VMX_VMCS_CTRL_EXIT_CONTROLS = %08x\n", val)); 1912 1913 /* allowed zero */ 1914 if ((val & pVM->hwaccm.s.vmx.msr.vmx_exit.n.disallowed0) != pVM->hwaccm.s.vmx.msr.vmx_exit.n.disallowed0) 1915 Log(("Invalid VMX_VMCS_CTRL_EXIT_CONTROLS: zero\n")); 1916 1917 /* allowed one */ 1918 if ((val & ~pVM->hwaccm.s.vmx.msr.vmx_exit.n.allowed1) != 0) 1919 Log(("Invalid VMX_VMCS_CTRL_EXIT_CONTROLS: one\n")); 1920 } 1918 1921 #endif 1919 1922 … … 3068 3071 { 3069 3072 #ifdef VBOX_STRICT 3073 RTCCUINTREG val; 3074 3070 3075 Log(("VMX_EXIT_ERR_INVALID_GUEST_STATE\n")); 3071 3076 … … 3534 3539 { 3535 3540 int rc, rc2; 3536 RT CCUINTREG uFlags;3541 RTHCUINTREG uFlags; 3537 3542 PHWACCM_CPUINFO pCpu; 3538 3543 RTHCPHYS pPageCpuPhys; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r15292 r15362 325 325 * @param pVal Value 326 326 */ 327 DECLINLINE(int) VMXReadCachedVMCSEx(PVMCPU pVCpu, uint32_t idxCache, RT CCUINTREG *pVal)327 DECLINLINE(int) VMXReadCachedVMCSEx(PVMCPU pVCpu, uint32_t idxCache, RTGCUINTREG *pVal) 328 328 { 329 329 Assert(idxCache <= VMX_VMCS_MAX_NESTED_PAGING_CACHE_IDX);
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