VirtualBox

Changeset 1590 in vbox for trunk/src/recompiler


Ignore:
Timestamp:
Mar 21, 2007 2:58:53 AM (18 years ago)
Author:
vboxsync
Message:

Quick hack to only use physical addresses so we can dispense with the unnecessary address translation. It's all enabled by the DEFS += REM_PHYS_ADDR_IN_TLB statement in the Makefile.kmk. (Not tested with PGM_DYNAMIC_RAM_ALLOC yet, will do that tomorrow.)

Location:
trunk/src/recompiler/new
Files:
8 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/recompiler/new/Makefile.kmk

    r1196 r1590  
    5555        $(PATH_$(REM_MOD))/opc.h
    5656
    57 # A private hack for gcc 4.1 - no longer required. gcc 4.1.1 works fine for everything.
    58 #ifeq ($(USERNAME).$(BUILD_TARGET),bird.linux)
    59 # TOOL_GCC3_CC = gcc-3.4.6
    60 # TOOL_GCC3_CXX = gcc-3.4.6
    61 # TOOL_GCC3_LD = g++-3.4.6
    62 # override VBOX_GCC_Wno-variadic-macros=
    63 # override VBOX_USING_GCC4=
    64 #endif
     57DEFS += REM_PHYS_ADDR_IN_TLB
    6558
    6659#

  • trunk/src/recompiler/new/VBoxREMWrapper.cpp

    r1120 r1590  
    638638};
    639639static const REMPARMDESC g_aArgsPGM3PhysGrowRange[] =
     640{
     641    { REMPARMDESC_FLAGS_INT,        sizeof(PVM) },
     642    { REMPARMDESC_FLAGS_GCPHYS,     sizeof(RTGCPHYS) }
     643};
     644static const REMPARMDESC g_aArgsPGMPhysIsGCPhysValid[] =
    640645{
    641646    { REMPARMDESC_FLAGS_INT,        sizeof(PVM) },
    … …  
    975980    { "PGMPhysGCPtr2HCPtrByGstCR3",             (void *)(uintptr_t)&PGMPhysGCPtr2HCPtrByGstCR3,     &g_aArgsPGMPhysGCPtr2HCPtrByGstCR3[0],      ELEMENTS(g_aArgsPGMPhysGCPtr2HCPtrByGstCR3),        REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
    976981    { "PGM3PhysGrowRange",                      (void *)(uintptr_t)&PGM3PhysGrowRange,              &g_aArgsPGM3PhysGrowRange[0],               ELEMENTS(g_aArgsPGM3PhysGrowRange),                 REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
     982    { "PGMPhysIsGCPhysValid",                   (void *)(uintptr_t)&PGMPhysIsGCPhysValid,           &g_aArgsPGMPhysIsGCPhysValid[0],            ELEMENTS(g_aArgsPGMPhysIsGCPhysValid),              REMFNDESC_FLAGS_RET_INT,    sizeof(bool),       NULL },
    977983    { "PGMPhysIsA20Enabled",                    (void *)(uintptr_t)&PGMPhysIsA20Enabled,            &g_aArgsVM[0],                              ELEMENTS(g_aArgsVM),                                REMFNDESC_FLAGS_RET_INT,    sizeof(bool),       NULL },
    978984    { "PGMPhysRead",                            (void *)(uintptr_t)&PGMPhysRead,                    &g_aArgsPGMPhysRead[0],                     ELEMENTS(g_aArgsPGMPhysRead),                       REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },

  • trunk/src/recompiler/new/VBoxRecompiler.c

    r1589 r1590  
    117117static STAMPROFILEADV gStatRawCheck;
    118118static STAMPROFILEADV gStatMemRead;
     119static STAMPROFILEADV gStatMemReadHCPtr;
    119120static STAMPROFILEADV gStatMemWrite;
     121static STAMPROFILEADV gStatMemWriteHCPtr;
    120122static STAMCOUNTER    gStatRefuseTFInhibit;
    121123static STAMCOUNTER    gStatRefuseVM86;
    … …  
    350352    STAM_REG(pVM, &gStatRawCheck,           STAMTYPE_PROFILE, "/PROF/REM/RawCheck",   STAMUNIT_TICKS_PER_CALL, "Profiling timer scheduling.");
    351353    STAM_REG(pVM, &gStatMemRead,            STAMTYPE_PROFILE, "/PROF/REM/MemRead",    STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
     354    STAM_REG(pVM, &gStatMemReadHCPtr,       STAMTYPE_PROFILE, "/PROF/REM/MemReadHCPtr", STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    352355    STAM_REG(pVM, &gStatMemWrite,           STAMTYPE_PROFILE, "/PROF/REM/MemWrite",   STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
     356    STAM_REG(pVM, &gStatMemWriteHCPtr,      STAMTYPE_PROFILE, "/PROF/REM/MemWriteHCPtr", STAMUNIT_TICKS_PER_CALL, "Profiling memory access.");
    353357
    354358    STAM_REG(pVM, &gStatRefuseTFInhibit,    STAMTYPE_COUNTER, "/REM/Refuse/TFInibit", STAMUNIT_OCCURENCES,     "Raw mode refused because of TF or irq inhibit");
    … …  
    13431347 * @param   env         Pointer to cpu environment.
    13441348 */
    1345 void remR3SetPage(CPUState *env, CPUTLBEntry *pRead,  CPUTLBEntry *pWrite, int prot, int is_user)
    1346 {
    1347 #ifndef PGM_DYNAMIC_RAM_ALLOC
    1348     target_ulong phys_addr;
    1349 #endif
    1350     target_ulong virt_addr, addend;
     1349void remR3SetPage(CPUState *env, CPUTLBEntry *pTLBEntry,  CPUTLBEntry *pTLBEntryIgnored, int prot, int is_user)
     1350{
     1351    target_ulong virt_addr;
    13511352    if (env->pVM->rem.s.fIgnoreSetPage || env->pVM->rem.s.fIgnoreAll)
    13521353        return;
    … …  
    13551356#ifndef PGM_DYNAMIC_RAM_ALLOC
    13561357    if(!is_user && !(env->state & CPU_RAW_RING0))
    1357     {
    1358         // We are currently not interested in kernel pages
    1359 #ifdef DEBUG
    1360         if (prot & PAGE_WRITE)
    1361         {
    1362             addend = pWrite->addend;
    1363             virt_addr = pWrite->addr_write;
    1364         }
    1365         else if (prot & PAGE_READ)
    1366         {
    1367             addend = pRead->addend;
    1368             virt_addr = pRead->addr_read;
    1369         }
    1370         else
    1371         {
    1372             // Should never happen!
    1373             AssertMsgFailed(("tlb_set_page_raw unexpected protection flags %x\n", prot));
    1374             return;
    1375         }
    1376 
    1377         if (!(addend & IO_MEM_ROM))
    1378         {
    1379             phys_addr = virt_addr - (uintptr_t)phys_ram_base + addend;
    1380         }
    1381         else
    1382         {
    1383             Log(("memory mapped io memory at %08X\n", addend));
    1384             phys_addr = addend; //@todo: correct??
    1385         }
    1386 
    1387         // Clear IO_* flags (TODO: are they actually useful for us??)
    1388         virt_addr &= ~0xFFF;
    1389 #if !defined(DEBUG_bird) && !defined(DEBUG_dmik)
    1390 ////        dprintf(("tlb_set_page_raw Ignoring system page (%x-%x) prot %x is_user %d\n", virt_addr, phys_addr, prot, is_user));
    1391 #endif
    1392 #endif
    1393         return;
    1394     }
    1395 
    1396     Log2(("tlb_set_page_raw read (%x-%x) write (%x-%x) prot %x is_user %d phys base %x\n",
    1397           pRead->addr_read, pRead->addend, pWrite->addr_write, pWrite->addend, prot, is_user, phys_ram_base));
     1358        return; /* We are currently not interested in kernel pages */
     1359#endif
     1360
     1361#if !defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
     1362    Log2(("tlb_set_page_raw (r=%x|w=%x)-%x prot %x is_user %d phys base %x\n",
     1363          pTLBEntry->addr_read, pTLBEntry->addr_write, pTLBEntry->addend, prot, is_user, phys_ram_base));
    13981364#else /* PGM_DYNAMIC_RAM_ALLOC */
    1399     Log2(("tlb_set_page_raw read (%x-%x) write (%x-%x) prot %x is_user %d phys\n",
    1400           pRead->addr_read, pRead->addend, pWrite->addr_write, pWrite->addend, prot, is_user));
     1365    Log2(("tlb_set_page_raw (r=%x|w=%x)-%x prot %x is_user %d\n",
     1366          pTLBEntry->addr_read, pTLBEntry->addr_write, pTLBEntry->addend, prot, is_user));
    14011367#endif/* PGM_DYNAMIC_RAM_ALLOC */
    14021368
     1369    /*
     1370     * Extract the virtual address.
     1371     */
    14031372    if (prot & PAGE_WRITE)
    1404     {
    1405         addend = pWrite->addend;
    1406         virt_addr = pWrite->addr_write;
    1407     }
     1373        virt_addr = pTLBEntry->addr_write;
    14081374    else if (prot & PAGE_READ)
    1409     {
    1410         addend = pRead->addend;
    1411         virt_addr = pRead->addr_read;
    1412     }
     1375        virt_addr = pTLBEntry->addr_read;
    14131376    else
    1414     {
    1415         // Should never happen!
    1416         AssertMsgFailed(("tlb_set_page_raw unexpected protection flags %x\n", prot));
    1417         return;
    1418     }
    1419 
    1420 #ifndef PGM_DYNAMIC_RAM_ALLOC
    1421     if (!(addend & IO_MEM_ROM))
    1422     {
    1423         phys_addr = virt_addr - (uintptr_t)phys_ram_base + addend;
    1424     }
    1425     else
    1426     {
    1427         Log(("memory mapped io memory at %08X\n", addend));
    1428         phys_addr = addend; //@todo: correct??
    1429     }
    1430 #endif /* !PGM_DYNAMIC_RAM_ALLOC */
    1431 
    1432     // Clear IO_* flags (TODO: are they actually useful for us??)
    1433     virt_addr &= ~0xFFF;
     1377        AssertMsgFailedReturnVoid(("tlb_set_page_raw unexpected protection flags %x\n", prot));
     1378    virt_addr &= TARGET_PAGE_MASK;
    14341379
    14351380    /*
    … …  
    14471392    if (VBOX_FAILURE(rc))
    14481393    {
    1449 #ifdef PGM_DYNAMIC_RAM_ALLOC
    1450         AssertMsgFailed(("RAWEx_SetPageEntry %x %x %d failed!!\n", virt_addr, prot, is_user));
    1451 #else
     1394#ifdef VBOX_STRICT
     1395        target_ulong addend = pTLBEntry->addend;
     1396        target_ulong phys_addr;
     1397
     1398        if (!(addend & IO_MEM_ROM))
     1399# ifdef REM_PHYS_ADDR_IN_TLB
     1400            phys_addr = virt_addr + addend;
     1401# elif defined(REM_PHYS_ADDR_IN_TLB)
     1402            phys_addr = remR3HCVirt2GCPhys(env, (void *)(virt_addr + addend));
     1403# else
     1404            phys_addr = virt_addr - (uintptr_t)phys_ram_base + addend;
     1405# endif
     1406        else
     1407            phys_addr = addend;
    14521408        AssertMsgFailed(("RAWEx_SetPageEntry %x %x %x %d failed!!\n", virt_addr, phys_addr, prot, is_user));
    1453 #endif
     1409#endif /* VBOX_STRICT */
    14541410        VM_FF_SET(env->pVM, VM_FF_PGM_SYNC_CR3);
    14551411    }
    … …  
    25582514    if (!GCPhys)
    25592515    {
    2560 #ifndef PGM_DYNAMIC_RAM_ALLOC
     2516#if !defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
    25612517        AssertRelease(!phys_ram_base);
    25622518        phys_ram_base = pvRam;
    … …  
    25892545    else
    25902546    {
     2547# ifndef REM_PHYS_ADDR_IN_TLB
    25912548        uint32_t i;
     2549# endif
    25922550
    25932551        cpu_register_physical_memory(GCPhys, cb, GCPhys | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
    25942552
     2553# ifndef REM_PHYS_ADDR_IN_TLB
    25952554        AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
    25962555        for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
    … …  
    26102569            pVM->rem.s.cPhysRegistrations++;
    26112570        }
    2612     }
     2571# endif /* !REM_PHYS_ADDR_IN_TLB */
     2572    }
     2573#elif defined(REM_PHYS_ADDR_IN_TLB)
     2574    cpu_register_physical_memory(GCPhys, cb, GCPhys | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
    26132575#else
    26142576    AssertRelease(phys_ram_base);
    … …  
    26472609    Assert(fFlags == 0 /* normal RAM */);
    26482610
     2611# ifdef REM_PHYS_ADDR_IN_TLB
    26492612    if (!pVM->rem.s.paHCVirtToGCPhys)
    26502613    {
    … …  
    26852648        }
    26862649    }
     2650# endif /* REM_PHYS_ADDR_IN_TLB */
    26872651
    26882652    Assert(!pVM->rem.s.fIgnoreAll);
    … …  
    27012665
    27022666#ifdef PGM_DYNAMIC_RAM_ALLOC
     2667# ifndef REM_PHYS_ADDR_IN_TLB
    27032668/**
    27042669 *  Convert GC physical address to HC virt
    … …  
    27742739    return 0;
    27752740}
    2776 
     2741# endif /* !REM_PHYS_ADDR_IN_TLB */
    27772742
    27782743/**
    … …  
    28312796    pVM->rem.s.fIgnoreAll = true;
    28322797
    2833 #ifdef PGM_DYNAMIC_RAM_ALLOC
     2798#ifdef REM_PHYS_ADDR_IN_TLB
     2799    cpu_register_physical_memory(GCPhys, cb, GCPhys | IO_MEM_ROM);
     2800#elif defined(PGM_DYNAMIC_RAM_ALLOC)
    28342801    cpu_register_physical_memory(GCPhys, cb, GCPhys | IO_MEM_ROM);
    28352802    AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
    … …  
    29662933            Assert(cb == PAGE_SIZE);
    29672934            Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);
    2968 #ifdef PGM_DYNAMIC_RAM_ALLOC
     2935#ifdef REM_PHYS_ADDR_IN_TLB
     2936            cpu_register_physical_memory(GCPhys, cb, GCPhys);
     2937#elif defined(PGM_DYNAMIC_RAM_ALLOC)
    29692938            Assert(remR3HCVirt2GCPhys(cpu_single_env, pvHCPtr) < MMR3PhysGetRamSize(pVM));
    29702939            cpu_register_physical_memory(GCPhys, cb, GCPhys);
    … …  
    30172986            Assert(cb == PAGE_SIZE);
    30182987            Assert(RT_ALIGN_T(GCPhysOld, PAGE_SIZE, RTGCPHYS) == GCPhysOld);
    3019 #ifdef PGM_DYNAMIC_RAM_ALLOC
     2988#ifdef REM_PHYS_ADDR_IN_TLB
     2989            cpu_register_physical_memory(GCPhysOld, cb, GCPhysOld);
     2990#elif defined(PGM_DYNAMIC_RAM_ALLOC)
    30202991            Assert(remR3HCVirt2GCPhys(cpu_single_env, pvHCPtr) < MMR3PhysGetRamSize(pVM));
    30212992            cpu_register_physical_memory(GCPhysOld, cb, GCPhysOld);
    … …  
    31013072
    31023073
     3074/** Validate the physical address passed to the read functions.
     3075 * Useful for finding non-guest-ram reads/writes.  */
     3076#if 1
     3077# define VBOX_CHECK_ADDR(GCPhys) AssertMsg(PGMPhysIsGCPhysValid(cpu_single_env->pVM, (GCPhys)), ("%VGp\n", (GCPhys)))
     3078#else
     3079# define VBOX_CHECK_ADDR(GCPhys) do { } while (0)
     3080#endif
     3081
     3082/**
     3083 * Read guest RAM and ROM.
     3084 *
     3085 * @param   SrcGCPhys       The source address (guest physical).
     3086 * @param   pvDst           The destination address.
     3087 * @param   cb              Number of bytes
     3088 */
     3089void remR3PhysRead(RTGCPHYS SrcGCPhys, void *pvDst, unsigned cb)
     3090{
     3091    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3092    VBOX_CHECK_ADDR(SrcGCPhys);
     3093    PGMPhysRead(cpu_single_env->pVM, SrcGCPhys, pvDst, cb);
     3094    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3095}
     3096
     3097
     3098/**
     3099 * Read guest RAM and ROM, unsigned 8-bit.
     3100 *
     3101 * @param   SrcGCPhys       The source address (guest physical).
     3102 */
     3103uint8_t remR3PhysReadU8(RTGCPHYS SrcGCPhys)
     3104{
     3105    uint8_t val;
     3106    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3107    VBOX_CHECK_ADDR(SrcGCPhys);
     3108    val = PGMR3PhysReadByte(cpu_single_env->pVM, SrcGCPhys);
     3109    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3110    return val;
     3111}
     3112
     3113
     3114/**
     3115 * Read guest RAM and ROM, signed 8-bit.
     3116 *
     3117 * @param   SrcGCPhys       The source address (guest physical).
     3118 */
     3119int8_t remR3PhysReadS8(RTGCPHYS SrcGCPhys)
     3120{
     3121    int8_t val;
     3122    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3123    VBOX_CHECK_ADDR(SrcGCPhys);
     3124    val = PGMR3PhysReadByte(cpu_single_env->pVM, SrcGCPhys);
     3125    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3126    return val;
     3127}
     3128
     3129
     3130/**
     3131 * Read guest RAM and ROM, unsigned 16-bit.
     3132 *
     3133 * @param   SrcGCPhys       The source address (guest physical).
     3134 */
     3135uint16_t remR3PhysReadU16(RTGCPHYS SrcGCPhys)
     3136{
     3137    uint16_t val;
     3138    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3139    VBOX_CHECK_ADDR(SrcGCPhys);
     3140    val = PGMR3PhysReadWord(cpu_single_env->pVM, SrcGCPhys);
     3141    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3142    return val;
     3143}
     3144
     3145
     3146/**
     3147 * Read guest RAM and ROM, signed 16-bit.
     3148 *
     3149 * @param   SrcGCPhys       The source address (guest physical).
     3150 */
     3151int16_t remR3PhysReadS16(RTGCPHYS SrcGCPhys)
     3152{
     3153    uint16_t val;
     3154    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3155    VBOX_CHECK_ADDR(SrcGCPhys);
     3156    val = PGMR3PhysReadWord(cpu_single_env->pVM, SrcGCPhys);
     3157    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3158    return val;
     3159}
     3160
     3161
     3162/**
     3163 * Read guest RAM and ROM, unsigned 32-bit.
     3164 *
     3165 * @param   SrcGCPhys       The source address (guest physical).
     3166 */
     3167uint32_t remR3PhysReadU32(RTGCPHYS SrcGCPhys)
     3168{
     3169    uint32_t val;
     3170    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3171    VBOX_CHECK_ADDR(SrcGCPhys);
     3172    val = PGMR3PhysReadDword(cpu_single_env->pVM, SrcGCPhys);
     3173    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3174    return val;
     3175}
     3176
     3177
     3178/**
     3179 * Read guest RAM and ROM, signed 32-bit.
     3180 *
     3181 * @param   SrcGCPhys       The source address (guest physical).
     3182 */
     3183int32_t remR3PhysReadS32(RTGCPHYS SrcGCPhys)
     3184{
     3185    int32_t val;
     3186    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3187    VBOX_CHECK_ADDR(SrcGCPhys);
     3188    val = PGMR3PhysReadDword(cpu_single_env->pVM, SrcGCPhys);
     3189    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3190    return val;
     3191}
     3192
     3193
     3194/**
     3195 * Read guest RAM and ROM, unsigned 64-bit.
     3196 *
     3197 * @param   SrcGCPhys       The source address (guest physical).
     3198 */
     3199uint64_t remR3PhysReadU64(RTGCPHYS SrcGCPhys)
     3200{
     3201    uint64_t val;
     3202    STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3203    VBOX_CHECK_ADDR(SrcGCPhys);
     3204    val =            PGMR3PhysReadDword(cpu_single_env->pVM, SrcGCPhys)
     3205        | ((uint64_t)PGMR3PhysReadDword(cpu_single_env->pVM, SrcGCPhys + 4) << 32); /** @todo fix me! */
     3206    STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3207    return val;
     3208}
     3209
     3210
     3211/**
     3212 * Write guest RAM.
     3213 *
     3214 * @param   DstGCPhys       The destination address (guest physical).
     3215 * @param   pvSrc           The source address.
     3216 * @param   cb              Number of bytes to write
     3217 */
     3218void remR3PhysWrite(RTGCPHYS DstGCPhys, const void *pvSrc, unsigned cb)
     3219{
     3220    STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3221    VBOX_CHECK_ADDR(DstGCPhys);
     3222    PGMPhysWrite(cpu_single_env->pVM, DstGCPhys, pvSrc, cb);
     3223    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3224}
     3225
     3226
     3227/**
     3228 * Write guest RAM, unsigned 8-bit.
     3229 *
     3230 * @param   DstGCPhys       The destination address (guest physical).
     3231 * @param   val             Value
     3232 */
     3233void remR3PhysWriteU8(RTGCPHYS DstGCPhys, uint8_t val)
     3234{
     3235    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
     3236    VBOX_CHECK_ADDR(DstGCPhys);
     3237    PGMR3PhysWriteByte(cpu_single_env->pVM, DstGCPhys, val);
     3238    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3239}
     3240
     3241
     3242/**
     3243 * Write guest RAM, unsigned 8-bit.
     3244 *
     3245 * @param   DstGCPhys       The destination address (guest physical).
     3246 * @param   val             Value
     3247 */
     3248void remR3PhysWriteU16(RTGCPHYS DstGCPhys, uint16_t val)
     3249{
     3250    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
     3251    VBOX_CHECK_ADDR(DstGCPhys);
     3252    PGMR3PhysWriteWord(cpu_single_env->pVM, DstGCPhys, val);
     3253    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3254}
     3255
     3256
     3257/**
     3258 * Write guest RAM, unsigned 32-bit.
     3259 *
     3260 * @param   DstGCPhys       The destination address (guest physical).
     3261 * @param   val             Value
     3262 */
     3263void remR3PhysWriteU32(RTGCPHYS DstGCPhys, uint32_t val)
     3264{
     3265    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
     3266    VBOX_CHECK_ADDR(DstGCPhys);
     3267    PGMR3PhysWriteDword(cpu_single_env->pVM, DstGCPhys, val);
     3268    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3269}
     3270
     3271
     3272/**
     3273 * Write guest RAM, unsigned 64-bit.
     3274 *
     3275 * @param   DstGCPhys       The destination address (guest physical).
     3276 * @param   val             Value
     3277 */
     3278void remR3PhysWriteU64(RTGCPHYS DstGCPhys, uint64_t val)
     3279{
     3280    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
     3281    VBOX_CHECK_ADDR(DstGCPhys);
     3282    PGMR3PhysWriteDword(cpu_single_env->pVM, DstGCPhys, (uint32_t)val); /** @todo add U64 interface. */
     3283    PGMR3PhysWriteDword(cpu_single_env->pVM, DstGCPhys + 4, val >> 32);
     3284    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3285}
     3286
     3287
     3288#ifndef REM_PHYS_ADDR_IN_TLB
     3289
    31033290/**
    31043291 * Read guest RAM and ROM.
    … …  
    31103297void remR3PhysReadHCPtr(uint8_t *pbSrcPhys, void *pvDst, unsigned cb)
    31113298{
    3112     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3299    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    31133300
    31143301    /*
    … …  
    31303317        memcpy(pvDst, pbSrcPhys, cb);
    31313318    }
    3132     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3319    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    31333320}
    31343321
    … …  
    31433330    uint8_t val;
    31443331
    3145     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3332    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    31463333
    31473334    /*
    … …  
    31623349        val = *pbSrcPhys;
    31633350    }
    3164     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3351    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    31653352    return val;
    31663353}
    … …  
    31763363    int8_t val;
    31773364
    3178     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3365    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    31793366
    31803367    /*
    … …  
    31953382        val = *(int8_t *)pbSrcPhys;
    31963383    }
    3197     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3384    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    31983385    return val;
    31993386}
    … …  
    32093396    uint16_t val;
    32103397
    3211     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3398    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    32123399
    32133400    /*
    … …  
    32283415        val = *(uint16_t *)pbSrcPhys;
    32293416    }
    3230     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3417    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    32313418    return val;
    32323419}
    … …  
    32423429    int16_t val;
    32433430
    3244     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3431    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    32453432
    32463433    /*
    … …  
    32623449        val = *(int16_t *)pbSrcPhys;
    32633450    }
    3264     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3451    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    32653452    return val;
    32663453}
    … …  
    32763463    uint32_t val;
    32773464
    3278     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3465    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    32793466
    32803467    /*
    … …  
    32953482        val = *(uint32_t *)pbSrcPhys;
    32963483    }
    3297     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3484    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    32983485    return val;
    32993486}
    … …  
    33093496    int32_t val;
    33103497
    3311     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3498    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    33123499
    33133500    /*
    … …  
    33283515        val = *(int32_t *)pbSrcPhys;
    33293516    }
    3330     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3517    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    33313518    return val;
    33323519}
    … …  
    33423529    uint64_t val;
    33433530
    3344     STAM_PROFILE_ADV_START(&gStatMemRead, a);
     3531    STAM_PROFILE_ADV_START(&gStatMemReadHCPtr, a);
    33453532
    33463533    /*
    … …  
    33623549        val = *(uint32_t *)pbSrcPhys;
    33633550    }
    3364     STAM_PROFILE_ADV_STOP(&gStatMemRead, a);
     3551    STAM_PROFILE_ADV_STOP(&gStatMemReadHCPtr, a);
    33653552    return val;
    33663553}
    … …  
    33763563void remR3PhysWriteHCPtr(uint8_t *pbDstPhys, const void *pvSrc, unsigned cb)
    33773564{
    3378     STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3565    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    33793566    /*
    33803567     * Calc the physical address ('off') and check that it's within the RAM.
    … …  
    33893576    else
    33903577        AssertMsgFailed(("pbDstPhys=%p off=%p cb=%d\n", pbDstPhys, off, cb));
    3391     STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
     3578    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    33923579}
    33933580
    … …  
    34013588void remR3PhysWriteHCPtrU8(uint8_t *pbDstPhys, uint8_t val)
    34023589{
    3403     STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3590    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    34043591    /*
    34053592     * Calc the physical address ('off') and check that it's within the RAM.
    … …  
    34143601    else
    34153602        AssertMsgFailed(("pbDstPhys=%p off=%p cb=%d\n", pbDstPhys, off, 1));
    3416     STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
     3603    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    34173604}
    34183605
    … …  
    34263613void remR3PhysWriteHCPtrU16(uint8_t *pbDstPhys, uint16_t val)
    34273614{
    3428     STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3615    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    34293616    /*
    34303617     * Calc the physical address ('off') and check that it's within the RAM.
    … …  
    34393626    else
    34403627        AssertMsgFailed(("pbDstPhys=%p off=%p cb=%d\n", pbDstPhys, off, 2));
    3441     STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
     3628    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    34423629}
    34433630
    … …  
    34513638void remR3PhysWriteHCPtrU32(uint8_t *pbDstPhys, uint32_t val)
    34523639{
    3453     STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3640    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    34543641    /*
    34553642     * Calc the physical address ('off') and check that it's within the RAM.
    … …  
    34643651    else
    34653652        AssertMsgFailed(("pbDstPhys=%p off=%p cb=%d\n", pbDstPhys, off, 4));
    3466     STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
     3653    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
    34673654}
    34683655
    … …  
    34763663void remR3PhysWriteHCPtrU64(uint8_t *pbDstPhys, uint64_t val)
    34773664{
    3478     STAM_PROFILE_ADV_START(&gStatMemWrite, a);
     3665    STAM_PROFILE_ADV_START(&gStatMemWriteHCPtr, a);
    34793666    /*
    34803667     * Calc the physical address ('off') and check that it's within the RAM.
    … …  
    34923679    else
    34933680        AssertMsgFailed(("pbDstPhys=%p off=%p cb=%d\n", pbDstPhys, off, 4));
    3494     STAM_PROFILE_ADV_STOP(&gStatMemWrite, a);
    3495 }
    3496 
     3681    STAM_PROFILE_ADV_STOP(&gStatMemWriteHCPtr, a);
     3682}
     3683
     3684#endif /* !REM_PHYS_ADDR_IN_TLB */
    34973685
    34983686

  • trunk/src/recompiler/new/cpu-all.h

    r1589 r1590  
    181181#ifdef VBOX
    182182
    183 #if !defined(REMR3PHYSREADWRITE_DEFINED)
    184 #define REMR3PHYSREADWRITE_DEFINED
    185 /* Header sharing between vbox & qemu is rather ugly. */
     183void     remR3PhysRead(RTGCPHYS SrcGCPhys, void *pvDst, unsigned cb);
     184uint8_t  remR3PhysReadU8(RTGCPHYS SrcGCPhys);
     185int8_t   remR3PhysReadS8(RTGCPHYS SrcGCPhys);
     186uint16_t remR3PhysReadU16(RTGCPHYS SrcGCPhys);
     187int16_t  remR3PhysReadS16(RTGCPHYS SrcGCPhys);
     188uint32_t remR3PhysReadU32(RTGCPHYS SrcGCPhys);
     189int32_t  remR3PhysReadS32(RTGCPHYS SrcGCPhys);
     190uint64_t remR3PhysReadU64(RTGCPHYS SrcGCPhys);
     191int64_t  remR3PhysReadS64(RTGCPHYS SrcGCPhys);
     192void     remR3PhysWrite(RTGCPHYS DstGCPhys, const void *pvSrc, unsigned cb);
     193void     remR3PhysWriteU8(RTGCPHYS DstGCPhys, uint8_t val);
     194void     remR3PhysWriteU16(RTGCPHYS DstGCPhys, uint16_t val);
     195void     remR3PhysWriteU32(RTGCPHYS DstGCPhys, uint32_t val);
     196void     remR3PhysWriteU64(RTGCPHYS DstGCPhys, uint64_t val);
     197
     198#ifndef REM_PHYS_ADDR_IN_TLB
    186199void     remR3PhysReadHCPtr(uint8_t *pbSrcPhys, void *pvDst, unsigned cb);
    187200uint8_t  remR3PhysReadHCPtrU8(uint8_t *pbSrcPhys);
    … …  
    198211void     remR3PhysWriteHCPtrU32(uint8_t *pbDstPhys, uint32_t val);
    199212void     remR3PhysWriteHCPtrU64(uint8_t *pbDstPhys, uint64_t val);
    200 # ifdef PGM_DYNAMIC_RAM_ALLOC
     213#endif
     214
     215#ifdef PGM_DYNAMIC_RAM_ALLOC
     216# ifndef REM_PHYS_ADDR_IN_TLB
    201217void    *remR3GCPhys2HCVirt(void *env, target_ulong addr);
    202218target_ulong remR3HCVirt2GCPhys(void *env, void *addr);
     219# endif
    203220void     remR3GrowDynRange(unsigned long physaddr);
    204 # endif
    205 #endif
     221#endif
     222#if defined(__AMD64__)
     223# define VBOX_CHECK_ADDR(ptr) do { if ((uintptr_t)(ptr) >= _4G) __asm__("int3"); } while (0)
     224#else
     225# define VBOX_CHECK_ADDR(ptr) (void)
     226#endif
    206227
    207228static inline int ldub_p(void *ptr)
    208229{
     230#ifdef REM_PHYS_ADDR_IN_TLB
     231    VBOX_CHECK_ADDR(ptr);
     232    return remR3PhysReadU8((uintptr_t)ptr);
     233#else
    209234    return remR3PhysReadHCPtrU8(ptr);
     235#endif
    210236}
    211237
    212238static inline int ldsb_p(void *ptr)
    213239{
     240#ifdef REM_PHYS_ADDR_IN_TLB
     241    VBOX_CHECK_ADDR(ptr);
     242    return remR3PhysReadS8((uintptr_t)ptr);
     243#else
    214244    return remR3PhysReadHCPtrS8(ptr);
     245#endif
    215246}
    216247
    217248static inline void stb_p(void *ptr, int v)
    218249{
     250#ifdef REM_PHYS_ADDR_IN_TLB
     251    VBOX_CHECK_ADDR(ptr);
     252    remR3PhysWriteU8((uintptr_t)ptr, v);
     253#else
    219254    remR3PhysWriteHCPtrU8(ptr, v);
     255#endif
    220256}
    221257
    222258static inline int lduw_le_p(void *ptr)
    223259{
     260#ifdef REM_PHYS_ADDR_IN_TLB
     261    VBOX_CHECK_ADDR(ptr);
     262    return remR3PhysReadU16((uintptr_t)ptr);
     263#else
    224264    return remR3PhysReadHCPtrU16(ptr);
     265#endif
    225266}
    226267
    227268static inline int ldsw_le_p(void *ptr)
    228269{
     270#ifdef REM_PHYS_ADDR_IN_TLB
     271    VBOX_CHECK_ADDR(ptr);
     272    return remR3PhysReadS16((uintptr_t)ptr);
     273#else
    229274    return remR3PhysReadHCPtrS16(ptr);
     275#endif
    230276}
    231277
    232278static inline void stw_le_p(void *ptr, int v)
    233279{
     280#ifdef REM_PHYS_ADDR_IN_TLB
     281    VBOX_CHECK_ADDR(ptr);
     282    remR3PhysWriteU16((uintptr_t)ptr, v);
     283#else
    234284    remR3PhysWriteHCPtrU16(ptr, v);
     285#endif
    235286}
    236287
    237288static inline int ldl_le_p(void *ptr)
    238289{
     290#ifdef REM_PHYS_ADDR_IN_TLB
     291    VBOX_CHECK_ADDR(ptr);
     292    return remR3PhysReadU32((uintptr_t)ptr);
     293#else
    239294    return remR3PhysReadHCPtrU32(ptr);
     295#endif
    240296}
    241297
    242298static inline void stl_le_p(void *ptr, int v)
    243299{
     300#ifdef REM_PHYS_ADDR_IN_TLB
     301    VBOX_CHECK_ADDR(ptr);
     302    remR3PhysWriteU32((uintptr_t)ptr, v);
     303#else
    244304    remR3PhysWriteHCPtrU32(ptr, v);
     305#endif
    245306}
    246307
    247308static inline void stq_le_p(void *ptr, uint64_t v)
    248309{
     310#ifdef REM_PHYS_ADDR_IN_TLB
     311    VBOX_CHECK_ADDR(ptr);
     312    remR3PhysWriteU64((uintptr_t)ptr, v);
     313#else
    249314    remR3PhysWriteHCPtrU64(ptr, v);
     315#endif
    250316}
    251317
    252318static inline uint64_t ldq_le_p(void *ptr)
    253319{
     320#ifdef REM_PHYS_ADDR_IN_TLB
     321    VBOX_CHECK_ADDR(ptr);
     322    return remR3PhysReadU64((uintptr_t)ptr);
     323#else
    254324    return remR3PhysReadHCPtrU64(ptr);
    255 }
     325#endif
     326}
     327
     328#undef VBOX_CHECK_ADDR
    256329
    257330/* float access */
    … …  
    9731046extern uint32_t phys_ram_dirty_size;
    9741047#endif /* VBOX */
    975 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     1048#if !defined(VBOX) || !(defined(PGM_DYNAMIC_RAM_ALLOC) || defined(REM_PHYS_ADDR_IN_TLB))
    9761049extern uint8_t *phys_ram_base;
    9771050#endif

  • trunk/src/recompiler/new/exec-all.h

    r1182 r1590  
    604604# ifdef VBOX
    605605target_ulong remR3PhysGetPhysicalAddressCode(CPUState *env, target_ulong addr, CPUTLBEntry *pTLBEntry);
    606 #  ifdef PGM_DYNAMIC_RAM_ALLOC
     606#  if defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
    607607target_ulong remR3HCVirt2GCPhys(void *env, void *addr);
    608608#  endif
    … …  
    644644# endif
    645645    }
    646 # if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
     646# if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     647    return addr + env->tlb_table[is_user][index].addend;
     648# elif defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
    647649    return remR3HCVirt2GCPhys(env, (void *)(addr + env->tlb_table[is_user][index].addend));
    648650# else

  • trunk/src/recompiler/new/exec.c

    r1589 r1590  
    104104uint32_t phys_ram_dirty_size;
    105105#endif /* VBOX */
    106 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     106#if !defined(VBOX) || !(defined(PGM_DYNAMIC_RAM_ALLOC) || defined(REM_PHYS_ADDR_IN_TLB))
    107107uint8_t *phys_ram_base;
    108108#endif
    … …  
    14981498    /* we modify the TLB cache so that the dirty bit will be set again
    14991499       when accessing the range */
    1500 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     1500#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     1501    start1 = start;
     1502#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    15011503    start1 = start + (unsigned long)phys_ram_base;
    15021504#else
    … …  
    15481550    if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {
    15491551        /* RAM case */
    1550 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     1552#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     1553        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend;
     1554#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    15511555        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) +
    15521556            tlb_entry->addend - (unsigned long)phys_ram_base;
    15531557#else
    1554         ram_addr = remR3HCVirt2GCPhys(first_cpu, (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend); /** @todo check if this is right! */
     1558        ram_addr = remR3HCVirt2GCPhys(first_cpu, (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend);
    15551559#endif
    15561560        if (!cpu_physical_memory_is_dirty(ram_addr)) {
    … …  
    16341638            /* standard memory */
    16351639            address = vaddr;
    1636 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     1640#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     1641            addend = pd & TARGET_PAGE_MASK;
     1642#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    16371643            addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);
    16381644#else
    … …  
    17531759                  (unsigned long)addr, vp->prot);
    17541760    /* set the dirty bit */
    1755 #ifdef VBOX
    1756     if (RT_LIKELY((vp->phys_addr >> TARGET_PAGE_BITS) < phys_ram_dirty_size))
    1757 #endif
    17581761    phys_ram_dirty[vp->phys_addr >> TARGET_PAGE_BITS] = 0xff;
    17591762    /* flush the code inside */
    … …  
    20132016    unsigned long ram_addr;
    20142017    int dirty_flags;
    2015 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2018#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     2019    ram_addr = addr;
     2020#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    20162021    ram_addr = addr - (unsigned long)phys_ram_base;
    20172022#else
    … …  
    20562061    unsigned long ram_addr;
    20572062    int dirty_flags;
    2058 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2063#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     2064    ram_addr = addr;
     2065#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    20592066    ram_addr = addr - (unsigned long)phys_ram_base;
    20602067#else
    … …  
    20992106    unsigned long ram_addr;
    21002107    int dirty_flags;
    2101 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2108#if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     2109    ram_addr = addr;
     2110#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    21022111    ram_addr = addr - (unsigned long)phys_ram_base;
    21032112#else
    … …  
    22752284                if (l >= 4 && ((addr & 3) == 0)) {
    22762285                    /* 32 bit write access */
     2286#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    22772287                    val = ldl_p(buf);
     2288#else
     2289                    val = *(const uint32_t *)buf;
     2290#endif
    22782291                    io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
    22792292                    l = 4;
    22802293                } else if (l >= 2 && ((addr & 1) == 0)) {
    22812294                    /* 16 bit write access */
     2295#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    22822296                    val = lduw_p(buf);
     2297#else
     2298                    val = *(const uint16_t *)buf;
     2299#endif
    22832300                    io_mem_write[io_index][1](io_mem_opaque[io_index], addr, val);
    22842301                    l = 2;
    22852302                } else {
    22862303                    /* 8 bit write access */
     2304#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    22872305                    val = ldub_p(buf);
     2306#else
     2307                    val = *(const uint8_t *)buf;
     2308#endif
    22882309                    io_mem_write[io_index][0](io_mem_opaque[io_index], addr, val);
    22892310                    l = 1;
    … …  
    22942315                /* RAM case */
    22952316#ifdef VBOX
    2296 # ifdef PGM_DYNAMIC_RAM_ALLOC
    2297                 ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
    2298 # else
    2299                 ptr = phys_ram_base + addr1;
    2300 # endif
    2301                 remR3PhysWriteHCPtr(ptr, buf, l);
     2317                remR3PhysWrite(addr1, buf, l); NOREF(ptr);
    23022318#else
    23032319                ptr = phys_ram_base + addr1;
    … …  
    23232339                    /* 32 bit read access */
    23242340                    val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);
     2341#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    23252342                    stl_p(buf, val);
     2343#else
     2344                    *(uint32_t *)buf = val;
     2345#endif
    23262346                    l = 4;
    23272347                } else if (l >= 2 && ((addr & 1) == 0)) {
    23282348                    /* 16 bit read access */
    23292349                    val = io_mem_read[io_index][1](io_mem_opaque[io_index], addr);
     2350#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    23302351                    stw_p(buf, val);
     2352#else
     2353                    *(uint16_t *)buf = val;
     2354#endif
    23312355                    l = 2;
    23322356                } else {
    23332357                    /* 8 bit read access */
    23342358                    val = io_mem_read[io_index][0](io_mem_opaque[io_index], addr);
     2359#if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB)
    23352360                    stb_p(buf, val);
     2361#else
     2362                    *(uint8_t *)buf = val;
     2363#endif
    23362364                    l = 1;
    23372365                }
    … …  
    23392367                /* RAM case */
    23402368#ifdef VBOX
    2341 # ifdef PGM_DYNAMIC_RAM_ALLOC
    2342                 ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
    2343 # else
    2344                 ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    2345                     (addr & ~TARGET_PAGE_MASK);
    2346 # endif
    2347                 remR3PhysReadHCPtr(ptr, buf, l);
     2369                remR3PhysRead((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), buf, l); NOREF(ptr);
    23482370#else
    23492371                ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    … …  
    23592381}
    23602382
     2383#ifndef VBOX
    23612384/* used for ROM loading : can write in RAM and ROM */
    23622385void cpu_physical_memory_write_rom(target_phys_addr_t addr,
    … …  
    23892412            addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    23902413            /* ROM/RAM case */
    2391         /* RAM case */
    2392 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    23932414            ptr = phys_ram_base + addr1;
    2394 #else
    2395             ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
    2396 #endif
    23972415            memcpy(ptr, buf, l);
    23982416        }
    … …  
    24022420    }
    24032421}
     2422#endif /* !VBOX */
    24042423
    24052424
    … …  
    24272446    } else {
    24282447        /* RAM case */
    2429 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2448#ifndef VBOX
    24302449        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    24312450            (addr & ~TARGET_PAGE_MASK);
    2432 #else
    2433         ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
    2434 #endif
    24352451        val = ldl_p(ptr);
     2452#else
     2453        val = remR3PhysReadU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK)); NOREF(ptr);
     2454#endif
    24362455    }
    24372456    return val;
    … …  
    24672486    } else {
    24682487        /* RAM case */
    2469 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2488#ifndef VBOX
    24702489        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    24712490            (addr & ~TARGET_PAGE_MASK);
    2472 #else
    2473         ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
    2474 #endif
    24752491        val = ldq_p(ptr);
     2492#else
     2493        val = remR3PhysReadU64((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK)); NOREF(ptr);
     2494#endif
    24762495    }
    24772496    return val;
    … …  
    25152534        io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
    25162535    } else {
    2517 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2536#ifndef VBOX
    25182537        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    25192538            (addr & ~TARGET_PAGE_MASK);
    2520 #else
    2521         ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
    2522 #endif
    25232539        stl_p(ptr, val);
     2540#else
     2541        remR3PhysWriteU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), val); NOREF(ptr);
     2542#endif
    25242543    }
    25252544}
    … …  
    25472566        addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    25482567        /* RAM case */
    2549 #if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     2568#ifndef VBOX
    25502569        ptr = phys_ram_base + addr1;
    2551 #else
    2552         ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
    2553 #endif
    2554 
    25552570        stl_p(ptr, val);
     2571#else
     2572        remR3PhysWriteU32((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), val); NOREF(ptr);
     2573#endif
    25562574        if (!cpu_physical_memory_is_dirty(addr1)) {
    25572575            /* invalidate code */
    … …  
    25902608#endif
    25912609
     2610#ifndef VBOX
    25922611/* virtual memory access for debug */
    25932612int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
    … …  
    26152634}
    26162635
    2617 #ifndef VBOX
    26182636void dump_exec_info(FILE *f,
    26192637                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...))

  • trunk/src/recompiler/new/target-i386/helper2.c

    r1182 r1590  
    585585#if defined(DEBUG) && defined(VBOX)
    586586    uint32_t pde;
    587     uint8_t *pde_ptr;
    588587
    589588    /* page directory entry */
    590 # ifdef PGM_DYNAMIC_RAM_ALLOC
    591     pde_ptr = remR3GCPhys2HCVirt(env, (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & env->a20_mask));
    592 # else
    593     pde_ptr = phys_ram_base +
    594         (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & env->a20_mask);
    595 # endif
    596     pde = ldl_raw(pde_ptr);
     589    pde = remR3PhysReadU32(((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & env->a20_mask);
     590
    597591    /* if PSE bit is set, then we use a 4MB page */
    598592    if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {

  • trunk/src/recompiler/new/translate-op.c

    r1589 r1590  
    2626#include "config.h"         
    2727
    28 #if defined(VBOX) && !defined(REMR3PHYSREADWRITE_DEFINED)
    29 #define REMR3PHYSREADWRITE_DEFINED
    30 /* Header sharing between vbox & qemu is rather ugly. */
     28#if defined(VBOX)
     29void     remR3PhysRead(RTGCPHYS SrcGCPhys, void *pvDst, unsigned cb);
     30uint8_t  remR3PhysReadU8(RTGCPHYS SrcGCPhys);
     31int8_t   remR3PhysReadS8(RTGCPHYS SrcGCPhys);
     32uint16_t remR3PhysReadU16(RTGCPHYS SrcGCPhys);
     33int16_t  remR3PhysReadS16(RTGCPHYS SrcGCPhys);
     34uint32_t remR3PhysReadU32(RTGCPHYS SrcGCPhys);
     35int32_t  remR3PhysReadS32(RTGCPHYS SrcGCPhys);
     36uint64_t remR3PhysReadU64(RTGCPHYS SrcGCPhys);
     37int64_t  remR3PhysReadS64(RTGCPHYS SrcGCPhys);
     38void     remR3PhysWrite(RTGCPHYS DstGCPhys, const void *pvSrc, unsigned cb);
     39void     remR3PhysWriteU8(RTGCPHYS DstGCPhys, uint8_t val);
     40void     remR3PhysWriteU16(RTGCPHYS DstGCPhys, uint16_t val);
     41void     remR3PhysWriteU32(RTGCPHYS DstGCPhys, uint32_t val);
     42void     remR3PhysWriteU64(RTGCPHYS DstGCPhys, uint64_t val);
     43
     44# ifndef REM_PHYS_ADDR_IN_TLB
    3145void     remR3PhysReadHCPtr(uint8_t *pbSrcPhys, void *pvDst, unsigned cb);
    3246uint8_t  remR3PhysReadHCPtrU8(uint8_t *pbSrcPhys);
    … …  
    4357void     remR3PhysWriteHCPtrU32(uint8_t *pbDstPhys, uint32_t val);
    4458void     remR3PhysWriteHCPtrU64(uint8_t *pbDstPhys, uint64_t val);
     59# endif
    4560#endif /* VBOX */
    4661
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