- Timestamp:
- Jan 15, 2009 12:33:49 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/CPUM.cpp
r15503 r15962 656 656 VMMR3DECL(int) CPUMR3Term(PVM pVM) 657 657 { 658 /** @todo ? */658 CPUMR3TermCPU(pVM); 659 659 return 0; 660 660 } … … 672 672 VMMR3DECL(int) CPUMR3TermCPU(PVM pVM) 673 673 { 674 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 675 for (unsigned i=0;i<pVM->cCPUs;i++) 676 { 677 PCPUMCTX pCtx = CPUMQueryGuestCtxPtrEx(pVM, &pVM->aCpus[i]); 678 679 memset(pVM->aCpus[i].cpum.s.aMagic, 0, sizeof(pVM->aCpus[i].cpum.s.aMagic)); 680 pVM->aCpus[i].cpum.s.uMagic = 0; 681 pCtx->dr[5] = 0; 682 } 683 #endif 674 684 return 0; 675 685 } … … 760 770 */ 761 771 pCtx->msrEFER = 0; 772 773 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 774 /* Magic marker for searching in crash dumps. */ 775 strcpy((char *)pVM->aCpus[i].cpum.s.aMagic, "CPUMCPU Magic"); 776 pVM->aCpus[i].cpum.s.uMagic = UINT64_C(0xDEADBEEFDEADBEEF); 777 pCtx->dr[5] = UINT64_C(0xDEADBEEFDEADBEEF); 778 #endif 762 779 } 763 780 } -
trunk/src/VBox/VMM/CPUMInternal.h
r15563 r15962 343 343 CPUMHOSTCTX Host; 344 344 345 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 346 uint8_t aMagic[56]; 347 uint64_t uMagic; 348 #endif 349 345 350 /** 346 351 * Guest context. -
trunk/src/VBox/VMM/CPUMInternal.mac
r15563 r15962 306 306 %endif ; 64-bit 307 307 308 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 309 .aMagic resb 56 310 .uMagic resq 1 311 %endif 308 312 ; 309 313 ; Guest context state -
trunk/src/VBox/VMM/HWACCM.cpp
r15943 r15962 377 377 Assert(pVCpu->hwaccm.s.paStatExitReasonR0 != NIL_RTR0PTR); 378 378 # endif 379 } 380 #endif /* VBOX_WITH_STATISTICS */ 381 382 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 383 /* Magic marker for searching in crash dumps. */ 384 for (unsigned i=0;i<pVM->cCPUs;i++) 385 { 386 PVMCPU pVCpu = &pVM->aCpus[i]; 379 387 380 388 PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache; 381 /* Magic marker for searching in crash dumps. */382 389 strcpy((char *)pCache->aMagic, "VMCSCACHE Magic"); 383 390 pCache->uMagic = UINT64_C(0xDEADBEEFDEADBEEF); 384 391 } 385 #endif /* VBOX_WITH_STATISTICS */392 #endif 386 393 return VINF_SUCCESS; 387 394 } … … 1148 1155 pVM->hwaccm.s.vmx.pRealModeTSS = 0; 1149 1156 } 1157 HWACCMR3TermCPU(pVM); 1150 1158 return 0; 1151 1159 } … … 1172 1180 pVCpu->hwaccm.s.paStatExitReasonR0 = NIL_RTR0PTR; 1173 1181 } 1182 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 1183 memset(pVCpu->hwaccm.s.vmx.VMCSCache.aMagic, 0, sizeof(pVCpu->hwaccm.s.vmx.VMCSCache.aMagic)); 1184 pVCpu->hwaccm.s.vmx.VMCSCache.uMagic = 0; 1174 1185 pVCpu->hwaccm.s.vmx.VMCSCache.uPos = 0xffffffff; 1186 #endif 1175 1187 } 1176 1188 return 0; … … 1214 1226 pCache->Read.aFieldVal[j] = 0; 1215 1227 1228 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 1216 1229 /* Magic marker for searching in crash dumps. */ 1217 1230 strcpy((char *)pCache->aMagic, "VMCSCACHE Magic"); 1218 1231 pCache->uMagic = UINT64_C(0xDEADBEEFDEADBEEF); 1232 #endif 1219 1233 } 1220 1234 } -
trunk/src/VBox/VMM/HWACCMInternal.h
r15931 r15962 280 280 R0PTRTYPE(uint8_t *) pMSREntryLoad; 281 281 282 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 283 RTR0MEMOBJ pMemObjScratch; 284 RTHCPHYS pScratchPhys; 285 R0PTRTYPE(uint8_t *) pScratch; 286 #endif 282 287 /** R0 memory object for the MSR exit store page (guest MSRs). */ 283 288 RTR0MEMOBJ pMemObjMSRExitStore; … … 385 390 typedef struct VMCSCACHE 386 391 { 392 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 387 393 /* Magic marker for searching in crash dumps. */ 388 394 uint8_t aMagic[16]; 389 395 uint64_t uMagic; 396 uint64_t u64TimeEntry; 397 uint64_t u64TimeSwitch; 398 uint64_t cResume; 399 uint64_t interPD; 400 uint64_t pSwitcher; 390 401 uint32_t uPos; 391 402 uint32_t idCpu; 392 403 #endif 393 404 /* CR2 is saved here for EPT syncing. */ 394 405 uint64_t cr2; -
trunk/src/VBox/VMM/HWACCMInternal.mac
r15853 r15962 26 26 ; Structure for storing read and write VMCS actions. 27 27 struc VMCSCACHE 28 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 28 29 .aMagic resb 16 29 30 .uMagic resq 1 31 .u64TimeEntry resq 1 32 .u64TimeSwitch resq 1 33 .cResume resq 1 34 .interPD resq 1 35 .pSwitcher resq 1 30 36 .uPos resd 1 31 37 .idCpu resd 1 38 %endif 32 39 .cr2 resq 1 33 40 .Write.cValidEntries resd 1 -
trunk/src/VBox/VMM/VMMGC/HWACCMGCA.asm
r15662 r15962 144 144 mov rbx, [rbp + 24 + 8] ; pCache 145 145 146 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 147 mov qword [rbx + VMCSCACHE.uPos], 2 148 %endif 149 146 150 %ifdef DEBUG 147 151 mov rax, [rbp + 8 + 8] ; pPageCpuPhys … … 171 175 .no_cached_writes: 172 176 177 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 178 mov qword [rbx + VMCSCACHE.uPos], 3 179 %endif 173 180 ; Save the pCache pointer 174 181 push xBX … … 201 208 vmwrite rax, [rsp+2] 202 209 add rsp, 8*2 210 211 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 212 mov qword [rbx + VMCSCACHE.uPos], 4 213 %endif 203 214 204 215 ; hopefully we can ignore TR (we restore it anyway on the way back to 32 bits mode) … … 231 242 LOADGUESTMSR MSR_K8_SF_MASK, CPUMCTX.msrSFMASK 232 243 LOADGUESTMSR MSR_K8_KERNEL_GS_BASE, CPUMCTX.msrKERNELGSBASE 244 245 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 246 mov qword [rbx + VMCSCACHE.uPos], 5 247 %endif 233 248 234 249 ; Save the pCtx pointer … … 300 315 pop rdi ; saved pCache 301 316 317 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 318 mov dword [rdi + VMCSCACHE.uPos], 7 319 %endif 302 320 %ifdef DEBUG 303 321 mov [rdi + VMCSCACHE.TestOut.pCache], rdi 304 322 mov [rdi + VMCSCACHE.TestOut.pCtx], rsi 323 mov rax, cr8 324 mov [rdi + VMCSCACHE.TestOut.cr8], rax 305 325 %endif 306 326 … … 322 342 mov rax, cr2 323 343 mov [rdi + VMCSCACHE.cr2], rax 344 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 345 mov dword [rdi + VMCSCACHE.uPos], 8 346 %endif 324 347 %endif 325 348 … … 329 352 mov eax, VINF_SUCCESS 330 353 354 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 355 mov dword [rdi + VMCSCACHE.uPos], 9 356 %endif 331 357 .vmstart64_end: 332 358 … … 354 380 pop rdx 355 381 mov [rdi + VMCSCACHE.TestOut.eflags], rdx 382 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 383 mov dword [rdi + VMCSCACHE.uPos], 12 384 %endif 356 385 .skip_flags_save: 357 386 %endif … … 366 395 %ifdef VMX_USE_CACHED_VMCS_ACCESSES 367 396 pop rdi ; pCache 397 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 398 mov dword [rdi + VMCSCACHE.uPos], 10 399 %endif 368 400 369 401 %ifdef DEBUG … … 390 422 mov [rdi + VMCSCACHE.TestOut.pCache], rdi 391 423 mov [rdi + VMCSCACHE.TestOut.pCtx], rsi 424 %endif 425 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 426 mov dword [rdi + VMCSCACHE.uPos], 11 392 427 %endif 393 428 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r15866 r15962 206 206 } 207 207 208 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 209 { 210 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.vmx.pMemObjScratch, 1 << PAGE_SHIFT, true /* executable R0 mapping */); 211 AssertRC(rc); 212 if (RT_FAILURE(rc)) 213 return rc; 214 215 pVM->hwaccm.s.vmx.pScratch = (uint8_t *)RTR0MemObjAddress(pVM->hwaccm.s.vmx.pMemObjScratch); 216 pVM->hwaccm.s.vmx.pScratchPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.vmx.pMemObjScratch, 0); 217 218 ASMMemZero32(pVM->hwaccm.s.vmx.pScratch, PAGE_SIZE); 219 strcpy((char *)pVM->hwaccm.s.vmx.pScratch, "SCRATCH Magic"); 220 *(uint64_t *)(pVM->hwaccm.s.vmx.pScratch + 16) = UINT64_C(0xDEADBEEFDEADBEEF); 221 } 222 #endif 223 208 224 /* Allocate VMCBs for all guest CPUs. */ 209 225 for (unsigned i=0;i<pVM->cCPUs;i++) … … 269 285 pVM->hwaccm.s.vmx.pMSRBitmapPhys = 0; 270 286 } 287 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 288 if (pVM->hwaccm.s.vmx.pMemObjScratch != NIL_RTR0MEMOBJ) 289 { 290 ASMMemZero32(pVM->hwaccm.s.vmx.pScratch, PAGE_SIZE); 291 RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjScratch, false); 292 pVM->hwaccm.s.vmx.pMemObjScratch = NIL_RTR0MEMOBJ; 293 pVM->hwaccm.s.vmx.pScratch = 0; 294 pVM->hwaccm.s.vmx.pScratchPhys = 0; 295 } 296 #endif 271 297 return VINF_SUCCESS; 272 298 } … … 1967 1993 #endif 1968 1994 1995 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 1996 pVCpu->hwaccm.s.vmx.VMCSCache.u64TimeEntry = RTTimeNanoTS(); 1997 #endif 1998 1969 1999 /* We can jump to this point to resume execution after determining that a VM-exit is innocent. 1970 2000 */ … … 2139 2169 Assert(idCpuCheck == RTMpCpuId()); 2140 2170 #endif 2171 2172 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 2173 pVCpu->hwaccm.s.vmx.VMCSCache.cResume = cResume; 2174 pVCpu->hwaccm.s.vmx.VMCSCache.u64TimeSwitch = RTTimeNanoTS(); 2175 #endif 2176 2141 2177 TMNotifyStartOfExecution(pVM); 2142 2178 rc = pVCpu->hwaccm.s.vmx.pfnStartVM(pVCpu->hwaccm.s.fResumeVM, pCtx, &pVCpu->hwaccm.s.vmx.VMCSCache, pVM, pVCpu); … … 3563 3599 pPageCpuPhys = RTR0MemObjGetPagePhysAddr(pCpu->pMemObj, 0); 3564 3600 3601 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 3602 pCache->uPos = 1; 3603 pCache->interPD = PGMGetInterPaeCR3(pVM); 3604 pCache->pSwitcher = (uint64_t)pVM->hwaccm.s.pfnHost32ToGuest64R0; 3605 #endif 3606 3565 3607 #ifdef DEBUG 3566 3608 pCache->TestIn.pPageCpuPhys = 0; … … 3580 3622 aParam[5] = 0; 3581 3623 3624 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 3625 pCtx->dr[4] = pVM->hwaccm.s.vmx.pScratchPhys + 16 + 8; 3626 *(uint32_t *)(pVM->hwaccm.s.vmx.pScratch + 16 + 8) = 1; 3627 #endif 3582 3628 rc = VMXR0Execute64BitsHandler(pVM, pVCpu, pCtx, pVM->hwaccm.s.pfnVMXGCStartVM64, 6, &aParam[0]); 3629 3630 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 3631 Assert(*(uint32_t *)(pVM->hwaccm.s.vmx.pScratch + 16 + 8) == 5); 3632 Assert(pCtx->dr[4] == 10); 3633 *(uint32_t *)(pVM->hwaccm.s.vmx.pScratch + 16 + 8) = 0xff; 3634 #endif 3583 3635 3584 3636 #ifdef DEBUG … … 3633 3685 /* Leave VMX Root Mode. */ 3634 3686 VMXDisable(); 3687 3688 ASMSetCR4(ASMGetCR4() & ~X86_CR4_VMXE); 3635 3689 3636 3690 CPUMSetHyperESP(pVM, VMMGetStackRC(pVM)); -
trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac
r15908 r15962 122 122 ;; 123 123 CPUMCPU_FROM_CPUM(edx) 124 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 125 ; phys address of scratch page 126 mov eax, dword [edx + CPUMCPU.Guest.dr + 4*8] 127 mov cr2, eax 128 129 mov dword [edx + CPUMCPU.Guest.dr + 4*8], 1 130 %endif 131 124 132 ; general registers. 125 133 mov [edx + CPUMCPU.Host.ebx], ebx … … 140 148 str [edx + CPUMCPU.Host.tr] 141 149 150 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 151 mov dword [edx + CPUMCPU.Guest.dr + 4*8], 2 152 %endif 153 142 154 ; control registers. 143 155 mov eax, cr0 … … 157 169 mov edx, ebx 158 170 171 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 172 mov dword [edx + CPUMCPU.Guest.dr + 4*8], 3 173 %endif 174 159 175 CPUM_FROM_CPUMCPU(edx) 160 176 ; Load new gdt so we can do a far jump after going into 64 bits mode 161 177 lgdt [edx + CPUM.Hyper.gdtr] 178 179 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 180 CPUMCPU_FROM_CPUM(edx) 181 mov dword [edx + CPUMCPU.Guest.dr + 4*8], 4 182 CPUM_FROM_CPUMCPU(edx) 183 %endif 162 184 163 185 ;; … … 180 202 GLOBALNAME IDEnterTarget 181 203 DEBUG_CHAR('2') 182 204 183 205 ; 1. Disable paging. 184 206 mov ebx, cr0 … … 187 209 DEBUG_CHAR('2') 188 210 211 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 212 mov eax, cr2 213 mov dword [eax], 3 214 %endif 215 189 216 ; 2. Enable PAE. 190 217 mov ecx, cr4 … … 197 224 mov cr3, ecx 198 225 DEBUG_CHAR('3') 226 227 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 228 mov eax, cr2 229 mov dword [eax], 4 230 %endif 199 231 200 232 ; 4. Enable long mode. … … 207 239 DEBUG_CHAR('4') 208 240 241 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 242 mov eax, cr2 243 mov dword [eax], 5 244 %endif 245 209 246 ; 5. Enable paging. 210 247 or ebx, X86_CR0_PG … … 236 273 dq 0ffffffffffffffffh 237 274 275 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 276 NAME(pMarker): 277 db 'Switch_marker' 278 %endif 279 238 280 ; 239 281 ; When we arrive here we're in 64 bits mode in the intermediate context … … 252 294 mov fs, rax 253 295 mov gs, rax 296 297 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 298 CPUMCPU_FROM_CPUM(edx) 299 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 5 300 CPUM_FROM_CPUMCPU(edx) 301 %endif 254 302 255 303 ; Setup stack; use the lss_esp, ss pair for lss … … 260 308 lss esp, [rdx + CPUM.Hyper.lss_esp] 261 309 310 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 311 CPUMCPU_FROM_CPUM(edx) 312 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 6 313 CPUM_FROM_CPUMCPU(edx) 314 %endif 315 316 262 317 ; load the hypervisor function address 263 318 mov r9, [rdx + CPUM.Hyper.eip] … … 269 324 test esi, CPUM_SYNC_FPU_STATE 270 325 jz near gth_fpu_no 326 327 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 328 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 7 329 %endif 271 330 272 331 mov rax, cr0 … … 283 342 test esi, CPUM_SYNC_DEBUG_STATE 284 343 jz near gth_debug_no 344 345 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 346 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 8 347 %endif 285 348 286 349 mov rax, qword [rdx + CPUMCPU.Guest.dr + 0*8] … … 299 362 gth_debug_no: 300 363 364 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 365 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 9 366 %endif 367 301 368 ; parameter for all helper functions (pCtx) 302 369 lea rsi, [rdx + CPUMCPU.Guest.fpu] … … 306 373 mov rdx, [NAME(pCpumIC) wrt rip] 307 374 CPUMCPU_FROM_CPUM(edx) 375 376 %ifdef VBOX_WITH_CRASHDUMP_MAGIC 377 mov dword [rdx + CPUMCPU.Guest.dr + 4*8], 10 378 %endif 308 379 309 380 ; Save the return code 310 mov [rdx + CPUMCPU.u32RetCode], eax381 mov dword [rdx + CPUMCPU.u32RetCode], eax 311 382 312 383 ; now let's switch back
Note:
See TracChangeset
for help on using the changeset viewer.