- Timestamp:
- Mar 6, 2009 12:32:59 PM (16 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r17458 r17460 90 90 } 91 91 92 /** @def PGMPOOL_PAGE_2_LOCKED_PTR 93 * Maps a pool page pool into the current context and lock it (RC only). 94 * 95 * @returns VBox status code. 96 * @param pVM The VM handle. 97 * @param pPage The pool page. 98 * 99 * @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the 100 * small page window employeed by that function. Be careful. 101 * @remark There is no need to assert on the result. 102 */ 103 #if defined(IN_RC) 104 DECLINLINE(void *) PGMPOOL_PAGE_2_LOCKED_PTR(PVM pVM, PPGMPOOLPAGE pPage) 105 { 106 void *pv = pgmPoolMapPageInlined(&pVM->pgm.s, pPage); 107 108 /* Make sure the dynamic mapping will not be reused. */ 109 if (pv) 110 PGMDynLockHCPage(pVM, (uint8_t *)pv); 111 112 return pv; 113 } 114 #else 115 # define PGMPOOL_PAGE_2_LOCKED_PTR(pPGM, pPage) PGMPOOL_PAGE_2_PTR(pVM, pPage) 116 #endif 117 118 /** @def PGMPOOL_UNLOCK_PTR 119 * Unlock a previously locked dynamic caching (RC only). 120 * 121 * @returns VBox status code. 122 * @param pVM The VM handle. 123 * @param pPage The pool page. 124 * 125 * @remark In RC this uses PGMGCDynMapHCPage(), so it will consume of the 126 * small page window employeed by that function. Be careful. 127 * @remark There is no need to assert on the result. 128 */ 129 #if defined(IN_RC) 130 DECLINLINE(void) PGMPOOL_UNLOCK_PTR(PVM pVM, void *pvPage) 131 { 132 if (pvPage) 133 PGMDynLockHCPage(pVM, (uint8_t *)pvPage); 134 } 135 #else 136 # define PGMPOOL_UNLOCK_PTR(pPGM, pPage) do {} while (0) 137 #endif 92 138 93 139 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) … … 294 340 const unsigned off = GCPhysFault & PAGE_OFFSET_MASK; 295 341 const unsigned cbWrite = (pCpu) ? pgmPoolDisasWriteSize(pCpu) : 0; 342 PVM pVM = pPool->CTX_SUFF(pVM); 296 343 297 344 LogFlow(("pgmPoolMonitorChainChanging: %RGv phys=%RGp kind=%s cbWrite=%d\n", (RTGCPTR)pvAddress, GCPhysFault, pgmPoolPoolKindToStr(pPage->enmKind), cbWrite)); … … 309 356 } uShw; 310 357 358 uShw.pv = NULL; 311 359 switch (pPage->enmKind) 312 360 { 313 361 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT: 314 362 { 315 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);363 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 316 364 const unsigned iShw = off / sizeof(X86PTE); 317 365 LogFlow(("PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT iShw=%x\n", iShw)); … … 321 369 X86PTE GstPte; 322 370 323 int rc = pgmPoolPhysSimpleReadGCPhys(p Pool->CTX_SUFF(pVM), &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));371 int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte)); 324 372 AssertRC(rc); 325 373 Log4(("pgmPoolMonitorChainChanging 32_32: deref %016RX64 GCPhys %08RX32\n", uShw.pPT->a[iShw].u & X86_PTE_PAE_PG_MASK, GstPte.u & X86_PTE_PG_MASK)); … … 336 384 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT: 337 385 { 338 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);386 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 339 387 if (!((off ^ pPage->GCPhys) & (PAGE_SIZE / 2))) 340 388 { … … 345 393 # ifdef PGMPOOL_WITH_GCPHYS_TRACKING 346 394 X86PTE GstPte; 347 int rc = pgmPoolPhysSimpleReadGCPhys(p Pool->CTX_SUFF(pVM), &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));395 int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte)); 348 396 AssertRC(rc); 349 397 … … 368 416 unsigned iShwPdpt = iGst / 256; 369 417 unsigned iShw = (iGst % 256) * 2; 370 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);418 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 371 419 372 420 LogFlow(("pgmPoolMonitorChainChanging PAE for 32 bits: iGst=%x iShw=%x idx = %d page idx=%d\n", iGst, iShw, iShwPdpt, pPage->enmKind - PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD)); … … 378 426 if ((uShw.pPDPae->a[iShw + i].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P)) 379 427 { 380 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));381 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);428 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 429 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 382 430 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw=%#x!\n", iShwPdpt, iShw+i)); 383 431 break; … … 388 436 { 389 437 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw+i, uShw.pPDPae->a[iShw+i].u)); 390 pgmPoolFree(p Pool->CTX_SUFF(pVM),438 pgmPoolFree(pVM, 391 439 uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK, 392 440 pPage->idx, … … 406 454 if ((uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P)) 407 455 { 408 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));409 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);456 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 457 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 410 458 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw2=%#x!\n", iShwPdpt, iShw2)); 411 459 break; … … 416 464 { 417 465 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 418 pgmPoolFree(p Pool->CTX_SUFF(pVM),466 pgmPoolFree(pVM, 419 467 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 420 468 pPage->idx, … … 433 481 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT: 434 482 { 435 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);483 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 436 484 const unsigned iShw = off / sizeof(X86PTEPAE); 437 485 if (uShw.pPTPae->a[iShw].n.u1Present) … … 439 487 # ifdef PGMPOOL_WITH_GCPHYS_TRACKING 440 488 X86PTEPAE GstPte; 441 int rc = pgmPoolPhysSimpleReadGCPhys(p Pool->CTX_SUFF(pVM), &GstPte, pvAddress, GCPhysFault, sizeof(GstPte));489 int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress, GCPhysFault, sizeof(GstPte)); 442 490 AssertRC(rc); 443 491 … … 456 504 { 457 505 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PTEPAE); 458 Assert ReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPTPae->a));506 AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPTPae->a)); 459 507 460 508 if (uShw.pPTPae->a[iShw2].n.u1Present) … … 463 511 X86PTEPAE GstPte; 464 512 # ifdef IN_RING3 465 int rc = pgmPoolPhysSimpleReadGCPhys(p Pool->CTX_SUFF(pVM), &GstPte, (RTHCPTR)((RTHCUINTPTR)pvAddress + sizeof(GstPte)), GCPhysFault + sizeof(GstPte), sizeof(GstPte));513 int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, (RTHCPTR)((RTHCUINTPTR)pvAddress + sizeof(GstPte)), GCPhysFault + sizeof(GstPte), sizeof(GstPte)); 466 514 # else 467 int rc = pgmPoolPhysSimpleReadGCPhys(p Pool->CTX_SUFF(pVM), &GstPte, pvAddress + sizeof(GstPte), GCPhysFault + sizeof(GstPte), sizeof(GstPte));515 int rc = pgmPoolPhysSimpleReadGCPhys(pVM, &GstPte, pvAddress + sizeof(GstPte), GCPhysFault + sizeof(GstPte), sizeof(GstPte)); 468 516 # endif 469 517 AssertRC(rc); … … 485 533 # endif 486 534 { 487 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);535 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 488 536 const unsigned iShw = off / sizeof(X86PTE); // ASSUMING 32-bit guest paging! 489 537 … … 494 542 if (uShw.pPD->a[iShw].u & PGM_PDFLAGS_MAPPING) 495 543 { 496 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));497 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);498 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));544 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 545 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 546 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 499 547 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw)); 500 548 break; … … 509 557 { 510 558 LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u)); 511 pgmPoolFree(p Pool->CTX_SUFF(pVM),559 pgmPoolFree(pVM, 512 560 uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK, 513 561 pPage->idx, … … 529 577 if (uShw.pPD->a[iShw2].u & PGM_PDFLAGS_MAPPING) 530 578 { 531 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));532 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));533 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);579 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 580 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 581 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 534 582 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2)); 535 583 } … … 543 591 { 544 592 LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPD->a[iShw2].u)); 545 pgmPoolFree(p Pool->CTX_SUFF(pVM),593 pgmPoolFree(pVM, 546 594 uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK, 547 595 pPage->idx, … … 555 603 #if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */ 556 604 if ( uShw.pPD->a[iShw].n.u1Present 557 && !VM_FF_ISSET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3))605 && !VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 558 606 { 559 607 LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX32 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u)); … … 561 609 ASMProbeReadByte(pvAddress); 562 610 # endif 563 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPD->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw);611 pgmPoolFree(pVM, uShw.pPD->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw); 564 612 uShw.pPD->a[iShw].u = 0; 565 613 } … … 577 625 PPGMPOOLPAGE pPage2 = pPage + 1 + iShwPdpt; 578 626 Assert(pPage2->idx == PGMPOOL_IDX_PAE_PD_0 + iShwPdpt); 579 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage2);627 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage2); 580 628 for (unsigned i = 0; i < 2; i++, iShw++) 581 629 { 582 630 if ((uShw.pPDPae->a[iShw].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P)) 583 631 { 584 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));585 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);632 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 633 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 586 634 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw=%#x!\n", iShwPdpt, iShw)); 587 635 } … … 595 643 && (uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P)) 596 644 { 597 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));598 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);645 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 646 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 599 647 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShwPdpt=%#x iShw2=%#x!\n", iShwPdpt, iShw2)); 600 648 } … … 602 650 #if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */ 603 651 if ( uShw.pPDPae->a[iShw].n.u1Present 604 && !VM_FF_ISSET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3))652 && !VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 605 653 { 606 654 LogFlow(("pgmPoolMonitorChainChanging: iShwPdpt=%#x iShw=%#x: %RX64 -> freeing it!\n", iShwPdpt, iShw, uShw.pPDPae->a[iShw].u)); … … 608 656 ASMProbeReadByte(pvAddress); 609 657 # endif 610 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, pPage->idx, iShw + iShwPdpt * X86_PG_PAE_ENTRIES);658 pgmPoolFree(pVM, uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, pPage->idx, iShw + iShwPdpt * X86_PG_PAE_ENTRIES); 611 659 uShw.pPDPae->a[iShw].u = 0; 612 660 } … … 619 667 case PGMPOOLKIND_PAE_PD_FOR_PAE_PD: 620 668 { 621 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);669 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 622 670 const unsigned iShw = off / sizeof(X86PDEPAE); 623 671 #ifndef IN_RING0 624 672 if (uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING) 625 673 { 626 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));627 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);628 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));674 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 675 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 676 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 629 677 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw)); 630 678 break; … … 644 692 { 645 693 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u)); 646 pgmPoolFree(p Pool->CTX_SUFF(pVM),694 pgmPoolFree(pVM, 647 695 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, 648 696 # ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY … … 664 712 { 665 713 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE); 666 Assert ReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));714 AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a)); 667 715 668 716 #ifndef IN_RING0 … … 670 718 && uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING) 671 719 { 672 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));673 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);674 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));720 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 721 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 722 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 675 723 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2)); 676 724 } … … 683 731 { 684 732 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 685 pgmPoolFree(p Pool->CTX_SUFF(pVM),733 pgmPoolFree(pVM, 686 734 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 687 735 # ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY … … 717 765 const unsigned offPdpt = off; 718 766 # endif 719 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);767 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 720 768 const unsigned iShw = offPdpt / sizeof(X86PDPE); 721 769 if (iShw < X86_PG_PAE_PDPE_ENTRIES) /* don't use RT_ELEMENTS(uShw.pPDPT->a), because that's for long mode only */ … … 724 772 if (uShw.pPDPT->a[iShw].u & PGM_PLXFLAGS_MAPPING) 725 773 { 726 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));727 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));728 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);774 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 775 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 776 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 729 777 LogFlow(("pgmPoolMonitorChainChanging: Detected pdpt conflict at iShw=%#x!\n", iShw)); 730 778 break; … … 738 786 { 739 787 LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u)); 740 pgmPoolFree(p Pool->CTX_SUFF(pVM),788 pgmPoolFree(pVM, 741 789 uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, 742 790 pPage->idx, … … 758 806 if (uShw.pPDPT->a[iShw2].u & PGM_PLXFLAGS_MAPPING) 759 807 { 760 Assert(pgmMapAreMappingsEnabled(&p Pool->CTX_SUFF(pVM)->pgm.s));761 STAM_COUNTER_INC(&(p Pool->CTX_SUFF(pVM)->pgm.s.StatRZGuestCR3WriteConflict));762 VM_FF_SET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3);808 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 809 STAM_COUNTER_INC(&(pVM->pgm.s.StatRZGuestCR3WriteConflict)); 810 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3); 763 811 LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2)); 764 812 } … … 771 819 { 772 820 LogFlow(("pgmPoolMonitorChainChanging: pae pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u)); 773 pgmPoolFree(p Pool->CTX_SUFF(pVM),821 pgmPoolFree(pVM, 774 822 uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, 775 823 pPage->idx, … … 787 835 case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD: 788 836 { 789 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);837 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 790 838 const unsigned iShw = off / sizeof(X86PDEPAE); 791 839 Assert(!(uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING)); … … 793 841 { 794 842 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u)); 795 pgmPoolFree(p Pool->CTX_SUFF(pVM),843 pgmPoolFree(pVM, 796 844 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, 797 845 pPage->idx, … … 805 853 { 806 854 const unsigned iShw2 = (off + cbWrite - 1) / sizeof(X86PDEPAE); 807 Assert ReturnVoid(iShw2 < RT_ELEMENTS(uShw.pPDPae->a));855 AssertBreak(iShw2 < RT_ELEMENTS(uShw.pPDPae->a)); 808 856 809 857 Assert(!(uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING)); … … 811 859 { 812 860 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 813 pgmPoolFree(p Pool->CTX_SUFF(pVM),861 pgmPoolFree(pVM, 814 862 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 815 863 pPage->idx, … … 828 876 */ 829 877 # ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY 830 if (!VM_FF_ISSET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3))878 if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 831 879 # endif 832 880 { 833 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);881 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 834 882 const unsigned iShw = off / sizeof(X86PDPE); 835 883 if (uShw.pPDPT->a[iShw].n.u1Present) 836 884 { 837 885 LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPT->a[iShw].u)); 838 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, pPage->idx, iShw);886 pgmPoolFree(pVM, uShw.pPDPT->a[iShw].u & X86_PDPE_PG_MASK, pPage->idx, iShw); 839 887 uShw.pPDPT->a[iShw].u = 0; 840 888 } … … 848 896 { 849 897 LogFlow(("pgmPoolMonitorChainChanging: pdpt iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPT->a[iShw2].u)); 850 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, pPage->idx, iShw2);898 pgmPoolFree(pVM, uShw.pPDPT->a[iShw2].u & X86_PDPE_PG_MASK, pPage->idx, iShw2); 851 899 uShw.pPDPT->a[iShw2].u = 0; 852 900 } … … 863 911 */ 864 912 # ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY 865 if (!VM_FF_ISSET(p Pool->CTX_SUFF(pVM), VM_FF_PGM_SYNC_CR3))913 if (!VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 866 914 # endif 867 915 { 868 uShw.pv = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);916 uShw.pv = PGMPOOL_PAGE_2_LOCKED_PTR(pVM, pPage); 869 917 const unsigned iShw = off / sizeof(X86PDPE); 870 918 if (uShw.pPML4->a[iShw].n.u1Present) 871 919 { 872 920 LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPML4->a[iShw].u)); 873 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPML4->a[iShw].u & X86_PML4E_PG_MASK, pPage->idx, iShw);921 pgmPoolFree(pVM, uShw.pPML4->a[iShw].u & X86_PML4E_PG_MASK, pPage->idx, iShw); 874 922 uShw.pPML4->a[iShw].u = 0; 875 923 } … … 883 931 { 884 932 LogFlow(("pgmPoolMonitorChainChanging: pml4 iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPML4->a[iShw2].u)); 885 pgmPoolFree(p Pool->CTX_SUFF(pVM), uShw.pPML4->a[iShw2].u & X86_PML4E_PG_MASK, pPage->idx, iShw2);933 pgmPoolFree(pVM, uShw.pPML4->a[iShw2].u & X86_PML4E_PG_MASK, pPage->idx, iShw2); 886 934 uShw.pPML4->a[iShw2].u = 0; 887 935 } … … 895 943 AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind)); 896 944 } 945 PGMPOOL_UNLOCK_PTR(pVM, uShw.pv); 897 946 898 947 /* next */ … … 3916 3965 * Map the shadow page and take action according to the page kind. 3917 3966 */ 3918 void *pvShw = PGMPOOL_PAGE_2_ PTR(pPool->CTX_SUFF(pVM), pPage);3967 void *pvShw = PGMPOOL_PAGE_2_LOCKED_PTR(pPool->CTX_SUFF(pVM), pPage); 3919 3968 switch (pPage->enmKind) 3920 3969 { … … 4032 4081 STAM_PROFILE_STOP(&pPool->StatZeroPage, z); 4033 4082 pPage->fZeroed = true; 4083 PGMPOOL_UNLOCK_PTR(pPool->CTX_SUFF(pVM), pvShw); 4034 4084 } 4035 4085
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