Changeset 17533 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Mar 8, 2009 3:03:43 AM (16 years ago)

Author:

vboxsync

Message:

iomRamWrite: Added a todo about access handlers and evil shadowing/tlb trolls. Changed PGMPhysWriteGCPtr to PGMPhysInterpretedWriteNoHandlers for ring-0 (new phys code) so it will continue to work the way it did even if that isn't correct/safe.

File:

• trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

@@ -271 +271 @@
 DECLINLINE(int) iomRamRead(PVM pVM, void *pDest, RTGCPTR GCSrc, uint32_t cb)
 {
+    /* Note: This will fail in R0 or RC if it hits an access handler. That
+             isn't a problem though since the operation can be restarted in REM. */
 #ifdef IN_RC
     return MMGCRamReadNoTrapHandler(pDest, (void *)GCSrc, cb);
@@ -280 +282 @@
 
 /** Wrapper for writing virtual memory. */
-DECLINLINE(int) iomRamWrite(PVM pVM, RTGCPTR GCDest, void *pSrc, uint32_t cb)
-{
+DECLINLINE(int) iomRamWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void *pvSrc, uint32_t cb)
+{
+    /** @todo Need to update PGMVerifyAccess to take access handlers into account for Ring-0 and
+     *        raw mode code. Some thought needs to be spent on theoretical concurrency issues as
+     *        as well since we're not behind the pgm lock and handler may change between calls.
+     *        MMGCRamWriteNoTrapHandler may also trap if the page isn't shadowed, or was kicked
+     *        out from both the shadow pt (SMP or our changes) and TLB.
+     *
+     *        Currently MMGCRamWriteNoTrapHandler may also fail when it hits a write access handler.
+     *        PGMPhysInterpretedWriteNoHandlers/PGMPhysWriteGCPtr OTOH may mess up the state
+     *        of some shadowed structure in R0. */
 #ifdef IN_RC
-    return MMGCRamWriteNoTrapHandler((void *)GCDest, pSrc, cb);
+    NOREF(pCtxCore);
+    return MMGCRamWriteNoTrapHandler((void *)GCPtrDst, pvSrc, cb);
+#elif IN_RING0
+# ifdef VBOX_WITH_NEW_PHYS_CODE /* PGMPhysWriteGCPtr will fail, make sure we ignore handlers here. */
+    return PGMPhysInterpretedWriteNoHandlers(pVM, pCtxCore, GCPtrDst, pvSrc, cb, false /*fRaiseTrap*/);
+# else
+    NOREF(pCtxCore);
+    return PGMPhysWriteGCPtr(pVM, GCPtrDst, pvSrc, cb);
+# endif
 #else
-    return PGMPhysWriteGCPtr(pVM, GCDest, pSrc, cb);
+    NOREF(pCtxCore);
+    return PGMPhysWriteGCPtr(pVM, GCPtrDst, pvSrc, cb);
 #endif
 }
@@ -492 +512 @@
                 if (rc != VINF_SUCCESS)
                     break;
-                rc = iomRamWrite(pVM, (RTGCPTR)pu8Virt, &u32Data, cb);
+                rc = iomRamWrite(pVM, pRegFrame, (RTGCPTR)pu8Virt, &u32Data, cb);
                 if (rc != VINF_SUCCESS)
                 {
@@ -1515 +1535 @@
         if (!IOM_SUCCESS(rc))
             break;
-        int rc2 = iomRamWrite(pVM, GCPtrDst, &u32Value, cbTransfer);
+        int rc2 = iomRamWrite(pVM, pRegFrame, GCPtrDst, &u32Value, cbTransfer);
         Assert(rc2 == VINF_SUCCESS); NOREF(rc2);
         GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbTransfer);