Index: trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PGMAllGst.h	(revision 17215)
+++ trunk/src/VBox/VMM/VMMAll/PGMAllGst.h	(revision 17586)
@@ -28,18 +28,5 @@
 PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
 PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
-#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
-PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
-PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
-#endif
 PGM_GST_DECL(bool, HandlerVirtualUpdate)(PVM pVM, uint32_t cr4);
-#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
-# ifndef IN_RING3
-PGM_GST_DECL(int, WriteHandlerCR3)(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
-#  if PGM_GST_TYPE == PGM_TYPE_PAE \
-  || PGM_GST_TYPE == PGM_TYPE_AMD64
-PGM_GST_DECL(int, PAEWriteHandlerPD)(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
-#  endif
-# endif
-#endif
 __END_DECLS
 
@@ -311,189 +298,4 @@
 #endif
 }
-
-
-#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
-
-#undef LOG_GROUP
-#define LOG_GROUP LOG_GROUP_PGM_POOL
-
-/**
- * Registers physical page monitors for the necessary paging
- * structures to detect conflicts with our guest mappings.
- *
- * This is always called after mapping CR3.
- * This is never called with fixed mappings.
- *
- * @returns VBox status, no specials.
- * @param   pVM             VM handle.
- * @param   GCPhysCR3       The physical address in the CR3 register.
- */
-PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3)
-{
-    Assert(!pVM->pgm.s.fMappingsFixed);
-    int rc = VINF_SUCCESS;
-
-    /*
-     * Register/Modify write phys handler for guest's CR3 if it changed.
-     */
-#if PGM_GST_TYPE == PGM_TYPE_32BIT
-
-    if (pVM->pgm.s.GCPhysGstCR3Monitored != GCPhysCR3)
-    {
-# ifndef PGMPOOL_WITH_MIXED_PT_CR3
-        const unsigned cbCR3Stuff = PGM_GST_TYPE == PGM_TYPE_PAE ? 32 : PAGE_SIZE;
-        if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS)
-            rc = PGMHandlerPhysicalModify(pVM, pVM->pgm.s.GCPhysGstCR3Monitored, GCPhysCR3, GCPhysCR3 + cbCR3Stuff - 1);
-        else
-            rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhysCR3, GCPhysCR3 + cbCR3Stuff - 1,
-                                              pVM->pgm.s.pfnR3GstWriteHandlerCR3, 0,
-                                              pVM->pgm.s.pfnR0GstWriteHandlerCR3, 0,
-                                              pVM->pgm.s.pfnRCGstWriteHandlerCR3, 0,
-                                              pVM->pgm.s.pszR3GstWriteHandlerCR3);
-# else  /* PGMPOOL_WITH_MIXED_PT_CR3 */
-        rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool),
-                                         pVM->pgm.s.enmShadowMode == PGMMODE_PAE
-                                      || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX
-                                      ? PGMPOOL_IDX_PAE_PD
-                                      : PGMPOOL_IDX_PD,
-                                      GCPhysCR3);
-# endif /* PGMPOOL_WITH_MIXED_PT_CR3 */
-        if (RT_FAILURE(rc))
-        {
-            AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n",
-                             rc, pVM->pgm.s.GCPhysGstCR3Monitored, GCPhysCR3));
-            return rc;
-        }
-        pVM->pgm.s.GCPhysGstCR3Monitored = GCPhysCR3;
-    }
-
-#elif PGM_GST_TYPE == PGM_TYPE_PAE
-    /* Monitor the PDPT page */
-    /*
-     * Register/Modify write phys handler for guest's CR3 if it changed.
-     */
-# ifndef PGMPOOL_WITH_MIXED_PT_CR3
-    AssertFailed();
-# endif
-    if (pVM->pgm.s.GCPhysGstCR3Monitored != GCPhysCR3)
-    {
-        rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3);
-        if (RT_FAILURE(rc))
-        {
-            AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n",
-                             rc, pVM->pgm.s.GCPhysGstCR3Monitored, GCPhysCR3));
-            return rc;
-        }
-        pVM->pgm.s.GCPhysGstCR3Monitored = GCPhysCR3;
-    }
-
-    /*
-     * Do the 4 PDs.
-     */
-    PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
-    for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
-    {
-        if (pGuestPDPT->a[i].n.u1Present)
-        {
-            RTGCPHYS GCPhys = pGuestPDPT->a[i].u & X86_PDPE_PG_MASK;
-            if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != GCPhys)
-            {
-                Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
-
-                rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys);
-            }
-
-            if (RT_FAILURE(rc))
-            {
-                AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n",
-                                 rc, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i], GCPhys));
-                return rc;
-            }
-            pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = GCPhys;
-        }
-        else if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS)
-        {
-            rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
-            AssertRC(rc);
-            pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS;
-        }
-    }
-
-#else
-    /* prot/real/amd64 mode stub */
-
-#endif
-    return rc;
-}
-
-/**
- * Deregisters any physical page monitors installed by MonitorCR3.
- *
- * @returns VBox status code, no specials.
- * @param   pVM         The VM handle.
- */
-PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM)
-{
-    int rc = VINF_SUCCESS;
-
-    /*
-     * Deregister the access handlers.
-     *
-     * PGMSyncCR3 will reinstall it if required and PGMSyncCR3 will be executed
-     * before we enter GC again.
-     */
-#if PGM_GST_TYPE == PGM_TYPE_32BIT
-    if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS)
-    {
-# ifndef PGMPOOL_WITH_MIXED_PT_CR3
-        rc = PGMHandlerPhysicalDeregister(pVM, pVM->pgm.s.GCPhysGstCR3Monitored);
-        AssertRCReturn(rc, rc);
-# else /* PGMPOOL_WITH_MIXED_PT_CR3 */
-        rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool),
-                                           pVM->pgm.s.enmShadowMode == PGMMODE_PAE
-                                        || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX
-                                        ? PGMPOOL_IDX_PAE_PD
-                                        : PGMPOOL_IDX_PD);
-        AssertRCReturn(rc, rc);
-# endif /* PGMPOOL_WITH_MIXED_PT_CR3 */
-        pVM->pgm.s.GCPhysGstCR3Monitored = NIL_RTGCPHYS;
-    }
-
-#elif PGM_GST_TYPE == PGM_TYPE_PAE
-    /* The PDPT page */
-# ifndef PGMPOOL_WITH_MIXED_PT_CR3
-    AssertFailed();
-# endif
-
-    if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS)
-    {
-        rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PDPT);
-        AssertRC(rc);
-    }
-
-    /* The 4 PDs. */
-    for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
-    {
-        if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS)
-        {
-            Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
-            int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTX_SUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
-            AssertRC(rc2);
-            if (RT_FAILURE(rc2))
-                rc = rc2;
-            pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS;
-        }
-    }
-#else
-    /* prot/real/amd64 mode stub */
-#endif
-    return rc;
-
-}
-
-#undef LOG_GROUP
-#define LOG_GROUP LOG_GROUP_PGM
-
-#endif /* VBOX_WITH_PGMPOOL_PAGING_ONLY */
 
 
@@ -704,238 +506,2 @@
 }
 
-#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
-
-#if PGM_GST_TYPE == PGM_TYPE_32BIT && !defined(IN_RING3)
-
-/**
- * Write access handler for the Guest CR3 page in 32-bit mode.
- *
- * This will try interpret the instruction, if failure fail back to the recompiler.
- * Check if the changed PDEs are marked present and conflicts with our
- * mappings. If conflict, we'll switch to the host context and resolve it there
- *
- * @returns VBox status code (appropritate for trap handling and GC return).
- * @param   pVM         VM Handle.
- * @param   uErrorCode  CPU Error code.
- * @param   pRegFrame   Trap register frame.
- * @param   pvFault     The fault address (cr2).
- * @param   GCPhysFault The GC physical address corresponding to pvFault.
- * @param   pvUser      User argument.
- */
-PGM_GST_DECL(int, WriteHandlerCR3)(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
-{
-    AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
-
-    /*
-     * Try interpret the instruction.
-     */
-    uint32_t cb;
-    int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);
-    if (RT_SUCCESS(rc) && cb)
-    {
-        /*
-         * Check if the modified PDEs are present and mappings.
-         */
-        const RTGCPTR   offPD = GCPhysFault & PAGE_OFFSET_MASK;
-        const unsigned  iPD1  = offPD / sizeof(X86PDE);
-        const unsigned  iPD2  = (offPD + cb - 1) / sizeof(X86PDE);
-
-        Assert(cb > 0 && cb <= 8);
-        Assert(iPD1 < X86_PG_ENTRIES);
-        Assert(iPD2 < X86_PG_ENTRIES);
-
-#ifdef DEBUG
-        Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%x\n", iPD1, iPD1 << X86_PD_SHIFT));
-        if (iPD1 != iPD2)
-            Log(("pgmXXGst32BitWriteHandlerCR3: emulated change to PD %#x addr=%x\n", iPD2, iPD2 << X86_PD_SHIFT));
-#endif
-
-        if (!pVM->pgm.s.fMappingsFixed)
-        {
-            PX86PD pPDSrc = pgmGstGet32bitPDPtr(&pVM->pgm.s);
-            if (    (   pPDSrc->a[iPD1].n.u1Present
-                     && pgmGetMapping(pVM, (RTGCPTR)(iPD1 << X86_PD_SHIFT)) )
-                ||  (   iPD1 != iPD2
-                     && pPDSrc->a[iPD2].n.u1Present
-                     && pgmGetMapping(pVM, (RTGCPTR)(iPD2 << X86_PD_SHIFT)) )
-               )
-            {
-                STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteConflict);
-                VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
-                if (rc == VINF_SUCCESS)
-                    rc = VINF_PGM_SYNC_CR3;
-                Log(("pgmXXGst32BitWriteHandlerCR3: detected conflict iPD1=%#x iPD2=%#x - returns %Rrc\n", iPD1, iPD2, rc));
-                return rc;
-            }
-        }
-
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteHandled);
-    }
-    else
-    {
-        Assert(RT_FAILURE(rc));
-        if (rc == VERR_EM_INTERPRETER)
-            rc = VINF_EM_RAW_EMULATE_INSTR_PD_FAULT;
-        Log(("pgmXXGst32BitWriteHandlerCR3: returns %Rrc\n", rc));
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteUnhandled);
-    }
-    return rc;
-}
-
-#endif /* PGM_TYPE_32BIT && !IN_RING3 */
-#if PGM_GST_TYPE == PGM_TYPE_PAE && !defined(IN_RING3)
-
-/**
- * Write access handler for the Guest CR3 page in PAE mode.
- *
- * This will try interpret the instruction, if failure fail back to the recompiler.
- * Check if the changed PDEs are marked present and conflicts with our
- * mappings. If conflict, we'll switch to the host context and resolve it there
- *
- * @returns VBox status code (appropritate for trap handling and GC return).
- * @param   pVM         VM Handle.
- * @param   uErrorCode  CPU Error code.
- * @param   pRegFrame   Trap register frame.
- * @param   pvFault     The fault address (cr2).
- * @param   GCPhysFault The GC physical address corresponding to pvFault.
- * @param   pvUser      User argument.
- */
-PGM_GST_DECL(int, WriteHandlerCR3)(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
-{
-    AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
-
-    /*
-     * Try interpret the instruction.
-     */
-    uint32_t cb;
-    int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);
-    if (RT_SUCCESS(rc) && cb)
-    {
-        /*
-         * Check if any of the PDs have changed.
-         * We'll simply check all of them instead of figuring out which one/two to check.
-         */
-        PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
-        for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
-        {
-            if (    pGuestPDPT->a[i].n.u1Present
-                &&      (pGuestPDPT->a[i].u & X86_PDPE_PG_MASK)
-                    !=  pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
-            {
-                /*
-                 * The PDPE has changed.
-                 * We will schedule a monitoring update for the next TLB Flush,
-                 * InvalidatePage or SyncCR3.
-                 *
-                 * This isn't perfect, because a lazy page sync might be dealing with an half
-                 * updated PDPE. However, we assume that the guest OS is disabling interrupts
-                 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
-                 * executing.
-                 */
-                pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
-                Log(("pgmXXGstPaeWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%RGp\n",
-                     i, pGuestPDPT->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
-            }
-        }
-
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteHandled);
-    }
-    else
-    {
-        Assert(RT_FAILURE(rc));
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteUnhandled);
-        if (rc == VERR_EM_INTERPRETER)
-            rc = VINF_EM_RAW_EMULATE_INSTR_PD_FAULT;
-    }
-    Log(("pgmXXGstPaeWriteHandlerCR3: returns %Rrc\n", rc));
-    return rc;
-}
-
-
-/**
- * Write access handler for the Guest PDs in PAE mode.
- *
- * This will try interpret the instruction, if failure fail back to the recompiler.
- * Check if the changed PDEs are marked present and conflicts with our
- * mappings. If conflict, we'll switch to the host context and resolve it there
- *
- * @returns VBox status code (appropritate for trap handling and GC return).
- * @param   pVM         VM Handle.
- * @param   uErrorCode  CPU Error code.
- * @param   pRegFrame   Trap register frame.
- * @param   pvFault     The fault address (cr2).
- * @param   GCPhysFault The GC physical address corresponding to pvFault.
- * @param   pvUser      User argument.
- */
-PGM_GST_DECL(int, WriteHandlerPD)(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
-{
-    AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
-
-    /*
-     * Try interpret the instruction.
-     */
-    uint32_t cb;
-    int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);
-    if (RT_SUCCESS(rc) && cb)
-    {
-        /*
-         * Figure out which of the 4 PDs this is.
-         */
-        RTGCPTR i;
-        PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
-        for (i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
-            if (pGuestPDPT->a[i].u == (GCPhysFault & X86_PTE_PAE_PG_MASK))
-            {
-                PX86PDPAE       pPDSrc = pgmGstGetPaePD(&pVM->pgm.s, i << X86_PDPT_SHIFT);
-                const RTGCPTR   offPD  = GCPhysFault & PAGE_OFFSET_MASK;
-                const unsigned  iPD1   = offPD / sizeof(X86PDEPAE);
-                const unsigned  iPD2   = (offPD + cb - 1) / sizeof(X86PDEPAE);
-
-                Assert(cb > 0 && cb <= 8);
-                Assert(iPD1 < X86_PG_PAE_ENTRIES);
-                Assert(iPD2 < X86_PG_PAE_ENTRIES);
-
-# ifdef LOG_ENABLED
-                Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD1=%#05x (%x)\n",
-                     i, iPD1, (i << X86_PDPT_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)));
-                if (iPD1 != iPD2)
-                    Log(("pgmXXGstPaeWriteHandlerPD: emulated change to i=%d iPD2=%#05x (%x)\n",
-                         i, iPD2, (i << X86_PDPT_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)));
-# endif
-
-                if (!pVM->pgm.s.fMappingsFixed)
-                {
-                    if (    (   pPDSrc->a[iPD1].n.u1Present
-                             && pgmGetMapping(pVM, (RTGCPTR)((i << X86_PDPT_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT))) )
-                        ||  (   iPD1 != iPD2
-                             && pPDSrc->a[iPD2].n.u1Present
-                             && pgmGetMapping(pVM, (RTGCPTR)((i << X86_PDPT_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT))) )
-                       )
-                    {
-                        Log(("pgmXXGstPaeWriteHandlerPD: detected conflict iPD1=%#x iPD2=%#x\n", iPD1, iPD2));
-                        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteConflict);
-                        VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
-                        return VINF_PGM_SYNC_CR3;
-                    }
-                }
-                break; /* ASSUMES no duplicate entries... */
-            }
-        Assert(i < 4);
-
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteHandled);
-    }
-    else
-    {
-        Assert(RT_FAILURE(rc));
-        if (rc == VERR_EM_INTERPRETER)
-            rc = VINF_EM_RAW_EMULATE_INSTR_PD_FAULT;
-        else
-            Log(("pgmXXGst32BitWriteHandlerCR3: returns %Rrc\n", rc));
-        STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestCR3WriteUnhandled);
-    }
-    return rc;
-}
-
-#endif /* PGM_TYPE_PAE && !IN_RING3 */
-
-#endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
