Changeset 18125 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Mar 22, 2009 4:52:36 PM (16 years ago)

Author:

vboxsync

Message:

PGM: MapCR3 anywhere again (new phys code).

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• PGMAll.cpp (modified) (1 diff)
• PGMAllBth.h (modified) (5 diffs)
• PGMAllPhys.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -1310 +1310 @@
 }
 
+#ifdef VBOX_WITH_NEW_PHYS_CODE 
+#ifdef IN_RING3
+
+/**
+ * Performs the lazy mapping of the 32-bit guest PD. 
+ *  
+ * @returns Pointer to the mapping.
+ * @param   pPGM        The PGM instance data.
+ */
+PX86PD pgmGstLazyMap32BitPD(PPGM pPGM)
+{
+    Assert(!pPGM->CTX_SUFF(pGst32BitPd));
+    PVM pVM = PGM2VM(pPGM);
+    pgmLock(pVM);
+
+    PPGMPAGE    pPage = pgmPhysGetPage(pPGM, pPGM->GCPhysCR3);
+    AssertReturn(pPage, NULL);
+
+    RTHCPTR     HCPtrGuestCR3;
+    int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pPGM->GCPhysCR3 & X86_CR3_PAGE_MASK, (void **)&HCPtrGuestCR3);
+    AssertRCReturn(rc, NULL);
+
+    pPGM->pGst32BitPdR3 = (R3PTRTYPE(PX86PD))HCPtrGuestCR3;
+# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    pPGM->pGst32BitPdR0 = (R0PTRTYPE(PX86PD))HCPtrGuestCR3;
+# endif
+
+    pgmUnlock(pVM);
+    return pPGM->CTX_SUFF(pGst32BitPd);
+}
+
+
+/**
+ * Performs the lazy mapping of the PAE guest PDPT.
+ *  
+ * @returns Pointer to the mapping.
+ * @param   pPGM        The PGM instance data.
+ */
+PX86PDPT pgmGstLazyMapPaePDPT(PPGM pPGM)
+{
+    Assert(!pPGM->CTX_SUFF(pGstPaePdpt));
+    PVM pVM = PGM2VM(pPGM);
+    pgmLock(pVM);
+
+    PPGMPAGE    pPage = pgmPhysGetPage(pPGM, pPGM->GCPhysCR3);
+    AssertReturn(pPage, NULL);
+
+    RTHCPTR     HCPtrGuestCR3;
+    int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pPGM->GCPhysCR3 & X86_CR3_PAE_PAGE_MASK, (void **)&HCPtrGuestCR3);
+    AssertRCReturn(rc, NULL);
+
+    pPGM->pGstPaePdptR3 = (R3PTRTYPE(PX86PDPT))HCPtrGuestCR3;
+# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    pPGM->pGstPaePdptR0 = (R0PTRTYPE(PX86PDPT))HCPtrGuestCR3;
+# endif
+
+    pgmUnlock(pVM);
+    return pPGM->CTX_SUFF(pGstPaePdpt);
+}
+
+#endif /* IN_RING3  */
+
+/**
+ * Performs the lazy mapping / updating of a PAE guest PD.
+ *  
+ * @returns Pointer to the mapping.
+ * @param   pPGM        The PGM instance data. 
+ * @param   iPdpt       Which PD entry to map (0..3). 
+ */
+PX86PDPAE pgmGstLazyMapPaePD(PPGM pPGM, uint32_t iPdpt)
+{
+    PVM             pVM         = PGM2VM(pPGM);
+    pgmLock(pVM);
+
+    PX86PDPT        pGuestPDPT  = pPGM->CTX_SUFF(pGstPaePdpt);
+    Assert(pGuestPDPT);
+    Assert(pGuestPDPT->a[iPdpt].n.u1Present);
+    RTGCPHYS        GCPhys      = pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK;
+    bool const      fChanged    = pPGM->aGCPhysGstPaePDs[iPdpt] != GCPhys;
+
+    PPGMPAGE        pPage       = pgmPhysGetPage(pPGM, GCPhys);
+    if (RT_LIKELY(pPage))
+    {
+        int         rc          = VINF_SUCCESS;
+        RTRCPTR     RCPtr       = NIL_RTRCPTR;
+        RTHCPTR     HCPtr       = NIL_RTHCPTR;
+#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
+        rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &HCPtr);
+        AssertRC(rc);
+#endif
+        if (RT_SUCCESS(rc) && fChanged)
+        {
+            RCPtr = (RTRCPTR)(RTRCUINTPTR)(pPGM->GCPtrCR3Mapping + (1 + iPdpt) * PAGE_SIZE);
+            rc = PGMMap(pVM, (RTRCUINTPTR)RCPtr, PGM_PAGE_GET_HCPHYS(pPage), PAGE_SIZE, 0);
+        }
+        if (RT_SUCCESS(rc))
+        {
+            pPGM->apGstPaePDsR3[iPdpt]          = (R3PTRTYPE(PX86PDPAE))HCPtr;
+# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+            pPGM->apGstPaePDsR0[iPdpt]          = (R0PTRTYPE(PX86PDPAE))HCPtr;
+# endif 
+            if (fChanged)
+            {    
+                pPGM->aGCPhysGstPaePDs[iPdpt]   = GCPhys;
+                pPGM->apGstPaePDsRC[iPdpt]      = (RCPTRTYPE(PX86PDPAE))RCPtr;
+            }
+
+            pgmUnlock(pVM);
+            return pPGM->CTX_SUFF(apGstPaePDs)[iPdpt];
+        }
+    }
+
+    /* Invalid page or some failure, invalidate the entry. */
+    pPGM->aGCPhysGstPaePDs[iPdpt]   = NIL_RTGCPHYS;
+    pPGM->apGstPaePDsR3[iPdpt]      = 0;
+# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    pPGM->apGstPaePDsR0[iPdpt]      = 0;
+# endif 
+    pPGM->apGstPaePDsRC[iPdpt]      = 0;
+
+    pgmUnlock(pVM);
+    return NULL;
+}
+
+
+#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3
+/**
+ * Performs the lazy mapping of the 32-bit guest PD. 
+ *  
+ * @returns Pointer to the mapping.
+ * @param   pPGM        The PGM instance data.
+ */
+PX86PML4 pgmGstLazyMapPml4(PPGM pPGM)
+{
+    Assert(!pPGM->CTX_SUFF(pGstAmd64Pml4));
+    PVM pVM = PGM2VM(pPGM);
+    pgmLock(pVM);
+
+    PPGMPAGE    pPage = pgmPhysGetPage(pPGM, pPGM->GCPhysCR3);
+    AssertReturn(pPage, NULL);
+
+    RTHCPTR     HCPtrGuestCR3;
+    int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pPGM->GCPhysCR3 & X86_CR3_AMD64_PAGE_MASK, (void **)&HCPtrGuestCR3);
+    AssertRCReturn(rc, NULL);
+
+    pPGM->pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3;
+# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    pPGM->pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3;
+# endif
+
+    pgmUnlock(pVM);
+    return pPGM->CTX_SUFF(pGstAmd64Pml4);
+}
+#endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 */
+
+#endif /* VBOX_WITH_NEW_PHYS_CODE */
 
 /**

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -3416 +3416 @@
     AssertMsgReturn(HCPhys == HCPhysShw, ("HCPhys=%RHp HCPhyswShw=%RHp (cr3)\n", HCPhys, HCPhysShw), false);
 #  if PGM_GST_TYPE == PGM_TYPE_32BIT && defined(IN_RING3)
+    pgmGstGet32bitPDPtr(pPGM);
     RTGCPHYS GCPhys;
     rc = PGMR3DbgR3Ptr2GCPhys(pVM, pPGM->pGst32BitPdR3, &GCPhys);
@@ -4139 +4140 @@
     RTHCPHYS    HCPhysGuestCR3;
 # ifdef VBOX_WITH_NEW_PHYS_CODE
-    /** @todo this needs some reworking. current code is just a big hack. */
+    pgmLock(pVM);
+    PPGMPAGE    pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysCR3);
+    AssertReturn(pPage, VERR_INTERNAL_ERROR);
+    HCPhysGuestCR3 = PGM_PAGE_GET_HCPHYS(pPage);
+    /** @todo this needs some reworking wrt. locking.  */
 #  if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-#   if 1 /* temp hack */
-    VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
-    return VINF_PGM_SYNC_CR3;
-#   else
-    AssertFailedReturn(VERR_INTERNAL_ERROR);
-#   endif
-    int rc = VERR_INTERNAL_ERROR;
+    HCPtrGuestCR3 = NIL_RTHCPTR;
+    int rc = VINF_SUCCESS;
 #  else
-    pgmLock(pVM);
-    PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysCR3);
-    AssertReturn(pPage, VERR_INTERNAL_ERROR);
     int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhysCR3 & GST_CR3_PAGE_MASK, (void **)&HCPtrGuestCR3);
-    HCPhysGuestCR3 = PGM_PAGE_GET_HCPHYS(pPage);
+#  endif
     pgmUnlock(pVM);
-#  endif
 # else  /* !VBOX_WITH_NEW_PHYS_CODE */
     int rc = pgmRamGCPhys2HCPtrAndHCPhys(&pVM->pgm.s, GCPhysCR3 & GST_CR3_PAGE_MASK, &HCPtrGuestCR3, &HCPhysGuestCR3);
@@ -4187 +4183 @@
              */
             PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
-            RTGCPTR GCPtr = pVM->pgm.s.GCPtrCR3Mapping + PAGE_SIZE;
+            RTGCPTR  GCPtr      = pVM->pgm.s.GCPtrCR3Mapping + PAGE_SIZE;
             for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++, GCPtr += PAGE_SIZE)
             {
@@ -4196 +4192 @@
                     RTGCPHYS    GCPhys = pGuestPDPT->a[i].u & X86_PDPE_PG_MASK;
 #  ifdef VBOX_WITH_NEW_PHYS_CODE
+                    pgmLock(pVM);
+                    PPGMPAGE    pPage  = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
+                    AssertReturn(pPage, VERR_INTERNAL_ERROR);
+                    HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
 #   if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-                    AssertFailedReturn(VERR_INTERNAL_ERROR);
-                    int rc2 = VERR_INTERNAL_ERROR;
+                    HCPtr = NIL_RTHCPTR;
+                    int rc2 = VINF_SUCCESS;
 #   else
-                    pgmLock(pVM);
-                    PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
-                    AssertReturn(pPage, VERR_INTERNAL_ERROR);
                     int rc2 = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, (void **)&HCPtr);
-                    HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
+#   endif
                     pgmUnlock(pVM);
-#   endif
 #  else  /* !VBOX_WITH_NEW_PHYS_CODE */
                     int rc2 = pgmRamGCPhys2HCPtrAndHCPhys(&pVM->pgm.s, GCPhys, &HCPtr, &HCPhys);
@@ -4299 +4295 @@
 
 #  ifndef PGM_WITHOUT_MAPPINGS
-    /* Apply all hypervisor mappings to the new CR3.
+    /* 
+     * Apply all hypervisor mappings to the new CR3.
      * Note that SyncCR3 will be executed in case CR3 is changed in a guest paging mode; this will
      * make sure we check for conflicts in the new CR3 root.

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -1007 +1007 @@
              */
             PPGMPAGEMAP pMap = pTlbe->pMap;
-            pMap->cRefs++;
+            if (pMap)
+                pMap->cRefs++;
 #if 0 /** @todo implement locking properly */
             if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
@@ -1013 +1014 @@
                 {
                     AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
-                    pMap->cRefs++; /* Extra ref to prevent it from going away. */
+                    if (pMap)
+                        pMap->cRefs++; /* Extra ref to prevent it from going away. */
                 }
 #endif
@@ -1113 +1115 @@
              */
             PPGMPAGEMAP pMap = pTlbe->pMap;
-            pMap->cRefs++;
+            if (pMap)
+                pMap->cRefs++;
 #if 0 /** @todo implement locking properly */
             if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
@@ -1119 +1122 @@
                 {
                     AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
-                    pMap->cRefs++; /* Extra ref to prevent it from going away. */
+                    if (pMap)
+                        pMap->cRefs++; /* Extra ref to prevent it from going away. */
                 }
 #endif