Changeset 18665 in vbox
- Timestamp:
- Apr 2, 2009 7:44:18 PM (16 years ago)
- svn:sync-xref-src-repo-rev:
- 45592
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 1 deleted
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/MM.cpp
r18607 r18665 412 412 * Setup the base ram (PGM). 413 413 */ 414 #ifdef VBOX_WITH_NEW_PHYS_CODE415 414 if (cbRam > offRamHole) 416 415 { … … 427 426 return VM_SET_ERROR(pVM, VERR_NOT_IMPLEMENTED, "TODO: RamPreAlloc"); 428 427 } 429 #else 430 rc = PGMR3PhysRegisterRam(pVM, 0, cbRam, "Base RAM"); 431 if (RT_SUCCESS(rc)) 432 { 433 /* 434 * Allocate the first chunk, as we'll map ROM ranges there. 435 * If requested, allocated the rest too. 436 */ 437 RTGCPHYS GCPhys = (RTGCPHYS)0; 438 rc = PGM3PhysGrowRange(pVM, &GCPhys); 439 if (RT_SUCCESS(rc) && fPreAlloc) 440 for (GCPhys = PGM_DYNAMIC_CHUNK_SIZE; 441 GCPhys < cbRam && RT_SUCCESS(rc); 442 GCPhys += PGM_DYNAMIC_CHUNK_SIZE) 443 rc = PGM3PhysGrowRange(pVM, &GCPhys); 444 } 445 #endif 446 447 #ifdef VBOX_WITH_NEW_PHYS_CODE 428 448 429 /* 449 430 * Enabled mmR3UpdateReservation here since we don't want the … … 452 433 pVM->mm.s.fDoneMMR3InitPaging = true; 453 434 AssertMsg(pVM->mm.s.cBasePages == cBasePages || RT_FAILURE(rc), ("%RX64 != %RX64\n", pVM->mm.s.cBasePages, cBasePages)); 454 #endif455 435 456 436 LogFlow(("MMR3InitPaging: returns %Rrc\n", rc)); … … 536 516 * Reset notification. 537 517 * 538 * MM will reload shadow ROMs into RAM at this point and make539 * the ROM writable.540 *541 518 * @param pVM The VM handle. 542 519 */ 543 520 VMMR3DECL(void) MMR3Reset(PVM pVM) 544 521 { 545 #ifndef VBOX_WITH_NEW_PHYS_CODE 546 mmR3PhysRomReset(pVM); 547 #endif 522 /* nothing to do anylonger. */ 548 523 } 549 524 -
trunk/src/VBox/VMM/MMInternal.h
r17513 r18665 565 565 566 566 567 #ifndef VBOX_WITH_NEW_PHYS_CODE568 /**569 * A registered Rom range.570 *571 * This is used to track ROM registrations both for debug reasons572 * and for resetting shadow ROM at reset.573 *574 * This is allocated of the MMR3Heap and thus only accessibel from ring-3.575 */576 typedef struct MMROMRANGE577 {578 /** Pointer to the next */579 struct MMROMRANGE *pNext;580 /** Address of the range. */581 RTGCPHYS GCPhys;582 /** Size of the range. */583 uint32_t cbRange;584 /** Shadow ROM? */585 bool fShadow;586 /** Is the shadow ROM currently wriable? */587 bool fWritable;588 /** The address of the virgin ROM image for shadow ROM. */589 const void *pvBinary;590 /** The address of the guest RAM that's shadowing the ROM. (lazy bird) */591 void *pvCopy;592 /** The ROM description. */593 const char *pszDesc;594 } MMROMRANGE;595 /** Pointer to a ROM range. */596 typedef MMROMRANGE *PMMROMRANGE;597 #endif /* !VBOX_WITH_NEW_PHYS_CODE */598 599 600 567 /** 601 568 * Hypervisor memory mapping type. … … 771 738 /** Padding. */ 772 739 uint32_t u32Padding0; 773 774 #ifndef VBOX_WITH_NEW_PHYS_CODE775 /** The head of the ROM ranges. */776 R3PTRTYPE(PMMROMRANGE) pRomHead;777 #endif778 740 } MM; 779 741 /** Pointer to MM Data (part of VM). */ … … 811 773 812 774 const char *mmR3GetTagName(MMTAG enmTag); 813 814 #ifndef VBOX_WITH_NEW_PHYS_CODE815 void mmR3PhysRomReset(PVM pVM);816 #endif817 775 818 776 /** -
trunk/src/VBox/VMM/Makefile.kmk
r17294 r18665 71 71 MMHyper.cpp \ 72 72 MMPagePool.cpp \ 73 MMPhys.cpp \74 73 PDM.cpp \ 75 74 PDMDevice.cpp \ -
trunk/src/VBox/VMM/PDMDevHlp.cpp
r18645 r18665 354 354 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc)); 355 355 356 #ifdef VBOX_WITH_NEW_PHYS_CODE357 356 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc); 358 #else359 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary,360 !!(fFlags & PGMPHYS_ROM_FLAGS_SHADOWED), pszDesc);361 #endif362 357 363 358 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); … … 2039 2034 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead)); 2040 2035 2041 #ifdef VBOX_WITH_NEW_PHYS_CODE2042 2036 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) 2043 2037 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */ … … 2054 2048 else 2055 2049 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead); 2056 #else 2057 PGMPhysRead(pVM, GCPhys, pvBuf, cbRead); 2058 int rc = VINF_SUCCESS; 2059 #endif 2050 2060 2051 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); 2061 2052 return rc; … … 2071 2062 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite)); 2072 2063 2073 #ifdef VBOX_WITH_NEW_PHYS_CODE2074 2064 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) 2075 2065 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */ … … 2086 2076 else 2087 2077 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite); 2088 #else 2089 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); 2090 int rc = VINF_SUCCESS; 2091 #endif 2078 2092 2079 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); 2093 2080 return rc; … … 2104 2091 AssertReturn(!fFlags, VERR_INVALID_PARAMETER); 2105 2092 2106 #ifdef VBOX_WITH_NEW_PHYS_CODE2107 2093 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) 2108 2094 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */ … … 2113 2099 } 2114 2100 #endif 2115 #endif2116 2101 2117 2102 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock); … … 2131 2116 AssertReturn(!fFlags, VERR_INVALID_PARAMETER); 2132 2117 2133 #ifdef VBOX_WITH_NEW_PHYS_CODE2134 2118 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) 2135 2119 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */ … … 2139 2123 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames)); 2140 2124 } 2141 #endif2142 2125 #endif 2143 2126 … … 2557 2540 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt)); 2558 2541 2559 #ifdef VBOX_WITH_NEW_PHYS_CODE2560 2542 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt); 2561 #else2562 int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);2563 #endif2564 2543 2565 2544 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); -
trunk/src/VBox/VMM/PGM.cpp
r18645 r18665 610 610 *******************************************************************************/ 611 611 /** Saved state data unit version. */ 612 #ifdef VBOX_WITH_NEW_PHYS_CODE 613 # define PGM_SAVED_STATE_VERSION 7 614 #else 615 # define PGM_SAVED_STATE_VERSION 6 616 #endif 612 #define PGM_SAVED_STATE_VERSION 7 617 613 /** Saved state data unit version. */ 618 614 #define PGM_SAVED_STATE_VERSION_OLD_PHYS_CODE 6 … … 1229 1225 rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &cbRam); 1230 1226 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 1231 cbRam = pVM->pgm.s.cbRamSize =0;1227 cbRam = 0; 1232 1228 else if (RT_SUCCESS(rc)) 1233 1229 { … … 1235 1231 cbRam = 0; 1236 1232 cbRam = RT_ALIGN_64(cbRam, PAGE_SIZE); 1237 pVM->pgm.s.cbRamSize = (RTUINT)cbRam; /* pointless legacy, remove after enabling the new phys code. */1238 1233 } 1239 1234 else … … 1268 1263 PGMPhysInvalidatePageGCMapTLB(pVM); 1269 1264 1270 #ifdef VBOX_WITH_NEW_PHYS_CODE1271 1265 /* 1272 1266 * For the time being we sport a full set of handy pages in addition to the base 1273 1267 * memory to simplify things. 1274 1268 */ 1275 rc = MMR3ReserveHandyPages(pVM, RT_ELEMENTS(pVM->pgm.s.aHandyPages)); 1269 rc = MMR3ReserveHandyPages(pVM, RT_ELEMENTS(pVM->pgm.s.aHandyPages)); /** @todo this should be changed to PGM_HANDY_PAGES_MIN but this needs proper testing... */ 1276 1270 AssertRCReturn(rc, rc); 1277 #endif1278 1271 1279 1272 /* … … 1579 1572 STAM_REG(pVM, &pPGM->StatR3GuestPDWrite, STAMTYPE_COUNTER, "/PGM/R3/PDWrite", STAMUNIT_OCCURENCES, "The total number of times pgmHCGuestPDWriteHandler() was called."); 1580 1573 STAM_REG(pVM, &pPGM->StatR3GuestPDWriteConflict, STAMTYPE_COUNTER, "/PGM/R3/PDWriteConflict", STAMUNIT_OCCURENCES, "The number of times pgmHCGuestPDWriteHandler() detected a conflict."); 1581 #ifndef VBOX_WITH_NEW_PHYS_CODE1582 STAM_REG(pVM, &pPGM->StatR3DynRamTotal, STAMTYPE_COUNTER, "/PGM/DynAlloc/TotalAlloc", STAMUNIT_MEGABYTES, "Allocated MBs of guest ram.");1583 STAM_REG(pVM, &pPGM->StatR3DynRamGrow, STAMTYPE_COUNTER, "/PGM/DynAlloc/Grow", STAMUNIT_OCCURENCES, "Nr of pgmr3PhysGrowRange calls.");1584 #endif1585 1574 1586 1575 /* R0 only: */ … … 2101 2090 if (RT_SUCCESS(rc)) 2102 2091 { 2103 #ifdef VBOX_WITH_NEW_PHYS_CODE2104 2092 /* 2105 2093 * Reset (zero) shadow ROM pages. 2106 2094 */ 2107 2095 rc = pgmR3PhysRomReset(pVM); 2108 #endif2109 2096 if (RT_SUCCESS(rc)) 2110 2097 { … … 2163 2150 } 2164 2151 2165 #ifdef VBOX_WITH_NEW_PHYS_CODE2166 2152 2167 2153 /** … … 2256 2242 SSMFIELD_ENTRY_TERM() 2257 2243 }; 2258 #endif /* VBOX_WITH_NEW_PHYS_CODE */2259 2244 2260 2245 … … 2274 2259 * Lock PGM and set the no-more-writes indicator. 2275 2260 */ 2276 #ifdef VBOX_WITH_NEW_PHYS_CODE2277 2261 pgmLock(pVM); 2278 #endif2279 2262 pVM->pgm.s.fNoMorePhysWrites = true; 2280 2263 … … 2282 2265 * Save basic data (required / unaffected by relocation). 2283 2266 */ 2284 #ifdef VBOX_WITH_NEW_PHYS_CODE2285 2267 SSMR3PutStruct(pSSM, pPGM, &s_aPGMFields[0]); 2286 #else2287 SSMR3PutBool( pSSM, pPGM->fMappingsFixed);2288 SSMR3PutGCPtr( pSSM, pPGM->GCPtrMappingFixed);2289 SSMR3PutU32( pSSM, pPGM->cbMappingFixed);2290 SSMR3PutUInt( pSSM, pPGM->cbRamSize);2291 SSMR3PutGCPhys(pSSM, pPGM->GCPhysA20Mask);2292 SSMR3PutUInt( pSSM, pPGM->fA20Enabled);2293 SSMR3PutUInt( pSSM, pPGM->fSyncFlags);2294 SSMR3PutUInt( pSSM, pPGM->enmGuestMode);2295 SSMR3PutU32( pSSM, ~0); /* Separator. */2296 #endif2297 2268 2298 2269 /* … … 2323 2294 SSMR3PutGCPhys(pSSM, pRam->cb); 2324 2295 SSMR3PutU8(pSSM, !!pRam->pvR3); /* Boolean indicating memory or not. */ 2325 #ifdef VBOX_WITH_NEW_PHYS_CODE2326 2296 SSMR3PutStrZ(pSSM, pRam->pszDesc); /* This is the best unique id we have... */ 2327 2297 … … 2354 2324 if (RT_FAILURE(rc)) 2355 2325 break; 2356 2357 #else /* !VBOX_WITH_NEW_PHYS_CODE */ 2358 /* Flags. */ 2359 const unsigned cPages = pRam->cb >> PAGE_SHIFT; 2360 for (unsigned iPage = 0; iPage < cPages; iPage++) 2361 SSMR3PutU16(pSSM, (uint16_t)(pRam->aPages[iPage].HCPhys & ~X86_PTE_PAE_PG_MASK)); /** @todo PAGE FLAGS */ 2362 2363 /* Any memory associated with the range. */ 2364 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) 2365 { 2366 for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++) 2367 { 2368 if (pRam->paChunkR3Ptrs[iChunk]) 2369 { 2370 SSMR3PutU8(pSSM, 1); /* chunk present */ 2371 SSMR3PutMem(pSSM, (void *)pRam->paChunkR3Ptrs[iChunk], PGM_DYNAMIC_CHUNK_SIZE); 2372 } 2373 else 2374 SSMR3PutU8(pSSM, 0); /* no chunk present */ 2375 } 2376 } 2377 else if (pRam->pvR3) 2378 { 2379 rc = SSMR3PutMem(pSSM, pRam->pvR3, pRam->cb); 2380 if (RT_FAILURE(rc)) 2381 { 2382 Log(("pgmR3Save: SSMR3PutMem(, %p, %#x) -> %Rrc\n", pRam->pvR3, pRam->cb, rc)); 2383 return rc; 2384 } 2385 } 2386 #endif /* !VBOX_WITH_NEW_PHYS_CODE */ 2387 } 2388 2389 #ifdef VBOX_WITH_NEW_PHYS_CODE 2326 } 2327 2390 2328 pgmUnlock(pVM); 2391 #endif2392 2329 return SSMR3PutU32(pSSM, ~0); /* terminator. */ 2393 2330 } 2394 2331 2395 2396 #ifdef VBOX_WITH_NEW_PHYS_CODE2397 2332 2398 2333 /** … … 2552 2487 } 2553 2488 2554 #endif /* VBOX_WITH_NEW_PHYS_CODE */2555 2489 2556 2490 /** … … 2572 2506 * Load basic data (required / unaffected by relocation). 2573 2507 */ 2574 #ifdef VBOX_WITH_NEW_PHYS_CODE2575 2508 if (u32Version >= PGM_SAVED_STATE_VERSION) 2576 2509 { … … 2579 2512 } 2580 2513 else 2581 #endif2582 2514 { 2583 2515 SSMR3GetBool(pSSM, &pPGM->fMappingsFixed); … … 2585 2517 SSMR3GetU32(pSSM, &pPGM->cbMappingFixed); 2586 2518 2587 RTUINT cbRamSize;2588 rc = SSMR3GetU32(pSSM, &cbRamSize );2519 uint32_t cbRamSizeIgnored; 2520 rc = SSMR3GetU32(pSSM, &cbRamSizeIgnored); 2589 2521 if (RT_FAILURE(rc)) 2590 2522 return rc; 2591 AssertLogRelMsgReturn(cbRamSize == pPGM->cbRamSize, ("%#x != %#x\n", cbRamSize, pPGM->cbRamSize),2592 VERR_SSM_LOAD_MEMORY_SIZE_MISMATCH);2593 2523 SSMR3GetGCPhys(pSSM, &pPGM->GCPhysA20Mask); 2594 2524 … … 2701 2631 char szDesc[256]; 2702 2632 szDesc[0] = '\0'; 2703 #ifdef VBOX_WITH_NEW_PHYS_CODE2704 2633 if (u32Version >= PGM_SAVED_STATE_VERSION) 2705 2634 { … … 2708 2637 return rc; 2709 2638 } 2710 #endif2711 2639 2712 2640 /* … … 2720 2648 || GCPhysLast != pRam->GCPhysLast 2721 2649 || cb != pRam->cb 2722 #ifdef VBOX_WITH_NEW_PHYS_CODE 2723 || (szDesc[0] && strcmp(szDesc, pRam->pszDesc)) 2724 #else 2725 || fHaveBits != !!pRam->pvR3 2726 #endif 2727 ) 2728 #ifdef VBOX_WITH_NEW_PHYS_CODE 2650 || (szDesc[0] && strcmp(szDesc, pRam->pszDesc)) ) 2729 2651 /* Hack for PDMDevHlpPhysReserve(pDevIns, 0xfff80000, 0x80000, "High ROM Region"); */ 2730 2652 && ( u32Version != PGM_SAVED_STATE_VERSION_OLD_PHYS_CODE … … 2734 2656 || pRam->GCPhys < GCPhys 2735 2657 || !fHaveBits) 2736 #endif2737 2658 ) 2738 2659 { … … 2749 2670 AssertFailedReturn(VERR_SSM_LOAD_CONFIG_MISMATCH); 2750 2671 2751 #ifdef VBOX_WITH_NEW_PHYS_CODE 2752 if (u32Version > PGM_SAVED_STATE_VERSION_OLD_PHYS_CODE) 2753 AssertMsgFailed(("debug skipping not implemented, sorry\n")); 2754 else 2755 #else 2756 { 2757 RTGCPHYS cPages = ((GCPhysLast - GCPhys) + 1) >> PAGE_SHIFT; 2758 while (cPages-- > 0) 2759 { 2760 uint16_t u16Ignore; 2761 SSMR3GetU16(pSSM, &u16Ignore); 2762 } 2763 } 2764 #endif 2672 AssertMsgFailed(("debug skipping not implemented, sorry\n")); 2765 2673 continue; 2766 2674 } 2767 2675 2768 2676 uint32_t cPages = (GCPhysLast - GCPhys + 1) >> PAGE_SHIFT; 2769 2770 #ifdef VBOX_WITH_NEW_PHYS_CODE2771 2677 if (u32Version >= PGM_SAVED_STATE_VERSION) 2772 2678 { … … 2902 2808 } 2903 2809 } 2904 2905 #else /* !VBOX_WITH_NEW_PHYS_CODE */2906 /* Flags. */2907 for (uint32_t iPage = 0; iPage < cPages; iPage++)2908 {2909 uint16_t u16 = 0;2910 SSMR3GetU16(pSSM, &u16);2911 u16 &= PAGE_OFFSET_MASK & ~( RT_BIT(4) | RT_BIT(5) | RT_BIT(6)2912 | RT_BIT(7) | RT_BIT(8) | RT_BIT(9) | RT_BIT(10) );2913 // &= MM_RAM_FLAGS_DYNAMIC_ALLOC | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO22914 pRam->aPages[iPage].HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) | (RTHCPHYS)u16; /** @todo PAGE FLAGS */2915 }2916 2917 /* any memory associated with the range. */2918 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)2919 {2920 for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)2921 {2922 uint8_t fValidChunk;2923 2924 rc = SSMR3GetU8(pSSM, &fValidChunk);2925 if (RT_FAILURE(rc))2926 return rc;2927 if (fValidChunk > 1)2928 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;2929 2930 if (fValidChunk)2931 {2932 if (!pRam->paChunkR3Ptrs[iChunk])2933 {2934 rc = pgmr3PhysGrowRange(pVM, pRam->GCPhys + iChunk * PGM_DYNAMIC_CHUNK_SIZE);2935 if (RT_FAILURE(rc))2936 return rc;2937 }2938 Assert(pRam->paChunkR3Ptrs[iChunk]);2939 2940 SSMR3GetMem(pSSM, (void *)pRam->paChunkR3Ptrs[iChunk], PGM_DYNAMIC_CHUNK_SIZE);2941 }2942 /* else nothing to do */2943 }2944 }2945 else if (pRam->pvR3)2946 {2947 rc = SSMR3GetMem(pSSM, pRam->pvR3, pRam->cb);2948 if (RT_FAILURE(rc))2949 {2950 Log(("pgmR3Save: SSMR3GetMem(, %p, %#x) -> %Rrc\n", pRam->pvR3, pRam->cb, rc));2951 return rc;2952 }2953 }2954 #endif /* !VBOX_WITH_NEW_PHYS_CODE */2955 2810 } 2956 2811 … … 2976 2831 */ 2977 2832 if ( u32Version != PGM_SAVED_STATE_VERSION 2978 #ifdef VBOX_WITH_NEW_PHYS_CODE 2979 && u32Version != PGM_SAVED_STATE_VERSION_OLD_PHYS_CODE 2980 #endif 2981 ) 2833 && u32Version != PGM_SAVED_STATE_VERSION_OLD_PHYS_CODE) 2982 2834 { 2983 2835 AssertMsgFailed(("pgmR3Load: Invalid version u32Version=%d (current %d)!\n", u32Version, PGM_SAVED_STATE_VERSION)); -
trunk/src/VBox/VMM/PGMDbg.cpp
r17370 r18665 55 55 VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PVM pVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys) 56 56 { 57 #ifdef VBOX_WITH_NEW_PHYS_CODE58 57 *pGCPhys = NIL_RTGCPHYS; 59 58 return VERR_NOT_IMPLEMENTED; 60 61 #else62 for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);63 pRam;64 pRam = pRam->CTX_SUFF(pNext))65 {66 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)67 {68 for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)69 {70 if (pRam->paChunkR3Ptrs[iChunk])71 {72 RTR3UINTPTR off = (RTR3UINTPTR)R3Ptr - pRam->paChunkR3Ptrs[iChunk];73 if (off < PGM_DYNAMIC_CHUNK_SIZE)74 {75 *pGCPhys = pRam->GCPhys + iChunk*PGM_DYNAMIC_CHUNK_SIZE + off;76 return VINF_SUCCESS;77 }78 }79 }80 }81 else if (pRam->pvR3)82 {83 RTR3UINTPTR off = (RTR3UINTPTR)R3Ptr - (RTR3UINTPTR)pRam->pvR3;84 if (off < pRam->cb)85 {86 *pGCPhys = pRam->GCPhys + off;87 return VINF_SUCCESS;88 }89 }90 }91 return VERR_INVALID_POINTER;92 #endif93 59 } 94 60 … … 110 76 VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PVM pVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys) 111 77 { 112 #ifdef VBOX_WITH_NEW_PHYS_CODE113 78 *pHCPhys = NIL_RTHCPHYS; 114 79 return VERR_NOT_IMPLEMENTED; 115 116 #else117 for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);118 pRam;119 pRam = pRam->CTX_SUFF(pNext))120 {121 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)122 {123 for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)124 {125 if (pRam->paChunkR3Ptrs[iChunk])126 {127 RTR3UINTPTR off = (RTR3UINTPTR)R3Ptr - pRam->paChunkR3Ptrs[iChunk];128 if (off < PGM_DYNAMIC_CHUNK_SIZE)129 {130 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];131 if (PGM_PAGE_IS_RESERVED(pPage))132 return VERR_PGM_PHYS_PAGE_RESERVED;133 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage)134 | (off & PAGE_OFFSET_MASK);135 return VINF_SUCCESS;136 }137 }138 }139 }140 else if (pRam->pvR3)141 {142 RTR3UINTPTR off = (RTR3UINTPTR)R3Ptr - (RTR3UINTPTR)pRam->pvR3;143 if (off < pRam->cb)144 {145 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];146 if (PGM_PAGE_IS_RESERVED(pPage))147 return VERR_PGM_PHYS_PAGE_RESERVED;148 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage)149 | (off & PAGE_OFFSET_MASK);150 return VINF_SUCCESS;151 }152 }153 }154 return VERR_INVALID_POINTER;155 #endif156 80 } 157 81 … … 582 506 { 583 507 PPGMPAGE pPage = &pRam->aPages[iPage]; 584 #ifdef VBOX_WITH_NEW_PHYS_CODE585 508 if ( !PGM_PAGE_IS_ZERO(pPage) 586 509 && !PGM_PAGE_IS_MMIO(pPage)) 587 #else588 if ( /** @todo !PGM_PAGE_IS_ZERO(pPage)589 &&*/ !PGM_PAGE_IS_MMIO(pPage))590 #endif591 510 { 592 511 void const *pvPage; -
trunk/src/VBox/VMM/PGMHandler.cpp
r17517 r18665 99 99 if (!pszModR0) 100 100 pszModR0 = VMMR0_MAIN_MODULE_NAME; 101 #ifdef VBOX_WITH_NEW_PHYS_CODE102 101 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER); 103 102 AssertPtrReturn(pszHandlerR0, VERR_INVALID_POINTER); 104 103 AssertPtrReturn(pszHandlerRC, VERR_INVALID_POINTER); 105 #endif106 104 107 105 /* … … 110 108 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0 = NIL_RTR0PTR; 111 109 int rc = VINF_SUCCESS; 112 #ifndef VBOX_WITH_NEW_PHYS_CODE113 if (pszHandlerR0)114 #endif115 110 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pszModR0, pszHandlerR0, &pfnHandlerR0); 116 111 if (RT_SUCCESS(rc)) … … 120 115 */ 121 116 RTRCPTR pfnHandlerRC = NIL_RTRCPTR; 122 #ifndef VBOX_WITH_NEW_PHYS_CODE123 if (pszHandlerRC)124 #endif125 117 rc = PDMR3LdrGetSymbolRCLazy(pVM, pszModRC, pszHandlerRC, &pfnHandlerRC); 126 127 118 if (RT_SUCCESS(rc)) 128 119 return PGMHandlerPhysicalRegisterEx(pVM, enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, -
trunk/src/VBox/VMM/PGMInternal.h
r18617 r18665 143 143 #endif 144 144 145 #ifdef VBOX_WITH_NEW_PHYS_CODE146 145 /** @def VBOX_WITH_NEW_LAZY_PAGE_ALLOC 147 146 * Enables the experimental lazy page allocation code. */ 148 147 /*# define VBOX_WITH_NEW_LAZY_PAGE_ALLOC */ 149 #endif 148 150 149 /** @} */ 151 150 … … 587 586 { 588 587 /** The physical address and a whole lot of other stuff. All bits are used! */ 589 #ifdef VBOX_WITH_NEW_PHYS_CODE590 588 RTHCPHYS HCPhysX; 591 #else592 RTHCPHYS HCPhys;593 #define HCPhysX HCPhys /**< Temporary while in the process of eliminating direct access to PGMPAGE::HCPhys. */594 #endif595 589 /** The page state. */ 596 590 uint32_t u2StateX : 2; … … 655 649 * @param pPage Pointer to the physical guest page tracking structure. 656 650 */ 657 #ifdef VBOX_WITH_NEW_PHYS_CODE 658 # define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \ 651 #define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \ 659 652 PGM_PAGE_INIT(pPage, (pVM)->pgm.s.HCPhysZeroPg, NIL_GMM_PAGEID, (_uType), PGM_PAGE_STATE_ZERO) 660 #else661 # define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \662 PGM_PAGE_INIT(pPage, 0, NIL_GMM_PAGEID, (_uType), PGM_PAGE_STATE_ZERO)663 #endif664 653 /** Temporary hack. Replaced by PGM_PAGE_INIT_ZERO once the old code is kicked out. */ 665 654 # define PGM_PAGE_INIT_ZERO_REAL(pPage, pVM, _uType) \ … … 788 777 * @param _enmType The new page type (PGMPAGETYPE). 789 778 */ 790 #ifdef VBOX_WITH_NEW_PHYS_CODE791 779 #define PGM_PAGE_SET_TYPE(pPage, _enmType) \ 792 780 do { (pPage)->u3Type = (_enmType); } while (0) 793 #else794 #define PGM_PAGE_SET_TYPE(pPage, _enmType) \795 do { \796 (pPage)->u3Type = (_enmType); \797 if ((_enmType) == PGMPAGETYPE_ROM) \798 (pPage)->HCPhysX |= MM_RAM_FLAGS_ROM; \799 else if ((_enmType) == PGMPAGETYPE_ROM_SHADOW) \800 (pPage)->HCPhysX |= MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2; \801 else if ((_enmType) == PGMPAGETYPE_MMIO2) \802 (pPage)->HCPhysX |= MM_RAM_FLAGS_MMIO2; \803 } while (0)804 #endif805 806 807 /**808 * Checks if the page is 'reserved'.809 * @returns true/false.810 * @param pPage Pointer to the physical guest page tracking structure.811 */812 #define PGM_PAGE_IS_RESERVED(pPage) ( !!((pPage)->HCPhysX & MM_RAM_FLAGS_RESERVED) )813 781 814 782 /** … … 817 785 * @param pPage Pointer to the physical guest page tracking structure. 818 786 */ 819 #ifdef VBOX_WITH_NEW_PHYS_CODE 820 # define PGM_PAGE_IS_MMIO(pPage) ( (pPage)->u3Type == PGMPAGETYPE_MMIO ) 821 #else 822 # define PGM_PAGE_IS_MMIO(pPage) ( !!((pPage)->HCPhysX & MM_RAM_FLAGS_MMIO) ) 823 #endif 787 #define PGM_PAGE_IS_MMIO(pPage) ( (pPage)->u3Type == PGMPAGETYPE_MMIO ) 824 788 825 789 /** … … 835 799 * @param pPage Pointer to the physical guest page tracking structure. 836 800 */ 837 #define PGM_PAGE_IS_SHARED(pPage) 801 #define PGM_PAGE_IS_SHARED(pPage) ( (pPage)->u2StateX == PGM_PAGE_STATE_SHARED ) 838 802 839 803 … … 1032 996 /** Start of the HC mapping of the range. This is only used for MMIO2. */ 1033 997 R3PTRTYPE(void *) pvR3; 1034 #ifndef VBOX_WITH_NEW_PHYS_CODE1035 /** R3 virtual lookup ranges for chunks.1036 * Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges.1037 * @remarks This is occationally accessed from ring-0!! (not darwin) */1038 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R01039 R3PTRTYPE(PRTR3UINTPTR) paChunkR3Ptrs;1040 # else1041 R3R0PTRTYPE(PRTR3UINTPTR) paChunkR3Ptrs;1042 # endif1043 #endif1044 998 /** The range description. */ 1045 999 R3PTRTYPE(const char *) pszDesc; … … 1049 1003 RCPTRTYPE(struct PGMRAMRANGE *) pSelfRC; 1050 1004 /** Padding to make aPage aligned on sizeof(PGMPAGE). */ 1051 #ifdef VBOX_WITH_NEW_PHYS_CODE1052 1005 uint32_t au32Alignment2[HC_ARCH_BITS == 32 ? 2 : 1]; 1053 #else1054 # if HC_ARCH_BITS == 321055 uint32_t u32Alignment2;1056 # endif1057 #endif1058 1006 /** Array of physical guest page tracking structures. */ 1059 1007 PGMPAGE aPages[1]; … … 1068 1016 /** @} */ 1069 1017 1070 #ifndef VBOX_WITH_NEW_PHYS_CODE1071 /** Return hc ptr corresponding to the ram range and physical offset */1072 #define PGMRAMRANGE_GETHCPTR(pRam, off) \1073 (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((pRam)->paChunkR3Ptrs[(off) >> PGM_DYNAMIC_CHUNK_SHIFT] + ((off) & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \1074 : (RTHCPTR)((RTR3UINTPTR)(pRam)->pvR3 + (off));1075 #endif1076 1018 1077 1019 /** … … 2388 2330 /** RC pointer corresponding to PGM::pRamRangesR3. */ 2389 2331 RCPTRTYPE(PPGMRAMRANGE) pRamRangesRC; 2390 /** The configured RAM size. 2391 * @remarks Do NOT use this, it's too small to hold the whole stuff. 2392 * @todo Remove with VBOX_WITH_NEW_PHYS_CODE! */ 2393 RTUINT cbRamSize; 2332 RTRCPTR alignment4; /**< structure alignment. */ 2394 2333 2395 2334 /** Pointer to the list of ROM ranges - for R3. … … 2632 2571 STAMCOUNTER StatR3GuestPDWrite; /**< R3: The total number of times pgmHCGuestPDWriteHandler() was called. */ 2633 2572 STAMCOUNTER StatR3GuestPDWriteConflict; /**< R3: The number of times GuestPDWriteContlict() detected a conflict. */ 2634 #ifndef VBOX_WITH_NEW_PHYS_CODE2635 STAMCOUNTER StatR3DynRamTotal; /**< R3: Allocated MBs of guest ram */2636 STAMCOUNTER StatR3DynRamGrow; /**< R3: Nr of pgmr3PhysGrowRange calls. */2637 #endif2638 2573 2639 2574 /* R0 only: */ … … 2909 2844 int pgmR3PhysRamReset(PVM pVM); 2910 2845 int pgmR3PhysRomReset(PVM pVM); 2911 # ifndef VBOX_WITH_NEW_PHYS_CODE2912 int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);2913 # endif2914 2846 2915 2847 int pgmR3PoolInit(PVM pVM); … … 3060 2992 } 3061 2993 *ppPage = &pRam->aPages[off >> PAGE_SHIFT]; 3062 #ifndef VBOX_WITH_NEW_PHYS_CODE3063 3064 /*3065 * Make sure it's present.3066 */3067 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)3068 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))3069 {3070 #ifdef IN_RING33071 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);3072 #else3073 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);3074 #endif3075 if (RT_FAILURE(rc))3076 {3077 *ppPage = NULL; /* avoid incorrect and very annoying GCC warnings */3078 return rc;3079 }3080 Assert(rc == VINF_SUCCESS);3081 }3082 #endif3083 2994 return VINF_SUCCESS; 3084 2995 } … … 3127 3038 } 3128 3039 *ppPage = &pRam->aPages[off >> PAGE_SHIFT]; 3129 #ifndef VBOX_WITH_NEW_PHYS_CODE3130 3131 /*3132 * Make sure it's present.3133 */3134 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)3135 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))3136 {3137 #ifdef IN_RING33138 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);3139 #else3140 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);3141 #endif3142 if (RT_FAILURE(rc))3143 {3144 *ppPage = NULL; /* Shut up annoying smart ass. */3145 return rc;3146 }3147 Assert(rc == VINF_SUCCESS);3148 }3149 #endif3150 3040 return VINF_SUCCESS; 3151 3041 } … … 3218 3108 *ppRam = pRam; 3219 3109 *ppPage = &pRam->aPages[off >> PAGE_SHIFT]; 3220 #ifndef VBOX_WITH_NEW_PHYS_CODE3221 3222 /*3223 * Make sure it's present.3224 */3225 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)3226 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))3227 {3228 #ifdef IN_RING33229 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);3230 #else3231 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);3232 #endif3233 if (RT_FAILURE(rc))3234 {3235 *ppPage = NULL; /* Shut up silly GCC warnings. */3236 *ppPage = NULL; /* ditto */3237 return rc;3238 }3239 Assert(rc == VINF_SUCCESS);3240 3241 }3242 #endif3243 3110 return VINF_SUCCESS; 3244 3111 } … … 3408 3275 3409 3276 #endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 || IN_RC */ 3410 3411 3277 #ifndef IN_RC 3278 3412 3279 /** 3413 3280 * Queries the Physical TLB entry for a physical guest page, … … 3466 3333 return rc; 3467 3334 } 3335 3468 3336 #endif /* !IN_RC */ 3469 3470 3471 #ifndef VBOX_WITH_NEW_PHYS_CODE3472 /**3473 * Convert GC Phys to HC Virt and HC Phys.3474 *3475 * @returns VBox status.3476 * @param pPGM PGM handle.3477 * @param GCPhys The GC physical address.3478 * @param pHCPtr Where to store the corresponding HC virtual address.3479 * @param pHCPhys Where to store the HC Physical address and its flags.3480 *3481 * @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-33482 * and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.3483 * Either way, we have to make sure the page is writable in MapCR3.3484 */3485 DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)3486 {3487 PPGMRAMRANGE pRam;3488 PPGMPAGE pPage;3489 int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);3490 if (RT_FAILURE(rc))3491 {3492 *pHCPtr = 0; /* Shut up crappy GCC warnings */3493 *pHCPhys = 0; /* ditto */3494 return rc;3495 }3496 RTGCPHYS off = GCPhys - pRam->GCPhys;3497 3498 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage);3499 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)3500 {3501 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);3502 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES only MapCR3 usage. */3503 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(PGM2VM(pPGM), pRam->paChunkR3Ptrs);3504 *pHCPtr = (RTHCPTR)(paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));3505 #else3506 *pHCPtr = (RTHCPTR)(pRam->paChunkR3Ptrs[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));3507 #endif3508 return VINF_SUCCESS;3509 }3510 if (pRam->pvR3)3511 {3512 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvR3 + off);3513 return VINF_SUCCESS;3514 }3515 *pHCPtr = 0;3516 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;3517 }3518 #endif /* VBOX_WITH_NEW_PHYS_CODE */3519 3520 3337 3521 3338 /** … … 3555 3372 #else 3556 3373 PX86PD pGuestPD = pPGM->CTX_SUFF(pGst32BitPd); 3557 # ifdef VBOX_WITH_NEW_PHYS_CODE3558 3374 # ifdef IN_RING3 3559 3375 if (!pGuestPD) 3560 3376 pGuestPD = pgmGstLazyMap32BitPD(pPGM); 3561 # endif3562 3377 # endif 3563 3378 #endif … … 3581 3396 #else 3582 3397 PX86PD pGuestPD = pPGM->CTX_SUFF(pGst32BitPd); 3583 # ifdef VBOX_WITH_NEW_PHYS_CODE3584 3398 # ifdef IN_RING3 3585 3399 if (!pGuestPD) 3586 3400 pGuestPD = pgmGstLazyMap32BitPD(pPGM); 3587 # endif3588 3401 # endif 3589 3402 #endif … … 3606 3419 #else 3607 3420 PX86PD pGuestPD = pPGM->CTX_SUFF(pGst32BitPd); 3608 # ifdef VBOX_WITH_NEW_PHYS_CODE3609 3421 # ifdef IN_RING3 3610 3422 if (!pGuestPD) 3611 3423 pGuestPD = pgmGstLazyMap32BitPD(pPGM); 3612 # endif3613 3424 # endif 3614 3425 #endif … … 3632 3443 #else 3633 3444 PX86PDPT pGuestPDPT = pPGM->CTX_SUFF(pGstPaePdpt); 3634 # ifdef VBOX_WITH_NEW_PHYS_CODE3635 3445 # ifdef IN_RING3 3636 3446 if (!pGuestPDPT) 3637 3447 pGuestPDPT = pgmGstLazyMapPaePDPT(pPGM); 3638 # endif3639 3448 # endif 3640 3449 #endif … … 3661 3470 #else 3662 3471 PX86PDPT pGuestPDPT = pPGM->CTX_SUFF(pGstPaePdpt); 3663 # ifdef VBOX_WITH_NEW_PHYS_CODE3664 3472 # ifdef IN_RING3 3665 3473 if (!pGuestPDPT) 3666 3474 pGuestPDPT = pgmGstLazyMapPaePDPT(pPGM); 3667 # endif3668 3475 # endif 3669 3476 #endif … … 3689 3496 if (pGuestPDPT->a[iPdpt].n.u1Present) 3690 3497 { 3691 #ifdef VBOX_WITH_NEW_PHYS_CODE3692 3498 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 3693 3499 PX86PDPAE pGuestPD = NULL; … … 3701 3507 #endif 3702 3508 return pGuestPD; 3703 #else /* !VBOX_WITH_NEW_PHYS_CODE */3704 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R03705 if ((pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdpt])3706 return pPGM->CTX_SUFF(apGstPaePDs)[iPdpt];3707 #endif3708 3709 /* cache is out-of-sync. */3710 PX86PDPAE pPD;3711 int rc = PGM_GCPHYS_2_PTR_BY_PGM(pPGM, pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);3712 if (RT_SUCCESS(rc))3713 return pPD;3714 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, pGuestPDPT->a[iPdpt].u));3715 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3716 3509 /* returning NULL is ok if we assume it's just an invalid page of some kind emulated as all 0s. (not quite true) */ 3717 3510 } … … 3738 3531 { 3739 3532 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK; 3740 #ifdef VBOX_WITH_NEW_PHYS_CODE3741 3533 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 3742 3534 PX86PDPAE pGuestPD = NULL; … … 3750 3542 #endif 3751 3543 return &pGuestPD->a[iPD]; 3752 #else /* !VBOX_WITH_NEW_PHYS_CODE */3753 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R03754 if ((pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdpt])3755 return &pPGM->CTX_SUFF(apGstPaePDs)[iPdpt]->a[iPD];3756 #endif3757 3758 /* The cache is out-of-sync. */3759 PX86PDPAE pPD;3760 int rc = PGM_GCPHYS_2_PTR_BY_PGM(pPGM, pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);3761 if (RT_SUCCESS(rc))3762 return &pPD->a[iPD];3763 AssertMsgFailed(("Impossible! rc=%Rrc PDPE=%RX64\n", rc, pGuestPDPT->a[iPdpt].u));3764 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3765 3544 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. (not quite true) */ 3766 3545 } … … 3788 3567 { 3789 3568 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK; 3790 #ifdef VBOX_WITH_NEW_PHYS_CODE3791 3569 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 3792 3570 PX86PDPAE pGuestPD = NULL; … … 3800 3578 #endif 3801 3579 return pGuestPD->a[iPD]; 3802 #else /* !VBOX_WITH_NEW_PHYS_CODE */3803 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R03804 if ((pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdpt])3805 return pPGM->CTX_SUFF(apGstPaePDs)[iPdpt]->a[iPD];3806 #endif3807 3808 /* cache is out-of-sync. */3809 PX86PDPAE pPD;3810 int rc = PGM_GCPHYS_2_PTR_BY_PGM(pPGM, pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);3811 if (RT_SUCCESS(rc))3812 return pPD->a[iPD];3813 AssertMsgFailed(("Impossible! rc=%d PDPE=%RX64\n", rc, pGuestPDPT->a[iPdpt].u));3814 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3815 3580 } 3816 3581 } … … 3842 3607 { 3843 3608 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK; 3844 #ifdef VBOX_WITH_NEW_PHYS_CODE3845 3609 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 3846 3610 PX86PDPAE pGuestPD = NULL; … … 3855 3619 *piPD = iPD; 3856 3620 return pGuestPD; 3857 #else /* !VBOX_WITH_NEW_PHYS_CODE */3858 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R03859 if ((pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdpt])3860 {3861 *piPD = iPD;3862 return pPGM->CTX_SUFF(apGstPaePDs)[iPdpt];3863 }3864 #endif3865 3866 /* cache is out-of-sync. */3867 PX86PDPAE pPD;3868 int rc = PGM_GCPHYS_2_PTR_BY_PGM(pPGM, pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK, &pPD);3869 if (RT_SUCCESS(rc))3870 {3871 *piPD = iPD;3872 return pPD;3873 }3874 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, pGuestPDPT->a[iPdpt].u));3875 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3876 3621 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */ 3877 3622 } … … 3895 3640 #else 3896 3641 PX86PML4 pGuestPml4 = pPGM->CTX_SUFF(pGstAmd64Pml4); 3897 # ifdef VBOX_WITH_NEW_PHYS_CODE3898 3642 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 3899 3643 if (!pGuestPml4) 3900 3644 pGuestPml4 = pgmGstLazyMapPml4(pPGM); 3901 # endif3902 3645 # endif 3903 3646 Assert(pGuestPml4); … … 3922 3665 #else 3923 3666 PX86PML4 pGuestPml4 = pPGM->CTX_SUFF(pGstAmd64Pml4); 3924 # ifdef VBOX_WITH_NEW_PHYS_CODE3925 3667 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 3926 3668 if (!pGuestPml4) 3927 3669 pGuestPml4 = pgmGstLazyMapPml4(pPGM); 3928 # endif3929 3670 # endif 3930 3671 Assert(pGuestPml4); … … 3953 3694 #else 3954 3695 PX86PML4 pGuestPml4 = pPGM->CTX_SUFF(pGstAmd64Pml4); 3955 # ifdef VBOX_WITH_NEW_PHYS_CODE3956 3696 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R3 3957 3697 if (!pGuestPml4) 3958 3698 pGuestPml4 = pgmGstLazyMapPml4(pPGM); 3959 # endif3960 3699 # endif 3961 3700 Assert(pGuestPml4); -
trunk/src/VBox/VMM/PGMPhys.cpp
r18645 r18665 346 346 347 347 348 #ifdef VBOX_WITH_NEW_PHYS_CODE349 348 /** 350 349 * VMR3ReqCall worker for PGMR3PhysGCPhys2CCPtrExternal to make pages writable. … … 386 385 return rc; 387 386 } 388 #endif /* VBOX_WITH_NEW_PHYS_CODE */389 387 390 388 … … 421 419 AssertPtr(pLock); 422 420 423 #ifdef VBOX_WITH_NEW_PHYS_CODE424 421 int rc = pgmLock(pVM); 425 422 AssertRCReturn(rc, rc); … … 483 480 pgmUnlock(pVM); 484 481 return rc; 485 486 #else /* !VBOX_WITH_NEW_PHYS_CODE */487 /*488 * Fallback code.489 */490 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);491 #endif /* !VBOX_WITH_NEW_PHYS_CODE */492 482 } 493 483 … … 517 507 VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock) 518 508 { 519 #ifdef VBOX_WITH_NEW_PHYS_CODE520 509 int rc = pgmLock(pVM); 521 510 AssertRCReturn(rc, rc); … … 560 549 pgmUnlock(pVM); 561 550 return rc; 562 563 #else /* !VBOX_WITH_NEW_PHYS_CODE */564 /*565 * Fallback code.566 */567 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);568 #endif /* !VBOX_WITH_NEW_PHYS_CODE */569 551 } 570 552 … … 716 698 717 699 718 #ifdef VBOX_WITH_NEW_PHYS_CODE719 700 /** 720 701 * Frees a range of pages, replacing them with ZERO pages of the specified type. … … 757 738 return rc; 758 739 } 759 #endif /* VBOX_WITH_NEW_PHYS_CODE */760 740 761 741 … … 972 952 return rc; 973 953 974 #ifdef VBOX_WITH_NEW_PHYS_CODE975 954 if ( GCPhys >= _4G 976 955 && cPages > 256) … … 1025 1004 } 1026 1005 else 1027 #endif1028 1006 { 1029 1007 /* … … 1035 1013 AssertLogRelMsgRCReturn(rc, ("cbRamRange=%zu\n", cbRamRange), rc); 1036 1014 1037 #ifndef VBOX_WITH_NEW_PHYS_CODE1038 /* Allocate memory for chunk to HC ptr lookup array. */1039 pNew->paChunkR3Ptrs = NULL;1040 rc = MMHyperAlloc(pVM, (cb >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(void *), 16, MM_TAG_PGM, (void **)&pNew->paChunkR3Ptrs);1041 AssertRCReturn(rc, rc);1042 pNew->fFlags |= MM_RAM_FLAGS_DYNAMIC_ALLOC;1043 #endif1044 1045 1015 pgmR3PhysInitAndLinkRamRange(pVM, pNew, GCPhys, GCPhysLast, NIL_RTRCPTR, NIL_RTR0PTR, pszDesc, pPrev); 1046 1016 } … … 1049 1019 * Notify REM. 1050 1020 */ 1051 #ifdef VBOX_WITH_NEW_PHYS_CODE1052 1021 REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, REM_NOTIFY_PHYS_RAM_FLAGS_RAM); 1053 #else1054 REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, MM_RAM_FLAGS_DYNAMIC_ALLOC);1055 #endif1056 1022 1057 1023 return VINF_SUCCESS; … … 1069 1035 int pgmR3PhysRamReset(PVM pVM) 1070 1036 { 1071 #ifdef VBOX_WITH_NEW_PHYS_CODE1072 1037 /* 1073 1038 * We batch up pages before freeing them. … … 1077 1042 int rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE); 1078 1043 AssertLogRelRCReturn(rc, rc); 1079 #endif1080 1044 1081 1045 /* … … 1087 1051 AssertMsg(((RTGCPHYS)iPage << PAGE_SHIFT) == pRam->cb, ("%RGp %RGp\n", (RTGCPHYS)iPage << PAGE_SHIFT, pRam->cb)); 1088 1052 1089 #ifdef VBOX_WITH_NEW_PHYS_CODE1090 1053 if (!pVM->pgm.s.fRamPreAlloc) 1091 1054 { … … 1119 1082 } 1120 1083 else 1121 #endif1122 1084 { 1123 1085 /* Zero the memory. */ … … 1127 1089 switch (PGM_PAGE_GET_TYPE(pPage)) 1128 1090 { 1129 #ifndef VBOX_WITH_NEW_PHYS_CODE1130 case PGMPAGETYPE_INVALID:1131 case PGMPAGETYPE_RAM:1132 if (pRam->aPages[iPage].HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */1133 {1134 /* shadow ram is reloaded elsewhere. */1135 Log4(("PGMR3Reset: not clearing phys page %RGp due to flags %RHp\n", pRam->GCPhys + (iPage << PAGE_SHIFT), pRam->aPages[iPage].HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO))); /** @todo PAGE FLAGS */1136 continue;1137 }1138 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)1139 {1140 unsigned iChunk = iPage >> (PGM_DYNAMIC_CHUNK_SHIFT - PAGE_SHIFT);1141 if (pRam->paChunkR3Ptrs[iChunk])1142 ASMMemZero32((char *)pRam->paChunkR3Ptrs[iChunk] + ((iPage << PAGE_SHIFT) & PGM_DYNAMIC_CHUNK_OFFSET_MASK), PAGE_SIZE);1143 }1144 else1145 ASMMemZero32((char *)pRam->pvR3 + (iPage << PAGE_SHIFT), PAGE_SIZE);1146 break;1147 #else /* VBOX_WITH_NEW_PHYS_CODE */1148 1091 case PGMPAGETYPE_RAM: 1149 1092 switch (PGM_PAGE_GET_STATE(pPage)) … … 1166 1109 } 1167 1110 break; 1168 #endif /* VBOX_WITH_NEW_PHYS_CODE */1169 1111 1170 1112 case PGMPAGETYPE_MMIO2_ALIAS_MMIO: … … 1186 1128 } 1187 1129 1188 #ifdef VBOX_WITH_NEW_PHYS_CODE1189 1130 /* 1190 1131 * Finish off any pages pending freeing. … … 1196 1137 } 1197 1138 GMMR3FreePagesCleanup(pReq); 1198 #endif1199 1200 1139 1201 1140 return VINF_SUCCESS; … … 1285 1224 { 1286 1225 pNew = NULL; 1287 #ifdef VBOX_WITH_NEW_PHYS_CODE 1226 1288 1227 /* 1289 1228 * Make all the pages in the range MMIO/ZERO pages, freeing any … … 1298 1237 } 1299 1238 AssertRCReturn(rc, rc); 1300 #endif1301 1239 } 1302 1240 else … … 1325 1263 1326 1264 pNew->pvR3 = NULL; 1327 #ifndef VBOX_WITH_NEW_PHYS_CODE1328 pNew->paChunkR3Ptrs = NULL;1329 #endif1330 1265 1331 1266 uint32_t iPage = cPages; … … 1411 1346 { 1412 1347 fAllMMIO = false; 1413 #ifdef VBOX_WITH_NEW_PHYS_CODE1414 1348 Assert(PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO2_ALIAS_MMIO); 1415 1349 AssertMsgFailed(("%RGp %R[pgmpage]\n", pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), pPage)); 1416 #endif1417 1350 break; 1418 1351 } … … 1438 1371 } 1439 1372 1440 #ifdef VBOX_WITH_NEW_PHYS_CODE1441 1373 /* 1442 1374 * Range match? It will all be within one range (see PGMAllHandler.cpp). … … 1463 1395 break; 1464 1396 } 1465 #endif1466 1397 1467 1398 /* next */ … … 1584 1515 1585 1516 pNew->RamRange.pvR3 = pvPages; 1586 #ifndef VBOX_WITH_NEW_PHYS_CODE1587 pNew->RamRange.paChunkR3Ptrs = NULL;1588 #endif1589 1517 1590 1518 uint32_t iPage = cPages; … … 2671 2599 } 2672 2600 2673 #ifndef VBOX_WITH_NEW_PHYS_CODE2674 2675 /**2676 * Interface that the MMR3RamRegister(), MMR3RomRegister() and MMIO handler2677 * registration APIs calls to inform PGM about memory registrations.2678 *2679 * It registers the physical memory range with PGM. MM is responsible2680 * for the toplevel things - allocation and locking - while PGM is taking2681 * care of all the details and implements the physical address space virtualization.2682 *2683 * @returns VBox status.2684 * @param pVM The VM handle.2685 * @param pvRam HC virtual address of the RAM range. (page aligned)2686 * @param GCPhys GC physical address of the RAM range. (page aligned)2687 * @param cb Size of the RAM range. (page aligned)2688 * @param fFlags Flags, MM_RAM_*.2689 * @param paPages Pointer an array of physical page descriptors.2690 * @param pszDesc Description string.2691 */2692 VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc)2693 {2694 /*2695 * Validate input.2696 * (Not so important because callers are only MMR3PhysRegister()2697 * and PGMR3HandlerPhysicalRegisterEx(), but anyway...)2698 */2699 Log(("PGMR3PhysRegister %08X %x bytes flags %x %s\n", GCPhys, cb, fFlags, pszDesc));2700 2701 Assert((fFlags & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_DYNAMIC_ALLOC)) || paPages);2702 /*Assert(!(fFlags & MM_RAM_FLAGS_RESERVED) || !paPages);*/2703 Assert((fFlags == (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO)) || (fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) || pvRam);2704 /*Assert(!(fFlags & MM_RAM_FLAGS_RESERVED) || !pvRam);*/2705 Assert(!(fFlags & ~0xfff));2706 Assert(RT_ALIGN_Z(cb, PAGE_SIZE) == cb && cb);2707 Assert(RT_ALIGN_P(pvRam, PAGE_SIZE) == pvRam);2708 Assert(!(fFlags & ~(MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2 | MM_RAM_FLAGS_DYNAMIC_ALLOC)));2709 Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);2710 RTGCPHYS GCPhysLast = GCPhys + (cb - 1);2711 if (GCPhysLast < GCPhys)2712 {2713 AssertMsgFailed(("The range wraps! GCPhys=%RGp cb=%#x\n", GCPhys, cb));2714 return VERR_INVALID_PARAMETER;2715 }2716 2717 /*2718 * Find range location and check for conflicts.2719 */2720 PPGMRAMRANGE pPrev = NULL;2721 PPGMRAMRANGE pCur = pVM->pgm.s.pRamRangesR3;2722 while (pCur)2723 {2724 if (GCPhys <= pCur->GCPhysLast && GCPhysLast >= pCur->GCPhys)2725 {2726 AssertMsgFailed(("Conflict! This cannot happen!\n"));2727 return VERR_PGM_RAM_CONFLICT;2728 }2729 if (GCPhysLast < pCur->GCPhys)2730 break;2731 2732 /* next */2733 pPrev = pCur;2734 pCur = pCur->pNextR3;2735 }2736 2737 /*2738 * Allocate RAM range.2739 * Small ranges are allocated from the heap, big ones have separate mappings.2740 */2741 size_t cbRam = RT_OFFSETOF(PGMRAMRANGE, aPages[cb >> PAGE_SHIFT]);2742 PPGMRAMRANGE pNew;2743 int rc = VERR_NO_MEMORY;2744 if (cbRam > PAGE_SIZE / 2)2745 { /* large */2746 cbRam = RT_ALIGN_Z(cbRam, PAGE_SIZE);2747 rc = MMR3HyperAllocOnceNoRel(pVM, cbRam, PAGE_SIZE, MM_TAG_PGM_PHYS, (void **)&pNew);2748 AssertMsgRC(rc, ("MMR3HyperAllocOnceNoRel(,%#x,,) -> %Rrc\n", cbRam, rc));2749 }2750 else2751 { /* small */2752 rc = MMHyperAlloc(pVM, cbRam, 16, MM_TAG_PGM, (void **)&pNew);2753 AssertMsgRC(rc, ("MMHyperAlloc(,%#x,,,) -> %Rrc\n", cbRam, rc));2754 }2755 if (RT_SUCCESS(rc))2756 {2757 /*2758 * Initialize the range.2759 */2760 pNew->pvR3 = pvRam;2761 pNew->GCPhys = GCPhys;2762 pNew->GCPhysLast = GCPhysLast;2763 pNew->cb = cb;2764 pNew->fFlags = fFlags;2765 pNew->paChunkR3Ptrs = NULL;2766 2767 unsigned iPage = (unsigned)(cb >> PAGE_SHIFT);2768 if (paPages)2769 {2770 while (iPage-- > 0)2771 {2772 PGM_PAGE_INIT(&pNew->aPages[iPage], paPages[iPage].Phys & X86_PTE_PAE_PG_MASK, NIL_GMM_PAGEID,2773 fFlags & MM_RAM_FLAGS_MMIO2 ? PGMPAGETYPE_MMIO2 : PGMPAGETYPE_RAM,2774 PGM_PAGE_STATE_ALLOCATED);2775 pNew->aPages[iPage].HCPhys |= fFlags; /** @todo PAGE FLAGS*/2776 }2777 }2778 else if (fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)2779 {2780 /* Allocate memory for chunk to HC ptr lookup array. */2781 rc = MMHyperAlloc(pVM, (cb >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(void *), 16, MM_TAG_PGM, (void **)&pNew->paChunkR3Ptrs);2782 AssertMsgReturn(rc == VINF_SUCCESS, ("MMHyperAlloc(,%#x,,,) -> %Rrc\n", cbRam, cb), rc);2783 2784 /* Physical memory will be allocated on demand. */2785 while (iPage-- > 0)2786 {2787 PGM_PAGE_INIT(&pNew->aPages[iPage], 0, NIL_GMM_PAGEID, PGMPAGETYPE_RAM, PGM_PAGE_STATE_ZERO);2788 pNew->aPages[iPage].HCPhys = fFlags; /** @todo PAGE FLAGS */2789 }2790 }2791 else2792 {2793 Assert(fFlags == (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO));2794 RTHCPHYS HCPhysDummyPage = MMR3PageDummyHCPhys(pVM);2795 while (iPage-- > 0)2796 {2797 PGM_PAGE_INIT(&pNew->aPages[iPage], HCPhysDummyPage, NIL_GMM_PAGEID, PGMPAGETYPE_MMIO, PGM_PAGE_STATE_ZERO);2798 pNew->aPages[iPage].HCPhys |= fFlags; /** @todo PAGE FLAGS*/2799 }2800 }2801 2802 /*2803 * Insert the new RAM range.2804 */2805 pgmLock(pVM);2806 pNew->pNextR3 = pCur;2807 pNew->pNextR0 = pCur ? MMHyperCCToR0(pVM, pCur) : NIL_RTR0PTR;2808 pNew->pNextRC = pCur ? MMHyperCCToRC(pVM, pCur) : NIL_RTRCPTR;2809 if (pPrev)2810 {2811 pPrev->pNextR3 = pNew;2812 pPrev->pNextR0 = MMHyperCCToR0(pVM, pNew);2813 pPrev->pNextRC = MMHyperCCToRC(pVM, pNew);2814 }2815 else2816 {2817 pVM->pgm.s.pRamRangesR3 = pNew;2818 pVM->pgm.s.pRamRangesR0 = MMHyperCCToR0(pVM, pNew);2819 pVM->pgm.s.pRamRangesRC = MMHyperCCToRC(pVM, pNew);2820 }2821 pgmUnlock(pVM);2822 }2823 return rc;2824 }2825 2826 2827 /**2828 * Register a chunk of a the physical memory range with PGM. MM is responsible2829 * for the toplevel things - allocation and locking - while PGM is taking2830 * care of all the details and implements the physical address space virtualization.2831 *2832 *2833 * @returns VBox status.2834 * @param pVM The VM handle.2835 * @param pvRam HC virtual address of the RAM range. (page aligned)2836 * @param GCPhys GC physical address of the RAM range. (page aligned)2837 * @param cb Size of the RAM range. (page aligned)2838 * @param fFlags Flags, MM_RAM_*.2839 * @param paPages Pointer an array of physical page descriptors.2840 * @param pszDesc Description string.2841 */2842 VMMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc)2843 {2844 NOREF(pszDesc);2845 2846 /*2847 * Validate input.2848 * (Not so important because callers are only MMR3PhysRegister()2849 * and PGMR3HandlerPhysicalRegisterEx(), but anyway...)2850 */2851 Log(("PGMR3PhysRegisterChunk %08X %x bytes flags %x %s\n", GCPhys, cb, fFlags, pszDesc));2852 2853 Assert(paPages);2854 Assert(pvRam);2855 Assert(!(fFlags & ~0xfff));2856 Assert(RT_ALIGN_Z(cb, PAGE_SIZE) == cb && cb);2857 Assert(RT_ALIGN_P(pvRam, PAGE_SIZE) == pvRam);2858 Assert(!(fFlags & ~(MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2 | MM_RAM_FLAGS_DYNAMIC_ALLOC)));2859 Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);2860 Assert(VM_IS_EMT(pVM));2861 Assert(!(GCPhys & PGM_DYNAMIC_CHUNK_OFFSET_MASK));2862 Assert(cb == PGM_DYNAMIC_CHUNK_SIZE);2863 2864 RTGCPHYS GCPhysLast = GCPhys + (cb - 1);2865 if (GCPhysLast < GCPhys)2866 {2867 AssertMsgFailed(("The range wraps! GCPhys=%RGp cb=%#x\n", GCPhys, cb));2868 return VERR_INVALID_PARAMETER;2869 }2870 2871 /*2872 * Find existing range location.2873 */2874 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);2875 while (pRam)2876 {2877 RTGCPHYS off = GCPhys - pRam->GCPhys;2878 if ( off < pRam->cb2879 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC))2880 break;2881 2882 pRam = pRam->CTX_SUFF(pNext);2883 }2884 AssertReturn(pRam, VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS);2885 2886 unsigned off = (GCPhys - pRam->GCPhys) >> PAGE_SHIFT;2887 unsigned iPage = (unsigned)(cb >> PAGE_SHIFT);2888 if (paPages)2889 {2890 while (iPage-- > 0)2891 pRam->aPages[off + iPage].HCPhys = (paPages[iPage].Phys & X86_PTE_PAE_PG_MASK) | fFlags; /** @todo PAGE FLAGS */2892 }2893 off >>= (PGM_DYNAMIC_CHUNK_SHIFT - PAGE_SHIFT);2894 pRam->paChunkR3Ptrs[off] = (uintptr_t)pvRam;2895 2896 /* Notify the recompiler. */2897 REMR3NotifyPhysRamChunkRegister(pVM, GCPhys, PGM_DYNAMIC_CHUNK_SIZE, (RTHCUINTPTR)pvRam, fFlags);2898 2899 return VINF_SUCCESS;2900 }2901 2902 2903 /**2904 * Allocate missing physical pages for an existing guest RAM range.2905 *2906 * @returns VBox status.2907 * @param pVM The VM handle.2908 * @param GCPhys GC physical address of the RAM range. (page aligned)2909 */2910 VMMR3DECL(int) PGM3PhysGrowRange(PVM pVM, PCRTGCPHYS pGCPhys)2911 {2912 RTGCPHYS GCPhys = *pGCPhys;2913 2914 /*2915 * Walk range list.2916 */2917 pgmLock(pVM);2918 2919 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);2920 while (pRam)2921 {2922 RTGCPHYS off = GCPhys - pRam->GCPhys;2923 if ( off < pRam->cb2924 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC))2925 {2926 bool fRangeExists = false;2927 unsigned off = (GCPhys - pRam->GCPhys) >> PGM_DYNAMIC_CHUNK_SHIFT;2928 2929 /* Note: A request made from another thread may end up in EMT after somebody else has already allocated the range. */2930 if (pRam->paChunkR3Ptrs[off])2931 fRangeExists = true;2932 2933 pgmUnlock(pVM);2934 if (fRangeExists)2935 return VINF_SUCCESS;2936 return pgmr3PhysGrowRange(pVM, GCPhys);2937 }2938 2939 pRam = pRam->CTX_SUFF(pNext);2940 }2941 pgmUnlock(pVM);2942 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;2943 }2944 2945 2946 /**2947 * Allocate missing physical pages for an existing guest RAM range.2948 *2949 * @returns VBox status.2950 * @param pVM The VM handle.2951 * @param pRamRange RAM range2952 * @param GCPhys GC physical address of the RAM range. (page aligned)2953 */2954 int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys)2955 {2956 void *pvRam;2957 int rc;2958 2959 /* We must execute this function in the EMT thread, otherwise we'll run into problems. */2960 if (!VM_IS_EMT(pVM))2961 {2962 PVMREQ pReq;2963 const RTGCPHYS GCPhysParam = GCPhys;2964 2965 AssertMsg(!PDMCritSectIsOwner(&pVM->pgm.s.CritSect), ("We own the PGM lock -> deadlock danger!!\n"));2966 2967 rc = VMR3ReqCall(pVM, VMREQDEST_ANY, &pReq, RT_INDEFINITE_WAIT, (PFNRT)PGM3PhysGrowRange, 2, pVM, &GCPhysParam);2968 if (RT_SUCCESS(rc))2969 {2970 rc = pReq->iStatus;2971 VMR3ReqFree(pReq);2972 }2973 return rc;2974 }2975 2976 /* Round down to chunk boundary */2977 GCPhys = GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK;2978 2979 STAM_COUNTER_INC(&pVM->pgm.s.StatR3DynRamGrow);2980 STAM_COUNTER_ADD(&pVM->pgm.s.StatR3DynRamTotal, PGM_DYNAMIC_CHUNK_SIZE/(1024*1024));2981 2982 Log(("pgmr3PhysGrowRange: allocate chunk of size 0x%X at %RGp\n", PGM_DYNAMIC_CHUNK_SIZE, GCPhys));2983 2984 unsigned cPages = PGM_DYNAMIC_CHUNK_SIZE >> PAGE_SHIFT;2985 2986 for (;;)2987 {2988 rc = SUPPageAlloc(cPages, &pvRam);2989 if (RT_SUCCESS(rc))2990 {2991 rc = MMR3PhysRegisterEx(pVM, pvRam, GCPhys, PGM_DYNAMIC_CHUNK_SIZE, 0, MM_PHYS_TYPE_DYNALLOC_CHUNK, "Main Memory");2992 if (RT_SUCCESS(rc))2993 return rc;2994 2995 SUPPageFree(pvRam, cPages);2996 }2997 2998 VMSTATE enmVMState = VMR3GetState(pVM);2999 if (enmVMState != VMSTATE_RUNNING)3000 {3001 AssertMsgFailed(("Out of memory while trying to allocate a guest RAM chunk at %RGp!\n", GCPhys));3002 LogRel(("PGM: Out of memory while trying to allocate a guest RAM chunk at %RGp (VMstate=%s)!\n", GCPhys, VMR3GetStateName(enmVMState)));3003 return rc;3004 }3005 3006 LogRel(("pgmr3PhysGrowRange: out of memory. pause until the user resumes execution.\n"));3007 3008 /* Pause first, then inform Main. */3009 rc = VMR3SuspendNoSave(pVM);3010 AssertRC(rc);3011 3012 VMSetRuntimeError(pVM, 0/*fFlags*/, "HostMemoryLow", "Unable to allocate and lock memory. The virtual machine will be paused. Please close applications to free up memory or close the VM");3013 3014 /* Wait for resume event; will only return in that case. If the VM is stopped, the EMT thread will be destroyed. */3015 rc = VMR3WaitForResume(pVM);3016 3017 /* Retry */3018 LogRel(("pgmr3PhysGrowRange: VM execution resumed -> retry.\n"));3019 }3020 }3021 3022 3023 /**3024 * Interface MMR3RomRegister() and MMR3PhysReserve calls to update the3025 * flags of existing RAM ranges.3026 *3027 * @returns VBox status.3028 * @param pVM The VM handle.3029 * @param GCPhys GC physical address of the RAM range. (page aligned)3030 * @param cb Size of the RAM range. (page aligned)3031 * @param fFlags The Or flags, MM_RAM_* \#defines.3032 * @param fMask The and mask for the flags.3033 */3034 VMMR3DECL(int) PGMR3PhysSetFlags(PVM pVM, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, unsigned fMask)3035 {3036 Log(("PGMR3PhysSetFlags %08X %x %x %x\n", GCPhys, cb, fFlags, fMask));3037 3038 /*3039 * Validate input.3040 * (Not so important because caller is always MMR3RomRegister() and MMR3PhysReserve(), but anyway...)3041 */3042 Assert(!(fFlags & ~(MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)));3043 Assert(RT_ALIGN_Z(cb, PAGE_SIZE) == cb && cb);3044 Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);3045 RTGCPHYS GCPhysLast = GCPhys + (cb - 1);3046 AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);3047 3048 /*3049 * Lookup the range.3050 */3051 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);3052 while (pRam && GCPhys > pRam->GCPhysLast)3053 pRam = pRam->CTX_SUFF(pNext);3054 if ( !pRam3055 || GCPhys > pRam->GCPhysLast3056 || GCPhysLast < pRam->GCPhys)3057 {3058 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));3059 return VERR_INVALID_PARAMETER;3060 }3061 3062 /*3063 * Update the requested flags.3064 */3065 RTHCPHYS fFullMask = ~(RTHCPHYS)(MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)3066 | fMask;3067 unsigned iPageEnd = (GCPhysLast - pRam->GCPhys + 1) >> PAGE_SHIFT;3068 unsigned iPage = (GCPhys - pRam->GCPhys) >> PAGE_SHIFT;3069 for ( ; iPage < iPageEnd; iPage++)3070 pRam->aPages[iPage].HCPhys = (pRam->aPages[iPage].HCPhys & fFullMask) | fFlags; /** @todo PAGE FLAGS */3071 3072 return VINF_SUCCESS;3073 }3074 3075 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3076 2601 3077 2602 /** … … 3607 3132 if (RT_SUCCESS(rc)) 3608 3133 { 3609 #ifdef VBOX_WITH_NEW_PHYS_CODE3610 3134 if (!PGM_PAGE_HAS_ANY_HANDLERS(pPage)) 3611 3135 rc = VINF_SUCCESS; … … 3664 3188 3665 3189 /* else: handler catching all access, no pointer returned. */ 3666 3667 #else3668 if (0)3669 /* nothing */;3670 else if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))3671 {3672 if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)) /* catches MMIO */3673 rc = VERR_PGM_PHYS_TLB_CATCH_ALL;3674 else if (fWritable && PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))3675 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE;3676 else3677 {3678 /* Temporariliy disabled phycial handler(s), since the recompiler3679 doesn't get notified when it's reset we'll have to pretend its3680 operating normally. */3681 if (pgmHandlerPhysicalIsAll(pVM, GCPhys))3682 rc = VERR_PGM_PHYS_TLB_CATCH_ALL;3683 else3684 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE;3685 }3686 }3687 else3688 rc = VINF_SUCCESS;3689 if (RT_SUCCESS(rc))3690 {3691 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)3692 {3693 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage)));3694 RTGCPHYS off = GCPhys - pRam->GCPhys;3695 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);3696 *ppv = (void *)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));3697 }3698 else if (RT_LIKELY(pRam->pvR3))3699 {3700 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage)));3701 RTGCPHYS off = GCPhys - pRam->GCPhys;3702 *ppv = (uint8_t *)pRam->pvR3 + off;3703 }3704 else3705 rc = VERR_PGM_PHYS_TLB_UNASSIGNED;3706 }3707 #endif /* !VBOX_WITH_NEW_PHYS_CODE */3708 3190 } 3709 3191 else -
trunk/src/VBox/VMM/VMM.cpp
r18645 r18665 361 361 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLHOST_PGM_MAP_CHUNK calls."); 362 362 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES calls."); 363 #ifndef VBOX_WITH_NEW_PHYS_CODE364 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMGrowRAM, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMGrowRAM", STAMUNIT_OCCURENCES, "Number of VMMCALLHOST_PGM_RAM_GROW_RANGE calls.");365 #endif366 363 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLHOST_REM_REPLAY_HANDLER_NOTIFICATIONS calls."); 367 364 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLHOST_VMM_LOGGER_FLUSH calls."); … … 1408 1405 break; 1409 1406 } 1410 #ifndef VBOX_WITH_NEW_PHYS_CODE1411 1412 case VMMCALLHOST_PGM_RAM_GROW_RANGE:1413 {1414 const RTGCPHYS GCPhys = pVM->vmm.s.u64CallHostArg;1415 pVM->vmm.s.rcCallHost = PGM3PhysGrowRange(pVM, &GCPhys);1416 break;1417 }1418 #endif1419 1407 1420 1408 /* -
trunk/src/VBox/VMM/VMMInternal.h
r17546 r18665 333 333 STAMCOUNTER StatRZRetEmulHlt; 334 334 STAMCOUNTER StatRZRetPendingRequest; 335 #ifndef VBOX_WITH_NEW_PHYS_CODE336 STAMCOUNTER StatRZCallPGMGrowRAM;337 #endif338 335 STAMCOUNTER StatRZCallPDMLock; 339 336 STAMCOUNTER StatRZCallLogFlush; -
trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp
r18617 r18665 467 467 GEN_CHECK_OFF(PGM, pRomRangesR0); 468 468 GEN_CHECK_OFF(PGM, pRomRangesRC); 469 GEN_CHECK_OFF(PGM, cbRamSize);470 469 GEN_CHECK_OFF(PGM, pTreesR3); 471 470 GEN_CHECK_OFF(PGM, pTreesR0);
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