VirtualBox

Changeset 18927 in vbox for trunk/include/VBox


Ignore:
Timestamp:
Apr 16, 2009 11:41:38 AM (16 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
46003
Message:

Big step to separate VMM data structures for guest SMP. (pgm, em)

Location:
trunk/include/VBox
Files:
15 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/cpum.h

    r17035 r18927  
    620620/** @name Guest Register Getters.
    621621 * @{ */
    622 VMMDECL(void)       CPUMGetGuestGDTR(PVM pVM, PVBOXGDTR pGDTR);
    623 VMMDECL(RTGCPTR)    CPUMGetGuestIDTR(PVM pVM, uint16_t *pcbLimit);
    624 VMMDECL(RTSEL)      CPUMGetGuestTR(PVM pVM, PCPUMSELREGHID pHidden);
    625 VMMDECL(RTSEL)      CPUMGetGuestLDTR(PVM pVM);
    626 VMMDECL(uint64_t)   CPUMGetGuestCR0(PVM pVM);
    627 VMMDECL(uint64_t)   CPUMGetGuestCR2(PVM pVM);
    628 VMMDECL(uint64_t)   CPUMGetGuestCR3(PVM pVM);
    629 VMMDECL(uint64_t)   CPUMGetGuestCR4(PVM pVM);
    630 VMMDECL(int)        CPUMGetGuestCRx(PVM pVM, unsigned iReg, uint64_t *pValue);
    631 VMMDECL(uint32_t)   CPUMGetGuestEFlags(PVM pVM);
    632 VMMDECL(uint32_t)   CPUMGetGuestEIP(PVM pVM);
    633 VMMDECL(uint64_t)   CPUMGetGuestRIP(PVM pVM);
    634 VMMDECL(uint32_t)   CPUMGetGuestEAX(PVM pVM);
    635 VMMDECL(uint32_t)   CPUMGetGuestEBX(PVM pVM);
    636 VMMDECL(uint32_t)   CPUMGetGuestECX(PVM pVM);
    637 VMMDECL(uint32_t)   CPUMGetGuestEDX(PVM pVM);
    638 VMMDECL(uint32_t)   CPUMGetGuestESI(PVM pVM);
    639 VMMDECL(uint32_t)   CPUMGetGuestEDI(PVM pVM);
    640 VMMDECL(uint32_t)   CPUMGetGuestESP(PVM pVM);
    641 VMMDECL(uint32_t)   CPUMGetGuestEBP(PVM pVM);
    642 VMMDECL(RTSEL)      CPUMGetGuestCS(PVM pVM);
    643 VMMDECL(RTSEL)      CPUMGetGuestDS(PVM pVM);
    644 VMMDECL(RTSEL)      CPUMGetGuestES(PVM pVM);
    645 VMMDECL(RTSEL)      CPUMGetGuestFS(PVM pVM);
    646 VMMDECL(RTSEL)      CPUMGetGuestGS(PVM pVM);
    647 VMMDECL(RTSEL)      CPUMGetGuestSS(PVM pVM);
    648 VMMDECL(uint64_t)   CPUMGetGuestDR0(PVM pVM);
    649 VMMDECL(uint64_t)   CPUMGetGuestDR1(PVM pVM);
    650 VMMDECL(uint64_t)   CPUMGetGuestDR2(PVM pVM);
    651 VMMDECL(uint64_t)   CPUMGetGuestDR3(PVM pVM);
    652 VMMDECL(uint64_t)   CPUMGetGuestDR6(PVM pVM);
    653 VMMDECL(uint64_t)   CPUMGetGuestDR7(PVM pVM);
    654 VMMDECL(int)        CPUMGetGuestDRx(PVM pVM, uint32_t iReg, uint64_t *pValue);
     622VMMDECL(void)       CPUMGetGuestGDTR(PVMCPU pVCpu, PVBOXGDTR pGDTR);
     623VMMDECL(RTGCPTR)    CPUMGetGuestIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
     624VMMDECL(RTSEL)      CPUMGetGuestTR(PVMCPU pVCpu, PCPUMSELREGHID pHidden);
     625VMMDECL(RTSEL)      CPUMGetGuestLDTR(PVMCPU pVCpu);
     626VMMDECL(uint64_t)   CPUMGetGuestCR0(PVMCPU pVCpu);
     627VMMDECL(uint64_t)   CPUMGetGuestCR2(PVMCPU pVCpu);
     628VMMDECL(uint64_t)   CPUMGetGuestCR3(PVMCPU pVCpu);
     629VMMDECL(uint64_t)   CPUMGetGuestCR4(PVMCPU pVCpu);
     630VMMDECL(int)        CPUMGetGuestCRx(PVMCPU pVCpu, unsigned iReg, uint64_t *pValue);
     631VMMDECL(uint32_t)   CPUMGetGuestEFlags(PVMCPU pVCpu);
     632VMMDECL(uint32_t)   CPUMGetGuestEIP(PVMCPU pVCpu);
     633VMMDECL(uint64_t)   CPUMGetGuestRIP(PVMCPU pVCpu);
     634VMMDECL(uint32_t)   CPUMGetGuestEAX(PVMCPU pVCpu);
     635VMMDECL(uint32_t)   CPUMGetGuestEBX(PVMCPU pVCpu);
     636VMMDECL(uint32_t)   CPUMGetGuestECX(PVMCPU pVCpu);
     637VMMDECL(uint32_t)   CPUMGetGuestEDX(PVMCPU pVCpu);
     638VMMDECL(uint32_t)   CPUMGetGuestESI(PVMCPU pVCpu);
     639VMMDECL(uint32_t)   CPUMGetGuestEDI(PVMCPU pVCpu);
     640VMMDECL(uint32_t)   CPUMGetGuestESP(PVMCPU pVCpu);
     641VMMDECL(uint32_t)   CPUMGetGuestEBP(PVMCPU pVCpu);
     642VMMDECL(RTSEL)      CPUMGetGuestCS(PVMCPU pVCpu);
     643VMMDECL(RTSEL)      CPUMGetGuestDS(PVMCPU pVCpu);
     644VMMDECL(RTSEL)      CPUMGetGuestES(PVMCPU pVCpu);
     645VMMDECL(RTSEL)      CPUMGetGuestFS(PVMCPU pVCpu);
     646VMMDECL(RTSEL)      CPUMGetGuestGS(PVMCPU pVCpu);
     647VMMDECL(RTSEL)      CPUMGetGuestSS(PVMCPU pVCpu);
     648VMMDECL(uint64_t)   CPUMGetGuestDR0(PVMCPU pVCpu);
     649VMMDECL(uint64_t)   CPUMGetGuestDR1(PVMCPU pVCpu);
     650VMMDECL(uint64_t)   CPUMGetGuestDR2(PVMCPU pVCpu);
     651VMMDECL(uint64_t)   CPUMGetGuestDR3(PVMCPU pVCpu);
     652VMMDECL(uint64_t)   CPUMGetGuestDR6(PVMCPU pVCpu);
     653VMMDECL(uint64_t)   CPUMGetGuestDR7(PVMCPU pVCpu);
     654VMMDECL(int)        CPUMGetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t *pValue);
    655655VMMDECL(void)       CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
    656656VMMDECL(RCPTRTYPE(PCCPUMCPUID)) CPUMGetGuestCpuIdStdRCPtr(PVM pVM);
    … …  
    661661VMMDECL(uint32_t)   CPUMGetGuestCpuIdExtMax(PVM pVM);
    662662VMMDECL(uint32_t)   CPUMGetGuestCpuIdCentaurMax(PVM pVM);
    663 VMMDECL(uint64_t)   CPUMGetGuestEFER(PVM pVM);
    664 VMMDECL(uint64_t)   CPUMGetGuestMsr(PVM pVM, unsigned idMsr);
    665 VMMDECL(void)       CPUMSetGuestMsr(PVM pVM, unsigned idMsr, uint64_t valMsr);
     663VMMDECL(uint64_t)   CPUMGetGuestEFER(PVMCPU pVCpu);
     664VMMDECL(uint64_t)   CPUMGetGuestMsr(PVMCPU pVCpu, unsigned idMsr);
     665VMMDECL(void)       CPUMSetGuestMsr(PVMCPU pVCpu, unsigned idMsr, uint64_t valMsr);
    666666/** @} */
    667667
    668668/** @name Guest Register Setters.
    669669 * @{ */
    670 VMMDECL(int)        CPUMSetGuestGDTR(PVM pVM, uint32_t addr, uint16_t limit);
    671 VMMDECL(int)        CPUMSetGuestIDTR(PVM pVM, uint32_t addr, uint16_t limit);
    672 VMMDECL(int)        CPUMSetGuestTR(PVM pVM, uint16_t tr);
    673 VMMDECL(int)        CPUMSetGuestLDTR(PVM pVM, uint16_t ldtr);
    674 VMMDECL(int)        CPUMSetGuestCR0(PVM pVM, uint64_t cr0);
    675 VMMDECL(int)        CPUMSetGuestCR2(PVM pVM, uint64_t cr2);
    676 VMMDECL(int)        CPUMSetGuestCR3(PVM pVM, uint64_t cr3);
    677 VMMDECL(int)        CPUMSetGuestCR4(PVM pVM, uint64_t cr4);
    678 VMMDECL(int)        CPUMSetGuestDR0(PVM pVM, uint64_t uDr0);
    679 VMMDECL(int)        CPUMSetGuestDR1(PVM pVM, uint64_t uDr1);
    680 VMMDECL(int)        CPUMSetGuestDR2(PVM pVM, uint64_t uDr2);
    681 VMMDECL(int)        CPUMSetGuestDR3(PVM pVM, uint64_t uDr3);
    682 VMMDECL(int)        CPUMSetGuestDR6(PVM pVM, uint64_t uDr6);
    683 VMMDECL(int)        CPUMSetGuestDR7(PVM pVM, uint64_t uDr7);
    684 VMMDECL(int)        CPUMSetGuestDRx(PVM pVM, uint32_t iReg, uint64_t Value);
    685 VMMDECL(int)        CPUMSetGuestEFlags(PVM pVM, uint32_t eflags);
    686 VMMDECL(int)        CPUMSetGuestEIP(PVM pVM, uint32_t eip);
    687 VMMDECL(int)        CPUMSetGuestEAX(PVM pVM, uint32_t eax);
    688 VMMDECL(int)        CPUMSetGuestEBX(PVM pVM, uint32_t ebx);
    689 VMMDECL(int)        CPUMSetGuestECX(PVM pVM, uint32_t ecx);
    690 VMMDECL(int)        CPUMSetGuestEDX(PVM pVM, uint32_t edx);
    691 VMMDECL(int)        CPUMSetGuestESI(PVM pVM, uint32_t esi);
    692 VMMDECL(int)        CPUMSetGuestEDI(PVM pVM, uint32_t edi);
    693 VMMDECL(int)        CPUMSetGuestESP(PVM pVM, uint32_t esp);
    694 VMMDECL(int)        CPUMSetGuestEBP(PVM pVM, uint32_t ebp);
    695 VMMDECL(int)        CPUMSetGuestCS(PVM pVM, uint16_t cs);
    696 VMMDECL(int)        CPUMSetGuestDS(PVM pVM, uint16_t ds);
    697 VMMDECL(int)        CPUMSetGuestES(PVM pVM, uint16_t es);
    698 VMMDECL(int)        CPUMSetGuestFS(PVM pVM, uint16_t fs);
    699 VMMDECL(int)        CPUMSetGuestGS(PVM pVM, uint16_t gs);
    700 VMMDECL(int)        CPUMSetGuestSS(PVM pVM, uint16_t ss);
    701 VMMDECL(void)       CPUMSetGuestEFER(PVM pVM, uint64_t val);
     670VMMDECL(int)        CPUMSetGuestGDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
     671VMMDECL(int)        CPUMSetGuestIDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
     672VMMDECL(int)        CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr);
     673VMMDECL(int)        CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr);
     674VMMDECL(int)        CPUMSetGuestCR0(PVMCPU pVCpu, uint64_t cr0);
     675VMMDECL(int)        CPUMSetGuestCR2(PVMCPU pVCpu, uint64_t cr2);
     676VMMDECL(int)        CPUMSetGuestCR3(PVMCPU pVCpu, uint64_t cr3);
     677VMMDECL(int)        CPUMSetGuestCR4(PVMCPU pVCpu, uint64_t cr4);
     678VMMDECL(int)        CPUMSetGuestDR0(PVMCPU pVCpu, uint64_t uDr0);
     679VMMDECL(int)        CPUMSetGuestDR1(PVMCPU pVCpu, uint64_t uDr1);
     680VMMDECL(int)        CPUMSetGuestDR2(PVMCPU pVCpu, uint64_t uDr2);
     681VMMDECL(int)        CPUMSetGuestDR3(PVMCPU pVCpu, uint64_t uDr3);
     682VMMDECL(int)        CPUMSetGuestDR6(PVMCPU pVCpu, uint64_t uDr6);
     683VMMDECL(int)        CPUMSetGuestDR7(PVMCPU pVCpu, uint64_t uDr7);
     684VMMDECL(int)        CPUMSetGuestDRx(PVMCPU pVCpu, uint32_t iReg, uint64_t Value);
     685VMMDECL(int)        CPUMSetGuestEFlags(PVMCPU pVCpu, uint32_t eflags);
     686VMMDECL(int)        CPUMSetGuestEIP(PVMCPU pVCpu, uint32_t eip);
     687VMMDECL(int)        CPUMSetGuestEAX(PVMCPU pVCpu, uint32_t eax);
     688VMMDECL(int)        CPUMSetGuestEBX(PVMCPU pVCpu, uint32_t ebx);
     689VMMDECL(int)        CPUMSetGuestECX(PVMCPU pVCpu, uint32_t ecx);
     690VMMDECL(int)        CPUMSetGuestEDX(PVMCPU pVCpu, uint32_t edx);
     691VMMDECL(int)        CPUMSetGuestESI(PVMCPU pVCpu, uint32_t esi);
     692VMMDECL(int)        CPUMSetGuestEDI(PVMCPU pVCpu, uint32_t edi);
     693VMMDECL(int)        CPUMSetGuestESP(PVMCPU pVCpu, uint32_t esp);
     694VMMDECL(int)        CPUMSetGuestEBP(PVMCPU pVCpu, uint32_t ebp);
     695VMMDECL(int)        CPUMSetGuestCS(PVMCPU pVCpu, uint16_t cs);
     696VMMDECL(int)        CPUMSetGuestDS(PVMCPU pVCpu, uint16_t ds);
     697VMMDECL(int)        CPUMSetGuestES(PVMCPU pVCpu, uint16_t es);
     698VMMDECL(int)        CPUMSetGuestFS(PVMCPU pVCpu, uint16_t fs);
     699VMMDECL(int)        CPUMSetGuestGS(PVMCPU pVCpu, uint16_t gs);
     700VMMDECL(int)        CPUMSetGuestSS(PVMCPU pVCpu, uint16_t ss);
     701VMMDECL(void)       CPUMSetGuestEFER(PVMCPU pVCpu, uint64_t val);
    702702VMMDECL(void)       CPUMSetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
    703703VMMDECL(void)       CPUMClearGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
    704704VMMDECL(bool)       CPUMGetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature);
    705 VMMDECL(void)       CPUMSetGuestCtx(PVM pVM, const PCPUMCTX pCtx);
     705VMMDECL(void)       CPUMSetGuestCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
    706706/** @} */
    707707
    … …  
    710710
    711711
    712 VMMDECL(bool)       CPUMIsGuestIn16BitCode(PVM pVM);
    713 VMMDECL(bool)       CPUMIsGuestIn32BitCode(PVM pVM);
     712VMMDECL(bool)       CPUMIsGuestIn16BitCode(PVMCPU pVCpu);
     713VMMDECL(bool)       CPUMIsGuestIn32BitCode(PVMCPU pVCpu);
    714714VMMDECL(CPUMCPUVENDOR) CPUMGetCPUVendor(PVM pVM);
    715715
    … …  
    720720 * @param   pVM     The VM handle.
    721721 */
    722 DECLINLINE(bool) CPUMIsGuestInRealMode(PVM pVM)
    723 {
    724     return !(CPUMGetGuestCR0(pVM) & X86_CR0_PE);
     722DECLINLINE(bool) CPUMIsGuestInRealMode(PVMCPU pVCpu)
     723{
     724    return !(CPUMGetGuestCR0(pVCpu) & X86_CR0_PE);
    725725}
    726726
    … …  
    742742 * @param   pVM     The VM handle.
    743743 */
    744 DECLINLINE(bool) CPUMIsGuestInProtectedMode(PVM pVM)
    745 {
    746     return !!(CPUMGetGuestCR0(pVM) & X86_CR0_PE);
     744DECLINLINE(bool) CPUMIsGuestInProtectedMode(PVMCPU pVCpu)
     745{
     746    return !!(CPUMGetGuestCR0(pVCpu) & X86_CR0_PE);
    747747}
    748748
    … …  
    753753 * @param   pVM     The VM handle.
    754754 */
    755 DECLINLINE(bool) CPUMIsGuestInPagedProtectedMode(PVM pVM)
    756 {
    757     return (CPUMGetGuestCR0(pVM) & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
     755DECLINLINE(bool) CPUMIsGuestInPagedProtectedMode(PVMCPU pVCpu)
     756{
     757    return (CPUMGetGuestCR0(pVCpu) & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG);
    758758}
    759759
    … …  
    775775 * @param   pVM     The VM handle.
    776776 */
    777 DECLINLINE(bool) CPUMIsGuestInLongMode(PVM pVM)
    778 {
    779     return (CPUMGetGuestEFER(pVM) & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
     777DECLINLINE(bool) CPUMIsGuestInLongMode(PVMCPU pVCpu)
     778{
     779    return (CPUMGetGuestEFER(pVCpu) & MSR_K6_EFER_LMA) == MSR_K6_EFER_LMA;
    780780}
    781781
    … …  
    798798 * @param   pCtx    Current CPU context
    799799 */
    800 DECLINLINE(bool) CPUMIsGuestIn64BitCode(PVM pVM, PCCPUMCTXCORE pCtx)
    801 {
    802     if (!CPUMIsGuestInLongMode(pVM))
     800DECLINLINE(bool) CPUMIsGuestIn64BitCode(PVMCPU pVCpu, PCCPUMCTXCORE pCtx)
     801{
     802    if (!CPUMIsGuestInLongMode(pVCpu))
    803803        return false;
    804804
    … …  
    827827 * @param   pVM     The VM handle.
    828828 */
    829 DECLINLINE(bool) CPUMIsGuestInPAEMode(PVM pVM)
    830 {
    831     return (    CPUMIsGuestInPagedProtectedMode(pVM)
    832             &&  (CPUMGetGuestCR4(pVM) & X86_CR4_PAE)
    833             &&  !CPUMIsGuestInLongMode(pVM));
     829DECLINLINE(bool) CPUMIsGuestInPAEMode(PVMCPU pVCpu)
     830{
     831    return (    CPUMIsGuestInPagedProtectedMode(pVCpu)
     832            &&  (CPUMGetGuestCR4(pVCpu) & X86_CR4_PAE)
     833            &&  !CPUMIsGuestInLongMode(pVCpu));
    834834}
    835835
    … …  
    852852/** @name Hypervisor Register Getters.
    853853 * @{ */
    854 VMMDECL(RTSEL)          CPUMGetHyperCS(PVM pVM);
    855 VMMDECL(RTSEL)          CPUMGetHyperDS(PVM pVM);
    856 VMMDECL(RTSEL)          CPUMGetHyperES(PVM pVM);
    857 VMMDECL(RTSEL)          CPUMGetHyperFS(PVM pVM);
    858 VMMDECL(RTSEL)          CPUMGetHyperGS(PVM pVM);
    859 VMMDECL(RTSEL)          CPUMGetHyperSS(PVM pVM);
     854VMMDECL(RTSEL)          CPUMGetHyperCS(PVMCPU pVCpu);
     855VMMDECL(RTSEL)          CPUMGetHyperDS(PVMCPU pVCpu);
     856VMMDECL(RTSEL)          CPUMGetHyperES(PVMCPU pVCpu);
     857VMMDECL(RTSEL)          CPUMGetHyperFS(PVMCPU pVCpu);
     858VMMDECL(RTSEL)          CPUMGetHyperGS(PVMCPU pVCpu);
     859VMMDECL(RTSEL)          CPUMGetHyperSS(PVMCPU pVCpu);
    860860#if 0 /* these are not correct. */
    861 VMMDECL(uint32_t)       CPUMGetHyperCR0(PVM pVM);
    862 VMMDECL(uint32_t)       CPUMGetHyperCR2(PVM pVM);
    863 VMMDECL(uint32_t)       CPUMGetHyperCR3(PVM pVM);
    864 VMMDECL(uint32_t)       CPUMGetHyperCR4(PVM pVM);
     861VMMDECL(uint32_t)       CPUMGetHyperCR0(PVMCPU pVCpu);
     862VMMDECL(uint32_t)       CPUMGetHyperCR2(PVMCPU pVCpu);
     863VMMDECL(uint32_t)       CPUMGetHyperCR3(PVMCPU pVCpu);
     864VMMDECL(uint32_t)       CPUMGetHyperCR4(PVMCPU pVCpu);
    865865#endif
    866866/** This register is only saved on fatal traps. */
    867 VMMDECL(uint32_t)       CPUMGetHyperEAX(PVM pVM);
    868 VMMDECL(uint32_t)       CPUMGetHyperEBX(PVM pVM);
     867VMMDECL(uint32_t)       CPUMGetHyperEAX(PVMCPU pVCpu);
     868VMMDECL(uint32_t)       CPUMGetHyperEBX(PVMCPU pVCpu);
    869869/** This register is only saved on fatal traps. */
    870 VMMDECL(uint32_t)       CPUMGetHyperECX(PVM pVM);
     870VMMDECL(uint32_t)       CPUMGetHyperECX(PVMCPU pVCpu);
    871871/** This register is only saved on fatal traps. */
    872 VMMDECL(uint32_t)       CPUMGetHyperEDX(PVM pVM);
    873 VMMDECL(uint32_t)       CPUMGetHyperESI(PVM pVM);
    874 VMMDECL(uint32_t)       CPUMGetHyperEDI(PVM pVM);
    875 VMMDECL(uint32_t)       CPUMGetHyperEBP(PVM pVM);
    876 VMMDECL(uint32_t)       CPUMGetHyperESP(PVM pVM);
    877 VMMDECL(uint32_t)       CPUMGetHyperEFlags(PVM pVM);
    878 VMMDECL(uint32_t)       CPUMGetHyperEIP(PVM pVM);
    879 VMMDECL(uint64_t)       CPUMGetHyperRIP(PVM pVM);
    880 VMMDECL(uint32_t)       CPUMGetHyperIDTR(PVM pVM, uint16_t *pcbLimit);
    881 VMMDECL(uint32_t)       CPUMGetHyperGDTR(PVM pVM, uint16_t *pcbLimit);
    882 VMMDECL(RTSEL)          CPUMGetHyperLDTR(PVM pVM);
    883 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR0(PVM pVM);
    884 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR1(PVM pVM);
    885 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR2(PVM pVM);
    886 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR3(PVM pVM);
    887 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR6(PVM pVM);
    888 VMMDECL(RTGCUINTREG)    CPUMGetHyperDR7(PVM pVM);
    889 VMMDECL(void)           CPUMGetHyperCtx(PVM pVM, PCPUMCTX pCtx);
    890 VMMDECL(uint32_t)       CPUMGetHyperCR3(PVM pVM);
     872VMMDECL(uint32_t)       CPUMGetHyperEDX(PVMCPU pVCpu);
     873VMMDECL(uint32_t)       CPUMGetHyperESI(PVMCPU pVCpu);
     874VMMDECL(uint32_t)       CPUMGetHyperEDI(PVMCPU pVCpu);
     875VMMDECL(uint32_t)       CPUMGetHyperEBP(PVMCPU pVCpu);
     876VMMDECL(uint32_t)       CPUMGetHyperESP(PVMCPU pVCpu);
     877VMMDECL(uint32_t)       CPUMGetHyperEFlags(PVMCPU pVCpu);
     878VMMDECL(uint32_t)       CPUMGetHyperEIP(PVMCPU pVCpu);
     879VMMDECL(uint64_t)       CPUMGetHyperRIP(PVMCPU pVCpu);
     880VMMDECL(uint32_t)       CPUMGetHyperIDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
     881VMMDECL(uint32_t)       CPUMGetHyperGDTR(PVMCPU pVCpu, uint16_t *pcbLimit);
     882VMMDECL(RTSEL)          CPUMGetHyperLDTR(PVMCPU pVCpu);
     883VMMDECL(RTGCUINTREG)    CPUMGetHyperDR0(PVMCPU pVCpu);
     884VMMDECL(RTGCUINTREG)    CPUMGetHyperDR1(PVMCPU pVCpu);
     885VMMDECL(RTGCUINTREG)    CPUMGetHyperDR2(PVMCPU pVCpu);
     886VMMDECL(RTGCUINTREG)    CPUMGetHyperDR3(PVMCPU pVCpu);
     887VMMDECL(RTGCUINTREG)    CPUMGetHyperDR6(PVMCPU pVCpu);
     888VMMDECL(RTGCUINTREG)    CPUMGetHyperDR7(PVMCPU pVCpu);
     889VMMDECL(void)           CPUMGetHyperCtx(PVMCPU pVCpu, PCPUMCTX pCtx);
     890VMMDECL(uint32_t)       CPUMGetHyperCR3(PVMCPU pVCpu);
    891891/** @} */
    892892
    893893/** @name Hypervisor Register Setters.
    894894 * @{ */
    895 VMMDECL(void)           CPUMSetHyperGDTR(PVM pVM, uint32_t addr, uint16_t limit);
    896 VMMDECL(void)           CPUMSetHyperLDTR(PVM pVM, RTSEL SelLDTR);
    897 VMMDECL(void)           CPUMSetHyperIDTR(PVM pVM, uint32_t addr, uint16_t limit);
    898 VMMDECL(void)           CPUMSetHyperCR3(PVM pVM, uint32_t cr3);
    899 VMMDECL(void)           CPUMSetHyperTR(PVM pVM, RTSEL SelTR);
    900 VMMDECL(void)           CPUMSetHyperCS(PVM pVM, RTSEL SelCS);
    901 VMMDECL(void)           CPUMSetHyperDS(PVM pVM, RTSEL SelDS);
    902 VMMDECL(void)           CPUMSetHyperES(PVM pVM, RTSEL SelDS);
    903 VMMDECL(void)           CPUMSetHyperFS(PVM pVM, RTSEL SelDS);
    904 VMMDECL(void)           CPUMSetHyperGS(PVM pVM, RTSEL SelDS);
    905 VMMDECL(void)           CPUMSetHyperSS(PVM pVM, RTSEL SelSS);
    906 VMMDECL(void)           CPUMSetHyperESP(PVM pVM, uint32_t u32ESP);
    907 VMMDECL(int)            CPUMSetHyperEFlags(PVM pVM, uint32_t Efl);
    908 VMMDECL(void)           CPUMSetHyperEIP(PVM pVM, uint32_t u32EIP);
    909 VMMDECL(void)           CPUMSetHyperDR0(PVM pVM, RTGCUINTREG uDr0);
    910 VMMDECL(void)           CPUMSetHyperDR1(PVM pVM, RTGCUINTREG uDr1);
    911 VMMDECL(void)           CPUMSetHyperDR2(PVM pVM, RTGCUINTREG uDr2);
    912 VMMDECL(void)           CPUMSetHyperDR3(PVM pVM, RTGCUINTREG uDr3);
    913 VMMDECL(void)           CPUMSetHyperDR6(PVM pVM, RTGCUINTREG uDr6);
    914 VMMDECL(void)           CPUMSetHyperDR7(PVM pVM, RTGCUINTREG uDr7);
    915 VMMDECL(void)           CPUMSetHyperCtx(PVM pVM, const PCPUMCTX pCtx);
    916 VMMDECL(int)            CPUMRecalcHyperDRx(PVM pVM);
     895VMMDECL(void)           CPUMSetHyperGDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
     896VMMDECL(void)           CPUMSetHyperLDTR(PVMCPU pVCpu, RTSEL SelLDTR);
     897VMMDECL(void)           CPUMSetHyperIDTR(PVMCPU pVCpu, uint32_t addr, uint16_t limit);
     898VMMDECL(void)           CPUMSetHyperCR3(PVMCPU pVCpu, uint32_t cr3);
     899VMMDECL(void)           CPUMSetHyperTR(PVMCPU pVCpu, RTSEL SelTR);
     900VMMDECL(void)           CPUMSetHyperCS(PVMCPU pVCpu, RTSEL SelCS);
     901VMMDECL(void)           CPUMSetHyperDS(PVMCPU pVCpu, RTSEL SelDS);
     902VMMDECL(void)           CPUMSetHyperES(PVMCPU pVCpu, RTSEL SelDS);
     903VMMDECL(void)           CPUMSetHyperFS(PVMCPU pVCpu, RTSEL SelDS);
     904VMMDECL(void)           CPUMSetHyperGS(PVMCPU pVCpu, RTSEL SelDS);
     905VMMDECL(void)           CPUMSetHyperSS(PVMCPU pVCpu, RTSEL SelSS);
     906VMMDECL(void)           CPUMSetHyperESP(PVMCPU pVCpu, uint32_t u32ESP);
     907VMMDECL(int)            CPUMSetHyperEFlags(PVMCPU pVCpu, uint32_t Efl);
     908VMMDECL(void)           CPUMSetHyperEIP(PVMCPU pVCpu, uint32_t u32EIP);
     909VMMDECL(void)           CPUMSetHyperDR0(PVMCPU pVCpu, RTGCUINTREG uDr0);
     910VMMDECL(void)           CPUMSetHyperDR1(PVMCPU pVCpu, RTGCUINTREG uDr1);
     911VMMDECL(void)           CPUMSetHyperDR2(PVMCPU pVCpu, RTGCUINTREG uDr2);
     912VMMDECL(void)           CPUMSetHyperDR3(PVMCPU pVCpu, RTGCUINTREG uDr3);
     913VMMDECL(void)           CPUMSetHyperDR6(PVMCPU pVCpu, RTGCUINTREG uDr6);
     914VMMDECL(void)           CPUMSetHyperDR7(PVMCPU pVCpu, RTGCUINTREG uDr7);
     915VMMDECL(void)           CPUMSetHyperCtx(PVMCPU pVCpu, const PCPUMCTX pCtx);
     916VMMDECL(int)            CPUMRecalcHyperDRx(PVMCPU pVCpu);
    917917/** @} */
    918918
    919 VMMDECL(void)           CPUMPushHyper(PVM pVM, uint32_t u32);
    920 VMMDECL(void)           CPUMHyperSetCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore);
    921 VMMDECL(PCPUMCTX)       CPUMQueryGuestCtxPtr(PVM pVM);
    922 VMMDECL(PCPUMCTX)       CPUMQueryGuestCtxPtrEx(PVM pVM, PVMCPU pVCpu);
    923 VMMDECL(int)            CPUMQueryHyperCtxPtr(PVM pVM, PCPUMCTX *ppCtx);
    924 VMMDECL(PCCPUMCTXCORE)  CPUMGetGuestCtxCore(PVM pVM);
    925 VMMDECL(PCCPUMCTXCORE)  CPUMGetGuestCtxCoreEx(PVM pVM, PVMCPU pVCpu);
    926 VMMDECL(PCCPUMCTXCORE)  CPUMGetHyperCtxCore(PVM pVM);
    927 VMMDECL(void)           CPUMSetGuestCtxCore(PVM pVM, PCCPUMCTXCORE pCtxCore);
    928 VMMDECL(int)            CPUMRawEnter(PVM pVM, PCPUMCTXCORE pCtxCore);
    929 VMMDECL(int)            CPUMRawLeave(PVM pVM, PCPUMCTXCORE pCtxCore, int rc);
    930 VMMDECL(uint32_t)       CPUMRawGetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore);
    931 VMMDECL(void)           CPUMRawSetEFlags(PVM pVM, PCPUMCTXCORE pCtxCore, uint32_t eflags);
    932 VMMDECL(int)            CPUMHandleLazyFPU(PVM pVM, PVMCPU pVCpu);
     919VMMDECL(void)           CPUMPushHyper(PVMCPU pVCpu, uint32_t u32);
     920VMMDECL(void)           CPUMHyperSetCtxCore(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
     921VMMDECL(int)            CPUMQueryHyperCtxPtr(PVMCPU pVCpu, PCPUMCTX *ppCtx);
     922VMMDECL(PCCPUMCTXCORE)  CPUMGetHyperCtxCore(PVMCPU pVCpu);
     923VMMDECL(PCPUMCTX)       CPUMQueryGuestCtxPtr(PVMCPU pVCpu);
     924VMMDECL(PCCPUMCTXCORE)  CPUMGetGuestCtxCore(PVMCPU pVCpu);
     925VMMDECL(void)           CPUMSetGuestCtxCore(PVMCPU pVCpu, PCCPUMCTXCORE pCtxCore);
     926VMMDECL(int)            CPUMRawEnter(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
     927VMMDECL(int)            CPUMRawLeave(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, int rc);
     928VMMDECL(uint32_t)       CPUMRawGetEFlags(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
     929VMMDECL(void)           CPUMRawSetEFlags(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t eflags);
     930VMMDECL(int)            CPUMHandleLazyFPU(PVMCPU pVCpu);
    933931
    934932/** @name Changed flags
    … …  
    953951/** @} */
    954952
    955 VMMDECL(unsigned)       CPUMGetAndClearChangedFlagsREM(PVM pVM);
    956 VMMDECL(void)           CPUMSetChangedFlags(PVM pVM, uint32_t fChangedFlags);
     953VMMDECL(unsigned)       CPUMGetAndClearChangedFlagsREM(PVMCPU pVCpu);
     954VMMDECL(void)           CPUMSetChangedFlags(PVMCPU pVCpu, uint32_t fChangedFlags);
    957955VMMDECL(bool)           CPUMSupportsFXSR(PVM pVM);
    958956VMMDECL(bool)           CPUMIsHostUsingSysEnter(PVM pVM);
    959957VMMDECL(bool)           CPUMIsHostUsingSysCall(PVM pVM);
    960958VMMDECL(bool)           CPUMIsGuestFPUStateActive(PVMCPU pVCPU);
    961 VMMDECL(void)           CPUMDeactivateGuestFPUState(PVM pVM);
    962 VMMDECL(bool)           CPUMIsGuestDebugStateActive(PVM pVM);
    963 VMMDECL(void)           CPUMDeactivateGuestDebugState(PVM pVM);
     959VMMDECL(void)           CPUMDeactivateGuestFPUState(PVMCPU pVCpu);
     960VMMDECL(bool)           CPUMIsGuestDebugStateActive(PVMCPU pVCpu);
     961VMMDECL(void)           CPUMDeactivateGuestDebugState(PVMCPU pVCpu);
     962VMMDECL(uint32_t)       CPUMGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
    964963VMMDECL(bool)           CPUMAreHiddenSelRegsValid(PVM pVM);
    965 VMMDECL(void)           CPUMSetHiddenSelRegsValid(PVM pVM, bool fValid);
    966 VMMDECL(uint32_t)       CPUMGetGuestCPL(PVM pVM, PCPUMCTXCORE pCtxCore);
    967964
    968965/**
    … …  
    981978} CPUMMODE;
    982979
    983 VMMDECL(CPUMMODE)  CPUMGetGuestMode(PVM pVM);
     980VMMDECL(CPUMMODE)  CPUMGetGuestMode(PVMCPU pVCpu);
    984981
    985982

  • trunk/include/VBox/cpumdis.h

    r12989 r18927  
    4444
    4545#ifdef IN_RING3
    46 VMMR3DECL(int)  CPUMR3DisasmInstrCPU(PVM pVM, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISCPUSTATE pCpu, const char *pszPrefix);
     46VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISCPUSTATE pCpu, const char *pszPrefix);
    4747
    4848# ifdef DEBUG
    4949/** @deprecated  Use DBGFR3DisasInstrCurrentLog().  */
    50 VMMR3DECL(void) CPUMR3DisasmInstr(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix);
    51 /** @deprecated  Create new DBGFR3Disas function to do this. */
    52 VMMR3DECL(void) CPUMR3DisasmBlock(PVM pVM, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix, int nrInstructions);
     50VMMR3DECL(void) CPUMR3DisasmInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR pc, const char *pszPrefix);
    5351# else
    5452/** @deprecated  Use DBGFR3DisasInstrCurrentLog(). */
    55 #  define CPUMR3DisasmInstr(pVM, pCtx, pc, pszPrefix)                   do {} while (0)
    56 /** @deprecated  Create new DBGFR3Disas function to do this. */
    57 #  define CPUMR3DisasmBlock(pVM, pCtx, pc, pszPrefix, nrInstructions)   do {} while (0)
     53#  define CPUMR3DisasmInstr(pVM, pVCpu, pCtx, pc, pszPrefix)                   do {} while (0)
    5854# endif
    5955

  • trunk/include/VBox/dbgf.h

    r14072 r18927  
    766766#define DBGF_SEL_FLAT                       1
    767767
    768 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr);
    769 VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cbOutput);
     768VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr);
     769VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cbOutput);
    770770VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cbOutput);
    771771VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix);
    … …  
    785785#endif
    786786
    787 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr);
     787VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr);
    788788
    789789/** @def DBGFR3DisasInstrLog
    … …  
    805805VMMR3DECL(int) DBGFR3MemRead(PVM pVM, PCDBGFADDRESS pAddress, void *pvBuf, size_t cbRead);
    806806VMMR3DECL(int) DBGFR3MemReadString(PVM pVM, PCDBGFADDRESS pAddress, char *pszBuf, size_t cbBuf);
     807VMMR3DECL(int) DBGFR3ReadGCVirt(PVM pVM, PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtr, size_t cb);
     808VMMR3DECL(int) DBGFR3WriteGCVirt(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
    807809
    808810

  • trunk/include/VBox/em.h

    r18770 r18927  
    8080} EMSTATE;
    8181
    82 VMMDECL(EMSTATE) EMGetState(PVM pVM);
     82VMMDECL(EMSTATE) EMGetState(PVMCPU pVCpu);
    8383
    8484/** @name Callback handlers for instruction emulation functions.
    … …  
    117117#define EMIsRawRing0Enabled(pVM) ((pVM)->fRawR0Enabled)
    118118
    119 VMMDECL(void)       EMSetInhibitInterruptsPC(PVM pVM, RTGCUINTPTR PC);
    120 VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM);
    121 VMMDECL(int)        EMInterpretDisasOne(PVM pVM, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr);
    122 VMMDECL(int)        EMInterpretDisasOneEx(PVM pVM, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
    123                                          PDISCPUSTATE pCpu, unsigned *pcbInstr);
    124 VMMDECL(int)        EMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
    125 VMMDECL(int)        EMInterpretInstructionCPU(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
    126 VMMDECL(int)        EMInterpretCpuId(PVM pVM, PCPUMCTXCORE pRegFrame);
    127 VMMDECL(int)        EMInterpretRdtsc(PVM pVM, PCPUMCTXCORE pRegFrame);
    128 VMMDECL(int)        EMInterpretRdpmc(PVM pVM, PCPUMCTXCORE pRegFrame);
    129 VMMDECL(int)        EMInterpretRdtscp(PVM pVM, PCPUMCTX pCtx);
    130 VMMDECL(int)        EMInterpretInvlpg(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
    131 VMMDECL(int)        EMInterpretIret(PVM pVM, PCPUMCTXCORE pRegFrame);
    132 VMMDECL(int)        EMInterpretDRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
    133 VMMDECL(int)        EMInterpretDRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
    134 VMMDECL(int)        EMInterpretCRxWrite(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen);
    135 VMMDECL(int)        EMInterpretCRxRead(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx);
    136 VMMDECL(int)        EMInterpretLMSW(PVM pVM, PCPUMCTXCORE pRegFrame, uint16_t u16Data);
    137 VMMDECL(int)        EMInterpretCLTS(PVM pVM);
    138 VMMDECL(int)        EMInterpretPortIO(PVM pVM, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);
    139 VMMDECL(int)        EMInterpretRdmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
    140 VMMDECL(int)        EMInterpretWrmsr(PVM pVM, PCPUMCTXCORE pRegFrame);
     119VMMDECL(void)       EMSetInhibitInterruptsPC(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR PC);
     120VMMDECL(RTGCUINTPTR) EMGetInhibitInterruptsPC(PVM pVM, PVMCPU pVCpu);
     121VMMDECL(int)        EMInterpretDisasOne(PVM pVM, PVMCPU pVCpu, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, unsigned *pcbInstr);
     122VMMDECL(int)        EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,
     123                                          PDISCPUSTATE pDISState, unsigned *pcbInstr);
     124VMMDECL(int)        EMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
     125VMMDECL(int)        EMInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDISState, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize);
     126VMMDECL(int)        EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
     127VMMDECL(int)        EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
     128VMMDECL(int)        EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
     129VMMDECL(int)        EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     130VMMDECL(int)        EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);
     131VMMDECL(int)        EMInterpretIret(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
     132VMMDECL(int)        EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen);
     133VMMDECL(int)        EMInterpretDRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegDrx);
     134VMMDECL(int)        EMInterpretCRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegCrx, uint32_t SrcRegGen);
     135VMMDECL(int)        EMInterpretCRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx);
     136VMMDECL(int)        EMInterpretLMSW(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint16_t u16Data);
     137VMMDECL(int)        EMInterpretCLTS(PVM pVM, PVMCPU pVCpu);
     138VMMDECL(int)        EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);
     139VMMDECL(int)        EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
     140VMMDECL(int)        EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
    141141
    142142/** @name Assembly routines
    … …  
    173173VMMR3DECL(int)      EMR3Term(PVM pVM);
    174174VMMR3DECL(int)      EMR3TermCPU(PVM pVM);
    175 VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVM pVM, int rc);
    176 VMMR3DECL(int)      EMR3ExecuteVM(PVM pVM, RTCPUID idCpu);
    177 VMMR3DECL(int)      EMR3CheckRawForcedActions(PVM pVM);
     175VMMR3DECL(DECLNORETURN(void)) EMR3FatalError(PVMCPU pVCpu, int rc);
     176VMMR3DECL(int)      EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu);
     177VMMR3DECL(int)      EMR3CheckRawForcedActions(PVM pVM, PVMCPU pVCpu);
    178178VMMR3DECL(int)      EMR3Interpret(PVM pVM);
    179179

  • trunk/include/VBox/err.h

    r18566 r18927  
    7474/** Page directory pointer not present. */
    7575#define VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT (-1014)
     76/** Raw mode doesn't support SMP. */
     77#define VERR_RAW_MODE_INVALID_SMP           (-1015)
    7678/** @} */
    7779

  • trunk/include/VBox/hwaccm.h

    r17328 r18927  
    7373 * @param   pCtx        CPU context
    7474 */
    75 #define HWACCMCanEmulateIoBlock(pVM)       (!CPUMIsGuestInPagedProtectedMode(pVM))
     75#define HWACCMCanEmulateIoBlock(pVCpu)     (!CPUMIsGuestInPagedProtectedMode(pVCpu))
    7676#define HWACCMCanEmulateIoBlockEx(pCtx)    (!CPUMIsGuestInPagedProtectedModeEx(pCtx))
    7777
    … …  
    127127VMMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM);
    128128VMMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM);
    129 VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
     129VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
    130130VMMR3DECL(bool) HWACCMR3IsVPIDActive(PVM pVM);
    131131VMMR3DECL(int)  HWACCMR3InjectNMI(PVM pVM);

  • trunk/include/VBox/mm.h

    r18792 r18927  
    252252
    253253VMMR3DECL(int)      MMR3HCPhys2HCVirt(PVM pVM, RTHCPHYS HCPhys, void **ppv);
    254 VMMR3DECL(int)      MMR3ReadGCVirt(PVM pVM, void *pvDst, RTGCPTR GCPtr, size_t cb);
    255 VMMR3DECL(int)      MMR3WriteGCVirt(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
    256254
    257255

  • trunk/include/VBox/pdmdev.h

    r18660 r18927  
    28432843    DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
    28442844
     2845    /**
     2846     * Gets the VMCPU handle. Restricted API.
     2847     *
     2848     * @returns VMCPU Handle.
     2849     * @param   pDevIns             Device instance.
     2850     */
     2851    DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
     2852
    28452853    /** @} */
    28462854
    … …  
    29842992    DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
    29852993
     2994    /**
     2995     * Gets the VMCPU handle. Restricted API.
     2996     *
     2997     * @returns VMCPU Handle.
     2998     * @param   pDevIns             Device instance.
     2999     */
     3000    DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
     3001
    29863002    /** Just a safety precaution. */
    29873003    uint32_t                        u32TheEnd;
    … …  
    31293145     */
    31303146    DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
     3147
     3148    /**
     3149     * Gets the VMCPU handle. Restricted API.
     3150     *
     3151     * @returns VMCPU Handle.
     3152     * @param   pDevIns             Device instance.
     3153     */
     3154    DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
    31313155
    31323156    /** Just a safety precaution. */
    … …  
    37153739}
    37163740
     3741/**
     3742 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
     3743 */
     3744DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
     3745{
     3746    return pDevIns->CTX_SUFF(pDevHlp)->pfnGetVMCPU(pDevIns);
     3747}
     3748
    37173749#ifdef IN_RING0
    37183750/**

  • trunk/include/VBox/pgm.h

    r18677 r18927  
    286286VMMDECL(int)        PGMRegisterStringFormatTypes(void);
    287287VMMDECL(void)       PGMDeregisterStringFormatTypes(void);
    288 VMMDECL(RTHCPHYS)   PGMGetHyperCR3(PVM pVM);
    289 VMMDECL(RTHCPHYS)   PGMGetNestedCR3(PVM pVM, PGMMODE enmShadowMode);
    290 VMMDECL(RTHCPHYS)   PGMGetHyper32BitCR3(PVM pVM);
    291 VMMDECL(RTHCPHYS)   PGMGetHyperPaeCR3(PVM pVM);
    292 VMMDECL(RTHCPHYS)   PGMGetHyperAmd64CR3(PVM pVM);
     288VMMDECL(RTHCPHYS)   PGMGetHyperCR3(PVMCPU pVCpu);
     289VMMDECL(RTHCPHYS)   PGMGetNestedCR3(PVMCPU pVCpu, PGMMODE enmShadowMode);
    293290VMMDECL(RTHCPHYS)   PGMGetInterHCCR3(PVM pVM);
    294 VMMDECL(RTHCPHYS)   PGMGetInterRCCR3(PVM pVM);
     291VMMDECL(RTHCPHYS)   PGMGetInterRCCR3(PVM pVM, PVMCPU pVCpu);
    295292VMMDECL(RTHCPHYS)   PGMGetInter32BitCR3(PVM pVM);
    296293VMMDECL(RTHCPHYS)   PGMGetInterPaeCR3(PVM pVM);
    297294VMMDECL(RTHCPHYS)   PGMGetInterAmd64CR3(PVM pVM);
    298 VMMDECL(int)        PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
    299 VMMDECL(int)        PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage);
    300 VMMDECL(int)        PGMVerifyAccess(PVM pVM, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
    301 VMMDECL(int)        PGMIsValidAccess(PVM pVM, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
    302 VMMDECL(int)        PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
     295VMMDECL(int)        PGMTrap0eHandler(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
     296VMMDECL(int)        PGMPrefetchPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);
     297VMMDECL(int)        PGMVerifyAccess(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
     298VMMDECL(int)        PGMIsValidAccess(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
     299VMMDECL(int)        PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
    303300VMMDECL(int)        PGMMap(PVM pVM, RTGCPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
    304301VMMDECL(int)        PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
    … …  
    311308VMMDECL(void)       PGMMapCheck(PVM pVM);
    312309#endif
    313 VMMDECL(int)        PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
    314 VMMDECL(int)        PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
    315 VMMDECL(int)        PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    316 VMMDECL(int)        PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
    317 VMMDECL(bool)       PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr);
    318 VMMDECL(int)        PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
    319 VMMDECL(int)        PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    320 VMMDECL(X86PDPE)    PGMGstGetPaePDPtr(PVM pVM, unsigned iPdPt);
    321 
    322 VMMDECL(int)        PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage);
    323 VMMDECL(int)        PGMFlushTLB(PVM pVM, uint64_t cr3, bool fGlobal);
    324 VMMDECL(int)        PGMSyncCR3(PVM pVM, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
    325 VMMDECL(int)        PGMUpdateCR3(PVM pVM, uint64_t cr3);
    326 VMMDECL(int)        PGMChangeMode(PVM pVM, uint64_t cr0, uint64_t cr4, uint64_t efer);
    327 VMMDECL(PGMMODE)    PGMGetGuestMode(PVM pVM);
    328 VMMDECL(PGMMODE)    PGMGetShadowMode(PVM pVM);
     310VMMDECL(int)        PGMShwGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
     311VMMDECL(int)        PGMShwSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
     312VMMDECL(int)        PGMShwModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
     313VMMDECL(int)        PGMGstGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
     314VMMDECL(bool)       PGMGstIsPagePresent(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr);
     315VMMDECL(int)        PGMGstSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
     316VMMDECL(int)        PGMGstModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
     317VMMDECL(X86PDPE)    PGMGstGetPaePDPtr(PVMCPU pVCpu, unsigned iPdPt);
     318
     319VMMDECL(int)        PGMInvalidatePage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);
     320VMMDECL(int)        PGMFlushTLB(PVM pVM, PVMCPU pVCpu, uint64_t cr3, bool fGlobal);
     321VMMDECL(int)        PGMSyncCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
     322VMMDECL(int)        PGMUpdateCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3);
     323VMMDECL(int)        PGMChangeMode(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
     324VMMDECL(PGMMODE)    PGMGetGuestMode(PVMCPU pVCpu);
     325VMMDECL(PGMMODE)    PGMGetShadowMode(PVMCPU pVCpu);
    329326VMMDECL(PGMMODE)    PGMGetHostMode(PVM pVM);
    330327VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
    … …  
    348345VMMDECL(bool)       PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
    349346VMMDECL(bool)       PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr);
    350 VMMDECL(bool)       PGMPhysIsA20Enabled(PVM pVM);
     347VMMDECL(bool)       PGMPhysIsA20Enabled(PVMCPU pVCpu);
    351348VMMDECL(bool)       PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
    352349VMMDECL(bool)       PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
    353350VMMDECL(int)        PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys);
    354 VMMDECL(int)        PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
    355 VMMDECL(int)        PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
     351VMMDECL(int)        PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
     352VMMDECL(int)        PGMPhysGCPtr2HCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTHCPHYS pHCPhys);
    356353VMMDECL(void)       PGMPhysInvalidatePageGCMapTLB(PVM pVM);
    357354VMMDECL(void)       PGMPhysInvalidatePageR0MapTLB(PVM pVM);
    … …  
    360357VMMDECL(int)        PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
    361358VMMDECL(int)        PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
    362 VMMDECL(int)        PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
    363 VMMDECL(int)        PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
     359VMMDECL(int)        PGMPhysGCPtr2CCPtr(PVMCPU pVCpu, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock);
     360VMMDECL(int)        PGMPhysGCPtr2CCPtrReadOnly(PVMCPU pVCpu, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock);
    364361VMMDECL(void)       PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
    365362
    … …  
    384381VMMDECL(RTR3PTR)    PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange);
    385382#endif
    386 VMMDECL(int)        PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr);
     383VMMDECL(int)        PGMPhysGCPtr2R3Ptr(PVMCPU pVCpu, RTGCPTR GCPtr, PRTR3PTR pR3Ptr);
    387384VMMDECL(int)        PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
    388385VMMDECL(int)        PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
    … …  
    390387#ifndef IN_RC /* Only ring 0 & 3. */
    391388VMMDECL(int)        PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
    392 VMMDECL(int)        PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
    393 VMMDECL(int)        PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
    394 VMMDECL(int)        PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
    395 VMMDECL(int)        PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
    396 VMMDECL(int)        PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
     389VMMDECL(int)        PGMPhysSimpleReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
     390VMMDECL(int)        PGMPhysSimpleWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
     391VMMDECL(int)        PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
     392VMMDECL(int)        PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
     393VMMDECL(int)        PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
    397394#endif /* !IN_RC */
    398 VMMDECL(int)        PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
    399 VMMDECL(int)        PGMPhysInterpretedReadNoHandlers(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
    400 VMMDECL(int)        PGMPhysInterpretedWriteNoHandlers(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
     395VMMDECL(int)        PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
     396VMMDECL(int)        PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
     397VMMDECL(int)        PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
    401398#ifdef VBOX_STRICT
    402399VMMDECL(unsigned)   PGMAssertHandlerAndFlagsInSync(PVM pVM);
    403400VMMDECL(unsigned)   PGMAssertNoMappingConflicts(PVM pVM);
    404 VMMDECL(unsigned)   PGMAssertCR3(PVM pVM, uint64_t cr3, uint64_t cr4);
     401VMMDECL(unsigned)   PGMAssertCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4);
    405402#endif /* VBOX_STRICT */
    406403
    … …  
    440437 */
    441438VMMR0DECL(int)      PGMR0PhysAllocateHandyPages(PVM pVM);
    442 VMMR0DECL(int)      PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
     439VMMR0DECL(int)      PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
    443440# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    444441VMMR0DECL(int)      PGMR0DynMapInit(void);
    … …  
    467464VMMR3DECL(int)      PGMR3TermCPU(PVM pVM);
    468465VMMR3DECL(int)      PGMR3LockCall(PVM pVM);
    469 VMMR3DECL(int)      PGMR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
     466VMMR3DECL(int)      PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode);
    470467
    471468VMMR3DECL(int)      PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
    … …  
    497494VMMR3DECL(int)      PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
    498495VMMR3DECL(int)      PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
    499 VMMDECL(void)       PGMR3PhysSetA20(PVM pVM, bool fEnable);
     496VMMDECL(void)       PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
    500497/** @name PGMR3MapPT flags.
    501498 * @{ */

  • trunk/include/VBox/rem.h

    r18660 r18927  
    6565REMR3DECL(int)  REMR3Term(PVM pVM);
    6666REMR3DECL(void) REMR3Reset(PVM pVM);
    67 REMR3DECL(int)  REMR3Run(PVM pVM);
    68 REMR3DECL(int)  REMR3EmulateInstruction(PVM pVM);
    69 REMR3DECL(int)  REMR3Step(PVM pVM);
     67REMR3DECL(int)  REMR3Run(PVM pVM, PVMCPU pVCpu);
     68REMR3DECL(int)  REMR3EmulateInstruction(PVM pVM, PVMCPU pVCpu);
     69REMR3DECL(int)  REMR3Step(PVM pVM, PVMCPU pVCpu);
    7070REMR3DECL(int)  REMR3BreakpointSet(PVM pVM, RTGCUINTPTR Address);
    7171REMR3DECL(int)  REMR3BreakpointClear(PVM pVM, RTGCUINTPTR Address);
    72 REMR3DECL(int)  REMR3State(PVM pVM);
    73 REMR3DECL(int)  REMR3StateBack(PVM pVM);
    74 REMR3DECL(void) REMR3StateUpdate(PVM pVM);
    75 REMR3DECL(void) REMR3A20Set(PVM pVM, bool fEnable);
     72REMR3DECL(int)  REMR3State(PVM pVM, PVMCPU pVCpu);
     73REMR3DECL(int)  REMR3StateBack(PVM pVM, PVMCPU pVCpu);
     74REMR3DECL(void) REMR3StateUpdate(PVM pVM, PVMCPU pVCpu);
     75REMR3DECL(void) REMR3A20Set(PVM pVM, PVMCPU pVCpu, bool fEnable);
    7676REMR3DECL(int)  REMR3DisasEnableStepping(PVM pVM, bool fEnable);
    77 REMR3DECL(void) REMR3ReplayInvalidatedPages(PVM pVM);
     77REMR3DECL(void) REMR3ReplayInvalidatedPages(PVM pVM, PVMCPU pVCpu);
    7878REMR3DECL(void) REMR3ReplayHandlerNotifications(PVM pVM);
    79 REMR3DECL(int)  REMR3NotifyCodePageChanged(PVM pVM, RTGCPTR pvCodePage);
     79REMR3DECL(int)  REMR3NotifyCodePageChanged(PVM pVM, PVMCPU pVCpu, RTGCPTR pvCodePage);
    8080REMR3DECL(void) REMR3NotifyPhysRamRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, unsigned fFlags);
    8181/** @name Flags for REMR3NotifyPhysRamRegister.
    … …  
    8989REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);
    9090REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);
    91 REMR3DECL(void) REMR3NotifyPendingInterrupt(PVM pVM, uint8_t u8Interrupt);
    92 REMR3DECL(uint32_t) REMR3QueryPendingInterrupt(PVM pVM);
    93 REMR3DECL(void) REMR3NotifyInterruptSet(PVM pVM);
    94 REMR3DECL(void) REMR3NotifyInterruptClear(PVM pVM);
     91REMR3DECL(void) REMR3NotifyPendingInterrupt(PVM pVM, PVMCPU pVCpu, uint8_t u8Interrupt);
     92REMR3DECL(uint32_t) REMR3QueryPendingInterrupt(PVM pVM, PVMCPU pVCpu);
     93REMR3DECL(void) REMR3NotifyInterruptSet(PVM pVM, PVMCPU pVCpu);
     94REMR3DECL(void) REMR3NotifyInterruptClear(PVM pVM, PVMCPU pVCpu);
    9595REMR3DECL(void) REMR3NotifyTimerPending(PVM pVM);
    9696REMR3DECL(void) REMR3NotifyDmaPending(PVM pVM);

  • trunk/include/VBox/selm.h

    r17616 r18927  
    5353VMMDECL(RTSEL)      SELMGetHyperTSSTrap08(PVM pVM);
    5454VMMDECL(RTRCPTR)    SELMGetHyperGDT(PVM pVM);
    55 VMMDECL(int)        SELMGetTSSInfo(PVM pVM, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap);
     55VMMDECL(int)        SELMGetTSSInfo(PVM pVM, PVMCPU pVCpu, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap);
    5656VMMDECL(RTGCPTR)    SELMToFlat(PVM pVM, DIS_SELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr);
    5757VMMDECL(RTGCPTR)    SELMToFlatBySel(PVM pVM, RTSEL Sel, RTGCPTR Addr);
    58 VMMDECL(void)       SELMShadowCR3Changed(PVM pVM);
     58VMMDECL(void)       SELMShadowCR3Changed(PVM pVM, PVMCPU pVCpu);
    5959
    6060/** Flags for SELMToFlatEx().
    … …  
    138138VMMR3DECL(int)      SELMR3Term(PVM pVM);
    139139VMMR3DECL(void)     SELMR3Reset(PVM pVM);
    140 VMMR3DECL(int)      SELMR3UpdateFromCPUM(PVM pVM);
    141 VMMR3DECL(int)      SELMR3SyncTSS(PVM pVM);
    142 VMMR3DECL(int)      SELMR3GetSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo);
     140VMMR3DECL(int)      SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu);
     141VMMR3DECL(int)      SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu);
     142VMMR3DECL(int)      SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PSELMSELINFO pSelInfo);
    143143VMMR3DECL(int)      SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PSELMSELINFO pSelInfo);
    144144VMMR3DECL(void)     SELMR3DisableMonitoring(PVM pVM);

  • trunk/include/VBox/trpm.h

    r13833 r18927  
    106106VMMR3DECL(RTRCPTR)  TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap);
    107107VMMR3DECL(void)     TRPMR3DisableMonitoring(PVM pVM);
    108 VMMR3DECL(int)      TRPMR3SyncIDT(PVM pVM);
     108VMMR3DECL(int)      TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu);
    109109VMMR3DECL(bool)     TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr);
    110110VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr);
    111 VMMR3DECL(int)      TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent);
     111VMMR3DECL(int)      TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent);
    112112/** @} */
    113113#endif

  • trunk/include/VBox/vm.h

    r18617 r18927  
    113113        struct CPUMCPU      s;
    114114#endif
    115         char                padding[2560];      /* multiple of 64 */
     115        char                padding[4096];      /* multiple of 64 */
    116116    } cpum;
    117117    /** VMM part. */
    … …  
    130130        struct PGMCPU       s;
    131131#endif
    132         char                padding[2048];       /* multiple of 64 */
     132        char                padding[32*1024];       /* multiple of 64 */
    133133    } pgm;
    134134
    … …  
    148148        struct EMCPU        s;
    149149#endif
    150         char                padding[64];        /* multiple of 64 */
     150        char                padding[2048];        /* multiple of 64 */
    151151    } em;
    152152
    … …  
    619619        struct CPUM s;
    620620#endif
    621         char        padding[4096];      /* multiple of 32 */
     621        char        padding[2048];        /* multiple of 32 */
    622622    } cpum;
    623623
    … …  
    637637        struct PGM  s;
    638638#endif
    639         char        padding[50*1024];   /* multiple of 32 */
     639        char        padding[16*1024];   /* multiple of 32 */
    640640    } pgm;
    641641
    … …  
    736736        struct EM   s;
    737737#endif
    738         char        padding[1344];      /* multiple of 32 */
     738        char        padding[64];         /* multiple of 32 */
    739739    } em;
    740740

  • trunk/include/VBox/vm.mac

    r14543 r18927  
    9797
    9898    alignb 64
    99     .cpum                 resb 4096
     99    .cpum                 resb 2048
    100100    .vmm                  resb 1024
    101101

  • trunk/include/VBox/vmm.h

    r18660 r18927  
    110110} VMMCALLHOST;
    111111
    112 RTRCPTR              VMMGetStackRC(PVM pVM);
    113 VMCPUID              VMMGetCpuId(PVM pVM);
    114 PVMCPU               VMMGetCpu(PVM pVM);
     112VMMDECL(RTRCPTR)     VMMGetStackRC(PVM pVM);
     113VMMDECL(VMCPUID)     VMMGetCpuId(PVM pVM);
     114VMMDECL(PVMCPU)      VMMGetCpu(PVM pVM);
     115VMMDECL(PVMCPU)      VMMGetCpu0(PVM pVM);
    115116VMMDECL(PVMCPU)      VMMGetCpuEx(PVM pVM, RTCPUID idCpu);
    116117VMMDECL(uint32_t)    VMMGetSvnRev(void);
    … …  
    148149VMMR3DECL(int)      VMMR3DisableSwitcher(PVM pVM);
    149150VMMR3DECL(RTR0PTR)  VMMR3GetHostToGuestSwitcher(PVM pVM, VMMSWITCHER enmSwitcher);
    150 VMMR3DECL(int)      VMMR3RawRunGC(PVM pVM);
    151 VMMR3DECL(int)      VMMR3HwAccRunGC(PVM pVM, RTCPUID idCpu);
     151VMMR3DECL(int)      VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu);
     152VMMR3DECL(int)      VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu);
    152153VMMR3DECL(int)      VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...);
    153154VMMR3DECL(int)      VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args);
    154155VMMR3DECL(int)      VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr);
    155 VMMR3DECL(int)      VMMR3ResumeHyper(PVM pVM);
    156 VMMR3DECL(void)     VMMR3FatalDump(PVM pVM, int rcErr);
     156VMMR3DECL(int)      VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu);
     157VMMR3DECL(void)     VMMR3FatalDump(PVM pVM, PVMCPU pVCpu, int rcErr);
    157158VMMR3DECL(int)      VMMR3Lock(PVM pVM);
    158159VMMR3DECL(int)      VMMR3Unlock(PVM pVM);
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