VirtualBox

Changeset 18988 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Apr 17, 2009 1:00:59 PM (16 years ago)
Author:
vboxsync
Message:

PGM api changes

Location:
trunk/src/VBox/VMM
Files:
18 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/EM.cpp

    r18939 r18988  
    16941694    uint64_t    fFlags = 0;
    16951695    RTGCPHYS    GCPhys = 0;
    1696     int rc2 = PGMGstGetPage(pVM, pVCpu, uCR2, &fFlags, &GCPhys);
     1696    int rc2 = PGMGstGetPage(pVCpu, uCR2, &fFlags, &GCPhys);
    16971697    Log(("emR3RawGuestTrap: cs:eip=%04x:%08x: trap=%02x err=%08x cr2=%08x cr0=%08x%s: Phys=%RGp fFlags=%08llx %s %s %s%s rc2=%d\n",
    16981698         pCtx->cs, pCtx->eip, u8TrapNo, uErrorCode, uCR2, (uint32_t)pCtx->cr0, (enmType == TRPM_SOFTWARE_INT) ? " software" : "",  GCPhys, fFlags,

  • trunk/src/VBox/VMM/PATM/CSAM.cpp

    r18927 r18988  
    11671167        if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
    11681168        {
    1169             if (!PGMGstIsPagePresent(pVM, pVCpu, pCurInstrGC + opsize - 1))
     1169            if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + opsize - 1))
    11701170            {
    11711171                /// @todo fault in the page
    … …  
    12301230            if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
    12311231            {
    1232                 if (!PGMGstIsPagePresent(pVM, pVCpu, addr))
     1232                if (!PGMGstIsPagePresent(pVCpu, addr))
    12331233                {
    12341234                    Log(("Page for current instruction %RRv is not present!!\n", addr));
    … …  
    12981298                    addr = *(RTRCPTR *)(pJumpTableHC + cpu.param1.scale * i);
    12991299
    1300                     rc2 = PGMGstGetPage(pVM, pVCpu, addr, &fFlags, NULL);
     1300                    rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
    13011301                    if (    rc2 != VINF_SUCCESS
    13021302                        ||  (fFlags & X86_PTE_US)
    … …  
    14461446    }
    14471447
    1448     rc = PGMGstGetPage(pVM, pVCpu, addr, &fFlags, &GCPhys);
     1448    rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
    14491449    /* Returned at a very early stage (no paging yet presumably). */
    14501450    if (rc == VERR_NOT_SUPPORTED)
    … …  
    14921492            pPageRec->page.GCPhys = 0;
    14931493            pPageRec->page.fFlags = 0;
    1494             rc = PGMGstGetPage(pVM, pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
     1494            rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
    14951495            if (rc == VINF_SUCCESS)
    14961496                pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
    … …  
    16391639    pPage->page.fMonitorActive       = false;
    16401640    pPage->page.pBitmap              = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
    1641     rc = PGMGstGetPage(pVM, pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
     1641    rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
    16421642    AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
    16431643
    … …  
    16701670        AssertRC(rc);
    16711671
    1672         rc = PGMShwModifyPage(pVM, pVCpu, GCPtr, 1, 0, ~(uint64_t)X86_PTE_RW);
     1672        rc = PGMShwModifyPage(pVCpu, GCPtr, 1, 0, ~(uint64_t)X86_PTE_RW);
    16731673        Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    16741674
    … …  
    17431743        uint64_t fFlags;
    17441744
    1745         rc = PGMGstGetPage(pVM, pVCpu, pPageAddrGC, &fFlags, NULL);
     1745        rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
    17461746        AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
    17471747        if (    rc == VINF_SUCCESS
    … …  
    17821782        AssertRC(rc);
    17831783
    1784         rc = PGMShwModifyPage(pVM, pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
     1784        rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
    17851785        Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    17861786
    … …  
    18041804
    18051805        /* Make sure it's readonly. Page invalidation may have modified the attributes. */
    1806         rc = PGMShwModifyPage(pVM, pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
     1806        rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
    18071807        Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    18081808    }
    … …  
    18131813        uint64_t fPageShw;
    18141814        RTHCPHYS GCPhys;
    1815         rc = PGMShwGetPage(pVM, pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
     1815        rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
    18161816//        AssertMsg(     (rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT)
    18171817//                ||  !(fPageShw & X86_PTE_RW)
    … …  
    18261826        AssertRC(rc);
    18271827        /* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
    1828         rc = PGMShwModifyPage(pVM, pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
     1828        rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
    18291829        Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    18301830    }
    … …  
    22062206
    22072207        /* Enable write protection again. (use the fault address as it might be an alias) */
    2208         rc = PGMShwModifyPage(pVM, pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 1, 0, ~(uint64_t)X86_PTE_RW);
     2208        rc = PGMShwModifyPage(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 1, 0, ~(uint64_t)X86_PTE_RW);
    22092209        Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    22102210
    … …  
    22162216            uint64_t fFlags;
    22172217
    2218             rc = PGMGstGetPage(pVM, pVCpu, GCPtr, &fFlags, NULL);
     2218            rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
    22192219            AssertMsg(RT_SUCCESS(rc) || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
    22202220            if (    rc == VINF_SUCCESS
    … …  
    22502250
    22512251        Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
    2252         PGMShwSetPage(pVM, pVCpu, GCPtr, 1, 0);
     2252        PGMShwSetPage(pVCpu, GCPtr, 1, 0);
    22532253        /* Resync the page to make sure instruction fetch will fault */
    22542254        CSAMMarkPage(pVM, GCPtr, false);

  • trunk/src/VBox/VMM/PATM/PATM.cpp

    r18927 r18988  
    41084108
    41094109    RTGCPHYS GCPhys;
    4110     rc = PGMGstGetPage(pVM, pVCpu, pInstrGC, NULL, &GCPhys);
     4110    rc = PGMGstGetPage(pVCpu, pInstrGC, NULL, &GCPhys);
    41114111    if (rc != VINF_SUCCESS)
    41124112    {
    … …  
    60786078            if (Cpu.pCurInstr->opcode == OP_PUSH)
    60796079            {
    6080                 rc = PGMShwGetPage(pVM, pVCpu, pCtx->esp, &fFlags, NULL);
     6080                rc = PGMShwGetPage(pVCpu, pCtx->esp, &fFlags, NULL);
    60816081                if (    rc == VINF_SUCCESS
    60826082                    &&  ((fFlags & (X86_PTE_P|X86_PTE_RW)) == (X86_PTE_P|X86_PTE_RW)) )
    … …  
    60996099
    61006100            /* Typical pushf (most patches)/push (call patch) trap because of a monitored page. */
    6101             rc = PGMShwModifyPage(pVM, pVCpu, pCtx->esp, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
     6101            rc = PGMShwModifyPage(pVCpu, pCtx->esp, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
    61026102            AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Rrc\n", rc));
    61036103            if (rc == VINF_SUCCESS)
    … …  
    61056105
    61066106                /* The guest page *must* be present. */
    6107                 rc = PGMGstGetPage(pVM, pVCpu, pCtx->esp, &fFlags, NULL);
     6107                rc = PGMGstGetPage(pVCpu, pCtx->esp, &fFlags, NULL);
    61086108                if (rc == VINF_SUCCESS && (fFlags & X86_PTE_P))
    61096109                {

  • trunk/src/VBox/VMM/PATM/VMMGC/CSAMGC.cpp

    r18927 r18988  
    8888         * Make this particular page R/W.
    8989         */
    90         int rc = PGMShwModifyPage(pVM, pVCpu, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
     90        int rc = PGMShwModifyPage(pVCpu, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
    9191        AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Rrc\n", rc));
    9292        ASMInvalidatePage((void *)pvFault);
    … …  
    129129     */
    130130    Log(("CSAMGCCodePageWriteHandler: enabled r/w for page %RGv\n", pvFault));
    131     rc = PGMShwModifyPage(pVM, pVCpu, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
     131    rc = PGMShwModifyPage(pVCpu, pvFault, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
    132132    AssertMsgRC(rc, ("PGMShwModifyPage -> rc=%Rrc\n", rc));
    133133    ASMInvalidatePage((void *)pvFault);

  • trunk/src/VBox/VMM/PGM.cpp

    r18984 r18988  
    19861986        pgmR3ModeDataSwitch(pVM, pVCpu, pVCpu->pgm.s.enmShadowMode, pVCpu->pgm.s.enmGuestMode);
    19871987
    1988         PGM_SHW_PFN(Relocate, pVM)(pVM, pVCpu, offDelta);
    1989         PGM_GST_PFN(Relocate, pVM)(pVM, pVCpu, offDelta);
    1990         PGM_BTH_PFN(Relocate, pVM)(pVM, pVCpu, offDelta);
     1988        PGM_SHW_PFN(Relocate, pVCpu)(pVCpu, offDelta);
     1989        PGM_GST_PFN(Relocate, pVCpu)(pVCpu, offDelta);
     1990        PGM_BTH_PFN(Relocate, pVCpu)(pVM, pVCpu, offDelta);
    19911991    }
    19921992
    … …  
    21472147        PVMCPU  pVCpu = &pVM->aCpus[i];
    21482148
    2149         rc = PGM_GST_PFN(Exit, pVM)(pVM, pVCpu);
     2149        rc = PGM_GST_PFN(Exit, pVCpu)(pVCpu);
    21502150        AssertRC(rc);
    21512151    }
    … …  
    38143814    {
    38153815        LogFlow(("PGMR3ChangeMode: Shadow mode: %s -> %s\n",  PGMGetModeName(pVCpu->pgm.s.enmShadowMode), PGMGetModeName(enmShadowMode)));
    3816         if (PGM_SHW_PFN(Exit, pVM))
     3816        if (PGM_SHW_PFN(Exit, pVCpu))
    38173817        {
    3818             int rc = PGM_SHW_PFN(Exit, pVM)(pVM, pVCpu);
     3818            int rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
    38193819            if (RT_FAILURE(rc))
    38203820            {
    … …  
    38293829
    38303830    /* guest */
    3831     if (PGM_GST_PFN(Exit, pVM))
    3832     {
    3833         int rc = PGM_GST_PFN(Exit, pVM)(pVM, pVCpu);
     3831    if (PGM_GST_PFN(Exit, pVCpu))
     3832    {
     3833        int rc = PGM_GST_PFN(Exit, pVCpu)(pVCpu);
    38343834        if (RT_FAILURE(rc))
    38353835        {
    … …  
    38543854        {
    38553855            case PGMMODE_32_BIT:
    3856                 rc = PGM_SHW_NAME_32BIT(Enter)(pVM, pVCpu);
     3856                rc = PGM_SHW_NAME_32BIT(Enter)(pVCpu);
    38573857                break;
    38583858            case PGMMODE_PAE:
    38593859            case PGMMODE_PAE_NX:
    3860                 rc = PGM_SHW_NAME_PAE(Enter)(pVM, pVCpu);
     3860                rc = PGM_SHW_NAME_PAE(Enter)(pVCpu);
    38613861                break;
    38623862            case PGMMODE_AMD64:
    38633863            case PGMMODE_AMD64_NX:
    3864                 rc = PGM_SHW_NAME_AMD64(Enter)(pVM, pVCpu);
     3864                rc = PGM_SHW_NAME_AMD64(Enter)(pVCpu);
    38653865                break;
    38663866            case PGMMODE_NESTED:
    3867                 rc = PGM_SHW_NAME_NESTED(Enter)(pVM, pVCpu);
     3867                rc = PGM_SHW_NAME_NESTED(Enter)(pVCpu);
    38683868                break;
    38693869            case PGMMODE_EPT:
    3870                 rc = PGM_SHW_NAME_EPT(Enter)(pVM, pVCpu);
     3870                rc = PGM_SHW_NAME_EPT(Enter)(pVCpu);
    38713871                break;
    38723872            case PGMMODE_REAL:
    … …  
    38993899    {
    39003900        case PGMMODE_REAL:
    3901             rc = PGM_GST_NAME_REAL(Enter)(pVM, pVCpu, NIL_RTGCPHYS);
     3901            rc = PGM_GST_NAME_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
    39023902            switch (pVCpu->pgm.s.enmShadowMode)
    39033903            {
    … …  
    39233923
    39243924        case PGMMODE_PROTECTED:
    3925             rc = PGM_GST_NAME_PROT(Enter)(pVM, pVCpu, NIL_RTGCPHYS);
     3925            rc = PGM_GST_NAME_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
    39263926            switch (pVCpu->pgm.s.enmShadowMode)
    39273927            {
    … …  
    39483948        case PGMMODE_32_BIT:
    39493949            GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_PAGE_MASK;
    3950             rc = PGM_GST_NAME_32BIT(Enter)(pVM, pVCpu, GCPhysCR3);
     3950            rc = PGM_GST_NAME_32BIT(Enter)(pVCpu, GCPhysCR3);
    39513951            switch (pVCpu->pgm.s.enmShadowMode)
    39523952            {
    … …  
    39823982
    39833983            GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_PAE_PAGE_MASK;
    3984             rc = PGM_GST_NAME_PAE(Enter)(pVM, pVCpu, GCPhysCR3);
     3984            rc = PGM_GST_NAME_PAE(Enter)(pVCpu, GCPhysCR3);
    39853985            switch (pVCpu->pgm.s.enmShadowMode)
    39863986            {
    … …  
    40084008        case PGMMODE_AMD64:
    40094009            GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & UINT64_C(0xfffffffffffff000); /** @todo define this mask! */
    4010             rc = PGM_GST_NAME_AMD64(Enter)(pVM, pVCpu, GCPhysCR3);
     4010            rc = PGM_GST_NAME_AMD64(Enter)(pVCpu, GCPhysCR3);
    40114011            switch (pVCpu->pgm.s.enmShadowMode)
    40124012            {
    … …  
    44974497
    44984498                /** @todo SMP support!! */
    4499                 PGMShwGetPage(pVM, &pVM->aCpus[0], (RTGCPTR)(u32Address + (i << X86_PT_SHIFT)), &fPageShw, &pPhysHC);
     4499                PGMShwGetPage(&pVM->aCpus[0], (RTGCPTR)(u32Address + (i << X86_PT_SHIFT)), &fPageShw, &pPhysHC);
    45004500                Log(("Found %RGp at %RGv -> flags=%llx\n", PhysSearch, (RTGCPTR)(u32Address + (i << X86_PT_SHIFT)), fPageShw));
    45014501            }

  • trunk/src/VBox/VMM/PGMGst.h

    r18927 r18988  
    2727/* r3 */
    2828PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
    29 PGM_GST_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3);
    30 PGM_GST_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta);
    31 PGM_GST_DECL(int, Exit)(PVM pVM, PVMCPU pVCpu);
     29PGM_GST_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3);
     30PGM_GST_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta);
     31PGM_GST_DECL(int, Exit)(PVMCPU pVCpu);
    3232
    3333/* all */
    34 PGM_GST_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
    35 PGM_GST_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    36 PGM_GST_DECL(int, GetPDE)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
     34PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
     35PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
     36PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
    3737__END_DECLS
    3838
    … …  
    8989 *
    9090 * @returns VBox status code.
    91  * @param   pVM         VM handle.
    9291 * @param   pVCpu       The VMCPU to operate on.
    9392 * @param   GCPhysCR3   The physical address from the CR3 register.
    9493 */
    95 PGM_GST_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3)
     94PGM_GST_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)
    9695{
    9796    /*
    9897     * Map and monitor CR3
    9998     */
    100     int rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
     99    int rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu->pVMR3, pVCpu, GCPhysCR3);
    101100    return rc;
    102101}
    … …  
    107106 *
    108107 * @returns VBox status code.
    109  * @param   pVM         The VM handle.
    110108 * @param   pVCpu       The VMCPU to operate on.
    111109 * @param   offDelta    The reloation offset.
    112110 */
    113 PGM_GST_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta)
     111PGM_GST_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta)
    114112{
    115113    pVCpu->pgm.s.pGst32BitPdRC += offDelta;
    … …  
    129127 *
    130128 * @returns VBox status code.
    131  * @param   pVM         VM handle.
    132129 * @param   pVCpu       The VMCPU to operate on.
    133130 */
    134 PGM_GST_DECL(int, Exit)(PVM pVM, PVMCPU pVCpu)
     131PGM_GST_DECL(int, Exit)(PVMCPU pVCpu)
    135132{
    136133    int rc;
    137134
    138     rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM, pVCpu);
     135    rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pVCpu->pVMR3, pVCpu);
    139136    return rc;
    140137}

  • trunk/src/VBox/VMM/PGMInternal.h

    r18986 r18988  
    19831983#define PGM_GST_NAME_RC_AMD64_STR(name) "pgmRCGstAMD64" #name
    19841984#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
    1985 #define PGM_GST_PFN(name, pVM)          ((pVCpu)->pgm.s.PGM_CTX(pfn,Gst##name))
     1985#define PGM_GST_PFN(name, pVCpu)        ((pVCpu)->pgm.s.PGM_CTX(pfn,Gst##name))
    19861986#define PGM_GST_DECL(type, name)        PGM_CTX_DECL(type) PGM_GST_NAME(name)
    19871987
    … …  
    20022002#define PGM_SHW_NAME_R0_EPT_STR(name)   "pgmR0ShwEPT" #name
    20032003#define PGM_SHW_DECL(type, name)        PGM_CTX_DECL(type) PGM_SHW_NAME(name)
    2004 #define PGM_SHW_PFN(name, pVM)          ((pVCpu)->pgm.s.PGM_CTX(pfn,Shw##name))
     2004#define PGM_SHW_PFN(name, pVCpu)        ((pVCpu)->pgm.s.PGM_CTX(pfn,Shw##name))
    20052005
    20062006/*                   Shw_Gst */
    … …  
    20642064
    20652065#define PGM_BTH_DECL(type, name)        PGM_CTX_DECL(type) PGM_BTH_NAME(name)
    2066 #define PGM_BTH_PFN(name, pVM)          ((pVCpu)->pgm.s.PGM_CTX(pfn,Bth##name))
     2066#define PGM_BTH_PFN(name, pVCpu)        ((pVCpu)->pgm.s.PGM_CTX(pfn,Bth##name))
    20672067/** @} */
    20682068
    … …  
    20802080     * @{
    20812081     */
    2082     DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));
    2083     DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVM pVM, PVMCPU pVCpu));
    2084     DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2085     DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2086 
    2087     DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2088     DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2089 
    2090     DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2091     DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2082    DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
     2083    DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVMCPU pVCpu));
     2084    DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2085    DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2086
     2087    DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2088    DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2089
     2090    DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2091    DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    20922092    /** @} */
    20932093
    … …  
    20952095     * @{
    20962096     */
    2097     DECLR3CALLBACKMEMBER(int,       pfnR3GstRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));
    2098     DECLR3CALLBACKMEMBER(int,       pfnR3GstExit,(PVM pVM, PVMCPU pVCpu));
    2099     DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2100     DECLR3CALLBACKMEMBER(int,       pfnR3GstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2101     DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    2102     DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2103     DECLRCCALLBACKMEMBER(int,       pfnRCGstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2104     DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    2105     DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2106     DECLR0CALLBACKMEMBER(int,       pfnR0GstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2107     DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2097    DECLR3CALLBACKMEMBER(int,       pfnR3GstRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
     2098    DECLR3CALLBACKMEMBER(int,       pfnR3GstExit,(PVMCPU pVCpu));
     2099    DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2100    DECLR3CALLBACKMEMBER(int,       pfnR3GstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2101    DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2102    DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2103    DECLRCCALLBACKMEMBER(int,       pfnRCGstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2104    DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2105    DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2106    DECLR0CALLBACKMEMBER(int,       pfnR0GstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2107    DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    21082108    /** @} */
    21092109
    … …  
    25902590     * @{
    25912591     */
    2592     DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));
    2593     DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVM pVM, PVMCPU pVCpu));
    2594     DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2595     DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2596 
    2597     DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2598     DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2599 
    2600     DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    2601     DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2592    DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
     2593    DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVMCPU pVCpu));
     2594    DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2595    DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2596
     2597    DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2598    DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2599
     2600    DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
     2601    DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    26022602
    26032603    /** @} */
    … …  
    26062606     * @{
    26072607     */
    2608     DECLR3CALLBACKMEMBER(int,       pfnR3GstRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));
    2609     DECLR3CALLBACKMEMBER(int,       pfnR3GstExit,(PVM pVM, PVMCPU pVCpu));
    2610     DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2611     DECLR3CALLBACKMEMBER(int,       pfnR3GstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2612     DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    2613     DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2614     DECLRCCALLBACKMEMBER(int,       pfnRCGstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2615     DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2608    DECLR3CALLBACKMEMBER(int,       pfnR3GstRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
     2609    DECLR3CALLBACKMEMBER(int,       pfnR3GstExit,(PVMCPU pVCpu));
     2610    DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2611    DECLR3CALLBACKMEMBER(int,       pfnR3GstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2612    DECLR3CALLBACKMEMBER(int,       pfnR3GstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2613    DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2614    DECLRCCALLBACKMEMBER(int,       pfnRCGstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2615    DECLRCCALLBACKMEMBER(int,       pfnRCGstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    26162616#if HC_ARCH_BITS == 64
    26172617    RTRCPTR                         alignment3; /**< structure size alignment. */
    26182618#endif
    26192619
    2620     DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
    2621     DECLR0CALLBACKMEMBER(int,       pfnR0GstModifyPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
    2622     DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPDE,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
     2620    DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
     2621    DECLR0CALLBACKMEMBER(int,       pfnR0GstModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
     2622    DECLR0CALLBACKMEMBER(int,       pfnR0GstGetPDE,(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPde));
    26232623    /** @} */
    26242624

  • trunk/src/VBox/VMM/PGMShw.h

    r18927 r18988  
    121121/* r3 */
    122122PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
    123 PGM_SHW_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu);
    124 PGM_SHW_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta);
    125 PGM_SHW_DECL(int, Exit)(PVM pVM, PVMCPU pVCpu);
     123PGM_SHW_DECL(int, Enter)(PVMCPU pVCpu);
     124PGM_SHW_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta);
     125PGM_SHW_DECL(int, Exit)(PVMCPU pVCpu);
    126126
    127127/* all */
    128 PGM_SHW_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
    129 PGM_SHW_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
     128PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
     129PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    130130__END_DECLS
    131131
    … …  
    175175 *
    176176 * @returns VBox status code.
    177  * @param   pVM         VM handle.
    178177 * @param   pVCpu       The VMCPU to operate on.
    179178 */
    180 PGM_SHW_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu)
     179PGM_SHW_DECL(int, Enter)(PVMCPU pVCpu)
    181180{
    182181#if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
    183182    RTGCPHYS     GCPhysCR3 = RT_BIT_64(63);
    184183    PPGMPOOLPAGE pNewShwPageCR3;
     184    PVM          pVM       = pVCpu->pVMR3;
    185185    PPGMPOOL     pPool     = pVM->pgm.s.CTX_SUFF(pPool);
    186186
    … …  
    211211 *
    212212 * @returns VBox status code.
    213  * @param   pVM         The VM handle.
    214213 * @param   pVCpu       The VMCPU to operate on.
    215214 * @param   offDelta    The reloation offset.
    216215 */
    217 PGM_SHW_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta)
     216PGM_SHW_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta)
    218217{
    219218    pVCpu->pgm.s.pShwPageCR3RC += offDelta;
    … …  
    226225 *
    227226 * @returns VBox status code.
    228  * @param   pVM         VM handle.
    229227 * @param   pVCpu       The VMCPU to operate on.
    230228 */
    231 PGM_SHW_DECL(int, Exit)(PVM pVM, PVMCPU pVCpu)
     229PGM_SHW_DECL(int, Exit)(PVMCPU pVCpu)
    232230{
    233231#if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
    234232    if (pVCpu->pgm.s.CTX_SUFF(pShwPageCR3))
    235233    {
     234        PVM      pVM   = pVCpu->pVMR3;
    236235        PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    237236

  • trunk/src/VBox/VMM/SELM.cpp

    r18927 r18988  
    15591559                {
    15601560                    RTGCPHYS GCPhys = NIL_RTGCPHYS;
    1561                     rc = PGMGstGetPage(pVM, pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
     1561                    rc = PGMGstGetPage(pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
    15621562                    Log(("SELMR3SyncTSS: Updating TSS ring 0 stack to %04X:%08X from %04X:%08X; TSS Phys=%VGp)\n",
    15631563                         Tss.ss0, Tss.esp0, (ssr0 & ~1), espr0,  GCPhys));
    … …  
    18931893            {
    18941894                RTGCPHYS GCPhys;
    1895                 rc = PGMGstGetPage(pVM, pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
     1895                rc = PGMGstGetPage(pVCpu, GCPtrTss, NULL, &GCPhys); AssertRC(rc);
    18961896                AssertMsgFailed(("TSS out of sync!! (%04X:%08X vs %04X:%08X (guest)) Tss=%RGv Phys=%RGp\n",
    18971897                                 (pVM->selm.s.Tss.ss1 & ~1), pVM->selm.s.Tss.esp1,

  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r18927 r18988  
    456456        PIOMMMIORANGE pMMIODst;
    457457        RTGCPHYS PhysDst;
    458         rc = PGMGstGetPage(pVM, (RTGCPTR)pu8Virt, NULL, &PhysDst);
     458        rc = PGMGstGetPage((RTGCPTR)pu8Virt, NULL, &PhysDst);
    459459        PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK;
    460460        if (    RT_SUCCESS(rc)
    … …  
    18761876            uint64_t fFlags;
    18771877            RTHCPHYS HCPhys;
    1878             rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
     1878            rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
    18791879            Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
    18801880            cb     -= PAGE_SIZE;

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r18958 r18988  
    451451     * Call the worker.
    452452     */
    453     int rc = PGM_BTH_PFN(Trap0eHandler, pVM)(pVM, pVCpu, uErr, pRegFrame, pvFault);
     453    int rc = PGM_BTH_PFN(Trap0eHandler, pVCpu)(pVM, pVCpu, uErr, pRegFrame, pvFault);
    454454    if (rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE)
    455455        rc = VINF_SUCCESS;
    … …  
    479479{
    480480    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a);
    481     int rc = PGM_BTH_PFN(PrefetchPage, pVM)(pVM, pVCpu, GCPtrPage);
     481    int rc = PGM_BTH_PFN(PrefetchPage, pVCpu)(pVM, pVCpu, GCPtrPage);
    482482    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a);
    483483    AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc));
    … …  
    535535
    536536    uint64_t fPage;
    537     int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPage, NULL);
     537    int rc = PGMGstGetPage(pVCpu, (RTGCPTR)Addr, &fPage, NULL);
    538538    if (RT_FAILURE(rc))
    539539    {
    … …  
    584584     */
    585585    uint64_t fPageGst;
    586     int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPageGst, NULL);
     586    int rc = PGMGstGetPage(pVCpu, (RTGCPTR)Addr, &fPageGst, NULL);
    587587    if (RT_FAILURE(rc))
    588588    {
    … …  
    612612         * Next step is to verify if we protected this page for dirty bit tracking or for CSAM scanning
    613613         */
    614         rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)Addr, NULL, NULL);
     614        rc = PGMShwGetPage(pVCpu, (RTGCPTR)Addr, NULL, NULL);
    615615        if (    rc == VERR_PAGE_NOT_PRESENT
    616616            ||  rc == VERR_PAGE_TABLE_NOT_PRESENT)
    … …  
    622622            Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US);
    623623            uint32_t uErr = fAccess & (X86_TRAP_PF_RW | X86_TRAP_PF_US);
    624             rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVM)(pVM, pVCpu, Addr, fPageGst, uErr);
     624            rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVCpu)(pVM, pVCpu, Addr, fPageGst, uErr);
    625625            if (rc != VINF_SUCCESS)
    626626                return rc;
    … …  
    636636    /** @note this will assert when writing to monitored pages (a bit annoying actually) */
    637637    uint64_t fPageShw;
    638     rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPageShw, NULL);
     638    rc = PGMShwGetPage(pVCpu, (RTGCPTR)Addr, &fPageShw, NULL);
    639639    if (    (rc == VERR_PAGE_NOT_PRESENT || RT_FAILURE(rc))
    640640        || (fWrite && !(fPageShw & X86_PTE_RW))
    … …  
    710710    {
    711711        if (    pgmGetMapping(pVM, GCPtrPage)
    712             &&  PGMGstGetPage(pVM, pVCpu, GCPtrPage, NULL, NULL) != VERR_PAGE_TABLE_NOT_PRESENT)
     712            &&  PGMGstGetPage(pVCpu, GCPtrPage, NULL, NULL) != VERR_PAGE_TABLE_NOT_PRESENT)
    713713        {
    714714            LogFlow(("PGMGCInvalidatePage: Conflict!\n"));
    … …  
    731731     */
    732732    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a);
    733     rc = PGM_BTH_PFN(InvalidatePage, pVM)(pVM, pVCpu, GCPtrPage);
     733    rc = PGM_BTH_PFN(InvalidatePage, pVCpu)(pVM, pVCpu, GCPtrPage);
    734734    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a);
    735735
    … …  
    782782 *
    783783 * @returns VBox status.
    784  * @param   pVM         VM Handle.
    785784 * @param   pVCpu       VMCPU handle.
    786785 * @param   GCPtr       Guest Context virtual address of the page.
    … …  
    790789 * @remark  You should use PGMMapGetPage() for pages in a mapping.
    791790 */
    792 VMMDECL(int) PGMShwGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
    793 {
    794     return PGM_SHW_PFN(GetPage,pVM)(pVM, pVCpu, GCPtr, pfFlags, pHCPhys);
     791VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
     792{
     793    return PGM_SHW_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pHCPhys);
    795794}
    796795
    … …  
    800799 *
    801800 * @returns VBox status.
    802  * @param   pVM         VM handle.
    803801 * @param   pVCpu       VMCPU handle.
    804802 * @param   GCPtr       The address of the first page.
    … …  
    807805 * @remark  You must use PGMMapSetPage() for pages in a mapping.
    808806 */
    809 VMMDECL(int) PGMShwSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
    810 {
    811     return PGMShwModifyPage(pVM, pVCpu, GCPtr, cb, fFlags, 0);
     807VMMDECL(int) PGMShwSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
     808{
     809    return PGMShwModifyPage(pVCpu, GCPtr, cb, fFlags, 0);
    812810}
    813811
    … …  
    819817 *
    820818 * @returns VBox status code.
    821  * @param   pVM         VM handle.
    822819 * @param   pVCpu       VMCPU handle.
    823820 * @param   GCPtr       Virtual address of the first page in the range.
    … …  
    828825 * @remark  You must use PGMMapModifyPage() for pages in a mapping.
    829826 */
    830 VMMDECL(int) PGMShwModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
     827VMMDECL(int) PGMShwModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
    831828{
    832829    AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#llx\n", fFlags));
    … …  
    843840     * Call worker.
    844841     */
    845     return PGM_SHW_PFN(ModifyPage, pVM)(pVM, pVCpu, GCPtr, cb, fFlags, fMask);
     842    return PGM_SHW_PFN(ModifyPage, pVCpu)(pVCpu, GCPtr, cb, fFlags, fMask);
    846843}
    847844
    … …  
    12571254 *
    12581255 * @returns VBox status.
    1259  * @param   pVM         VM Handle.
    12601256 * @param   pVCpu       VMCPU handle.
    12611257 * @param   GCPtr       Guest Context virtual address of the page.
    … …  
    12641260 *                      This is page aligned. The fact that the
    12651261 */
    1266 VMMDECL(int) PGMGstGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
    1267 {
    1268     return PGM_GST_PFN(GetPage,pVM)(pVM, pVCpu, GCPtr, pfFlags, pGCPhys);
     1262VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
     1263{
     1264    return PGM_GST_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pGCPhys);
    12691265}
    12701266
    … …  
    12751271 * @returns true if the page is present.
    12761272 * @returns false if the page is not present.
    1277  * @param   pVM         The VM handle.
    12781273 * @param   pVCpu       VMCPU handle.
    12791274 * @param   GCPtr       Address within the page.
    12801275 */
    1281 VMMDECL(bool) PGMGstIsPagePresent(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr)
    1282 {
    1283     int rc = PGMGstGetPage(pVM, pVCpu, GCPtr, NULL, NULL);
     1276VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr)
     1277{
     1278    int rc = PGMGstGetPage(pVCpu, GCPtr, NULL, NULL);
    12841279    return RT_SUCCESS(rc);
    12851280}
    … …  
    12901285 *
    12911286 * @returns VBox status.
    1292  * @param   pVM         VM handle.
    12931287 * @param   pVCpu       VMCPU handle.
    12941288 * @param   GCPtr       The address of the first page.
    … …  
    12961290 * @param   fFlags      Page flags X86_PTE_*, excluding the page mask of course.
    12971291 */
    1298 VMMDECL(int)  PGMGstSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
    1299 {
    1300     return PGMGstModifyPage(pVM, pVCpu, GCPtr, cb, fFlags, 0);
     1292VMMDECL(int)  PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
     1293{
     1294    return PGMGstModifyPage(pVCpu, GCPtr, cb, fFlags, 0);
    13011295}
    13021296
    … …  
    13081302 *
    13091303 * @returns VBox status code.
    1310  * @param   pVM         VM handle.
    13111304 * @param   pVCpu       VMCPU handle.
    13121305 * @param   GCPtr       Virtual address of the first page in the range.
    … …  
    13161309 *                      Be very CAREFUL when ~'ing constants which could be 32-bit!
    13171310 */
    1318 VMMDECL(int)  PGMGstModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
     1311VMMDECL(int)  PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
    13191312{
    13201313    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,GstModifyPage), a);
    … …  
    13381331     * Call worker.
    13391332     */
    1340     int rc = PGM_GST_PFN(ModifyPage, pVM)(pVM, pVCpu, GCPtr, cb, fFlags, fMask);
     1333    int rc = PGM_GST_PFN(ModifyPage, pVCpu)(pVCpu, GCPtr, cb, fFlags, fMask);
    13411334
    13421335    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,GstModifyPage), a);
    … …  
    16871680        RTGCPHYS GCPhysOldCR3 = pVCpu->pgm.s.GCPhysCR3;
    16881681        pVCpu->pgm.s.GCPhysCR3  = GCPhysCR3;
    1689         rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
     1682        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
    16901683        if (RT_LIKELY(rc == VINF_SUCCESS))
    16911684        {
    … …  
    17801773    {
    17811774        pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
    1782         rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
     1775        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
    17831776        AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */ /** @todo this isn't true for the mac, but we need hw to test/fix this. */
    17841777    }
    … …  
    18661859        {
    18671860            pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
    1868             rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
     1861            rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
    18691862        }
    18701863#ifdef IN_RING3
    … …  
    18861879     */
    18871880    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
    1888     rc = PGM_BTH_PFN(SyncCR3, pVM)(pVM, pVCpu, cr0, cr3, cr4, fGlobal);
     1881    rc = PGM_BTH_PFN(SyncCR3, pVCpu)(pVM, pVCpu, cr0, cr3, cr4, fGlobal);
    18891882    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
    18901883    AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc));
    … …  
    25142507              GCPtr += PAGE_SIZE)
    25152508        {
    2516             int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)GCPtr, NULL, NULL);
     2509            int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, NULL, NULL);
    25172510            if (rc != VERR_PAGE_TABLE_NOT_PRESENT)
    25182511            {
    … …  
    25442537{
    25452538    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
    2546     unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVM)(pVM, pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
     2539    unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVCpu)(pVM, pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
    25472540    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
    25482541    return cErrors;

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r18947 r18988  
    652652                RTGCPHYS   GCPhys;
    653653                uint64_t   fPageGst;
    654                 PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, &GCPhys);
     654                PGMGstGetPage(pVCpu, pvFault, &fPageGst, &GCPhys);
    655655                Log(("Page out of sync: %RGv eip=%08x PdeSrc.n.u1User=%d fPageGst=%08llx GCPhys=%RGp scan=%d\n",
    656656                     pvFault, pRegFrame->eip, PdeSrc.n.u1User, fPageGst, GCPhys, CSAMDoesPageNeedScanning(pVM, (RTRCPTR)pRegFrame->eip)));
    … …  
    661661                {
    662662                    uint64_t fPageGst;
    663                     rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
     663                    rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
    664664                    if (    RT_SUCCESS(rc)
    665665                        && !(fPageGst & X86_PTE_US))
    … …  
    787787                        RTGCPHYS GCPhys;
    788788                        uint64_t fPageGst;
    789                         rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, &GCPhys);
     789                        rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, &GCPhys);
    790790                        Assert(RT_SUCCESS(rc) && fPageGst & X86_PTE_RW);
    791791                        LogFlow(("Obsolete physical monitor page out of sync %RGv - phys %RGp flags=%08llx\n", pvFault, GCPhys, (uint64_t)fPageGst));
    792792
    793793                        uint64_t fPageShw;
    794                         rc = PGMShwGetPage(pVM, pVCpu, pvFault, &fPageShw, NULL);
     794                        rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
    795795                        AssertMsg(RT_SUCCESS(rc) && fPageShw & X86_PTE_RW, ("rc=%Rrc fPageShw=%RX64\n", rc, fPageShw));
    796796#   endif /* VBOX_STRICT */
    … …  
    806806                    {
    807807                        uint64_t fPageGst;
    808                         rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
     808                        rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
    809809                        if (    RT_SUCCESS(rc)
    810810                            && !(fPageGst & X86_PTE_RW))
    … …  
    831831                    /* Get guest page flags. */
    832832                    uint64_t fPageGst;
    833                     rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
     833                    rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
    834834                    if (RT_SUCCESS(rc))
    835835                    {
    836836                        uint64_t fPageShw;
    837                         rc = PGMShwGetPage(pVM, pVCpu, pvFault, &fPageShw, NULL);
     837                        rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
    838838
    839839                        /*
    … …  
    34043404# if !defined(IN_RING0) && PGM_GST_TYPE != PGM_TYPE_AMD64
    34053405#  if PGM_GST_TYPE == PGM_TYPE_32BIT
    3406     rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)pPGM->pGst32BitPdRC, NULL, &HCPhysShw);
     3406    rc = PGMShwGetPage(pVCpu, (RTGCPTR)pPGM->pGst32BitPdRC, NULL, &HCPhysShw);
    34073407#  else
    3408     rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)pPGM->pGstPaePdptRC, NULL, &HCPhysShw);
     3408    rc = PGMShwGetPage(pVCpu, (RTGCPTR)pPGM->pGstPaePdptRC, NULL, &HCPhysShw);
    34093409#  endif
    34103410    AssertRCReturn(rc, 1);

  • trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

    r18987 r18988  
    2525*******************************************************************************/
    2626__BEGIN_DECLS
    27 PGM_GST_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
    28 PGM_GST_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    29 PGM_GST_DECL(int, GetPDE)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
     27PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
     28PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
     29PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
    3030PGM_GST_DECL(bool, HandlerVirtualUpdate)(PVM pVM, uint32_t cr4);
    3131__END_DECLS
    … …  
    4242 *
    4343 * @returns VBox status.
    44  * @param   pVM         VM Handle.
    4544 * @param   pVCpu       The VMCPU handle.
    4645 * @param   GCPtr       Guest Context virtual address of the page. Page aligned!
    … …  
    4948 *                      This is page aligned. The fact that the
    5049 */
    51 PGM_GST_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
     50PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
    5251{
    5352#if PGM_GST_TYPE == PGM_TYPE_REAL \
    … …  
    6463#elif PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64
    6564
     65    PVM pVM = pVCpu->CTX_SUFF(pVM);
    6666    /*
    6767     * Get the PDE.
    … …  
    168168 *
    169169 * @returns VBox status code.
    170  * @param   pVM         VM handle.
    171170 * @param   pVCpu       The VMCPU handle.
    172171 * @param   GCPtr       Virtual address of the first page in the range. Page aligned!
    … …  
    175174 * @param   fMask       The AND mask - page flags X86_PTE_*.
    176175 */
    177 PGM_GST_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
     176PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
    178177{
    179178#if PGM_GST_TYPE == PGM_TYPE_32BIT \
    … …  
    181180 || PGM_GST_TYPE == PGM_TYPE_AMD64
    182181
     182    PVM pVM = pVCpu->CTX_SUFF(pVM);
    183183    for (;;)
    184184    {
    … …  
    275275 *
    276276 * @returns VBox status code.
    277  * @param   pVM         The virtual machine.
    278277 * @param   pVCpu       The VMCPU handle.
    279278 * @param   GCPtr       Guest context pointer
    280279 * @param   pPDE        Pointer to guest PDE structure
    281280 */
    282 PGM_GST_DECL(int, GetPDE)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE)
     281PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE)
    283282{
    284283#if PGM_GST_TYPE == PGM_TYPE_32BIT \

  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r18927 r18988  
    14251425            RTGCPHYS   GCPhysGst;
    14261426            uint64_t   fGst;
    1427             int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
     1427            int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
    14281428            if (    rc == VERR_PAGE_NOT_PRESENT
    14291429                ||  rc == VERR_PAGE_TABLE_NOT_PRESENT)

  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r18927 r18988  
    12831283VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
    12841284{
    1285     int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu->CTX_SUFF(pVM), pVCpu, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
     1285    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
    12861286    if (pGCPhys && RT_SUCCESS(rc))
    12871287        *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
    … …  
    13041304    PVM pVM = pVCpu->CTX_SUFF(pVM);
    13051305    RTGCPHYS GCPhys;
    1306     int rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
     1306    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
    13071307    if (RT_SUCCESS(rc))
    13081308        rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
    … …  
    13281328    VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
    13291329    RTGCPHYS GCPhys;
    1330     int rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
     1330    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
    13311331    if (RT_SUCCESS(rc))
    13321332        rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
    … …  
    23852385        memcpy(pvDst, pvSrc, cb);
    23862386        PGMPhysReleasePageMappingLock(pVM, &Lock);
    2387         rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     2387        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
    23882388        return VINF_SUCCESS;
    23892389    }
    … …  
    23922392    memcpy(pvDst, pvSrc, cbPage);
    23932393    PGMPhysReleasePageMappingLock(pVM, &Lock);
    2394     rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     2394    rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
    23952395    GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
    23962396    pvSrc = (const uint8_t *)pvSrc + cbPage;
    … …  
    24122412            memcpy(pvDst, pvSrc, cb);
    24132413            PGMPhysReleasePageMappingLock(pVM, &Lock);
    2414             rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     2414            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
    24152415            return VINF_SUCCESS;
    24162416        }
    … …  
    24192419        memcpy(pvDst, pvSrc, PAGE_SIZE);
    24202420        PGMPhysReleasePageMappingLock(pVM, &Lock);
    2421         rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     2421        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
    24222422        GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
    24232423        pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
    … …  
    24622462    {
    24632463        /* Convert virtual to physical address + flags */
    2464         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
     2464        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
    24652465        AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrSrc), rc);
    24662466        GCPhys |= (RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK;
    … …  
    24692469        if (!(fFlags & X86_PTE_A))
    24702470        {
    2471             rc = PGMGstModifyPage(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
     2471            rc = PGMGstModifyPage(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
    24722472            AssertRC(rc);
    24732473        }
    … …  
    24822482    {
    24832483        /* Convert virtual to physical address + flags */
    2484         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
     2484        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
    24852485        AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrSrc), rc);
    24862486        GCPhys |= (RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK;
    … …  
    24892489        if (!(fFlags & X86_PTE_A))
    24902490        {
    2491             rc = PGMGstModifyPage(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
     2491            rc = PGMGstModifyPage(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
    24922492            AssertRC(rc);
    24932493        }
    … …  
    25432543    {
    25442544        /* Convert virtual to physical address + flags */
    2545         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
     2545        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
    25462546        AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
    25472547        GCPhys |= (RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK;
    … …  
    25542554        if ((fFlags & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
    25552555        {
    2556             rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
     2556            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
    25572557            AssertRC(rc);
    25582558        }
    … …  
    25672567    {
    25682568        /* Convert virtual to physical address + flags */
    2569         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
     2569        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
    25702570        AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
    25712571        GCPhys |= (RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK;
    … …  
    25782578        if ((fFlags & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
    25792579        {
    2580             rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
     2580            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
    25812581            AssertRC(rc);
    25822582        }
    … …  
    26452645        RTGCPHYS GCPhys;
    26462646        uint64_t fFlags;
    2647         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags, &GCPhys);
     2647        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags, &GCPhys);
    26482648        if (RT_SUCCESS(rc))
    26492649        {
    … …  
    26682668            if (!(fFlags & X86_PTE_A))
    26692669            {
    2670                 rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2670                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    26712671                AssertRC(rc);
    26722672            }
    … …  
    26842684        uint64_t fFlags2;
    26852685        RTGCPHYS GCPhys2;
    2686         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
     2686        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
    26872687        if (RT_SUCCESS(rc))
    2688             rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
     2688            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
    26892689        if (RT_SUCCESS(rc))
    26902690        {
    … …  
    27212721            if (!(fFlags1 & X86_PTE_A))
    27222722            {
    2723                 rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2723                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    27242724                AssertRC(rc);
    27252725            }
    27262726            if (!(fFlags2 & X86_PTE_A))
    27272727            {
    2728                 rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2728                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    27292729                AssertRC(rc);
    27302730            }
    … …  
    28112811        RTGCPHYS    GCPhys;
    28122812        uint64_t    fFlags;
    2813         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags, &GCPhys);
     2813        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags, &GCPhys);
    28142814        if (RT_SUCCESS(rc))
    28152815        {
    … …  
    28402840                {
    28412841                    /** @todo access bit emulation isn't 100% correct. */
    2842                     rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2842                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    28432843                    AssertRC(rc);
    28442844                }
    … …  
    28572857        uint64_t    fFlags2;
    28582858        RTGCPHYS    GCPhys2;
    2859         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
     2859        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
    28602860        if (RT_SUCCESS(rc))
    28612861        {
    2862             rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
     2862            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
    28632863            if (RT_SUCCESS(rc))
    28642864            {
    … …  
    29052905                    if (!(fFlags1 & X86_PTE_A))
    29062906                    {
    2907                         rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2907                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    29082908                        AssertRC(rc);
    29092909                    }
    29102910                    if (!(fFlags2 & X86_PTE_A))
    29112911                    {
    2912                         rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
     2912                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
    29132913                        AssertRC(rc);
    29142914                    }
    … …  
    30023002        RTGCPHYS    GCPhys;
    30033003        uint64_t    fFlags;
    3004         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst, &fFlags, &GCPhys);
     3004        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst, &fFlags, &GCPhys);
    30053005        if (RT_SUCCESS(rc))
    30063006        {
    … …  
    30333033                {
    30343034                    /** @todo dirty & access bit emulation isn't 100% correct. */
    3035                     rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
     3035                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
    30363036                    AssertRC(rc);
    30373037                }
    … …  
    30513051        uint64_t    fFlags2;
    30523052        RTGCPHYS    GCPhys2;
    3053         rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst, &fFlags1, &GCPhys1);
     3053        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst, &fFlags1, &GCPhys1);
    30543054        if (RT_SUCCESS(rc))
    30553055        {
    3056             rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst + cb1, &fFlags2, &GCPhys2);
     3056            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst + cb1, &fFlags2, &GCPhys2);
    30573057            if (RT_SUCCESS(rc))
    30583058            {
    … …  
    31023102                    if (!(fFlags1 & (X86_PTE_A | X86_PTE_RW)))
    31033103                    {
    3104                         rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
     3104                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
    31053105                        AssertRC(rc);
    31063106                    }
    31073107                    if (!(fFlags2 & (X86_PTE_A | X86_PTE_RW)))
    31083108                    {
    3109                         rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
     3109                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
    31103110                        AssertRC(rc);
    31113111                    }

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r18986 r18988  
    38243824
    38253825    /* Exit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
    3826     rc = PGM_SHW_PFN(Exit, pVCpu)(pVM, pVCpu);
     3826    rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
    38273827    AssertRC(rc);
    38283828

  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r18927 r18988  
    121121*******************************************************************************/
    122122__BEGIN_DECLS
    123 PGM_SHW_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
    124 PGM_SHW_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask);
     123PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
     124PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask);
    125125__END_DECLS
    126126
    … …  
    131131 *
    132132 * @returns VBox status.
    133  * @param   pVM         VM Handle.
    134133 * @param   pVCpu       The VMCPU handle.
    135134 * @param   GCPtr       Guest Context virtual address of the page.
    … …  
    139138 * @remark  You should use PGMMapGetPage() for pages in a mapping.
    140139 */
    141 PGM_SHW_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
     140PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
    142141{
    143142#if PGM_SHW_TYPE == PGM_TYPE_NESTED
    … …  
    145144
    146145#else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
     146    PVM pVM = pVCpu->CTX_SUFF(pVM);
     147
    147148    /*
    148149     * Get the PDE.
    … …  
    269270 *
    270271 * @returns VBox status code.
    271  * @param   pVM         VM handle.
    272272 * @param   pVCpu       The VMCPU handle.
    273273 * @param   GCPtr       Virtual address of the first page in the range. Page aligned!
    … …  
    278278 * @remark  You must use PGMMapModifyPage() for pages in a mapping.
    279279 */
    280 PGM_SHW_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
     280PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
    281281{
    282282# if PGM_SHW_TYPE == PGM_TYPE_NESTED
    … …  
    284284
    285285# else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
     286    PVM pVM = pVCpu->CTX_SUFF(pVM);
    286287    int rc;
    287288

  • trunk/src/VBox/VMM/VMMGC/MMRamGC.cpp

    r18927 r18988  
    139139     * And mark the relevant guest page as accessed and dirty.
    140140     */
    141     PGMGstModifyPage(pVM, VMMGetCpu0(pVM), (RTGCPTR)(RTRCUINTPTR)pDst, cb, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
     141    PGMGstModifyPage(VMMGetCpu0(pVM), (RTGCPTR)(RTRCUINTPTR)pDst, cb, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
    142142
    143143    return rc;
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