Changeset 18988 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Apr 17, 2009 1:00:59 PM (16 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

46080

Message:

PGM api changes

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IOMAllMMIO.cpp (modified) (2 diffs)
• PGMAll.cpp (modified) (30 diffs)
• PGMAllBth.h (modified) (6 diffs)
• PGMAllGst.h (modified) (8 diffs)
• PGMAllHandler.cpp (modified) (1 diff)
• PGMAllPhys.cpp (modified) (27 diffs)
• PGMAllPool.cpp (modified) (1 diff)
• PGMAllShw.h (modified) (7 diffs)

trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp ¶

@@ -456 +456 @@
         PIOMMMIORANGE pMMIODst;
         RTGCPHYS PhysDst;
-        rc = PGMGstGetPage(pVM, (RTGCPTR)pu8Virt, NULL, &PhysDst);
+        rc = PGMGstGetPage((RTGCPTR)pu8Virt, NULL, &PhysDst);
         PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK;
         if (    RT_SUCCESS(rc)
@@ -1876 +1876 @@
             uint64_t fFlags;
             RTHCPHYS HCPhys;
-            rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
+            rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys);
             Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT);
             cb     -= PAGE_SIZE;

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp ¶

@@ -451 +451 @@
      * Call the worker.
      */
-    int rc = PGM_BTH_PFN(Trap0eHandler, pVM)(pVM, pVCpu, uErr, pRegFrame, pvFault);
+    int rc = PGM_BTH_PFN(Trap0eHandler, pVCpu)(pVM, pVCpu, uErr, pRegFrame, pvFault);
     if (rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE)
         rc = VINF_SUCCESS;
@@ -479 +479 @@
 {
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a);
-    int rc = PGM_BTH_PFN(PrefetchPage, pVM)(pVM, pVCpu, GCPtrPage);
+    int rc = PGM_BTH_PFN(PrefetchPage, pVCpu)(pVM, pVCpu, GCPtrPage);
     STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a);
     AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc));
@@ -535 +535 @@
 
     uint64_t fPage;
-    int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPage, NULL);
+    int rc = PGMGstGetPage(pVCpu, (RTGCPTR)Addr, &fPage, NULL);
     if (RT_FAILURE(rc))
     {
@@ -584 +584 @@
      */
     uint64_t fPageGst;
-    int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPageGst, NULL);
+    int rc = PGMGstGetPage(pVCpu, (RTGCPTR)Addr, &fPageGst, NULL);
     if (RT_FAILURE(rc))
     {
@@ -612 +612 @@
          * Next step is to verify if we protected this page for dirty bit tracking or for CSAM scanning
          */
-        rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)Addr, NULL, NULL);
+        rc = PGMShwGetPage(pVCpu, (RTGCPTR)Addr, NULL, NULL);
         if (    rc == VERR_PAGE_NOT_PRESENT
             ||  rc == VERR_PAGE_TABLE_NOT_PRESENT)
@@ -622 +622 @@
             Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US);
             uint32_t uErr = fAccess & (X86_TRAP_PF_RW | X86_TRAP_PF_US);
-            rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVM)(pVM, pVCpu, Addr, fPageGst, uErr);
+            rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVCpu)(pVM, pVCpu, Addr, fPageGst, uErr);
             if (rc != VINF_SUCCESS)
                 return rc;
@@ -636 +636 @@
     /** @note this will assert when writing to monitored pages (a bit annoying actually) */
     uint64_t fPageShw;
-    rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)Addr, &fPageShw, NULL);
+    rc = PGMShwGetPage(pVCpu, (RTGCPTR)Addr, &fPageShw, NULL);
     if (    (rc == VERR_PAGE_NOT_PRESENT || RT_FAILURE(rc))
         || (fWrite && !(fPageShw & X86_PTE_RW))
@@ -710 +710 @@
     {
         if (    pgmGetMapping(pVM, GCPtrPage)
-            &&  PGMGstGetPage(pVM, pVCpu, GCPtrPage, NULL, NULL) != VERR_PAGE_TABLE_NOT_PRESENT)
+            &&  PGMGstGetPage(pVCpu, GCPtrPage, NULL, NULL) != VERR_PAGE_TABLE_NOT_PRESENT)
         {
             LogFlow(("PGMGCInvalidatePage: Conflict!\n"));
@@ -731 +731 @@
      */
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a);
-    rc = PGM_BTH_PFN(InvalidatePage, pVM)(pVM, pVCpu, GCPtrPage);
+    rc = PGM_BTH_PFN(InvalidatePage, pVCpu)(pVM, pVCpu, GCPtrPage);
     STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a);
 
@@ -782 +782 @@
  *
  * @returns VBox status.
- * @param   pVM         VM Handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       Guest Context virtual address of the page.
@@ -790 +789 @@
  * @remark  You should use PGMMapGetPage() for pages in a mapping.
  */
-VMMDECL(int) PGMShwGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
-{
-    return PGM_SHW_PFN(GetPage,pVM)(pVM, pVCpu, GCPtr, pfFlags, pHCPhys);
+VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
+{
+    return PGM_SHW_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pHCPhys);
 }
 
@@ -800 +799 @@
  *
  * @returns VBox status.
- * @param   pVM         VM handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       The address of the first page.
@@ -807 +805 @@
  * @remark  You must use PGMMapSetPage() for pages in a mapping.
  */
-VMMDECL(int) PGMShwSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
-{
-    return PGMShwModifyPage(pVM, pVCpu, GCPtr, cb, fFlags, 0);
+VMMDECL(int) PGMShwSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
+{
+    return PGMShwModifyPage(pVCpu, GCPtr, cb, fFlags, 0);
 }
 
@@ -819 +817 @@
  *
  * @returns VBox status code.
- * @param   pVM         VM handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       Virtual address of the first page in the range.
@@ -828 +825 @@
  * @remark  You must use PGMMapModifyPage() for pages in a mapping.
  */
-VMMDECL(int) PGMShwModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
+VMMDECL(int) PGMShwModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
 {
     AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#llx\n", fFlags));
@@ -843 +840 @@
      * Call worker.
      */
-    return PGM_SHW_PFN(ModifyPage, pVM)(pVM, pVCpu, GCPtr, cb, fFlags, fMask);
+    return PGM_SHW_PFN(ModifyPage, pVCpu)(pVCpu, GCPtr, cb, fFlags, fMask);
 }
 
@@ -1257 +1254 @@
  *
  * @returns VBox status.
- * @param   pVM         VM Handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       Guest Context virtual address of the page.
@@ -1264 +1260 @@
  *                      This is page aligned. The fact that the
  */
-VMMDECL(int) PGMGstGetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
-{
-    return PGM_GST_PFN(GetPage,pVM)(pVM, pVCpu, GCPtr, pfFlags, pGCPhys);
+VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
+{
+    return PGM_GST_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pGCPhys);
 }
 
@@ -1275 +1271 @@
  * @returns true if the page is present.
  * @returns false if the page is not present.
- * @param   pVM         The VM handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       Address within the page.
  */
-VMMDECL(bool) PGMGstIsPagePresent(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr)
-{
-    int rc = PGMGstGetPage(pVM, pVCpu, GCPtr, NULL, NULL);
+VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr)
+{
+    int rc = PGMGstGetPage(pVCpu, GCPtr, NULL, NULL);
     return RT_SUCCESS(rc);
 }
@@ -1290 +1285 @@
  *
  * @returns VBox status.
- * @param   pVM         VM handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       The address of the first page.
@@ -1296 +1290 @@
  * @param   fFlags      Page flags X86_PTE_*, excluding the page mask of course.
  */
-VMMDECL(int)  PGMGstSetPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
-{
-    return PGMGstModifyPage(pVM, pVCpu, GCPtr, cb, fFlags, 0);
+VMMDECL(int)  PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
+{
+    return PGMGstModifyPage(pVCpu, GCPtr, cb, fFlags, 0);
 }
 
@@ -1308 +1302 @@
  *
  * @returns VBox status code.
- * @param   pVM         VM handle.
  * @param   pVCpu       VMCPU handle.
  * @param   GCPtr       Virtual address of the first page in the range.
@@ -1316 +1309 @@
  *                      Be very CAREFUL when ~'ing constants which could be 32-bit!
  */
-VMMDECL(int)  PGMGstModifyPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
+VMMDECL(int)  PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
 {
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,GstModifyPage), a);
@@ -1338 +1331 @@
      * Call worker.
      */
-    int rc = PGM_GST_PFN(ModifyPage, pVM)(pVM, pVCpu, GCPtr, cb, fFlags, fMask);
+    int rc = PGM_GST_PFN(ModifyPage, pVCpu)(pVCpu, GCPtr, cb, fFlags, fMask);
 
     STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,GstModifyPage), a);
@@ -1687 +1680 @@
         RTGCPHYS GCPhysOldCR3 = pVCpu->pgm.s.GCPhysCR3;
         pVCpu->pgm.s.GCPhysCR3  = GCPhysCR3;
-        rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
+        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
         if (RT_LIKELY(rc == VINF_SUCCESS))
         {
@@ -1780 +1773 @@
     {
         pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
-        rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
+        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
         AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */ /** @todo this isn't true for the mac, but we need hw to test/fix this. */
     }
@@ -1866 +1859 @@
         {
             pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
-            rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVCpu, GCPhysCR3);
+            rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVM, pVCpu, GCPhysCR3);
         }
 #ifdef IN_RING3
@@ -1886 +1879 @@
      */
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
-    rc = PGM_BTH_PFN(SyncCR3, pVM)(pVM, pVCpu, cr0, cr3, cr4, fGlobal);
+    rc = PGM_BTH_PFN(SyncCR3, pVCpu)(pVM, pVCpu, cr0, cr3, cr4, fGlobal);
     STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
     AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc));
@@ -2514 +2507 @@
               GCPtr += PAGE_SIZE)
         {
-            int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)GCPtr, NULL, NULL);
+            int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, NULL, NULL);
             if (rc != VERR_PAGE_TABLE_NOT_PRESENT)
             {
@@ -2544 +2537 @@
 {
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
-    unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVM)(pVM, pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
+    unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVCpu)(pVM, pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);
     STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a);
     return cErrors;

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h ¶

@@ -652 +652 @@
                 RTGCPHYS   GCPhys;
                 uint64_t   fPageGst;
-                PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, &GCPhys);
+                PGMGstGetPage(pVCpu, pvFault, &fPageGst, &GCPhys);
                 Log(("Page out of sync: %RGv eip=%08x PdeSrc.n.u1User=%d fPageGst=%08llx GCPhys=%RGp scan=%d\n",
                      pvFault, pRegFrame->eip, PdeSrc.n.u1User, fPageGst, GCPhys, CSAMDoesPageNeedScanning(pVM, (RTRCPTR)pRegFrame->eip)));
@@ -661 +661 @@
                 {
                     uint64_t fPageGst;
-                    rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
+                    rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
                     if (    RT_SUCCESS(rc)
                         && !(fPageGst & X86_PTE_US))
@@ -787 +787 @@
                         RTGCPHYS GCPhys;
                         uint64_t fPageGst;
-                        rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, &GCPhys);
+                        rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, &GCPhys);
                         Assert(RT_SUCCESS(rc) && fPageGst & X86_PTE_RW);
                         LogFlow(("Obsolete physical monitor page out of sync %RGv - phys %RGp flags=%08llx\n", pvFault, GCPhys, (uint64_t)fPageGst));
 
                         uint64_t fPageShw;
-                        rc = PGMShwGetPage(pVM, pVCpu, pvFault, &fPageShw, NULL);
+                        rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
                         AssertMsg(RT_SUCCESS(rc) && fPageShw & X86_PTE_RW, ("rc=%Rrc fPageShw=%RX64\n", rc, fPageShw));
 #   endif /* VBOX_STRICT */
@@ -806 +806 @@
                     {
                         uint64_t fPageGst;
-                        rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
+                        rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
                         if (    RT_SUCCESS(rc)
                             && !(fPageGst & X86_PTE_RW))
@@ -831 +831 @@
                     /* Get guest page flags. */
                     uint64_t fPageGst;
-                    rc = PGMGstGetPage(pVM, pVCpu, pvFault, &fPageGst, NULL);
+                    rc = PGMGstGetPage(pVCpu, pvFault, &fPageGst, NULL);
                     if (RT_SUCCESS(rc))
                     {
                         uint64_t fPageShw;
-                        rc = PGMShwGetPage(pVM, pVCpu, pvFault, &fPageShw, NULL);
+                        rc = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL);
 
                         /*
@@ -3404 +3404 @@
 # if !defined(IN_RING0) && PGM_GST_TYPE != PGM_TYPE_AMD64
 #  if PGM_GST_TYPE == PGM_TYPE_32BIT
-    rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)pPGM->pGst32BitPdRC, NULL, &HCPhysShw);
+    rc = PGMShwGetPage(pVCpu, (RTGCPTR)pPGM->pGst32BitPdRC, NULL, &HCPhysShw);
 #  else
-    rc = PGMShwGetPage(pVM, pVCpu, (RTGCPTR)pPGM->pGstPaePdptRC, NULL, &HCPhysShw);
+    rc = PGMShwGetPage(pVCpu, (RTGCPTR)pPGM->pGstPaePdptRC, NULL, &HCPhysShw);
 #  endif
     AssertRCReturn(rc, 1);

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h ¶

@@ -25 +25 @@
 *******************************************************************************/
 __BEGIN_DECLS
-PGM_GST_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
-PGM_GST_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
-PGM_GST_DECL(int, GetPDE)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
+PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
+PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
+PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE);
 PGM_GST_DECL(bool, HandlerVirtualUpdate)(PVM pVM, uint32_t cr4);
 __END_DECLS
@@ -42 +42 @@
  *
  * @returns VBox status.
- * @param   pVM         VM Handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   GCPtr       Guest Context virtual address of the page. Page aligned!
@@ -49 +48 @@
  *                      This is page aligned. The fact that the
  */
-PGM_GST_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
+PGM_GST_DECL(int, GetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
 {
 #if PGM_GST_TYPE == PGM_TYPE_REAL \
@@ -64 +63 @@
 #elif PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64
 
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
     /*
      * Get the PDE.
@@ -168 +168 @@
  *
  * @returns VBox status code.
- * @param   pVM         VM handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   GCPtr       Virtual address of the first page in the range. Page aligned!
@@ -175 +174 @@
  * @param   fMask       The AND mask - page flags X86_PTE_*.
  */
-PGM_GST_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
+PGM_GST_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
 {
 #if PGM_GST_TYPE == PGM_TYPE_32BIT \
@@ -181 +180 @@
  || PGM_GST_TYPE == PGM_TYPE_AMD64
 
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
     for (;;)
     {
@@ -275 +275 @@
  *
  * @returns VBox status code.
- * @param   pVM         The virtual machine.
  * @param   pVCpu       The VMCPU handle.
  * @param   GCPtr       Guest context pointer
  * @param   pPDE        Pointer to guest PDE structure
  */
-PGM_GST_DECL(int, GetPDE)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE)
+PGM_GST_DECL(int, GetPDE)(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDEPAE pPDE)
 {
 #if PGM_GST_TYPE == PGM_TYPE_32BIT \

trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp ¶

@@ -1425 +1425 @@
             RTGCPHYS   GCPhysGst;
             uint64_t   fGst;
-            int rc = PGMGstGetPage(pVM, pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
+            int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
             if (    rc == VERR_PAGE_NOT_PRESENT
                 ||  rc == VERR_PAGE_TABLE_NOT_PRESENT)

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp ¶

@@ -1283 +1283 @@
 VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
 {
-    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu->CTX_SUFF(pVM), pVCpu, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
+    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
     if (pGCPhys && RT_SUCCESS(rc))
         *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
@@ -1304 +1304 @@
     PVM pVM = pVCpu->CTX_SUFF(pVM);
     RTGCPHYS GCPhys;
-    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
+    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
     if (RT_SUCCESS(rc))
         rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
@@ -1328 +1328 @@
     VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
     RTGCPHYS GCPhys;
-    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
+    int rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
     if (RT_SUCCESS(rc))
         rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
@@ -2385 +2385 @@
         memcpy(pvDst, pvSrc, cb);
         PGMPhysReleasePageMappingLock(pVM, &Lock);
-        rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
+        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
         return VINF_SUCCESS;
     }
@@ -2392 +2392 @@
     memcpy(pvDst, pvSrc, cbPage);
     PGMPhysReleasePageMappingLock(pVM, &Lock);
-    rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
+    rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
     pvSrc = (const uint8_t *)pvSrc + cbPage;
@@ -2412 +2412 @@
             memcpy(pvDst, pvSrc, cb);
             PGMPhysReleasePageMappingLock(pVM, &Lock);
-            rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
+            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
             return VINF_SUCCESS;
         }
@@ -2419 +2419 @@
         memcpy(pvDst, pvSrc, PAGE_SIZE);
         PGMPhysReleasePageMappingLock(pVM, &Lock);
-        rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
+        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
         GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
         pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
@@ -2462 +2462 @@
     {
         /* Convert virtual to physical address + flags */
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
         AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrSrc), rc);
         GCPhys |= (RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK;
@@ -2469 +2469 @@
         if (!(fFlags & X86_PTE_A))
         {
-            rc = PGMGstModifyPage(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
+            rc = PGMGstModifyPage(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
             AssertRC(rc);
         }
@@ -2482 +2482 @@
     {
         /* Convert virtual to physical address + flags */
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrSrc, &fFlags, &GCPhys);
         AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrSrc), rc);
         GCPhys |= (RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK;
@@ -2489 +2489 @@
         if (!(fFlags & X86_PTE_A))
         {
-            rc = PGMGstModifyPage(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
+            rc = PGMGstModifyPage(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
             AssertRC(rc);
         }
@@ -2543 +2543 @@
     {
         /* Convert virtual to physical address + flags */
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
         AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
         GCPhys |= (RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK;
@@ -2554 +2554 @@
         if ((fFlags & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
         {
-            rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
+            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
             AssertRC(rc);
         }
@@ -2567 +2567 @@
     {
         /* Convert virtual to physical address + flags */
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, (RTGCUINTPTR)GCPtrDst, &fFlags, &GCPhys);
         AssertMsgRCReturn(rc, ("GetPage failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
         GCPhys |= (RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK;
@@ -2578 +2578 @@
         if ((fFlags & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
         {
-            rc = PGMGstModifyPage(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
+            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
             AssertRC(rc);
         }
@@ -2645 +2645 @@
         RTGCPHYS GCPhys;
         uint64_t fFlags;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags, &GCPhys);
         if (RT_SUCCESS(rc))
         {
@@ -2668 +2668 @@
             if (!(fFlags & X86_PTE_A))
             {
-                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                 AssertRC(rc);
             }
@@ -2684 +2684 @@
         uint64_t fFlags2;
         RTGCPHYS GCPhys2;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
         if (RT_SUCCESS(rc))
-            rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
+            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
         if (RT_SUCCESS(rc))
         {
@@ -2721 +2721 @@
             if (!(fFlags1 & X86_PTE_A))
             {
-                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                 AssertRC(rc);
             }
             if (!(fFlags2 & X86_PTE_A))
             {
-                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                 AssertRC(rc);
             }
@@ -2811 +2811 @@
         RTGCPHYS    GCPhys;
         uint64_t    fFlags;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags, &GCPhys);
         if (RT_SUCCESS(rc))
         {
@@ -2840 +2840 @@
                 {
                     /** @todo access bit emulation isn't 100% correct. */
-                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                     AssertRC(rc);
                 }
@@ -2857 +2857 @@
         uint64_t    fFlags2;
         RTGCPHYS    GCPhys2;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc, &fFlags1, &GCPhys1);
         if (RT_SUCCESS(rc))
         {
-            rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
+            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
             if (RT_SUCCESS(rc))
             {
@@ -2905 +2905 @@
                     if (!(fFlags1 & X86_PTE_A))
                     {
-                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                         AssertRC(rc);
                     }
                     if (!(fFlags2 & X86_PTE_A))
                     {
-                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
+                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
                         AssertRC(rc);
                     }
@@ -3002 +3002 @@
         RTGCPHYS    GCPhys;
         uint64_t    fFlags;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst, &fFlags, &GCPhys);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst, &fFlags, &GCPhys);
         if (RT_SUCCESS(rc))
         {
@@ -3033 +3033 @@
                 {
                     /** @todo dirty & access bit emulation isn't 100% correct. */
-                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
+                    rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
                     AssertRC(rc);
                 }
@@ -3051 +3051 @@
         uint64_t    fFlags2;
         RTGCPHYS    GCPhys2;
-        rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst, &fFlags1, &GCPhys1);
+        rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst, &fFlags1, &GCPhys1);
         if (RT_SUCCESS(rc))
         {
-            rc = PGM_GST_PFN(GetPage,pVCpu)(pVM, pVCpu, GCPtrDst + cb1, &fFlags2, &GCPhys2);
+            rc = PGM_GST_PFN(GetPage,pVCpu)(pVCpu, GCPtrDst + cb1, &fFlags2, &GCPhys2);
             if (RT_SUCCESS(rc))
             {
@@ -3102 +3102 @@
                     if (!(fFlags1 & (X86_PTE_A | X86_PTE_RW)))
                     {
-                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
+                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
                         AssertRC(rc);
                     }
                     if (!(fFlags2 & (X86_PTE_A | X86_PTE_RW)))
                     {
-                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVM, pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
+                        rc = PGM_GST_PFN(ModifyPage,pVCpu)(pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
                         AssertRC(rc);
                     }

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp ¶

@@ -3824 +3824 @@
 
     /* Exit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
-    rc = PGM_SHW_PFN(Exit, pVCpu)(pVM, pVCpu);
+    rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
     AssertRC(rc);
 

trunk/src/VBox/VMM/VMMAll/PGMAllShw.h ¶

@@ -121 +121 @@
 *******************************************************************************/
 __BEGIN_DECLS
-PGM_SHW_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
-PGM_SHW_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask);
+PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
+PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask);
 __END_DECLS
 
@@ -131 +131 @@
  *
  * @returns VBox status.
- * @param   pVM         VM Handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   GCPtr       Guest Context virtual address of the page.
@@ -139 +138 @@
  * @remark  You should use PGMMapGetPage() for pages in a mapping.
  */
-PGM_SHW_DECL(int, GetPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
+PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
 {
 #if PGM_SHW_TYPE == PGM_TYPE_NESTED
@@ -145 +144 @@
 
 #else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+
     /*
      * Get the PDE.
@@ -269 +270 @@
  *
  * @returns VBox status code.
- * @param   pVM         VM handle.
  * @param   pVCpu       The VMCPU handle.
  * @param   GCPtr       Virtual address of the first page in the range. Page aligned!
@@ -278 +278 @@
  * @remark  You must use PGMMapModifyPage() for pages in a mapping.
  */
-PGM_SHW_DECL(int, ModifyPage)(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
+PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
 {
 # if PGM_SHW_TYPE == PGM_TYPE_NESTED
@@ -284 +284 @@
 
 # else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
     int rc;