Changeset 18992 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Apr 17, 2009 1:51:56 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 23 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/EM.cpp
r18988 r18992 2369 2369 */ 2370 2370 case VINF_PGM_CHANGE_MODE: 2371 rc = PGMChangeMode(pV M, pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER);2371 rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER); 2372 2372 if (rc == VINF_SUCCESS) 2373 2373 rc = VINF_EM_RESCHEDULE; … … 2607 2607 && CSAMIsEnabled(pVM)) 2608 2608 { 2609 int rc = PGMSyncCR3(pV M, pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));2609 int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 2610 2610 if (RT_FAILURE(rc)) 2611 2611 return rc; … … 2632 2632 if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL)) 2633 2633 { 2634 int rc = PGMSyncCR3(pV M, pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));2634 int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 2635 2635 if (RT_FAILURE(rc)) 2636 2636 return rc; … … 2640 2640 /* Prefetch pages for EIP and ESP. */ 2641 2641 /** @todo This is rather expensive. Should investigate if it really helps at all. */ 2642 rc = PGMPrefetchPage(pV M, pVCpu, SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));2642 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip)); 2643 2643 if (rc == VINF_SUCCESS) 2644 rc = PGMPrefetchPage(pV M, pVCpu, SELMToFlat(pVM, DIS_SELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));2644 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DIS_SELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp)); 2645 2645 if (rc != VINF_SUCCESS) 2646 2646 { … … 2650 2650 return rc; 2651 2651 } 2652 rc = PGMSyncCR3(pV M, pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));2652 rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 2653 2653 if (RT_FAILURE(rc)) 2654 2654 return rc; -
trunk/src/VBox/VMM/PATM/CSAM.cpp
r18988 r18992 1667 1667 1668 1668 /* Prefetch it in case it's not there yet. */ 1669 rc = PGMPrefetchPage(pV M, pVCpu, GCPtr);1669 rc = PGMPrefetchPage(pVCpu, GCPtr); 1670 1670 AssertRC(rc); 1671 1671 … … 1779 1779 1780 1780 /* Prefetch it in case it's not there yet. */ 1781 rc = PGMPrefetchPage(pV M, pVCpu, pPageAddrGC);1781 rc = PGMPrefetchPage(pVCpu, pPageAddrGC); 1782 1782 AssertRC(rc); 1783 1783 … … 1800 1800 1801 1801 /* Prefetch it in case it's not there yet. */ 1802 rc = PGMPrefetchPage(pV M, pVCpu, pPageAddrGC);1802 rc = PGMPrefetchPage(pVCpu, pPageAddrGC); 1803 1803 AssertRC(rc); 1804 1804 … … 1823 1823 { 1824 1824 /* Prefetch it in case it's not there yet. */ 1825 rc = PGMPrefetchPage(pV M, pVCpu, pPageAddrGC);1825 rc = PGMPrefetchPage(pVCpu, pPageAddrGC); 1826 1826 AssertRC(rc); 1827 1827 /* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */ -
trunk/src/VBox/VMM/PGM.cpp
r18988 r18992 1988 1988 PGM_SHW_PFN(Relocate, pVCpu)(pVCpu, offDelta); 1989 1989 PGM_GST_PFN(Relocate, pVCpu)(pVCpu, offDelta); 1990 PGM_BTH_PFN(Relocate, pVCpu)(pV M, pVCpu, offDelta);1990 PGM_BTH_PFN(Relocate, pVCpu)(pVCpu, offDelta); 1991 1991 } 1992 1992 … … 3903 3903 { 3904 3904 case PGMMODE_32_BIT: 3905 rc2 = PGM_BTH_NAME_32BIT_REAL(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3905 rc2 = PGM_BTH_NAME_32BIT_REAL(Enter)(pVCpu, NIL_RTGCPHYS); 3906 3906 break; 3907 3907 case PGMMODE_PAE: 3908 3908 case PGMMODE_PAE_NX: 3909 rc2 = PGM_BTH_NAME_PAE_REAL(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3909 rc2 = PGM_BTH_NAME_PAE_REAL(Enter)(pVCpu, NIL_RTGCPHYS); 3910 3910 break; 3911 3911 case PGMMODE_NESTED: 3912 rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3912 rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pVCpu, NIL_RTGCPHYS); 3913 3913 break; 3914 3914 case PGMMODE_EPT: 3915 rc2 = PGM_BTH_NAME_EPT_REAL(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3915 rc2 = PGM_BTH_NAME_EPT_REAL(Enter)(pVCpu, NIL_RTGCPHYS); 3916 3916 break; 3917 3917 case PGMMODE_AMD64: … … 3927 3927 { 3928 3928 case PGMMODE_32_BIT: 3929 rc2 = PGM_BTH_NAME_32BIT_PROT(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3929 rc2 = PGM_BTH_NAME_32BIT_PROT(Enter)(pVCpu, NIL_RTGCPHYS); 3930 3930 break; 3931 3931 case PGMMODE_PAE: 3932 3932 case PGMMODE_PAE_NX: 3933 rc2 = PGM_BTH_NAME_PAE_PROT(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3933 rc2 = PGM_BTH_NAME_PAE_PROT(Enter)(pVCpu, NIL_RTGCPHYS); 3934 3934 break; 3935 3935 case PGMMODE_NESTED: 3936 rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3936 rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pVCpu, NIL_RTGCPHYS); 3937 3937 break; 3938 3938 case PGMMODE_EPT: 3939 rc2 = PGM_BTH_NAME_EPT_PROT(Enter)(pV M, pVCpu, NIL_RTGCPHYS);3939 rc2 = PGM_BTH_NAME_EPT_PROT(Enter)(pVCpu, NIL_RTGCPHYS); 3940 3940 break; 3941 3941 case PGMMODE_AMD64: … … 3952 3952 { 3953 3953 case PGMMODE_32_BIT: 3954 rc2 = PGM_BTH_NAME_32BIT_32BIT(Enter)(pV M, pVCpu, GCPhysCR3);3954 rc2 = PGM_BTH_NAME_32BIT_32BIT(Enter)(pVCpu, GCPhysCR3); 3955 3955 break; 3956 3956 case PGMMODE_PAE: 3957 3957 case PGMMODE_PAE_NX: 3958 rc2 = PGM_BTH_NAME_PAE_32BIT(Enter)(pV M, pVCpu, GCPhysCR3);3958 rc2 = PGM_BTH_NAME_PAE_32BIT(Enter)(pVCpu, GCPhysCR3); 3959 3959 break; 3960 3960 case PGMMODE_NESTED: 3961 rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pV M, pVCpu, GCPhysCR3);3961 rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pVCpu, GCPhysCR3); 3962 3962 break; 3963 3963 case PGMMODE_EPT: 3964 rc2 = PGM_BTH_NAME_EPT_32BIT(Enter)(pV M, pVCpu, GCPhysCR3);3964 rc2 = PGM_BTH_NAME_EPT_32BIT(Enter)(pVCpu, GCPhysCR3); 3965 3965 break; 3966 3966 case PGMMODE_AMD64: … … 3987 3987 case PGMMODE_PAE: 3988 3988 case PGMMODE_PAE_NX: 3989 rc2 = PGM_BTH_NAME_PAE_PAE(Enter)(pV M, pVCpu, GCPhysCR3);3989 rc2 = PGM_BTH_NAME_PAE_PAE(Enter)(pVCpu, GCPhysCR3); 3990 3990 break; 3991 3991 case PGMMODE_NESTED: 3992 rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pV M, pVCpu, GCPhysCR3);3992 rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pVCpu, GCPhysCR3); 3993 3993 break; 3994 3994 case PGMMODE_EPT: 3995 rc2 = PGM_BTH_NAME_EPT_PAE(Enter)(pV M, pVCpu, GCPhysCR3);3995 rc2 = PGM_BTH_NAME_EPT_PAE(Enter)(pVCpu, GCPhysCR3); 3996 3996 break; 3997 3997 case PGMMODE_32_BIT: … … 4013 4013 case PGMMODE_AMD64: 4014 4014 case PGMMODE_AMD64_NX: 4015 rc2 = PGM_BTH_NAME_AMD64_AMD64(Enter)(pV M, pVCpu, GCPhysCR3);4015 rc2 = PGM_BTH_NAME_AMD64_AMD64(Enter)(pVCpu, GCPhysCR3); 4016 4016 break; 4017 4017 case PGMMODE_NESTED: 4018 rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pV M, pVCpu, GCPhysCR3);4018 rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pVCpu, GCPhysCR3); 4019 4019 break; 4020 4020 case PGMMODE_EPT: 4021 rc2 = PGM_BTH_NAME_EPT_AMD64(Enter)(pV M, pVCpu, GCPhysCR3);4021 rc2 = PGM_BTH_NAME_EPT_AMD64(Enter)(pVCpu, GCPhysCR3); 4022 4022 break; 4023 4023 case PGMMODE_32_BIT: -
trunk/src/VBox/VMM/PGMBth.h
r18927 r18992 26 26 __BEGIN_DECLS 27 27 PGM_BTH_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0); 28 PGM_BTH_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3);29 PGM_BTH_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta);30 31 PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);32 PGM_BTH_DECL(int, SyncCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);33 PGM_BTH_DECL(int, SyncPage)(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError);34 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, unsigned fPage, unsigned uError);35 PGM_BTH_DECL(int, InvalidatePage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);36 PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);37 PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0);38 PGM_BTH_DECL(int, MapCR3)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3);39 PGM_BTH_DECL(int, UnmapCR3)(PVM pVM, PVMCPU pVCpu);28 PGM_BTH_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3); 29 PGM_BTH_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta); 30 31 PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault); 32 PGM_BTH_DECL(int, SyncCR3)(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal); 33 PGM_BTH_DECL(int, SyncPage)(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError); 34 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVMCPU pVCpu, RTGCPTR Addr, unsigned fPage, unsigned uError); 35 PGM_BTH_DECL(int, InvalidatePage)(PVMCPU pVCpu, RTGCPTR GCPtrPage); 36 PGM_BTH_DECL(int, PrefetchPage)(PVMCPU pVCpu, RTGCPTR GCPtrPage); 37 PGM_BTH_DECL(unsigned, AssertCR3)(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0); 38 PGM_BTH_DECL(int, MapCR3)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3); 39 PGM_BTH_DECL(int, UnmapCR3)(PVMCPU pVCpu); 40 40 __END_DECLS 41 41 … … 129 129 * @param GCPhysCR3 The physical address from the CR3 register. 130 130 */ 131 PGM_BTH_DECL(int, Enter)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3)131 PGM_BTH_DECL(int, Enter)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3) 132 132 { 133 133 /* Here we deal with allocation of the root shadow page table for real and protected mode during mode switches; … … 139 139 && ( PGM_GST_TYPE == PGM_TYPE_REAL \ 140 140 || PGM_GST_TYPE == PGM_TYPE_PROT)) 141 142 PVM pVM = pVCpu->pVMR3; 141 143 142 144 Assert(!HWACCMIsNestedPagingActive(pVM)); … … 202 204 * @param offDelta The reloation offset. 203 205 */ 204 PGM_BTH_DECL(int, Relocate)(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta)206 PGM_BTH_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta) 205 207 { 206 208 /* nothing special to do here - InitData does the job. */ -
trunk/src/VBox/VMM/PGMGst.h
r18988 r18992 97 97 * Map and monitor CR3 98 98 */ 99 int rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu ->pVMR3, pVCpu, GCPhysCR3);99 int rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3); 100 100 return rc; 101 101 } … … 133 133 int rc; 134 134 135 rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pVCpu ->pVMR3, pVCpu);135 rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pVCpu); 136 136 return rc; 137 137 } -
trunk/src/VBox/VMM/PGMInternal.h
r18988 r18992 2111 2111 * @{ 2112 2112 */ 2113 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));2113 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVMCPU pVCpu, RTGCPTR offDelta)); 2114 2114 /* no pfnR3BthTrap0eHandler */ 2115 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2116 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2117 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2118 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2119 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2115 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2116 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2117 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2118 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2119 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2120 2120 #ifdef VBOX_STRICT 2121 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2122 #endif 2123 DECLR3CALLBACKMEMBER(int, pfnR3BthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2124 DECLR3CALLBACKMEMBER(int, pfnR3BthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2125 2126 DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));2127 DECLRCCALLBACKMEMBER(int, pfnRCBthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2128 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2129 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2130 DECLRCCALLBACKMEMBER(int, pfnRCBthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2131 DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2121 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2122 #endif 2123 DECLR3CALLBACKMEMBER(int, pfnR3BthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2124 DECLR3CALLBACKMEMBER(int, pfnR3BthUnmapCR3,(PVMCPU pVCpu)); 2125 2126 DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)); 2127 DECLRCCALLBACKMEMBER(int, pfnRCBthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2128 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2129 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2130 DECLRCCALLBACKMEMBER(int, pfnRCBthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2131 DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2132 2132 #ifdef VBOX_STRICT 2133 DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2134 #endif 2135 DECLRCCALLBACKMEMBER(int, pfnRCBthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2136 DECLRCCALLBACKMEMBER(int, pfnRCBthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2137 2138 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));2139 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2140 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2141 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2142 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2143 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2133 DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2134 #endif 2135 DECLRCCALLBACKMEMBER(int, pfnRCBthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2136 DECLRCCALLBACKMEMBER(int, pfnRCBthUnmapCR3,(PVMCPU pVCpu)); 2137 2138 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)); 2139 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2140 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2141 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2142 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2143 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2144 2144 #ifdef VBOX_STRICT 2145 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2146 #endif 2147 DECLR0CALLBACKMEMBER(int, pfnR0BthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2148 DECLR0CALLBACKMEMBER(int, pfnR0BthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2145 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2146 #endif 2147 DECLR0CALLBACKMEMBER(int, pfnR0BthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2148 DECLR0CALLBACKMEMBER(int, pfnR0BthUnmapCR3,(PVMCPU pVCpu)); 2149 2149 /** @} */ 2150 2150 } PGMMODEDATA, *PPGMMODEDATA; … … 2626 2626 * @{ 2627 2627 */ 2628 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, PVMCPU pVCpu, RTGCPTR offDelta));2628 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVMCPU pVCpu, RTGCPTR offDelta)); 2629 2629 /* no pfnR3BthTrap0eHandler */ 2630 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2631 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2632 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2633 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2634 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2635 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2636 DECLR3CALLBACKMEMBER(int, pfnR3BthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2637 DECLR3CALLBACKMEMBER(int, pfnR3BthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2638 2639 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));2640 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2641 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2642 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2643 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2644 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2645 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2646 DECLR0CALLBACKMEMBER(int, pfnR0BthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2647 DECLR0CALLBACKMEMBER(int, pfnR0BthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2648 2649 DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));2650 DECLRCCALLBACKMEMBER(int, pfnRCBthInvalidatePage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2651 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal));2652 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVM pVM, PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError));2653 DECLRCCALLBACKMEMBER(int, pfnRCBthPrefetchPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage));2654 DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));2655 DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));2656 DECLRCCALLBACKMEMBER(int, pfnRCBthMapCR3,(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3));2657 DECLRCCALLBACKMEMBER(int, pfnRCBthUnmapCR3,(PVM pVM, PVMCPU pVCpu));2630 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2631 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2632 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2633 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2634 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2635 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2636 DECLR3CALLBACKMEMBER(int, pfnR3BthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2637 DECLR3CALLBACKMEMBER(int, pfnR3BthUnmapCR3,(PVMCPU pVCpu)); 2638 2639 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)); 2640 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2641 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2642 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2643 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2644 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2645 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2646 DECLR0CALLBACKMEMBER(int, pfnR0BthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2647 DECLR0CALLBACKMEMBER(int, pfnR0BthUnmapCR3,(PVMCPU pVCpu)); 2648 2649 DECLRCCALLBACKMEMBER(int, pfnRCBthTrap0eHandler,(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)); 2650 DECLRCCALLBACKMEMBER(int, pfnRCBthInvalidatePage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2651 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncCR3,(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)); 2652 DECLRCCALLBACKMEMBER(int, pfnRCBthSyncPage,(PVMCPU pVCpu, X86PDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uError)); 2653 DECLRCCALLBACKMEMBER(int, pfnRCBthPrefetchPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage)); 2654 DECLRCCALLBACKMEMBER(int, pfnRCBthVerifyAccessSyncPage,(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError)); 2655 DECLRCCALLBACKMEMBER(unsigned, pfnRCBthAssertCR3,(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)); 2656 DECLRCCALLBACKMEMBER(int, pfnRCBthMapCR3,(PVMCPU pVCpu, RTGCPHYS GCPhysCR3)); 2657 DECLRCCALLBACKMEMBER(int, pfnRCBthUnmapCR3,(PVMCPU pVCpu)); 2658 2658 #if HC_ARCH_BITS == 64 2659 2659 RTRCPTR alignment2; /**< structure size alignment. */ … … 2957 2957 int pgmMapDeactivateCR3(PVM pVM, PPGMPOOLPAGE pShwPageCR3); 2958 2958 2959 int pgmShwSyncPaePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD);2959 int pgmShwSyncPaePDPtr(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD); 2960 2960 #ifndef IN_RC 2961 int pgmShwSyncLongModePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD);2962 #endif 2963 int pgmShwGetEPTPDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD);2961 int pgmShwSyncLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD); 2962 #endif 2963 int pgmShwGetEPTPDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD); 2964 2964 2965 2965 PX86PD pgmGstLazyMap32BitPD(PPGMCPU pPGM); -
trunk/src/VBox/VMM/PGMMap.cpp
r18927 r18992 535 535 * pending relocations because of these mappings have been resolved. 536 536 */ 537 PGMSyncCR3(pV M, pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu), true);537 PGMSyncCR3(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu), true); 538 538 539 539 /* -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r18927 r18992 1389 1389 LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d cTransfers=%x DF=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize, cTransfers, pRegFrame->eflags.Bits.u1DF)); 1390 1390 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 1391 rc = PGMVerifyAccess(pV M, pVCpu, GCDest - ((offIncrement > 0) ? 0 : ((cTransfers-1) * cbSize)),1391 rc = PGMVerifyAccess(pVCpu, GCDest - ((offIncrement > 0) ? 0 : ((cTransfers-1) * cbSize)), 1392 1392 cTransfers * cbSize, 1393 1393 X86_PTE_RW | (CPUMGetGuestCPL(pVCpu, pRegFrame) == 3 ? X86_PTE_US : 0)); … … 1870 1870 LogFlow(("RC: EMULATE: invlpg %RGv\n", pAddrGC)); 1871 1871 #endif 1872 rc = PGMInvalidatePage(pV M, pVCpu, pAddrGC);1872 rc = PGMInvalidatePage(pVCpu, pAddrGC); 1873 1873 if ( rc == VINF_SUCCESS 1874 1874 || rc == VINF_PGM_SYNC_CR3 /* we can rely on the FF */) … … 1913 1913 LogFlow(("RC: EMULATE: invlpg %RGv\n", addr)); 1914 1914 #endif 1915 rc = PGMInvalidatePage(pV M, pVCpu, addr);1915 rc = PGMInvalidatePage(pVCpu, addr); 1916 1916 if ( rc == VINF_SUCCESS 1917 1917 || rc == VINF_PGM_SYNC_CR3 /* we can rely on the FF */) … … 2065 2065 { 2066 2066 /* global flush */ 2067 rc = PGMFlushTLB(pV M, pVCpu, CPUMGetGuestCR3(pVCpu), true /* global */);2067 rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true /* global */); 2068 2068 AssertRCReturn(rc, rc); 2069 2069 } … … 2100 2100 CPUMSetGuestEFER(pVCpu, msrEFER); 2101 2101 } 2102 rc2 = PGMChangeMode(pV M, pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu));2102 rc2 = PGMChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu)); 2103 2103 return rc2 == VINF_SUCCESS ? rc : rc2; 2104 2104 … … 2113 2113 { 2114 2114 /* flush */ 2115 rc = PGMFlushTLB(pV M, pVCpu, val, !(CPUMGetGuestCR4(pVCpu) & X86_CR4_PGE));2115 rc = PGMFlushTLB(pVCpu, val, !(CPUMGetGuestCR4(pVCpu) & X86_CR4_PGE)); 2116 2116 AssertRCReturn(rc, rc); 2117 2117 } … … 2137 2137 { 2138 2138 /* global flush */ 2139 rc = PGMFlushTLB(pV M, pVCpu, CPUMGetGuestCR3(pVCpu), true /* global */);2139 rc = PGMFlushTLB(pVCpu, CPUMGetGuestCR3(pVCpu), true /* global */); 2140 2140 AssertRCReturn(rc, rc); 2141 2141 } … … 2153 2153 VM_FF_SET(pVM, VM_FF_SELM_SYNC_TSS); 2154 2154 2155 rc2 = PGMChangeMode(pV M, pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu));2155 rc2 = PGMChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu)); 2156 2156 return rc2 == VINF_SUCCESS ? rc : rc2; 2157 2157 -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r18988 r18992 395 395 396 396 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 397 rc = PGMVerifyAccess(pV M, pu8Virt, cTransfers * cb, (cpl == 3) ? X86_PTE_US : 0);397 rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, (cpl == 3) ? X86_PTE_US : 0); 398 398 if (rc != VINF_SUCCESS) 399 399 { … … 492 492 */ 493 493 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 494 rc = PGMVerifyAccess(pV M, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));494 rc = PGMVerifyAccess(pVCpu, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0)); 495 495 if (rc != VINF_SUCCESS) 496 496 { … … 1505 1505 uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame); 1506 1506 1507 rc = PGMVerifyAccess(pV M, pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,1507 rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer, 1508 1508 X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0)); 1509 1509 if (rc != VINF_SUCCESS) … … 1666 1666 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 1667 1667 uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame); 1668 rc = PGMVerifyAccess(pV M, pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,1668 rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer, 1669 1669 (cpl == 3) ? X86_PTE_US : 0); 1670 1670 if (rc != VINF_SUCCESS) … … 1820 1820 uint64_t fFlags; 1821 1821 RTHCPHYS HCPhys; 1822 rc = PGMShwGetPage(pV M, (RTGCPTR)GCPhys, &fFlags, &HCPhys);1822 rc = PGMShwGetPage(pVCpu, (RTGCPTR)GCPhys, &fFlags, &HCPhys); 1823 1823 Assert(rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT); 1824 1824 # endif 1825 1825 #endif 1826 rc = PGMPrefetchPage(pV M, pVCpu, (RTGCPTR)GCPhys);1826 rc = PGMPrefetchPage(pVCpu, (RTGCPTR)GCPhys); 1827 1827 Assert(rc == VINF_SUCCESS || rc == VERR_PAGE_NOT_PRESENT || rc == VERR_PAGE_TABLE_NOT_PRESENT); 1828 1828 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r18988 r18992 71 71 * Internal Functions * 72 72 *******************************************************************************/ 73 DECLINLINE(int) pgmShwGetLongModePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD); 74 DECLINLINE(int) pgmShwGetPAEPDPtr(PVM pVM, RTGCPTR GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD); 73 DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD); 75 74 DECLINLINE(int) pgmShwGetPaePoolPagePD(PPGMCPU pPGM, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde); 76 75 … … 395 394 * 396 395 * @returns VBox status code (appropriate for trap handling and GC return). 397 * @param pVM VM Handle.398 396 * @param pVCpu VMCPU handle. 399 397 * @param uErr The trap error code. … … 401 399 * @param pvFault The fault address. 402 400 */ 403 VMMDECL(int) PGMTrap0eHandler(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)401 VMMDECL(int) PGMTrap0eHandler(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 404 402 { 405 403 LogFlow(("PGMTrap0eHandler: uErr=%RGu pvFault=%RGv eip=%04x:%RGv\n", uErr, pvFault, pRegFrame->cs, (RTGCPTR)pRegFrame->rip)); … … 451 449 * Call the worker. 452 450 */ 453 int rc = PGM_BTH_PFN(Trap0eHandler, pVCpu)(pV M, pVCpu, uErr, pRegFrame, pvFault);451 int rc = PGM_BTH_PFN(Trap0eHandler, pVCpu)(pVCpu, uErr, pRegFrame, pvFault); 454 452 if (rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE) 455 453 rc = VINF_SUCCESS; … … 472 470 * @retval VINF_SUCCESS on success. 473 471 * @retval VINF_PGM_SYNC_CR3 if we're out of shadow pages or something like that. 474 * @param pVM VM handle.475 472 * @param pVCpu VMCPU handle. 476 473 * @param GCPtrPage Page to invalidate. 477 474 */ 478 VMMDECL(int) PGMPrefetchPage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage)475 VMMDECL(int) PGMPrefetchPage(PVMCPU pVCpu, RTGCPTR GCPtrPage) 479 476 { 480 477 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a); 481 int rc = PGM_BTH_PFN(PrefetchPage, pVCpu)(pV M, pVCpu, GCPtrPage);478 int rc = PGM_BTH_PFN(PrefetchPage, pVCpu)(pVCpu, GCPtrPage); 482 479 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,Prefetch), a); 483 480 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc)); … … 516 513 * 517 514 * @returns VBox status code. 518 * @param pVM VM handle.519 515 * @param pVCpu VMCPU handle. 520 516 * @param Addr Guest virtual address to check … … 523 519 * @remarks Current not in use. 524 520 */ 525 VMMDECL(int) PGMIsValidAccess(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess)521 VMMDECL(int) PGMIsValidAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess) 526 522 { 527 523 /* … … 559 555 if ( RT_SUCCESS(rc) 560 556 && PAGE_ADDRESS(Addr) != PAGE_ADDRESS(Addr + cbSize)) 561 return PGMIsValidAccess(pV M, pVCpu, Addr + PAGE_SIZE, (cbSize > PAGE_SIZE) ? cbSize - PAGE_SIZE : 1, fAccess);557 return PGMIsValidAccess(pVCpu, Addr + PAGE_SIZE, (cbSize > PAGE_SIZE) ? cbSize - PAGE_SIZE : 1, fAccess); 562 558 return rc; 563 559 } … … 570 566 * 571 567 * @returns VBox status code. 572 * @param pVM VM handle.573 568 * @param pVCpu VMCPU handle. 574 569 * @param Addr Guest virtual address to check … … 576 571 * @param fAccess Access type (r/w, user/supervisor (X86_PTE_*)) 577 572 */ 578 VMMDECL(int) PGMVerifyAccess(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess) 579 { 573 VMMDECL(int) PGMVerifyAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess) 574 { 575 PVM pVM = pVCpu->CTX_SUFF(pVM); 576 580 577 AssertMsg(!(fAccess & ~(X86_PTE_US | X86_PTE_RW)), ("PGMVerifyAccess: invalid access type %08x\n", fAccess)); 581 578 … … 622 619 Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US); 623 620 uint32_t uErr = fAccess & (X86_TRAP_PF_RW | X86_TRAP_PF_US); 624 rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVCpu)(pV M, pVCpu, Addr, fPageGst, uErr);621 rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVCpu)(pVCpu, Addr, fPageGst, uErr); 625 622 if (rc != VINF_SUCCESS) 626 623 return rc; … … 659 656 else 660 657 cbSize = 1; 661 rc = PGMVerifyAccess(pV M, pVCpu, Addr, 1, fAccess);658 rc = PGMVerifyAccess(pVCpu, Addr, 1, fAccess); 662 659 if (rc != VINF_SUCCESS) 663 660 break; … … 678 675 * @retval VERR_REM_FLUSHED_PAGES_OVERFLOW - not handled. 679 676 * 680 * @param pVM VM handle.681 677 * @param pVCpu VMCPU handle. 682 678 * @param GCPtrPage Page to invalidate. … … 687 683 * @todo Flush page or page directory only if necessary! 688 684 */ 689 VMMDECL(int) PGMInvalidatePage(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage) 690 { 685 VMMDECL(int) PGMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCPtrPage) 686 { 687 PVM pVM = pVCpu->CTX_SUFF(pVM); 691 688 int rc; 692 689 Log3(("PGMInvalidatePage: GCPtrPage=%RGv\n", GCPtrPage)); … … 731 728 */ 732 729 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a); 733 rc = PGM_BTH_PFN(InvalidatePage, pVCpu)(pV M, pVCpu, GCPtrPage);730 rc = PGM_BTH_PFN(InvalidatePage, pVCpu)(pVCpu, GCPtrPage); 734 731 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePage), a); 735 732 … … 843 840 } 844 841 845 846 #if 0 /* obsolete */847 /**848 * Gets the SHADOW page directory pointer for the specified address.849 *850 * @returns VBox status.851 * @param pVM VM handle.852 * @param pVCpu VMCPU handle.853 * @param GCPtr The address.854 * @param ppPdpt Receives address of pdpt855 * @param ppPD Receives address of page directory856 * @remarks Unused.857 */858 DECLINLINE(int) pgmShwGetPAEPDPtr(PVM pVM, RTGCPTR GCPtr, PX86PDPT *ppPdpt, PX86PDPAE *ppPD)859 {860 PPGM pPGM = &pVM->pgm.s;861 PPGMPOOL pPool = pPGM->CTX_SUFF(pPool);862 PPGMPOOLPAGE pShwPage;863 864 Assert(!HWACCMIsNestedPagingActive(pVM));865 866 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;867 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(&pVM->pgm.s);868 PX86PDPE pPdpe = &pPdpt->a[iPdPt];869 870 *ppPdpt = pPdpt;871 if (!pPdpe->n.u1Present)872 return VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT;873 874 Assert(pPdpe->u & X86_PDPE_PG_MASK);875 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK);876 AssertReturn(pShwPage, VERR_INTERNAL_ERROR);877 878 *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);879 return VINF_SUCCESS;880 }881 #endif882 883 842 /** 884 843 * Gets the shadow page directory for the specified address, PAE. 885 844 * 886 845 * @returns Pointer to the shadow PD. 887 * @param pVM VM handle.888 846 * @param pVCpu The VMCPU handle. 889 847 * @param GCPtr The address. … … 891 849 * @param ppPD Receives address of page directory 892 850 */ 893 int pgmShwSyncPaePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD)851 int pgmShwSyncPaePDPtr(PVMCPU pVCpu, RTGCPTR GCPtr, PX86PDPE pGstPdpe, PX86PDPAE *ppPD) 894 852 { 895 853 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE; 896 854 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s); 897 855 PX86PDPE pPdpe = &pPdpt->a[iPdPt]; 856 PVM pVM = pVCpu->CTX_SUFF(pVM); 898 857 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 899 858 PPGMPOOLPAGE pShwPage; … … 1018 977 * 1019 978 * @returns VBox status. 1020 * @param pVM VM handle.1021 979 * @param pVCpu VMCPU handle. 1022 980 * @param GCPtr The address. … … 1025 983 * @param ppPD Receives address of page directory 1026 984 */ 1027 int pgmShwSyncLongModePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD)985 int pgmShwSyncLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E pGstPml4e, PX86PDPE pGstPdpe, PX86PDPAE *ppPD) 1028 986 { 1029 987 PPGMCPU pPGM = &pVCpu->pgm.s; 988 PVM pVM = pVCpu->CTX_SUFF(pVM); 1030 989 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1031 990 const unsigned iPml4 = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK; 1032 991 PX86PML4E pPml4e = pgmShwGetLongModePML4EPtr(pPGM, iPml4); 1033 992 bool fNestedPaging = HWACCMIsNestedPagingActive(pVM); 1034 bool fPaging = !!(CPUMGetGuestCR0(pVCpu) & X86_CR0_PG);993 bool fPaging = !!(CPUMGetGuestCR0(pVCpu) & X86_CR0_PG); 1035 994 PPGMPOOLPAGE pShwPage; 1036 995 int rc; … … 1123 1082 * 1124 1083 * @returns VBox status. 1125 * @param pVM VM handle.1126 1084 * @param pVCpu VMCPU handle. 1127 1085 * @param GCPtr The address. … … 1129 1087 * @param ppPD Receives address of page directory 1130 1088 */ 1131 DECLINLINE(int) pgmShwGetLongModePDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD)1089 DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD) 1132 1090 { 1133 1091 PPGMCPU pPGM = &pVCpu->pgm.s; … … 1143 1101 return VERR_PAGE_MAP_LEVEL4_NOT_PRESENT; 1144 1102 1145 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1103 PVM pVM = pVCpu->CTX_SUFF(pVM); 1104 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1146 1105 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK); 1147 1106 AssertReturn(pShwPage, VERR_INTERNAL_ERROR); … … 1165 1124 * 1166 1125 * @returns VBox status. 1167 * @param pVM VM handle.1168 1126 * @param pVCpu VMCPU handle. 1169 1127 * @param GCPtr The address. … … 1171 1129 * @param ppPD Receives address of page directory 1172 1130 */ 1173 int pgmShwGetEPTPDPtr(PVM pVM, PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD)1131 int pgmShwGetEPTPDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD) 1174 1132 { 1175 1133 PPGMCPU pPGM = &pVCpu->pgm.s; 1134 PVM pVM = pVCpu->CTX_SUFF(pVM); 1176 1135 const unsigned iPml4 = (GCPtr >> EPT_PML4_SHIFT) & EPT_PML4_MASK; 1177 1136 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); … … 1638 1597 * @retval VINF_PGM_SYNC_CR3 if monitoring requires a CR3 sync. This can 1639 1598 * safely be ignored and overridden since the FF will be set too then. 1640 * @param pVM VM handle.1641 1599 * @param pVCpu VMCPU handle. 1642 1600 * @param cr3 The new cr3. 1643 1601 * @param fGlobal Indicates whether this is a global flush or not. 1644 1602 */ 1645 VMMDECL(int) PGMFlushTLB(PVM pVM, PVMCPU pVCpu, uint64_t cr3, bool fGlobal) 1646 { 1603 VMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal) 1604 { 1605 PVM pVM = pVCpu->CTX_SUFF(pVM); 1606 1647 1607 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,FlushTLB), a); 1648 1608 … … 1680 1640 RTGCPHYS GCPhysOldCR3 = pVCpu->pgm.s.GCPhysCR3; 1681 1641 pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3; 1682 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pV M, pVCpu, GCPhysCR3);1642 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3); 1683 1643 if (RT_LIKELY(rc == VINF_SUCCESS)) 1684 1644 { … … 1738 1698 * requires a CR3 sync. This can safely be ignored and overridden since 1739 1699 * the FF will be set too then.) 1740 * @param pVM VM handle.1741 1700 * @param pVCpu VMCPU handle. 1742 1701 * @param cr3 The new cr3. 1743 1702 */ 1744 VMMDECL(int) PGMUpdateCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3) 1745 { 1703 VMMDECL(int) PGMUpdateCR3(PVMCPU pVCpu, uint64_t cr3) 1704 { 1705 PVM pVM = pVCpu->CTX_SUFF(pVM); 1706 1746 1707 LogFlow(("PGMUpdateCR3: cr3=%RX64 OldCr3=%RX64\n", cr3, pVCpu->pgm.s.GCPhysCR3)); 1747 1708 … … 1773 1734 { 1774 1735 pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3; 1775 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pV M, pVCpu, GCPhysCR3);1736 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3); 1776 1737 AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */ /** @todo this isn't true for the mac, but we need hw to test/fix this. */ 1777 1738 } … … 1788 1749 * 1789 1750 * @returns VBox status code. 1790 * @param pVM The virtual machine.1791 1751 * @param pVCpu VMCPU handle. 1792 1752 * @param cr0 Guest context CR0 register … … 1795 1755 * @param fGlobal Including global page directories or not 1796 1756 */ 1797 VMMDECL(int) PGMSyncCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal) 1798 { 1757 VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal) 1758 { 1759 PVM pVM = pVCpu->CTX_SUFF(pVM); 1799 1760 int rc; 1800 1761 … … 1859 1820 { 1860 1821 pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3; 1861 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pV M, pVCpu, GCPhysCR3);1822 rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3); 1862 1823 } 1863 1824 #ifdef IN_RING3 … … 1879 1840 */ 1880 1841 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a); 1881 rc = PGM_BTH_PFN(SyncCR3, pVCpu)(pV M, pVCpu, cr0, cr3, cr4, fGlobal);1842 rc = PGM_BTH_PFN(SyncCR3, pVCpu)(pVCpu, cr0, cr3, cr4, fGlobal); 1882 1843 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a); 1883 1844 AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc)); … … 1920 1881 * @retval VINF_EM_SUSPEND or VINF_EM_OFF on a fatal runtime error. (R3 only) 1921 1882 * 1922 * @param pVM VM handle.1923 1883 * @param pVCpu VMCPU handle. 1924 1884 * @param cr0 The new cr0. … … 1926 1886 * @param efer The new extended feature enable register. 1927 1887 */ 1928 VMMDECL(int) PGMChangeMode(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer) 1929 { 1888 VMMDECL(int) PGMChangeMode(PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer) 1889 { 1890 PVM pVM = pVCpu->CTX_SUFF(pVM); 1930 1891 PGMMODE enmGuestMode; 1931 1892 … … 2537 2498 { 2538 2499 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a); 2539 unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVCpu)(pV M, pVCpu, cr3, cr4, 0, ~(RTGCPTR)0);2500 unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVCpu)(pVCpu, cr3, cr4, 0, ~(RTGCPTR)0); 2540 2501 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncCR3), a); 2541 2502 return cErrors; -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r18988 r18992 26 26 *******************************************************************************/ 27 27 __BEGIN_DECLS 28 PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);29 PGM_BTH_DECL(int, InvalidatePage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);30 PGM_BTH_DECL(int, SyncPage)(PVM pVM, PVMCPU pVCpu, GSTPDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uErr);31 PGM_BTH_DECL(int, CheckPageFault)(PVM pVM, PVMCPU pVCpu, uint32_t uErr, PSHWPDE pPdeDst, PGSTPDE pPdeSrc, RTGCPTR GCPtrPage);32 PGM_BTH_DECL(int, SyncPT)(PVM pVM, PVMCPU pVCpu, unsigned iPD, PGSTPD pPDSrc, RTGCPTR GCPtrPage);33 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR Addr, unsigned fPage, unsigned uErr);34 PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage);35 PGM_BTH_DECL(int, SyncCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);28 PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault); 29 PGM_BTH_DECL(int, InvalidatePage)(PVMCPU pVCpu, RTGCPTR GCPtrPage); 30 PGM_BTH_DECL(int, SyncPage)(PVMCPU pVCpu, GSTPDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uErr); 31 PGM_BTH_DECL(int, CheckPageFault)(PVMCPU pVCpu, uint32_t uErr, PSHWPDE pPdeDst, PGSTPDE pPdeSrc, RTGCPTR GCPtrPage); 32 PGM_BTH_DECL(int, SyncPT)(PVMCPU pVCpu, unsigned iPD, PGSTPD pPDSrc, RTGCPTR GCPtrPage); 33 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVMCPU pVCpu, RTGCPTR Addr, unsigned fPage, unsigned uErr); 34 PGM_BTH_DECL(int, PrefetchPage)(PVMCPU pVCpu, RTGCPTR GCPtrPage); 35 PGM_BTH_DECL(int, SyncCR3)(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal); 36 36 #ifdef VBOX_STRICT 37 PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0);37 PGM_BTH_DECL(unsigned, AssertCR3)(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0); 38 38 #endif 39 39 #ifdef PGMPOOL_WITH_USER_TRACKING 40 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackDeref)(PVM pVM, PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, RTHCPHYS HCPhys);40 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackDeref)(PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, RTHCPHYS HCPhys); 41 41 #endif 42 PGM_BTH_DECL(int, MapCR3)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3);43 PGM_BTH_DECL(int, UnmapCR3)(PVM pVM, PVMCPU pVCpu);42 PGM_BTH_DECL(int, MapCR3)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3); 43 PGM_BTH_DECL(int, UnmapCR3)(PVMCPU pVCpu); 44 44 __END_DECLS 45 45 … … 76 76 * @returns VBox status code (appropriate for trap handling and GC return). 77 77 * 78 * @param pVM VM Handle.79 78 * @param pVCpu VMCPU Handle. 80 79 * @param uErr The trap error code. … … 82 81 * @param pvFault The fault address. 83 82 */ 84 PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)83 PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault) 85 84 { 85 PVM pVM = pVCpu->CTX_SUFF(pVM); 86 86 87 # if defined(IN_RC) && defined(VBOX_STRICT) 87 88 PGMDynCheckLocks(pVM); … … 164 165 PdpeSrc.u = X86_PDPE_P; /* rw/us are reserved for PAE pdpte's; accessed bit causes invalid VT-x guest state errors */ 165 166 # endif 166 rc = pgmShwSyncPaePDPtr(pV M, pVCpu, pvFault, &PdpeSrc, &pPDDst);167 rc = pgmShwSyncPaePDPtr(pVCpu, pvFault, &PdpeSrc, &pPDDst); 167 168 if (rc != VINF_SUCCESS) 168 169 { … … 186 187 # endif 187 188 188 rc = pgmShwSyncLongModePDPtr(pV M, pVCpu, pvFault, pPml4eSrc, &PdpeSrc, &pPDDst);189 rc = pgmShwSyncLongModePDPtr(pVCpu, pvFault, pPml4eSrc, &PdpeSrc, &pPDDst); 189 190 if (rc != VINF_SUCCESS) 190 191 { … … 198 199 PEPTPD pPDDst; 199 200 200 rc = pgmShwGetEPTPDPtr(pV M, pVCpu, pvFault, NULL, &pPDDst);201 rc = pgmShwGetEPTPDPtr(pVCpu, pvFault, NULL, &pPDDst); 201 202 if (rc != VINF_SUCCESS) 202 203 { … … 213 214 */ 214 215 STAM_PROFILE_START(&pVCpu->pgm.s.StatRZTrap0eTimeCheckPageFault, e); 215 rc = PGM_BTH_NAME(CheckPageFault)(pV M, pVCpu, uErr, &pPDDst->a[iPDDst], &pPDSrc->a[iPDSrc], pvFault);216 rc = PGM_BTH_NAME(CheckPageFault)(pVCpu, uErr, &pPDDst->a[iPDDst], &pPDSrc->a[iPDSrc], pvFault); 216 217 STAM_PROFILE_STOP(&pVCpu->pgm.s.StatRZTrap0eTimeCheckPageFault, e); 217 218 if ( rc == VINF_PGM_HANDLED_DIRTY_BIT_FAULT … … 257 258 STAM_PROFILE_START(&pVCpu->pgm.s.StatRZTrap0eTimeSyncPT, f); 258 259 LogFlow(("=>SyncPT %04x = %08x\n", iPDSrc, PdeSrc.au32[0])); 259 rc = PGM_BTH_NAME(SyncPT)(pV M, pVCpu, iPDSrc, pPDSrc, pvFault);260 rc = PGM_BTH_NAME(SyncPT)(pVCpu, iPDSrc, pPDSrc, pvFault); 260 261 if (RT_SUCCESS(rc)) 261 262 { … … 411 412 && !(uErr & X86_TRAP_PF_P)) 412 413 { 413 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr);414 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr); 414 415 if ( RT_FAILURE(rc) 415 416 || !(uErr & X86_TRAP_PF_RW) … … 457 458 && !(uErr & X86_TRAP_PF_P)) 458 459 { 459 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr);460 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr); 460 461 if ( RT_FAILURE(rc) 461 462 || rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE … … 551 552 && !(uErr & X86_TRAP_PF_P)) 552 553 { 553 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr);554 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr); 554 555 if ( RT_FAILURE(rc) 555 556 || rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE … … 685 686 */ 686 687 LogFlow(("CSAM ring 3 job\n")); 687 int rc2 = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, 1, uErr);688 int rc2 = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, 1, uErr); 688 689 AssertRC(rc2); 689 690 … … 733 734 } 734 735 # endif /* PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0) */ 735 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr);736 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, PGM_SYNC_NR_PAGES, uErr); 736 737 if (RT_SUCCESS(rc)) 737 738 { … … 778 779 * page is not present, which is not true in this case. 779 780 */ 780 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, pvFault, 1, uErr);781 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, pvFault, 1, uErr); 781 782 if (RT_SUCCESS(rc)) 782 783 { … … 904 905 * @returns VBox status code. 905 906 * 906 * @param pVM VM handle.907 907 * @param pVCpu The VMCPU handle. 908 908 * @param GCPtrPage Page to invalidate. … … 915 915 * @todo Add a #define for simply invalidating the page. 916 916 */ 917 PGM_BTH_DECL(int, InvalidatePage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage)917 PGM_BTH_DECL(int, InvalidatePage)(PVMCPU pVCpu, RTGCPTR GCPtrPage) 918 918 { 919 919 #if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) \ 920 920 && PGM_SHW_TYPE != PGM_TYPE_NESTED \ 921 921 && PGM_SHW_TYPE != PGM_TYPE_EPT 922 int rc; 922 int rc; 923 PVM pVM = pVCpu->CTX_SUFF(pVM); 923 924 924 925 LogFlow(("InvalidatePage %RGv\n", GCPtrPage)); … … 967 968 PX86PDPT pPdptDst; 968 969 PX86PML4E pPml4eDst; 969 rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtrPage, &pPml4eDst, &pPdptDst, &pPDDst);970 rc = pgmShwGetLongModePDPtr(pVCpu, GCPtrPage, &pPml4eDst, &pPdptDst, &pPDDst); 970 971 if (rc != VINF_SUCCESS) 971 972 { … … 1162 1163 Assert(pgmMapAreMappingsEnabled(&pVM->pgm.s)); 1163 1164 Assert(PGMGetGuestMode(pVCpu) <= PGMMODE_PAE); 1164 rc = PGM_BTH_NAME(SyncPT)(pV M, pVCpu, iPDSrc, pPDSrc, GCPtrPage);1165 rc = PGM_BTH_NAME(SyncPT)(pVCpu, iPDSrc, pPDSrc, GCPtrPage); 1165 1166 } 1166 1167 else if ( PdeSrc.n.u1User != PdeDst.n.u1User … … 1209 1210 # ifdef PGMPOOL_WITH_USER_TRACKING 1210 1211 /* This is very unlikely with caching/monitoring enabled. */ 1211 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(p VM, pShwPage, pPT->a[iPTEDst].u & SHW_PTE_PG_MASK);1212 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pShwPage, pPT->a[iPTEDst].u & SHW_PTE_PG_MASK); 1212 1213 # endif 1213 1214 pPT->a[iPTEDst].u = 0; 1214 1215 } 1215 1216 # else /* Syncing it here isn't 100% safe and it's probably not worth spending time syncing it. */ 1216 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, GCPtrPage, 1, 0);1217 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, GCPtrPage, 1, 0); 1217 1218 if (RT_SUCCESS(rc)) 1218 1219 rc = VINF_SUCCESS; … … 1315 1316 * Update the tracking of shadowed pages. 1316 1317 * 1317 * @param pVM The VM handle.1318 1318 * @param pVCpu The VMCPU handle. 1319 1319 * @param pShwPage The shadow page. 1320 1320 * @param HCPhys The physical page we is being dereferenced. 1321 1321 */ 1322 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackDeref)(PVM pVM, PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, RTHCPHYS HCPhys)1322 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackDeref)(PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, RTHCPHYS HCPhys) 1323 1323 { 1324 1324 # ifdef PGMPOOL_WITH_GCPHYS_TRACKING 1325 PVM pVM = pVCpu->CTX_SUFF(pVM); 1326 1325 1327 STAM_PROFILE_START(&pVM->pgm.s.StatTrackDeref, a); 1326 1328 LogFlow(("SyncPageWorkerTrackDeref: Damn HCPhys=%RHp pShwPage->idx=%#x!!!\n", HCPhys, pShwPage->idx)); … … 1364 1366 * Update the tracking of shadowed pages. 1365 1367 * 1366 * @param pVM The VM handle.1367 1368 * @param pVCpu The VMCPU handle. 1368 1369 * @param pShwPage The shadow page. … … 1371 1372 * @param iPTDst The index into the shadow table. 1372 1373 */ 1373 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackAddref)(PVM pVM, PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, uint16_t u16, PPGMPAGE pPage, const unsigned iPTDst)1374 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackAddref)(PVMCPU pVCpu, PPGMPOOLPAGE pShwPage, uint16_t u16, PPGMPAGE pPage, const unsigned iPTDst) 1374 1375 { 1376 PVM pVM = pVCpu->CTX_SUFF(pVM); 1375 1377 # ifdef PGMPOOL_WITH_GCPHYS_TRACKING 1376 1378 /* … … 1407 1409 * will be mapped in this function. 1408 1410 * 1409 * @param pVM VM handle.1410 1411 * @param pVCpu The VMCPU handle. 1411 1412 * @param pPteDst Destination page table entry. … … 1418 1419 * @remark Not used for 2/4MB pages! 1419 1420 */ 1420 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorker)(PVM pVM, PVMCPU pVCpu, PSHWPTE pPteDst, GSTPDE PdeSrc, GSTPTE PteSrc, PPGMPOOLPAGE pShwPage, unsigned iPTDst)1421 DECLINLINE(void) PGM_BTH_NAME(SyncPageWorker)(PVMCPU pVCpu, PSHWPTE pPteDst, GSTPDE PdeSrc, GSTPTE PteSrc, PPGMPOOLPAGE pShwPage, unsigned iPTDst) 1421 1422 { 1422 1423 if (PteSrc.n.u1Present) 1423 1424 { 1425 PVM pVM = pVCpu->CTX_SUFF(pVM); 1426 1424 1427 /* 1425 1428 * Find the ram range. … … 1531 1534 { 1532 1535 if (!pPteDst->n.u1Present) 1533 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pV M, pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst);1536 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst); 1534 1537 else if ((pPteDst->u & SHW_PTE_PG_MASK) != (PteDst.u & SHW_PTE_PG_MASK)) 1535 1538 { 1536 1539 Log2(("SyncPageWorker: deref! *pPteDst=%RX64 PteDst=%RX64\n", (uint64_t)pPteDst->u, (uint64_t)PteDst.u)); 1537 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pV M, pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK);1538 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pV M, pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst);1540 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK); 1541 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst); 1539 1542 } 1540 1543 } … … 1542 1545 { 1543 1546 Log2(("SyncPageWorker: deref! *pPteDst=%RX64\n", (uint64_t)pPteDst->u)); 1544 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pV M, pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK);1547 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK); 1545 1548 } 1546 1549 #endif /* PGMPOOL_WITH_USER_TRACKING */ … … 1569 1572 { 1570 1573 Log2(("SyncPageWorker: deref! *pPteDst=%RX64\n", (uint64_t)pPteDst->u)); 1571 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pV M, pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK);1574 PGM_BTH_NAME(SyncPageWorkerTrackDeref)(pVCpu, pShwPage, pPteDst->u & SHW_PTE_PG_MASK); 1572 1575 } 1573 1576 #endif /* PGMPOOL_WITH_USER_TRACKING */ … … 1586 1589 * @returns VBox status code. 1587 1590 * @returns VINF_PGM_SYNCPAGE_MODIFIED_PDE if it modifies the PDE in any way. 1588 * @param pVM VM handle.1589 1591 * @param pVCpu The VMCPU handle. 1590 1592 * @param PdeSrc Page directory entry of the guest. … … 1593 1595 * @param uErr Fault error (X86_TRAP_PF_*). 1594 1596 */ 1595 PGM_BTH_DECL(int, SyncPage)(PVM pVM, PVMCPU pVCpu, GSTPDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uErr)1597 PGM_BTH_DECL(int, SyncPage)(PVMCPU pVCpu, GSTPDE PdeSrc, RTGCPTR GCPtrPage, unsigned cPages, unsigned uErr) 1596 1598 { 1599 PVM pVM = pVCpu->CTX_SUFF(pVM); 1597 1600 LogFlow(("SyncPage: GCPtrPage=%RGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr)); 1598 1601 … … 1644 1647 PX86PDPT pPdptDst; 1645 1648 1646 int rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst);1649 int rc = pgmShwGetLongModePDPtr(pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst); 1647 1650 AssertRCSuccessReturn(rc, rc); 1648 1651 Assert(pPDDst && pPdptDst); … … 1762 1765 ) 1763 1766 #endif /* else: CSAM not active */ 1764 PGM_BTH_NAME(SyncPageWorker)(pV M, pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);1767 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst); 1765 1768 Log2(("SyncPage: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n", 1766 1769 GCPtrCurPage, PteSrc.n.u1Present, … … 1779 1782 GSTPTE PteSrc = pPTSrc->a[iPTSrc]; 1780 1783 const unsigned iPTDst = (GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK; 1781 PGM_BTH_NAME(SyncPageWorker)(pV M, pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);1784 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst); 1782 1785 Log2(("SyncPage: 4K %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s\n", 1783 1786 GCPtrPage, PteSrc.n.u1Present, … … 1834 1837 # ifdef PGMPOOL_WITH_USER_TRACKING 1835 1838 if (PteDst.n.u1Present && !pPTDst->a[iPTDst].n.u1Present) 1836 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pV M, pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst);1839 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst); 1837 1840 # endif 1838 1841 /* Make sure only allocated pages are mapped writable. */ … … 1931 1934 PX86PDPT pPdptDst; 1932 1935 1933 int rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst);1936 int rc = pgmShwGetLongModePDPtr(pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst); 1934 1937 AssertRCSuccessReturn(rc, rc); 1935 1938 Assert(pPDDst && pPdptDst); … … 1940 1943 EPTPDE PdeDst; 1941 1944 1942 int rc = pgmShwGetEPTPDPtr(pV M, pVCpu, GCPtrPage, NULL, &pPDDst);1945 int rc = pgmShwGetEPTPDPtr(pVCpu, GCPtrPage, NULL, &pPDDst); 1943 1946 if (rc != VINF_SUCCESS) 1944 1947 { … … 1987 1990 PteSrc.n.u1User = 1; 1988 1991 1989 PGM_BTH_NAME(SyncPageWorker)(pV M, pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);1992 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst); 1990 1993 1991 1994 Log2(("SyncPage: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx} PteDst=%08llx%s\n", … … 2018 2021 PteSrc.n.u1Write = 1; 2019 2022 PteSrc.n.u1User = 1; 2020 PGM_BTH_NAME(SyncPageWorker)(pV M, pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);2023 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst); 2021 2024 2022 2025 Log2(("SyncPage: 4K %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}PteDst=%08llx%s\n", … … 2043 2046 * 2044 2047 * @returns VBox status code. 2045 * @param pVM VM handle.2046 2048 * @param pVCpu The VMCPU handle. 2047 2049 * @param uErr Page fault error code. … … 2050 2052 * @param GCPtrPage Guest context page address. 2051 2053 */ 2052 PGM_BTH_DECL(int, CheckPageFault)(PVM pVM, PVMCPU pVCpu, uint32_t uErr, PSHWPDE pPdeDst, PGSTPDE pPdeSrc, RTGCPTR GCPtrPage)2054 PGM_BTH_DECL(int, CheckPageFault)(PVMCPU pVCpu, uint32_t uErr, PSHWPDE pPdeDst, PGSTPDE pPdeSrc, RTGCPTR GCPtrPage) 2053 2055 { 2054 2056 bool fWriteProtect = !!(CPUMGetGuestCR0(pVCpu) & X86_CR0_WP); … … 2065 2067 unsigned uPageFaultLevel; 2066 2068 int rc; 2069 PVM pVM = pVCpu->CTX_SUFF(pVM); 2067 2070 2068 2071 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a); … … 2356 2359 * 2357 2360 * @returns VBox status code. 2358 * @param pVM VM handle.2359 2361 * @param pVCpu The VMCPU handle. 2360 2362 * @param iPD Page directory index. … … 2363 2365 * @param GCPtrPage GC Pointer of the page that caused the fault 2364 2366 */ 2365 PGM_BTH_DECL(int, SyncPT)(PVM pVM, PVMCPU pVCpu, unsigned iPDSrc, PGSTPD pPDSrc, RTGCPTR GCPtrPage)2367 PGM_BTH_DECL(int, SyncPT)(PVMCPU pVCpu, unsigned iPDSrc, PGSTPD pPDSrc, RTGCPTR GCPtrPage) 2366 2368 { 2369 PVM pVM = pVCpu->CTX_SUFF(pVM); 2370 2367 2371 STAM_PROFILE_START(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncPT), a); 2368 2372 STAM_COUNTER_INC(&pVCpu->pgm.s.StatSyncPtPD[iPDSrc]); … … 2408 2412 PX86PDPAE pPDDst; 2409 2413 PX86PDPT pPdptDst; 2410 rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst);2414 rc = pgmShwGetLongModePDPtr(pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst); 2411 2415 AssertRCSuccessReturn(rc, rc); 2412 2416 Assert(pPDDst); … … 2617 2621 ) 2618 2622 # endif 2619 PGM_BTH_NAME(SyncPageWorker)(pV M, pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);2623 PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst); 2620 2624 Log2(("SyncPT: 4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s dst.raw=%08llx iPTSrc=%x PdeSrc.u=%x physpte=%RGp\n", 2621 2625 (RTGCPTR)((iPDSrc << GST_PD_SHIFT) | (iPTSrc << PAGE_SHIFT)), … … 2747 2751 # ifdef PGMPOOL_WITH_USER_TRACKING 2748 2752 if (PteDst.n.u1Present) 2749 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pV M, pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst);2753 PGM_BTH_NAME(SyncPageWorkerTrackAddref)(pVCpu, pShwPage, PGM_PAGE_GET_TRACKING(pPage), pPage, iPTDst); 2750 2754 # endif 2751 2755 /* commit it */ … … 2826 2830 PX86PDPAE pPDDst; 2827 2831 PX86PDPT pPdptDst; 2828 rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst);2832 rc = pgmShwGetLongModePDPtr(pVCpu, GCPtrPage, NULL, &pPdptDst, &pPDDst); 2829 2833 AssertRCSuccessReturn(rc, rc); 2830 2834 Assert(pPDDst); … … 2841 2845 PEPTPDPT pPdptDst; 2842 2846 2843 rc = pgmShwGetEPTPDPtr(pV M, pVCpu, GCPtrPage, &pPdptDst, &pPDDst);2847 rc = pgmShwGetEPTPDPtr(pVCpu, GCPtrPage, &pPdptDst, &pPDDst); 2844 2848 if (rc != VINF_SUCCESS) 2845 2849 { … … 2895 2899 *pPdeDst = PdeDst; 2896 2900 2897 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, GCPtrPage, PGM_SYNC_NR_PAGES, 0 /* page not present */);2901 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, GCPtrPage, PGM_SYNC_NR_PAGES, 0 /* page not present */); 2898 2902 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,SyncPT), a); 2899 2903 return rc; … … 2915 2919 * 2916 2920 * @returns VBox status code. 2917 * @param pVM VM handle.2918 2921 * @param pVCpu The VMCPU handle. 2919 2922 * @param GCPtrPage Page to invalidate. 2920 2923 */ 2921 PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage)2924 PGM_BTH_DECL(int, PrefetchPage)(PVMCPU pVCpu, RTGCPTR GCPtrPage) 2922 2925 { 2923 2926 #if (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT || PGM_GST_TYPE == PGM_TYPE_PAE || PGM_GST_TYPE == PGM_TYPE_AMD64) \ … … 2973 2976 PdpeSrc.u = X86_PDPE_P; /* rw/us are reserved for PAE pdpte's; accessed bit causes invalid VT-x guest state errors */ 2974 2977 # endif 2975 int rc = pgmShwSyncPaePDPtr(pV M, pVCpu, GCPtrPage, &PdpeSrc, &pPDDst);2978 int rc = pgmShwSyncPaePDPtr(pVCpu, GCPtrPage, &PdpeSrc, &pPDDst); 2976 2979 if (rc != VINF_SUCCESS) 2977 2980 { … … 2998 3001 # endif 2999 3002 3000 int rc = pgmShwSyncLongModePDPtr(pV M, pVCpu, GCPtrPage, pPml4eSrc, &PdpeSrc, &pPDDst);3003 int rc = pgmShwSyncLongModePDPtr(pVCpu, GCPtrPage, pPml4eSrc, &PdpeSrc, &pPDDst); 3001 3004 if (rc != VINF_SUCCESS) 3002 3005 { … … 3011 3014 if (!PdeDst.n.u1Present) 3012 3015 /** r=bird: This guy will set the A bit on the PDE, probably harmless. */ 3013 rc = PGM_BTH_NAME(SyncPT)(pV M, pVCpu, iPDSrc, pPDSrc, GCPtrPage);3016 rc = PGM_BTH_NAME(SyncPT)(pVCpu, iPDSrc, pPDSrc, GCPtrPage); 3014 3017 else 3015 3018 { … … 3018 3021 * makes no sense to prefetch more than one page. 3019 3022 */ 3020 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, GCPtrPage, 1, 0);3023 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, GCPtrPage, 1, 0); 3021 3024 if (RT_SUCCESS(rc)) 3022 3025 rc = VINF_SUCCESS; … … 3038 3041 * 3039 3042 * @returns VBox status code (informational included). 3040 * @param pVM VM handle.3041 3043 * @param pVCpu The VMCPU handle. 3042 3044 * @param GCPtrPage The address of the page to sync. … … 3044 3046 * @param uErr The trap error code. 3045 3047 */ 3046 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fPage, unsigned uErr)3048 PGM_BTH_DECL(int, VerifyAccessSyncPage)(PVMCPU pVCpu, RTGCPTR GCPtrPage, unsigned fPage, unsigned uErr) 3047 3049 { 3050 PVM pVM = pVCpu->CTX_SUFF(pVM); 3051 3048 3052 LogFlow(("VerifyAccessSyncPage: GCPtrPage=%RGv fPage=%#x uErr=%#x\n", GCPtrPage, fPage, uErr)); 3049 3053 … … 3113 3117 PdpeSrc.u = X86_PDPE_P; /* rw/us are reserved for PAE pdpte's; accessed bit causes invalid VT-x guest state errors */ 3114 3118 # endif 3115 rc = pgmShwSyncPaePDPtr(pV M, pVCpu, GCPtrPage, &PdpeSrc, &pPDDst);3119 rc = pgmShwSyncPaePDPtr(pVCpu, GCPtrPage, &PdpeSrc, &pPDDst); 3116 3120 if (rc != VINF_SUCCESS) 3117 3121 { … … 3138 3142 # endif 3139 3143 3140 rc = pgmShwSyncLongModePDPtr(pV M, pVCpu, GCPtrPage, pPml4eSrc, &PdpeSrc, &pPDDst);3144 rc = pgmShwSyncLongModePDPtr(pVCpu, GCPtrPage, pPml4eSrc, &PdpeSrc, &pPDDst); 3141 3145 if (rc != VINF_SUCCESS) 3142 3146 { … … 3154 3158 PGMDynLockHCPage(pVM, (uint8_t *)pPdeDst); 3155 3159 # endif 3156 rc = PGM_BTH_NAME(SyncPT)(pV M, pVCpu, iPDSrc, pPDSrc, GCPtrPage);3160 rc = PGM_BTH_NAME(SyncPT)(pVCpu, iPDSrc, pPDSrc, GCPtrPage); 3157 3161 # if defined(IN_RC) 3158 3162 /* Make sure the dynamic pPdeDst mapping will not be reused during this function. */ … … 3166 3170 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 3167 3171 /* Check for dirty bit fault */ 3168 rc = PGM_BTH_NAME(CheckPageFault)(pV M, pVCpu, uErr, pPdeDst, &pPDSrc->a[iPDSrc], GCPtrPage);3172 rc = PGM_BTH_NAME(CheckPageFault)(pVCpu, uErr, pPdeDst, &pPDSrc->a[iPDSrc], GCPtrPage); 3169 3173 if (rc == VINF_PGM_HANDLED_DIRTY_BIT_FAULT) 3170 3174 Log(("PGMVerifyAccess: success (dirty)\n")); … … 3188 3192 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,PageOutOfSyncSupervisor)); 3189 3193 3190 rc = PGM_BTH_NAME(SyncPage)(pV M, pVCpu, PdeSrc, GCPtrPage, 1, 0);3194 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrc, GCPtrPage, 1, 0); 3191 3195 if (RT_SUCCESS(rc)) 3192 3196 { … … 3262 3266 * 3263 3267 * @returns VBox status code, no specials. 3264 * @param pVM VM handle.3265 3268 * @param pVCpu The VMCPU handle. 3266 3269 * @param cr0 Guest context CR0 register … … 3269 3272 * @param fGlobal Including global page directories or not 3270 3273 */ 3271 PGM_BTH_DECL(int, SyncCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)3274 PGM_BTH_DECL(int, SyncCR3)(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal) 3272 3275 { 3276 PVM pVM = pVCpu->CTX_SUFF(pVM); 3277 3273 3278 if (VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)) 3274 3279 fGlobal = true; /* Change this CR3 reload to be a global one. */ … … 3343 3348 * 3344 3349 * @returns VBox status code (VINF_SUCCESS). 3345 * @param pVM The VM handle.3346 3350 * @param cr3 The root of the hierarchy. 3347 3351 * @param crr The cr4, only PAE and PSE is currently used. … … 3367 3371 * @param cb How much to check. Defaults to everything. 3368 3372 */ 3369 PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb)3373 PGM_BTH_DECL(unsigned, AssertCR3)(PVMCPU pVCpu, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb) 3370 3374 { 3371 3375 #if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT 3372 3376 return 0; 3373 3377 #else 3374 unsigned cErrors = 0; 3378 unsigned cErrors = 0; 3379 PVM pVM = pVCpu->CTX_SUFF(pVM); 3375 3380 3376 3381 #if PGM_GST_TYPE == PGM_TYPE_PAE … … 3522 3527 PGSTPD pPDSrc = pgmGstGetLongModePDPtr(&pVCpu->pgm.s, GCPtr, &pPml4eSrc, &PdpeSrc, &iPDSrc); 3523 3528 3524 rc = pgmShwGetLongModePDPtr(pV M, pVCpu, GCPtr, NULL, &pPdptDst, &pPDDst);3529 rc = pgmShwGetLongModePDPtr(pVCpu, GCPtr, NULL, &pPdptDst, &pPDDst); 3525 3530 if (rc != VINF_SUCCESS) 3526 3531 { … … 4119 4124 * @retval VINF_SUCCESS. 4120 4125 * 4121 * @param pVM VM handle.4122 4126 * @param pVCpu The VMCPU handle. 4123 4127 * @param GCPhysCR3 The physical address in the CR3 register. 4124 4128 */ 4125 PGM_BTH_DECL(int, MapCR3)(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhysCR3)4129 PGM_BTH_DECL(int, MapCR3)(PVMCPU pVCpu, RTGCPHYS GCPhysCR3) 4126 4130 { 4131 PVM pVM = pVCpu->CTX_SUFF(pVM); 4132 4127 4133 /* Update guest paging info. */ 4128 4134 #if PGM_GST_TYPE == PGM_TYPE_32BIT \ … … 4330 4336 * 4331 4337 * @returns VBox status, no specials. 4332 * @param pVM VM handle.4333 4338 * @param pVCpu The VMCPU handle. 4334 4339 */ 4335 PGM_BTH_DECL(int, UnmapCR3)(PVM pVM, PVMCPU pVCpu)4340 PGM_BTH_DECL(int, UnmapCR3)(PVMCPU pVCpu) 4336 4341 { 4337 4342 LogFlow(("UnmapCR3\n")); 4338 4343 4339 int rc = VINF_SUCCESS; 4344 int rc = VINF_SUCCESS; 4345 PVM pVM = pVCpu->CTX_SUFF(pVM); 4340 4346 4341 4347 /* -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r18927 r18992 299 299 GstPdpe.u = X86_PDPE_P; 300 300 } 301 int rc = pgmShwSyncPaePDPtr(pV M, pVCpu, iPdPt << X86_PDPT_SHIFT, &GstPdpe, &pShwPaePd);301 int rc = pgmShwSyncPaePDPtr(pVCpu, iPdPt << X86_PDPT_SHIFT, &GstPdpe, &pShwPaePd); 302 302 AssertFatalRC(rc); 303 303 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r18988 r18992 3820 3820 3821 3821 /* Unmap the old CR3 value before flushing everything. */ 3822 int rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pV M, pVCpu);3822 int rc = PGM_BTH_PFN(UnmapCR3, pVCpu)(pVCpu); 3823 3823 AssertRC(rc); 3824 3824 -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r18988 r18992 191 191 EPTPDE Pde; 192 192 193 int rc = pgmShwGetEPTPDPtr(pV M, pVCpu, GCPtr, NULL, &pPDDst);193 int rc = pgmShwGetEPTPDPtr(pVCpu, GCPtr, NULL, &pPDDst); 194 194 if (rc != VINF_SUCCESS) /** @todo this function isn't expected to return informational status codes. Check callers / fix. */ 195 195 { … … 328 328 EPTPDE Pde; 329 329 330 rc = pgmShwGetEPTPDPtr(pV M, pVCpu, GCPtr, NULL, &pPDDst);330 rc = pgmShwGetEPTPDPtr(pVCpu, GCPtr, NULL, &pPDDst); 331 331 if (rc != VINF_SUCCESS) 332 332 { -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r18927 r18992 1024 1024 /** @todo might cross page boundary */ 1025 1025 fTriedAlready = true; 1026 rc = PGMPrefetchPage(pV M, pVCpu, (RTGCPTR)GCPtrTss);1026 rc = PGMPrefetchPage(pVCpu, (RTGCPTR)GCPtrTss); 1027 1027 if (rc != VINF_SUCCESS) 1028 1028 return rc; -
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r18927 r18992 458 458 /* The page might be out of sync. */ /** @todo might cross a page boundary) */ 459 459 Log(("Page %RGv out of sync -> prefetch and try again\n", pIDTEntry)); 460 rc = PGMPrefetchPage(pV M, pVCpu, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */460 rc = PGMPrefetchPage(pVCpu, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */ 461 461 if (rc != VINF_SUCCESS) 462 462 { … … 518 518 /* The page might be out of sync. */ /** @todo might cross a page boundary) */ 519 519 Log(("Page %RGv out of sync -> prefetch and try again\n", pGdtEntry)); 520 rc = PGMPrefetchPage(pV M, pVCpu, pGdtEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */520 rc = PGMPrefetchPage(pVCpu, pGdtEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */ 521 521 if (rc != VINF_SUCCESS) 522 522 { … … 588 588 Assert(eflags.Bits.u1VM || (pRegFrame->ss & X86_SEL_RPL) != 0); 589 589 /* Check maximum amount we need (10 when executing in V86 mode) */ 590 rc = PGMVerifyAccess(pV M, pVCpu, (RTGCUINTPTR)pTrapStackGC - 10*sizeof(uint32_t), 10 * sizeof(uint32_t), X86_PTE_RW);590 rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)pTrapStackGC - 10*sizeof(uint32_t), 10 * sizeof(uint32_t), X86_PTE_RW); 591 591 pTrapStack = (uint32_t *)pTrapStackGC; 592 592 #else -
trunk/src/VBox/VMM/VMMGC/SELMGC.cpp
r18927 r18992 276 276 277 277 /** @todo use different fallback? */ 278 rc = PGMPrefetchPage(pV M, pVCpu, (uintptr_t)pvSrc);278 rc = PGMPrefetchPage(pVCpu, (uintptr_t)pvSrc); 279 279 AssertMsg(rc == VINF_SUCCESS, ("PGMPrefetchPage %p failed with %Rrc\n", &pvSrc, rc)); 280 280 if (rc == VINF_SUCCESS) -
trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp
r18927 r18992 229 229 else if (VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL)) 230 230 #if 1 231 rc = PGMSyncCR3(pV M, pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));231 rc = PGMSyncCR3(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 232 232 #else 233 233 rc = VINF_PGM_SYNC_CR3; … … 990 990 * This is all PGM stuff. 991 991 */ 992 int rc = PGMTrap0eHandler(pV M, pVCpu, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);992 int rc = PGMTrap0eHandler(pVCpu, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2); 993 993 switch (rc) 994 994 { -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r18927 r18992 1236 1236 { 1237 1237 CPUMSetGuestCR3(pVCpu, pVMCB->guest.u64CR3); 1238 PGMUpdateCR3(pV M, pVCpu, pVMCB->guest.u64CR3);1238 PGMUpdateCR3(pVCpu, pVMCB->guest.u64CR3); 1239 1239 } 1240 1240 … … 1413 1413 1414 1414 /* Forward it to our trap handler first, in case our shadow pages are out of sync. */ 1415 rc = PGMTrap0eHandler(pV M, pVCpu, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)uFaultAddress);1415 rc = PGMTrap0eHandler(pVCpu, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)uFaultAddress); 1416 1416 Log2(("PGMTrap0eHandler %RGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc)); 1417 1417 if (rc == VINF_SUCCESS) … … 1721 1721 && VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL)) 1722 1722 { 1723 rc = PGMSyncCR3(pV M, pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));1723 rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 1724 1724 AssertRC(rc); 1725 1725 … … 2172 2172 2173 2173 2174 static int svmR0InterpretInvlPg(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, uint32_t uASID)2174 static int svmR0InterpretInvlPg(PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, uint32_t uASID) 2175 2175 { 2176 2176 OP_PARAMVAL param1; … … 2197 2197 * (in absence of segment override prefixes)???? 2198 2198 */ 2199 rc = PGMInvalidatePage(pV M, pVCpu, addr);2199 rc = PGMInvalidatePage(pVCpu, addr); 2200 2200 if (RT_SUCCESS(rc)) 2201 2201 { … … 2244 2244 { 2245 2245 Assert(cbOp == Cpu.opsize); 2246 rc = svmR0InterpretInvlPg(pV M, pVCpu, &Cpu, pRegFrame, uASID);2246 rc = svmR0InterpretInvlPg(pVCpu, &Cpu, pRegFrame, uASID); 2247 2247 if (RT_SUCCESS(rc)) 2248 2248 { -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r18984 r18992 1724 1724 { 1725 1725 CPUMSetGuestCR3(pVCpu, val); 1726 PGMUpdateCR3(pV M, pVCpu, val);1726 PGMUpdateCR3(pVCpu, val); 1727 1727 } 1728 1728 /* Prefetch the four PDPT entries in PAE mode. */ … … 2389 2389 2390 2390 /* Forward it to our trap handler first, in case our shadow pages are out of sync. */ 2391 rc = PGMTrap0eHandler(pV M, pVCpu, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)exitQualification);2391 rc = PGMTrap0eHandler(pVCpu, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)exitQualification); 2392 2392 Log2(("PGMTrap0eHandler %RGv returned %Rrc\n", (RTGCPTR)pCtx->rip, rc)); 2393 2393 if (rc == VINF_SUCCESS) … … 3030 3030 && VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL)) 3031 3031 { 3032 rc = PGMSyncCR3(pV M, pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));3032 rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3)); 3033 3033 AssertRC(rc); 3034 3034 } -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r18927 r18992 234 234 { 235 235 case PGMMODE_32_BIT: 236 rc = PGM_BTH_NAME_32BIT_PROT(Trap0eHandler)(pV M, pVCpu, uErr, pRegFrame, pvFault);236 rc = PGM_BTH_NAME_32BIT_PROT(Trap0eHandler)(pVCpu, uErr, pRegFrame, pvFault); 237 237 break; 238 238 case PGMMODE_PAE: 239 239 case PGMMODE_PAE_NX: 240 rc = PGM_BTH_NAME_PAE_PROT(Trap0eHandler)(pV M, pVCpu, uErr, pRegFrame, pvFault);240 rc = PGM_BTH_NAME_PAE_PROT(Trap0eHandler)(pVCpu, uErr, pRegFrame, pvFault); 241 241 break; 242 242 case PGMMODE_AMD64: 243 243 case PGMMODE_AMD64_NX: 244 rc = PGM_BTH_NAME_AMD64_PROT(Trap0eHandler)(pV M, pVCpu, uErr, pRegFrame, pvFault);244 rc = PGM_BTH_NAME_AMD64_PROT(Trap0eHandler)(pVCpu, uErr, pRegFrame, pvFault); 245 245 break; 246 246 case PGMMODE_EPT: 247 rc = PGM_BTH_NAME_EPT_PROT(Trap0eHandler)(pV M, pVCpu, uErr, pRegFrame, pvFault);247 rc = PGM_BTH_NAME_EPT_PROT(Trap0eHandler)(pVCpu, uErr, pRegFrame, pvFault); 248 248 break; 249 249 default: -
trunk/src/VBox/VMM/VMMR0/PGMR0Bth.h
r18927 r18992 25 25 *******************************************************************************/ 26 26 __BEGIN_DECLS 27 PGM_BTH_DECL(int, Trap0eHandler)(PVM pVM, PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);27 PGM_BTH_DECL(int, Trap0eHandler)(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault); 28 28 __END_DECLS 29 29 -
trunk/src/VBox/VMM/VMMTests.cpp
r18927 r18992 501 501 pHyperCtx->cr0 = X86_CR0_PE | X86_CR0_WP | X86_CR0_PG | X86_CR0_TS | X86_CR0_ET | X86_CR0_NE | X86_CR0_MP; 502 502 pHyperCtx->cr4 = X86_CR4_PGE | X86_CR4_OSFSXR | X86_CR4_OSXMMEEXCPT; 503 PGMChangeMode(pV M, pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);504 PGMSyncCR3(pV M, pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);503 PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER); 504 PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true); 505 505 506 506 VM_FF_CLEAR(pVM, VM_FF_TO_R3);
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