- Timestamp:
- May 1, 2009 4:11:18 PM (16 years ago)
- Location:
- trunk
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dbgf.h
r19291 r19293 771 771 #define DBGF_SEL_FLAT 1 772 772 773 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr); 774 VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cbOutput); 773 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr); 775 774 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cbOutput); 776 775 VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix); … … 791 790 #endif 792 791 793 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, PVMCPU pVCpu,RTSEL Sel, RTGCPTR GCPtr);792 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr); 794 793 795 794 /** @def DBGFR3DisasInstrLog 796 795 * Disassembles the specified guest context instruction and writes it to the log. 797 796 * Addresses will be attempted resolved to symbols. 797 * @thread Any EMT. 798 798 */ 799 799 #ifdef LOG_ENABLED -
trunk/include/VBox/pdmdev.h
r19043 r19293 2694 2694 2695 2695 /** 2696 * Get CPUID. 2696 * Get the specified CPUID leaf for the virtual CPU associated with the calling 2697 * thread. 2697 2698 * 2698 2699 * @param pDevIns Device instance. … … 2702 2703 * @param pEcx Where to store the ECX value. 2703 2704 * @param pEdx Where to store the EDX value. 2705 * @thread EMT. 2704 2706 */ 2705 2707 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)); -
trunk/include/VBox/vmm.h
r19257 r19293 114 114 VMMDECL(PVMCPU) VMMGetCpu(PVM pVM); 115 115 VMMDECL(PVMCPU) VMMGetCpu0(PVM pVM); 116 VMMDECL(PVMCPU) VMMGetCpu Ex(PVM pVM, RTCPUID idCpu);116 VMMDECL(PVMCPU) VMMGetCpuById(PVM pVM, RTCPUID idCpu); 117 117 VMMDECL(uint32_t) VMMGetSvnRev(void); 118 118 VMMDECL(VMMSWITCHER) VMMGetSwitcher(PVM pVM); -
trunk/src/VBox/VMM/DBGFAddr.cpp
r19286 r19293 69 69 { 70 70 SELMSELINFO SelInfo; 71 int rc = SELMR3GetSelectorInfo(pVM, VMMGetCpu Ex(pVM, idCpu), Sel, &SelInfo);71 int rc = SELMR3GetSelectorInfo(pVM, VMMGetCpuById(pVM, idCpu), Sel, &SelInfo); 72 72 if (RT_FAILURE(rc)) 73 73 return rc; … … 229 229 else 230 230 { 231 PVMCPU pVCpu = VMMGetCpu Ex(pVM, idCpu);231 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu); 232 232 if (VMCPU_IS_EMT(pVCpu)) 233 233 rc = dbgfR3AddrToPhysOnVCpu(pVCpu, pAddress, pGCPhys); … … 344 344 else 345 345 { 346 PVMCPU pVCpu = VMMGetCpu Ex(pVM, idCpu);346 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu); 347 347 if (fReadOnly) 348 348 rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, pAddress->FlatPtr, (void const **)ppvR3Ptr, &Lock); -
trunk/src/VBox/VMM/DBGFDisas.cpp
r19181 r19293 312 312 char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr) 313 313 { 314 VMCPU_ASSERT_EMT(pVCpu); 314 315 RTGCPTR GCPtr = *pGCPtr; 315 316 … … 520 521 * @returns VBox status code. 521 522 * @param pVM VM handle. 522 * @param pVCpu The virtual CPU handle, defaults to CPU 0 if NULL.523 * @param idCpu The ID of virtual CPU. 523 524 * @param Sel The code selector. This used to determin the 32/16 bit ness and 524 525 * calculation of the actual instruction address. … … 533 534 * address conversion. 534 535 */ 535 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags,536 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, 536 537 char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr) 537 538 { 538 /* If not specified, assume CPU 0. */ 539 if (!pVCpu) 540 pVCpu = &pVM->aCpus[0]; 541 542 int rc; 543 if (VMCPU_IS_EMT(pVCpu)) /* not necessary, but it's faster. */ 539 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); 540 AssertReturn(idCpu < pVM->cCPUs, VERR_INVALID_CPU_ID); 541 542 int rc; 543 PVMCPU pVCpu = VMMGetCpu(pVM); 544 if ( pVCpu 545 && pVCpu->idCpu == idCpu) /* not necessary, but it's faster. */ 544 546 rc = dbgfR3DisasInstrExOnVCpu(pVM, pVCpu, Sel, &GCPtr, fFlags, pszOutput, cchOutput, pcbInstr); 545 547 else 546 548 { 547 549 PVMREQ pReq = NULL; 548 rc = VMR3ReqCall(pV Cpu->pVMR3, VMREQDEST_FROM_VMCPU(pVCpu), &pReq, RT_INDEFINITE_WAIT,550 rc = VMR3ReqCall(pVM, VMREQDEST_FROM_ID(idCpu), &pReq, RT_INDEFINITE_WAIT, 549 551 (PFNRT)dbgfR3DisasInstrExOnVCpu, 8, 550 pVM, pVCpu, Sel, &GCPtr, fFlags, pszOutput, cchOutput, pcbInstr);552 pVM, VMMGetCpuById(pVM, idCpu), Sel, &GCPtr, fFlags, pszOutput, cchOutput, pcbInstr); 551 553 if (RT_SUCCESS(rc)) 552 554 { … … 556 558 } 557 559 return rc; 558 }559 560 561 /**562 * Disassembles an instruction.563 * Addresses will be tried resolved to symbols564 *565 * @returns VBox status code.566 * @param pVM VM handle.567 * @param pVCpu The virtual CPU handle, defaults to CPU 0 if NULL.568 * @param Sel The code selector. This used to determin the 32/16 bit ness and569 * calculation of the actual instruction address.570 * @param GCPtr The code address relative to the base of Sel.571 * @param pszOutput Output buffer.572 * @param cchOutput Size of the output buffer.573 */574 VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)575 {576 return DBGFR3DisasInstrEx(pVM, pVCpu, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);577 560 } 578 561 … … 589 572 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput) 590 573 { 591 return DBGFR3DisasInstrEx(pVM, VMMGetCpu(pVM), 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL); 574 *pszOutput = '\0'; 575 PVMCPU pVCpu = VMMGetCpu(pVM); 576 AssertReturn(pVCpu, VERR_INVALID_CONTEXT); 577 return DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, 578 pszOutput, cchOutput, NULL); 592 579 } 593 580 … … 628 615 * @param GCPtr The code address relative to the base of Sel. 629 616 */ 630 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr) 631 { 617 VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr) 618 { 619 PVMCPU pVCpu = VMMGetCpu(pVM); 620 AssertReturn(pVCpu, VERR_INVALID_CONTEXT); 621 632 622 char szBuf[256]; 633 623 szBuf[0] = '\0'; 634 int rc = DBGFR3DisasInstr (pVM, pVCpu, Sel, GCPtr, &szBuf[0], sizeof(szBuf));624 int rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, Sel, GCPtr, 0, &szBuf[0], sizeof(szBuf), NULL); 635 625 if (RT_FAILURE(rc)) 636 626 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc); -
trunk/src/VBox/VMM/DBGFMem.cpp
r19286 r19293 68 68 */ 69 69 int rc; 70 PVMCPU pVCpu = VMMGetCpuEx(pVM, idCpu);70 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu); 71 71 PGMMODE enmMode = PGMGetGuestMode(pVCpu); 72 72 if ( enmMode == PGMMODE_REAL … … 167 167 * Select DBGF worker by addressing mode. 168 168 */ 169 PVMCPU pVCpu = VMMGetCpu Ex(pVM, idCpu);169 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu); 170 170 PGMMODE enmMode = PGMGetGuestMode(pVCpu); 171 171 if ( enmMode == PGMMODE_REAL … … 335 335 * Select PGM function by addressing mode. 336 336 */ 337 PVMCPU pVCpu = VMMGetCpuEx(pVM, idCpu);337 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu); 338 338 PGMMODE enmMode = PGMGetGuestMode(pVCpu); 339 339 if ( enmMode == PGMMODE_REAL -
trunk/src/VBox/VMM/DBGFStack.cpp
r19291 r19293 292 292 else if (DBGFADDRESS_IS_FLAT(&pCur->AddrPC)) 293 293 { 294 CPUMMODE CpuMode = CPUMGetGuestMode(VMMGetCpu Ex(pVM, idCpu));294 CPUMMODE CpuMode = CPUMGetGuestMode(VMMGetCpuById(pVM, idCpu)); 295 295 if (CpuMode == CPUMMODE_REAL) 296 296 fAddrMask = UINT16_MAX; … … 397 397 */ 398 398 PCCPUMCTXCORE pCtxCore = fGuest 399 ? CPUMGetGuestCtxCore(VMMGetCpu Ex(pVM, idCpu))400 : CPUMGetHyperCtxCore(VMMGetCpu Ex(pVM, idCpu));399 ? CPUMGetGuestCtxCore(VMMGetCpuById(pVM, idCpu)) 400 : CPUMGetHyperCtxCore(VMMGetCpuById(pVM, idCpu)); 401 401 PVMREQ pReq; 402 402 int rc = VMR3ReqCall(pVM, VMREQDEST_FROM_ID(idCpu), &pReq, RT_INDEFINITE_WAIT, -
trunk/src/VBox/VMM/PATM/PATM.cpp
r19240 r19293 5864 5864 char szBuf[256]; 5865 5865 szBuf[0] = '\0'; 5866 DBGFR3DisasInstr (pVM, pVCpu, pCtx->cs, pCurPatchInstrGC, szBuf, sizeof(szBuf));5866 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC, 0, szBuf, sizeof(szBuf), NULL); 5867 5867 Log(("DIRTY: %s\n", szBuf)); 5868 5868 #endif … … 5926 5926 char szBuf[256]; 5927 5927 szBuf[0] = '\0'; 5928 DBGFR3DisasInstr (pVM, pVCpu, pCtx->cs, pCurInstrGC, szBuf, sizeof(szBuf));5928 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, 0, szBuf, sizeof(szBuf), NULL); 5929 5929 Log(("NEW: %s\n", szBuf)); 5930 5930 #endif … … 5942 5942 char szBuf[256]; 5943 5943 szBuf[0] = '\0'; 5944 DBGFR3DisasInstr (pVM, pVCpu, pCtx->cs, pCurInstrGC, szBuf, sizeof(szBuf));5944 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, 0, szBuf, sizeof(szBuf), NULL); 5945 5945 Log(("NEW: %s (FAILED)\n", szBuf)); 5946 5946 #endif … … 6140 6140 char szBuf[256]; 6141 6141 szBuf[0] = '\0'; 6142 DBGFR3DisasInstr (pVM, pVCpu, pCtx->cs, pEip, szBuf, sizeof(szBuf));6142 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pEip, 0, szBuf, sizeof(szBuf), NULL); 6143 6143 6144 6144 /* Very bad. We crashed in emitted code. Probably stack? */ -
trunk/src/VBox/VMM/PDMDevHlp.cpp
r19217 r19293 1257 1257 { 1258 1258 PDMDEV_ASSERT_DEVINS(pDevIns); 1259 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3))); 1259 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 1260 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3))); 1260 1261 return VMMGetCpu(pDevIns->Internal.s.pVMR3); 1261 1262 } … … 2164 2165 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb)); 2165 2166 2166 if (!VM_IS_EMT(pVM)) 2167 PVMCPU pVCpu = VMMGetCpu(pVM); 2168 if (!pVCpu) 2167 2169 return VERR_ACCESS_DENIED; 2168 2170 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) … … 2170 2172 #endif 2171 2173 2172 int rc = PGMPhysSimpleReadGCPtr( VMMGetCpu(pVM), pvDst, GCVirtSrc, cb);2174 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb); 2173 2175 2174 2176 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); … … 2187 2189 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb)); 2188 2190 2189 if (!VM_IS_EMT(pVM)) 2191 PVMCPU pVCpu = VMMGetCpu(pVM); 2192 if (!pVCpu) 2190 2193 return VERR_ACCESS_DENIED; 2191 2194 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) … … 2193 2196 #endif 2194 2197 2195 int rc = PGMPhysSimpleWriteGCPtr( VMMGetCpu(pVM), GCVirtDst, pvSrc, cb);2198 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb); 2196 2199 2197 2200 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)); … … 2210 2213 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys)); 2211 2214 2212 if (!VM_IS_EMT(pVM)) 2215 PVMCPU pVCpu = VMMGetCpu(pVM); 2216 if (!pVCpu) 2213 2217 return VERR_ACCESS_DENIED; 2214 2218 #if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION) … … 2216 2220 #endif 2217 2221 2218 int rc = PGMPhysGCPtr2GCPhys( VMMGetCpu(pVM), GCPtr, pGCPhys);2222 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys); 2219 2223 2220 2224 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys)); … … 2256 2260 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 2257 2261 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable)); 2258 //Assert(*(unsigned *)&fEnable <= 1);2259 2262 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable); 2260 2263 } … … 2531 2534 { 2532 2535 PDMDEV_ASSERT_DEVINS(pDevIns); 2536 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 2537 2533 2538 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n", 2534 2539 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx)); -
trunk/src/VBox/VMM/PDMDevMiscHlp.cpp
r19217 r19293 226 226 { 227 227 PDMDEV_ASSERT_DEVINS(pDevIns); 228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 228 229 return VMMGetCpuId(pDevIns->Internal.s.pVMR3); 229 230 } -
trunk/src/VBox/VMM/VM.cpp
r19267 r19293 1870 1870 } 1871 1871 1872 /* 1872 /* 1873 1873 * Now all queued VCPU requests (again, there shouldn't be any). 1874 1874 */ … … 3317 3317 3318 3318 /** 3319 * Returns the VMCPU id of the current EMT thread. 3319 * Gets the ID virtual of the virtual CPU assoicated with the calling thread. 3320 * 3321 * @returns The CPU ID. NIL_VMCPUID if the thread isn't an EMT. 3320 3322 * 3321 3323 * @param pVM The VM handle. 3322 * @thread EMT3323 3324 */ 3324 3325 VMMR3DECL(RTCPUID) VMR3GetVMCPUId(PVM pVM) 3325 3326 { 3326 3327 PUVMCPU pUVCpu = (PUVMCPU)RTTlsGet(pVM->pUVM->vm.s.idxTLS); 3327 3328 AssertMsg(pUVCpu, ("RTTlsGet %d failed!\n", pVM->pUVM->vm.s.idxTLS));3329 return pUVCpu->idCpu;3328 return pUVCpu 3329 ? pUVCpu->idCpu 3330 : NIL_VMCPUID; 3330 3331 } 3331 3332 -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp
r19262 r19293 69 69 Assert(pVM); 70 70 PVMCPU pVCpu = VMMGetCpu(pVM); 71 Assert(pVCpu); 71 72 72 73 /* … … 223 224 #else 224 225 PVM pVM = pCritSect->s.CTX_SUFF(pVM); 225 Assert(pVM); 226 Assert(pVM); Assert(VMMGetCpu(pVM)); 226 227 return pCritSect->s.Core.NativeThreadOwner == VMMGetCpu(pVM)->hNativeThread; 227 228 #endif -
trunk/src/VBox/VMM/VMMAll/VMMAll.cpp
r19228 r19293 48 48 49 49 /** 50 * Gets the current virtual CPU ID.50 * Gets the ID virtual of the virtual CPU assoicated with the calling thread. 51 51 * 52 * @returns The CPU ID. 52 * @returns The CPU ID. NIL_VMCPUID if the thread isn't an EMT. 53 * 53 54 * @param pVM Pointer to the shared VM handle. 54 * @thread EMT55 55 */ 56 56 VMMDECL(VMCPUID) VMMGetCpuId(PVM pVM) 57 57 { 58 #ifdef IN_RING3 59 /* Only emulation thread(s) allowed to ask for CPU id */ 60 if (!VM_IS_EMT(pVM)) 61 return 0; 62 #endif 58 #if defined(IN_RING3) 59 return VMR3GetVMCPUId(pVM); 63 60 64 /* Only emulation thread(s) allowed to ask for CPU id */ 61 #elif defined(IN_RING0) 62 /* ASSUME that only EMTs calls this function in R0. */ 65 63 VM_ASSERT_EMT(pVM); 66 67 /* Shortcut for one CPU */68 64 if (pVM->cCPUs == 1) 69 65 return 0; 66 return HWACCMR0GetVMCPUId(pVM); 70 67 71 #if defined(IN_RING3) 72 return VMR3GetVMCPUId(pVM); 73 #elif defined(IN_RING0) 74 return HWACCMR0GetVMCPUId(pVM); 75 #endif /* IN_RING0 */ 76 77 AssertFailed(); 68 #else /* RC: Always EMT(0) */ 78 69 return 0; 70 #endif 79 71 } 80 72 73 81 74 /** 82 * Returns the VMCPU of the c urrent EMT thread.75 * Returns the VMCPU of the calling EMT. 83 76 * 84 * @returns The VMCPU pointer. 77 * @returns The VMCPU pointer. NULL if not an EMT. 78 * 85 79 * @param pVM The VM to operate on. 86 80 */ … … 88 82 { 89 83 #ifdef IN_RING3 90 /* Only emulation thread(s) allowed to ask for CPU id */ 91 if (!VM_IS_EMT(pVM)) 92 return &pVM->aCpus[0]; 93 #endif 94 /* Only emulation thread(s) allowed to ask for CPU id */ 84 VMCPUID idCpu = VMR3GetVMCPUId(pVM); 85 if (idCpu == NIL_VMCPUID) 86 return NULL; 87 Assert(idCpu < pVM->cCPUs); 88 return &pVM->aCpus[VMR3GetVMCPUId(pVM)]; 89 90 #elif defined(IN_RING0) 91 /* ASSUME that only EMTs calls this function in R0. */ 95 92 VM_ASSERT_EMT(pVM); 96 97 /* Shortcut for one CPU */98 93 if (pVM->cCPUs == 1) 99 94 return &pVM->aCpus[0]; 95 return HWACCMR0GetVMCPU(pVM); 100 96 101 #ifdef IN_RING3 102 return &pVM->aCpus[VMR3GetVMCPUId(pVM)]; 103 #elif defined(IN_RING0) 104 return HWACCMR0GetVMCPU(pVM); 97 #else /* RC: Always EMT(0) */ 98 return &pVM->aCpus[0]; 105 99 #endif /* IN_RING0 */ 100 } 106 101 107 AssertFailed();108 return &pVM->aCpus[0];109 }110 102 111 103 /** … … 121 113 } 122 114 115 123 116 /** 124 117 * Returns the VMCPU of the specified virtual CPU. 125 118 * 126 * @returns The VMCPU pointer. 119 * @returns The VMCPU pointer. NULL if idCpu is invalid. 120 * 127 121 * @param pVM The VM to operate on. 122 * @param idCpu The ID of the virtual CPU. 128 123 */ 129 VMMDECL(PVMCPU) VMMGetCpu Ex(PVM pVM, RTCPUID idCpu)124 VMMDECL(PVMCPU) VMMGetCpuById(PVM pVM, RTCPUID idCpu) 130 125 { 131 126 AssertReturn(idCpu < pVM->cCPUs, NULL); 132 127 return &pVM->aCpus[idCpu]; 133 128 } 129 134 130 135 131 /** … … 146 142 } 147 143 144 148 145 /** 149 146 * Queries the current switcher … … 156 153 return pVM->vmm.s.enmSwitcher; 157 154 } 155 -
trunk/src/VBox/VMM/VMMGuruMeditation.cpp
r19291 r19293 324 324 /* Disassemble the instruction. */ 325 325 char szInstr[256]; 326 rc2 = DBGFR3DisasInstrEx(pVM, pVCpu , 0, 0, DBGF_DISAS_FLAGS_CURRENT_HYPER, &szInstr[0], sizeof(szInstr), NULL);326 rc2 = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, 0, 0, DBGF_DISAS_FLAGS_CURRENT_HYPER, &szInstr[0], sizeof(szInstr), NULL); 327 327 if (RT_SUCCESS(rc2)) 328 328 pHlp->pfnPrintf(pHlp, -
trunk/src/recompiler_new/VBoxREMWrapper.cpp
r19141 r19293 557 557 { 558 558 { REMPARMDESC_FLAGS_INT, sizeof(PVM), NULL }, 559 { REMPARMDESC_FLAGS_INT, sizeof( PVMCPU), NULL },559 { REMPARMDESC_FLAGS_INT, sizeof(VMCPUID), NULL }, 560 560 { REMPARMDESC_FLAGS_INT, sizeof(RTSEL), NULL }, 561 561 { REMPARMDESC_FLAGS_INT, sizeof(RTGCPTR), NULL }, -
trunk/src/recompiler_new/VBoxRecompiler.c
r19141 r19293 1393 1393 return false; 1394 1394 } 1395 1395 1396 1396 Assert(env->pVCpu && PGMPhysIsA20Enabled(env->pVCpu)); 1397 1397 *piException = EXCP_EXECUTE_RAW; … … 3709 3709 uint32_t cbInstr; 3710 3710 int rc = DBGFR3DisasInstrEx(pVM, 3711 pVCpu ,3711 pVCpu->idCpu, 3712 3712 cs, 3713 3713 eip,
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