- Timestamp:
- May 6, 2009 7:33:30 PM (16 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r19417 r19457 914 914 } 915 915 916 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC); 917 916 918 /* When external interrupts are pending, we should exit the VM when IF is set. */ 917 919 /* Note! *After* VM_FF_INHIBIT_INTERRUPTS check!!! */ … … 1070 1072 pVCpu->hwaccm.s.svm.pfnVMRun(pVM->hwaccm.s.svm.pVMCBHostPhys, pVCpu->hwaccm.s.svm.pVMCBPhys, pCtx, pVM, pVCpu); 1071 1073 TMNotifyEndOfExecution(pVCpu); 1074 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 1072 1075 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, x); 1073 1076 … … 2127 2130 rc = VINF_EM_RAW_EMULATE_INSTR; 2128 2131 2132 /* Just set the correct state here instead of trying to catch every goto above. */ 2133 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 2134 2129 2135 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); 2130 2136 return rc; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r19417 r19457 2107 2107 /** @todo check timers?? */ 2108 2108 2109 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC); 2110 2109 2111 /* TPR caching using CR8 is only available in 64 bits mode */ 2110 2112 /* Note the 32 bits exception for AMD (X86_CPUID_AMD_FEATURE_ECX_CR8L), but that appears missing in Intel CPUs */ … … 2221 2223 rc = pVCpu->hwaccm.s.vmx.pfnStartVM(pVCpu->hwaccm.s.fResumeVM, pCtx, &pVCpu->hwaccm.s.vmx.VMCSCache, pVM, pVCpu); 2222 2224 TMNotifyEndOfExecution(pVCpu); 2225 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 2223 2226 2224 2227 AssertMsg(!pVCpu->hwaccm.s.vmx.VMCSCache.Write.cValidEntries, ("pVCpu->hwaccm.s.vmx.VMCSCache.Write.cValidEntries=%d\n", pVCpu->hwaccm.s.vmx.VMCSCache.Write.cValidEntries)); … … 3514 3517 pVCpu->hwaccm.s.vmx.lasterror.idCurrentCpu = RTMpCpuId(); 3515 3518 } 3519 3520 /* Just set the correct state here instead of trying to catch every goto above. */ 3521 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 3516 3522 3517 3523 STAM_STATS({
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