Changeset 20003 in vbox
- Timestamp:
- May 25, 2009 2:38:49 PM (16 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r20001 r20003 2484 2484 TRPMSetFaultAddress(pVCpu, exitQualification); 2485 2485 2486 /* Shortcut for APIC TPR reads and writes; 32 bits guests only */ 2487 if ( (exitQualification & 0xfff) == 0x080 2488 && !(errCode & X86_TRAP_PF_P) /* not present */ 2489 && fSetupTPRCaching 2490 && !CPUMIsGuestInLongModeEx(pCtx)) 2491 { 2492 RTGCPHYS GCPhysApicBase, GCPhys; 2493 PDMApicGetBase(pVM, &GCPhysApicBase); /* @todo cache this */ 2494 GCPhysApicBase &= PAGE_BASE_GC_MASK; 2495 2496 rc = PGMGstGetPage(pVCpu, (RTGCPTR)exitQualification, NULL, &GCPhys); 2497 if ( rc == VINF_SUCCESS 2498 && GCPhys == GCPhysApicBase) 2499 { 2500 Log(("Enable VT-x virtual APIC access filtering\n")); 2501 pVCpu->hwaccm.s.vmx.proc_ctls2 |= VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC; 2502 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS2, pVCpu->hwaccm.s.vmx.proc_ctls2); 2503 AssertRC(rc); 2504 2505 rc = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hwaccm.s.vmx.pAPICPhys, X86_PTE_RW | X86_PTE_P); 2506 AssertRC(rc); 2507 } 2508 } 2509 2486 2510 /* Forward it to our trap handler first, in case our shadow pages are out of sync. */ 2487 2511 rc = PGMTrap0eHandler(pVCpu, errCode, CPUMCTX2CORE(pCtx), (RTGCPTR)exitQualification); … … 2941 2965 errCode |= X86_TRAP_PF_P; 2942 2966 } 2943 #if 02944 2967 else { 2945 2968 /* Shortcut for APIC TPR reads and writes; 32 bits guests only */ … … 2947 2970 && GCPhys > 0x1000000 /* to skip VGA frame buffer accesses */ 2948 2971 && !CPUMIsGuestInLongModeEx(pCtx) 2949 && (pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC))2972 && fSetupTPRCaching) 2950 2973 { 2951 2974 RTGCPHYS GCPhysApicBase; … … 2964 2987 } 2965 2988 } 2966 #endif2967 2989 Log(("EPT Page fault %x at %RGp error code %x\n", (uint32_t)exitQualification, GCPhys, errCode)); 2968 2990
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