VirtualBox

Changeset 20056 in vbox


Ignore:
Timestamp:
May 27, 2009 7:33:15 AM (16 years ago)
Author:
vboxsync
Message:

Backed out 47770 & 47771 (failed experiment)

Location:
trunk
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/pdmapi.h

    r20037 r20056  
    5050VMMDECL(int)    PDMApicSetBase(PVM pVM, uint64_t u64Base);
    5151VMMDECL(int)    PDMApicGetBase(PVM pVM, uint64_t *pu64Base);
    52 VMMDECL(int)    PDMApicSetTPREx(PVMCPU pVCpu, uint8_t u8TPR, bool fMMIOFormat);
    53 VMMDECL(int)    PDMApicGetTPREx(PVMCPU pVCpu, uint8_t *pu8TPR, bool fMMIOFormat, bool *pfPending);
    5452VMMDECL(int)    PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR);
    5553VMMDECL(int)    PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending);

  • trunk/include/VBox/pdmdev.h

    r20037 r20056  
    985985     * @param   idCpu           VCPU id
    986986     * @param   u8TPR           The new TPR.
    987      * @param   fMMIOFormat     Update as if MMIO write to ApicBase + 0x80
    988      */
    989     DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     987     */
     988    DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    990989
    991990    /**
    … …  
    995994     * @param   pDevIns         Device instance of the APIC.
    996995     * @param   idCpu           VCPU id
    997      * @param   fMMIOFormat     Return as if MMIO read from ApicBase + 0x80
    998      */
    999     DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     996     */
     997    DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    1000998
    1001999    /**

  • trunk/src/VBox/Devices/PC/DevAPIC.cpp

    r20039 r20056  
    438438PDMBOTHCBDECL(void) apicSetBase(PPDMDEVINS pDevIns, uint64_t val);
    439439PDMBOTHCBDECL(uint64_t) apicGetBase(PPDMDEVINS pDevIns);
    440 PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val, bool fMMIOFormat);
    441 PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat);
     440PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val);
     441PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu);
    442442PDMBOTHCBDECL(int)  apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
    443443                                           uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
    … …  
    670670}
    671671
    672 PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val, bool fMMIOFormat)
     672PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val)
    673673{
    674674    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
    675675    APICState *s = getLapicById(dev, idCpu);
    676 
    677     if (!fMMIOFormat)
    678         val = (val & 0x0f) << 4;
    679 
    680     LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, val));
    681     apic_update_tpr(dev, s, val);
    682 }
    683 
    684 PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat)
     676    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, (val & 0x0f) << 4));
     677    apic_update_tpr(dev, s, (val & 0x0f) << 4);
     678}
     679
     680PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu)
    685681{
    686682    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
    687683    APICState *s = getLapicById(dev, idCpu);
    688 
    689     if (fMMIOFormat)
    690     {
    691         Log2(("apicGetTPR: returns %#x\n", s->tpr));
    692         return s->tpr;
    693     }
    694     else
    695     {
    696         Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
    697         return s->tpr >> 4;
    698     }
     684    Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
     685    return s->tpr >> 4;
    699686}
    700687

  • trunk/src/VBox/VMM/PDMInternal.h

    r20037 r20056  
    420420    DECLR3CALLBACKMEMBER(uint64_t,  pfnGetBaseR3,(PPDMDEVINS pDevIns));
    421421    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    422     DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     422    DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    423423    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    424     DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     424    DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    425425    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    426426    DECLR3CALLBACKMEMBER(int,       pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
    … …  
    442442    DECLR0CALLBACKMEMBER(uint64_t,  pfnGetBaseR0,(PPDMDEVINS pDevIns));
    443443    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    444     DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     444    DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    445445    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    446     DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     446    DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    447447     /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    448448    DECLR0CALLBACKMEMBER(uint32_t,  pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
    … …  
    464464    DECLRCCALLBACKMEMBER(uint64_t,  pfnGetBaseRC,(PPDMDEVINS pDevIns));
    465465    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    466     DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     466    DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    467467    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    468     DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     468    DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    469469    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    470470    DECLRCCALLBACKMEMBER(uint32_t,  pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));

  • trunk/src/VBox/VMM/VMMAll/PDMAll.cpp

    r20037 r20056  
    223223
    224224/**
    225  * Set the TPR (task priority register).
     225 * Set the TPR (task priority register?).
    226226 *
    227227 * @returns VBox status code.
    228228 * @param   pVCpu           VMCPU handle.
    229229 * @param   u8TPR           The new TPR.
    230  * @param   fMMIOFormat     Update as if MMIO write to ApicBase + 0x80
    231  */
    232 VMMDECL(int) PDMApicSetTPREx(PVMCPU pVCpu, uint8_t u8TPR, bool fMMIOFormat)
     230 */
     231VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR)
    233232{
    234233    PVM pVM = pVCpu->CTX_SUFF(pVM);
    … …  
    237236        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
    238237        pdmLock(pVM);
    239         pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR, fMMIOFormat);
    240         pdmUnlock(pVM);
    241         return VINF_SUCCESS;
    242     }
    243     return VERR_PDM_NO_APIC_INSTANCE;
    244 }
    245 
    246 /**
    247  * Set the TPR (task priority register).
    248  *
    249  * @returns VBox status code.
    250  * @param   pVCpu           VMCPU handle.
    251  * @param   u8TPR           The new TPR.
    252  */
    253 VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR)
    254 {
    255     return PDMApicSetTPREx(pVCpu, u8TPR, false /* TPR only */);
    256 }
    257 
    258 /**
    259  * Get the TPR (task priority register).
    260  *
    261  * @returns The current TPR.
    262  * @param   pVCpu           VMCPU handle.
    263  * @param   pu8TPR          Where to store the TRP.
    264  * @param   fMMIOFormat     Return as if MMIO read from ApicBase + 0x80
    265  * @param   pfPending       Pending interrupt state (out).
    266 */
    267 VMMDECL(int) PDMApicGetTPREx(PVMCPU pVCpu, uint8_t *pu8TPR, bool fMMIOFormat, bool *pfPending)
    268 {
    269     PVM pVM = pVCpu->CTX_SUFF(pVM);
    270     if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
    271     {
    272         Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
    273         pdmLock(pVM);
    274         *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, fMMIOFormat);
    275         if (pfPending)
    276             *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
    277         pdmUnlock(pVM);
    278         return VINF_SUCCESS;
    279     }
    280     *pu8TPR = 0;
     238        pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR);
     239        pdmUnlock(pVM);
     240        return VINF_SUCCESS;
     241    }
    281242    return VERR_PDM_NO_APIC_INSTANCE;
    282243}
    … …  
    293254VMMDECL(int) PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending)
    294255{
    295     return PDMApicGetTPREx(pVCpu, pu8TPR, false /* TPR only */, pfPending);
     256    PVM pVM = pVCpu->CTX_SUFF(pVM);
     257    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
     258    {
     259        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
     260        pdmLock(pVM);
     261        *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu);
     262        if (pfPending)
     263            *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
     264        pdmUnlock(pVM);
     265        return VINF_SUCCESS;
     266    }
     267    *pu8TPR = 0;
     268    return VERR_PDM_NO_APIC_INSTANCE;
    296269}
    297270

  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r20046 r20056  
    946946
    947947        /* TPR caching in CR8 */
    948         int rc = PDMApicGetTPREx(pVCpu, &u8LastVTPR, pVM->hwaccm.s.svm.fTPRPatching, &fPending);
     948        int rc = PDMApicGetTPR(pVCpu, &u8LastVTPR, &fPending);
    949949        AssertRC(rc);
    950950        pVMCB->ctrl.IntCtrl.n.u8VTPR = u8LastVTPR;
    … …  
    13371337    if (fSyncTPR)
    13381338    {
    1339         rc = PDMApicSetTPREx(pVCpu, pVMCB->ctrl.IntCtrl.n.u8VTPR, pVM->hwaccm.s.svm.fTPRPatching);
     1339        rc = PDMApicSetTPR(pVCpu, pVMCB->ctrl.IntCtrl.n.u8VTPR);
    13401340        AssertRC(rc);
    13411341    }
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