Changeset 20142 in vbox
- Timestamp:
- May 29, 2009 10:14:02 AM (16 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/HWACCM.cpp
r20132 r20142 542 542 Assert(pVCpu->hwaccm.s.paStatExitReasonR0 != NIL_RTR0PTR); 543 543 # endif 544 545 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_HWACCM, (void **)&pVCpu->hwaccm.s.paStatInjectedIrqs); 546 AssertRCReturn(rc, rc); 547 pVCpu->hwaccm.s.paStatInjectedIrqsR0 = MMHyperR3ToR0(pVM, pVCpu->hwaccm.s.paStatInjectedIrqs); 548 for (unsigned j = 0; j < 255; j++) 549 STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.paStatInjectedIrqs[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.", 550 j < 0x20 ? "/HWACCM/CPU%d/Interrupt/Trap/%02X" : "/TRPM/CPU%d/Interrupt/IRQ/%02X", i, j); 551 544 552 } 545 553 #endif /* VBOX_WITH_STATISTICS */ … … 1296 1304 PVMCPU pVCpu = &pVM->aCpus[i]; 1297 1305 1306 #ifdef VBOX_WITH_STATISTICS 1298 1307 if (pVCpu->hwaccm.s.paStatExitReason) 1299 1308 { … … 1302 1311 pVCpu->hwaccm.s.paStatExitReasonR0 = NIL_RTR0PTR; 1303 1312 } 1313 if (pVCpu->hwaccm.s.paStatInjectedIrqs) 1314 { 1315 MMHyperFree(pVM, pVCpu->hwaccm.s.paStatInjectedIrqs); 1316 pVCpu->hwaccm.s.paStatInjectedIrqs = NULL; 1317 pVCpu->hwaccm.s.paStatInjectedIrqsR0 = NIL_RTR0PTR; 1318 } 1319 #endif 1320 1304 1321 #ifdef VBOX_WITH_CRASHDUMP_MAGIC 1305 1322 memset(pVCpu->hwaccm.s.vmx.VMCSCache.aMagic, 0, sizeof(pVCpu->hwaccm.s.vmx.VMCSCache.aMagic)); -
trunk/src/VBox/VMM/HWACCMInternal.h
r20133 r20142 58 58 #define MAX_EXITREASON_STAT 0x100 59 59 #define MASK_EXITREASON_STAT 0xff 60 #define MASK_INJECT_IRQ_STAT 0xff 60 61 61 62 /** @name Changed flags … … 673 674 674 675 676 #ifdef VBOX_WITH_STATISTICS 675 677 R3PTRTYPE(PSTAMCOUNTER) paStatExitReason; 676 678 R0PTRTYPE(PSTAMCOUNTER) paStatExitReasonR0; 679 R3PTRTYPE(PSTAMCOUNTER) paStatInjectedIrqs; 680 R0PTRTYPE(PSTAMCOUNTER) paStatInjectedIrqsR0; 681 #endif 677 682 } HWACCMCPU; 678 683 /** Pointer to HWACCM VM instance data. */ -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r20132 r20142 362 362 * Injects an event (trap or external interrupt) 363 363 * 364 * @param pV M The VMto operate on.364 * @param pVCpu The VMCPU to operate on. 365 365 * @param pVMCB SVM control block 366 366 * @param pCtx CPU Context 367 367 * @param pIntInfo SVM interrupt info 368 368 */ 369 inline void SVMR0InjectEvent(PVM pVM, SVM_VMCB *pVMCB, CPUMCTX *pCtx, SVM_EVENT* pEvent)369 inline void SVMR0InjectEvent(PVMCPU pVCpu, SVM_VMCB *pVMCB, CPUMCTX *pCtx, SVM_EVENT* pEvent) 370 370 { 371 #ifdef VBOX_WITH_STATISTICS 372 STAM_COUNTER_INC(&pVCpu->hwaccm.s.paStatInjectedIrqsR0[pEvent->n.u8Vector & MASK_INJECT_IRQ_STAT]); 373 #endif 374 371 375 #ifdef VBOX_STRICT 372 376 if (pEvent->n.u8Vector == 0xE) … … 378 382 { 379 383 Log(("INJ-EI: %x at %RGv\n", pEvent->n.u8Vector, (RTGCPTR)pCtx->rip)); 380 Assert(!VMCPU_FF_ISSET( VMMGetCpu(pVM), VMCPU_FF_INHIBIT_INTERRUPTS));384 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)); 381 385 Assert(pCtx->eflags.u32 & X86_EFL_IF); 382 386 } … … 409 413 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntReinject); 410 414 Event.au64[0] = pVCpu->hwaccm.s.Event.intInfo; 411 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);415 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 412 416 413 417 pVCpu->hwaccm.s.Event.fPending = false; … … 424 428 Event.n.u3Type = SVM_EVENT_NMI; 425 429 426 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);430 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 427 431 pVM->hwaccm.s.fInjectNMI = false; 428 432 return VINF_SUCCESS; … … 531 535 532 536 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatIntInject); 533 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);537 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 534 538 } /* if (interrupts can be dispatched) */ 535 539 … … 1392 1396 Event.n.u8Vector = X86_XCPT_DB; 1393 1397 1394 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1398 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1395 1399 1396 1400 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 1428 1432 Event.n.u8Vector = X86_XCPT_NM; 1429 1433 1430 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1434 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1431 1435 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); 1432 1436 goto ResumeExecution; … … 1456 1460 Event.n.u32ErrorCode = errCode; 1457 1461 1458 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1462 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1459 1463 1460 1464 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 1576 1580 Event.n.u32ErrorCode = errCode; 1577 1581 1578 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1582 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1579 1583 1580 1584 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 1607 1611 Event.n.u8Vector = X86_XCPT_MF; 1608 1612 1609 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1613 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1610 1614 1611 1615 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 1651 1655 } 1652 1656 Log(("Trap %x at %04x:%RGv esi=%x\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->esi)); 1653 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);1657 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1654 1658 1655 1659 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 2110 2114 Event.n.u8Vector = X86_XCPT_DB; 2111 2115 2112 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);2116 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 2113 2117 2114 2118 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); … … 2188 2192 2189 2193 Log(("Forced #UD trap at %RGv\n", (RTGCPTR)pCtx->rip)); 2190 SVMR0InjectEvent(pV M, pVMCB, pCtx, &Event);2194 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 2191 2195 2192 2196 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r20132 r20142 627 627 int rc; 628 628 uint32_t iGate = VMX_EXIT_INTERRUPTION_INFO_VECTOR(intInfo); 629 630 #ifdef VBOX_WITH_STATISTICS 631 STAM_COUNTER_INC(&pVCpu->hwaccm.s.paStatInjectedIrqsR0[iGate & MASK_INJECT_IRQ_STAT]); 632 #endif 629 633 630 634 #ifdef VBOX_STRICT
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