Index: /trunk/src/VBox/Devices/Graphics/DevVGA.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA.cpp	(revision 20443)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA.cpp	(revision 20444)
@@ -2163,5 +2163,5 @@
     uint32_t v, addr1, addr;
     vga_draw_line_func *vga_draw_line;
-    bool offsets_changed;
+    int offsets_changed;
 
     offsets_changed = update_basic_params(s);
@@ -3044,12 +3044,19 @@
 PDMBOTHCBDECL(int) vgaIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
 {
+    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     NOREF(pvUser);
     if (cb == 1)
-        vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32);
+        vga_ioport_write(s, Port, u32);
     else if (cb == 2)
     {
-        vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32 & 0xff);
-        vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port + 1, u32 >> 8);
-    }
+        vga_ioport_write(s, Port, u32 & 0xff);
+        vga_ioport_write(s, Port + 1, u32 >> 8);
+    }
+    PDMCritSectLeave(&s->lock);
     return VINF_SUCCESS;
 }
@@ -3069,17 +3076,25 @@
 PDMBOTHCBDECL(int) vgaIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
 {
+    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
     NOREF(pvUser);
+
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
+    rc = VERR_IOM_IOPORT_UNUSED;
     if (cb == 1)
     {
-        *pu32 = vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port);
-        return VINF_SUCCESS;
+        *pu32 = vga_ioport_read(s, Port);
+        rc = VINF_SUCCESS;
     }
     else if (cb == 2)
     {
-        *pu32 = vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port)
-             | (vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port + 1) << 8);
-        return VINF_SUCCESS;
-    }
-    return VERR_IOM_IOPORT_UNUSED;
+        *pu32 = vga_ioport_read(s, Port)
+             | (vga_ioport_read(s, Port + 1) << 8);
+        rc = VINF_SUCCESS;
+    }
+    PDMCritSectLeave(&s->lock);
+    return rc;
 }
 
@@ -3100,4 +3115,8 @@
     VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
 
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     NOREF(pvUser);
 
@@ -3107,4 +3126,5 @@
     {
         HGSMIGuestWrite (s->pHGSMI, u32);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
@@ -3112,4 +3132,5 @@
     {
         HGSMIHostWrite (s->pHGSMI, u32);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
@@ -3120,4 +3141,5 @@
         Log(("vgaIOPortWriteVBEData: %s - Switching to host...\n",
              s->vbe_index == VBE_DISPI_INDEX_VBVA_HOST? "VBE_DISPI_INDEX_VBVA_HOST": "VBE_DISPI_INDEX_VBVA_GUEST"));
+        PDMCritSectLeave(&s->lock);
         return VINF_IOM_HC_IOPORT_WRITE;
     }
@@ -3129,8 +3151,9 @@
      * This has to be done on the host in order to execute the connector callbacks.
      */
-    if (s->vbe_index == VBE_DISPI_INDEX_ENABLE
-        || s->vbe_index == VBE_DISPI_INDEX_VBOX_VIDEO)
+    if (    s->vbe_index == VBE_DISPI_INDEX_ENABLE
+        ||  s->vbe_index == VBE_DISPI_INDEX_VBOX_VIDEO)
     {
         Log(("vgaIOPortWriteVBEData: VBE_DISPI_INDEX_ENABLE - Switching to host...\n"));
+        PDMCritSectLeave(&s->lock);
         return VINF_IOM_HC_IOPORT_WRITE;
     }
@@ -3145,5 +3168,7 @@
             {
                 s->fWriteVBEData = false;
-                return vbe_ioport_write_data(s, Port, u32 & 0xFF);
+                rc = vbe_ioport_write_data(s, Port, u32 & 0xFF);
+                PDMCritSectLeave(&s->lock);
+                return rc;
             }
             else
@@ -3151,4 +3176,5 @@
                 s->cbWriteVBEData = u32 & 0xFF;
                 s->fWriteVBEData = true;
+                PDMCritSectLeave(&s->lock);
                 return VINF_SUCCESS;
             }
@@ -3177,8 +3203,12 @@
 //        }
 //#endif
-        return vbe_ioport_write_data(s, Port, u32);
+        rc = vbe_ioport_write_data(s, Port, u32);
+        PDMCritSectLeave(&s->lock);
+        return rc;
     }
     else
         AssertMsgFailed(("vgaIOPortWriteVBEData: Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
+
+    PDMCritSectLeave(&s->lock);
     return VINF_SUCCESS;
 }
@@ -3199,12 +3229,18 @@
 {
     NOREF(pvUser);
+    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
 #ifdef VBE_BYTEWISE_IO
     if (cb == 1)
     {
-        VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
         if (!s->fWriteVBEIndex)
         {
             s->cbWriteVBEIndex = u32 & 0x00FF;
             s->fWriteVBEIndex = true;
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3213,4 +3249,5 @@
             s->fWriteVBEIndex = false;
             vbe_ioport_write_index(s, Port, (s->cbWriteVBEIndex << 8) | (u32 & 0x00FF));
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3219,7 +3256,8 @@
 #endif
     if (cb == 2)
-        vbe_ioport_write_index(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32);
+        vbe_ioport_write_index(s, Port, u32);
     else
         AssertMsgFailed(("vgaIOPortWriteVBEIndex: Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
+    PDMCritSectLeave(&s->lock);
     return VINF_SUCCESS;
 }
@@ -3240,11 +3278,16 @@
 {
     NOREF(pvUser);
+    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
+    if (rc != VINF_SUCCESS)
+        return rc;
 
 #ifdef VBOX_WITH_HGSMI
-    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
 #ifdef IN_RING3
     if (s->vbe_index == VBE_DISPI_INDEX_VBVA_GUEST)
     {
         *pu32 = HGSMIGuestRead (s->pHGSMI);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
@@ -3252,4 +3295,5 @@
     {
         *pu32 = HGSMIHostRead (s->pHGSMI);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
@@ -3260,4 +3304,5 @@
         Log(("vgaIOPortWriteVBEData: %s - Switching to host...\n",
              s->vbe_index == VBE_DISPI_INDEX_VBVA_HOST? "VBE_DISPI_INDEX_VBVA_HOST": "VBE_DISPI_INDEX_VBVA_GUEST"));
+        PDMCritSectLeave(&s->lock);
         return VINF_IOM_HC_IOPORT_READ;
     }
@@ -3268,10 +3313,9 @@
     if (cb == 1)
     {
-        VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
-
         if (!s->fReadVBEData)
         {
             *pu32 = (vbe_ioport_read_data(s, Port) >> 8) & 0xFF;
             s->fReadVBEData = true;
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3280,4 +3324,5 @@
             *pu32 = vbe_ioport_read_data(s, Port) & 0xFF;
             s->fReadVBEData = false;
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3287,15 +3332,17 @@
     if (cb == 2)
     {
-        *pu32 = vbe_ioport_read_data(PDMINS_2_DATA(pDevIns, PVGASTATE), Port);
+        *pu32 = vbe_ioport_read_data(s, Port);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
     else if (cb == 4)
     {
-        VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
         /* Quick hack for getting the vram size. */
         *pu32 = s->vram_size;
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
     AssertMsgFailed(("vgaIOPortReadVBEData: Port=%#x cb=%d\n", Port, cb));
+    PDMCritSectLeave(&s->lock);
     return VERR_IOM_IOPORT_UNUSED;
 }
@@ -3316,13 +3363,18 @@
 {
     NOREF(pvUser);
+    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
 #ifdef VBE_BYTEWISE_IO
     if (cb == 1)
     {
-        VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
-
         if (!s->fReadVBEIndex)
         {
             *pu32 = (vbe_ioport_read_index(s, Port) >> 8) & 0xFF;
             s->fReadVBEIndex = true;
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3331,4 +3383,5 @@
             *pu32 = vbe_ioport_read_index(s, Port) & 0xFF;
             s->fReadVBEIndex = false;
+            PDMCritSectLeave(&s->lock);
             return VINF_SUCCESS;
         }
@@ -3338,7 +3391,9 @@
     if (cb == 2)
     {
-        *pu32 = vbe_ioport_read_index(PDMINS_2_DATA(pDevIns, PVGASTATE), Port);
+        *pu32 = vbe_ioport_read_index(s, Port);
+        PDMCritSectLeave(&s->lock);
         return VINF_SUCCESS;
     }
+    PDMCritSectLeave(&s->lock);
     AssertMsgFailed(("vgaIOPortReadVBEIndex: Port=%#x cb=%d\n", Port, cb));
     return VERR_IOM_IOPORT_UNUSED;
@@ -3384,5 +3439,5 @@
  *
  * @returns VBox status code.
- * @param   pDevIns     Pointer device instance.
+ * @param   pThis       VGA device structure
  * @param   pvUser      User argument - ignored.
  * @param   GCPhysAddr  Physical address of memory to write.
@@ -3391,7 +3446,6 @@
  * @param   cItems      Number of data items to write.
  */
-PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems)
-{
-    PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
+static int vgaInternalMMIOFill(PVGASTATE pThis, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems)
+{
     uint32_t b;
     uint32_t write_mask, bit_mask, set_mask;
@@ -3399,4 +3453,5 @@
     unsigned i;
     NOREF(pvUser);
+
     for (i = 0; i < cbItem; i++)
     {
@@ -3558,4 +3613,29 @@
     return VINF_SUCCESS;
 }
+
+/**
+ * Legacy VGA memory (0xa0000 - 0xbffff) write hook, to be called from IOM and from the inside of VGADeviceGC.cpp.
+ * This is the advanced version of vga_mem_writeb function.
+ *
+ * @returns VBox status code.
+ * @param   pDevIns     Pointer device instance.
+ * @param   pvUser      User argument - ignored.
+ * @param   GCPhysAddr  Physical address of memory to write.
+ * @param   u32Item     Data to write, up to 4 bytes.
+ * @param   cbItem      Size of data Item, only 1/2/4 bytes is allowed for now.
+ * @param   cItems      Number of data items to write.
+ */
+PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems)
+{
+    PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
+    rc = vgaInternalMMIOFill(pThis, pvUser, GCPhysAddr, u32Item, cbItem, cItems);
+    PDMCritSectLeave(&pThis->lock);
+    return rc;
+}
 #undef APPLY_LOGICAL_AND_MASK
 
@@ -3575,6 +3655,10 @@
     PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     STAM_PROFILE_START(&pThis->CTX_MID_Z(Stat,MemoryRead), a);
-    int rc = VINF_SUCCESS;
     NOREF(pvUser);
+
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_READ);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     switch (cb)
     {
@@ -3615,4 +3699,5 @@
     }
     STAM_PROFILE_STOP(&pThis->CTX_MID_Z(Stat,MemoryRead), a);
+    PDMCritSectLeave(&pThis->lock);
     return rc;
 }
@@ -3632,6 +3717,9 @@
     PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     uint8_t  *pu8 = (uint8_t *)pv;
-    int rc = VINF_SUCCESS;
     STAM_PROFILE_START(&pThis->CTX_MID_Z(Stat,MemoryWrite), a);
+
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
 
     switch (cb)
@@ -3690,4 +3778,5 @@
     }
     STAM_PROFILE_STOP(&pThis->CTX_MID_Z(Stat,MemoryWrite), a);
+    PDMCritSectLeave(&pThis->lock);
     return rc;
 }
@@ -3704,5 +3793,7 @@
 static int vgaLFBAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr)
 {
-    int rc;
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_EM_RAW_EMULATE_INSTR);
+    if (rc != VINF_SUCCESS)
+        return rc;
 
     /*
@@ -3723,9 +3814,13 @@
         rc = PGMShwModifyPage(PDMDevHlpGetVMCPU(pThis->CTX_SUFF(pDevIns)), GCPtr, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW);
         if (RT_SUCCESS(rc))
+        {
+            PDMCritSectLeave(&pThis->lock);
             return VINF_SUCCESS;
+        }
         else
             AssertMsgFailed(("PGMShwModifyPage -> rc=%d\n", rc));
 #else /* IN_RING3 : We don't have any virtual page address of the access here. */
         Assert(GCPtr == 0);
+        PDMCritSectLeave(&pThis->lock);
         return VINF_SUCCESS;
 #endif
@@ -3734,4 +3829,5 @@
         AssertMsgFailed(("PGMHandlerPhysicalPageTempOff -> rc=%d\n", rc));
 
+    PDMCritSectLeave(&pThis->lock);
     return rc;
 }
@@ -3849,4 +3945,10 @@
 {
     static int lastWasNotNewline = 0;  /* We are only called in a single-threaded way */
+    PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
+
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     /*
      * VGA BIOS char printing.
@@ -3874,9 +3976,11 @@
             lastWasNotNewline = 1;
 #endif
+        PDMCritSectLeave(&pThis->lock);
         return VINF_SUCCESS;
     }
 
+    PDMCritSectLeave(&pThis->lock);
     /* not in use. */
-    return VINF_SUCCESS;
+    return VERR_IOM_IOPORT_UNUSED;
 }
 
@@ -3904,10 +4008,14 @@
     NOREF(Port);
 
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_WRITE);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     if (cb == 2)
     {
         Log(("vbeIOPortWriteVBEExtra: addr=%#RX32\n", u32));
         pThis->u16VBEExtraAddress = u32;
-        return VINF_SUCCESS;
-    }
+    }
+    PDMCritSectLeave(&pThis->lock);
 
     Log(("vbeIOPortWriteVBEExtra: Ignoring invalid cb=%d writes to the VBE Extra port!!!\n", cb));
@@ -3933,11 +4041,15 @@
     NOREF(Port);
 
+    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_READ);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
     if (pThis->u16VBEExtraAddress == 0xffff)
     {
         Log(("vbeIOPortReadVBEExtra: Requested number of 64k video banks\n"));
         *pu32 = pThis->vram_size / _64K;
-        return VINF_SUCCESS;
-    }
-
+        rc = VINF_SUCCESS;
+    }
+    else
     if (    pThis->u16VBEExtraAddress >= pThis->cbVBEExtraData
         ||  pThis->u16VBEExtraAddress + cb > pThis->cbVBEExtraData)
@@ -3946,7 +4058,7 @@
         Log(("vbeIOPortReadVBEExtra: Requested address is out of VBE data!!! Address=%#x(%d) cbVBEExtraData=%#x(%d)\n",
              pThis->u16VBEExtraAddress, pThis->u16VBEExtraAddress, pThis->cbVBEExtraData, pThis->cbVBEExtraData));
-        return VINF_SUCCESS;
-    }
-
+        rc = VINF_SUCCESS;
+    }
+    else
     if (cb == 1)
     {
@@ -3954,7 +4066,7 @@
 
         Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Rhxs\n", cb, cb, pu32));
-        return VINF_SUCCESS;
-    }
-
+        rc = VINF_SUCCESS;
+    }
+    else
     if (cb == 2)
     {
@@ -3963,8 +4075,12 @@
 
         Log(("vbeIOPortReadVBEExtra: cb=%#x %.*Rhxs\n", cb, cb, pu32));
-        return VINF_SUCCESS;
-    }
+        rc = VINF_SUCCESS;
+    }
+    else
+        rc = VERR_IOM_IOPORT_UNUSED;
+
     Log(("vbeIOPortReadVBEExtra: Invalid cb=%d read from the VBE Extra port!!!\n", cb));
-    return VERR_IOM_IOPORT_UNUSED;
+    PDMCritSectLeave(&pThis->lock);
+    return rc;
 }
 # endif /* VBE_NEW_DYN_LIST */
@@ -4633,4 +4749,7 @@
     PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
 
+    int rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY);
+    AssertRC(rc);
+
 #ifndef VBOX_WITH_HGSMI
     /* This should be called only in non VBVA mode. */
@@ -4638,11 +4757,15 @@
     if (VBVAUpdateDisplay (pThis) == VINF_SUCCESS)
     {
+        PDMCritSectLeave(&pThis->lock);
         return VINF_SUCCESS;
     }
 #endif /* VBOX_WITH_HGSMI */
 
-    int rc = vga_update_display(pThis, false);
+    rc = vga_update_display(pThis, false);
     if (rc != VINF_SUCCESS)
+    {
+        PDMCritSectLeave(&pThis->lock);
         return rc;
+    }
 
     if (pThis->fHasDirtyBits && pThis->GCPhysVRAM && pThis->GCPhysVRAM != NIL_RTGCPHYS32)
@@ -4656,5 +4779,5 @@
         pThis->fRemappedVGA = false;
     }
-
+    PDMCritSectLeave(&pThis->lock);
     return VINF_SUCCESS;
 }
@@ -4679,7 +4802,10 @@
 #endif /* DEBUG_sunlover */
 
+    int rc = PDMCritSectEnter(&pThis->lock, VERR_SEM_BUSY);
+    AssertRC(rc);
+
     pThis->graphic_mode = -1; /* force full update */
 
-    int rc = vga_update_display(pThis, true);
+    rc = vga_update_display(pThis, true);
 
     /* The dirty bits array has been just cleared, reset handlers as well. */
@@ -4693,5 +4819,5 @@
         pThis->fRemappedVGA = false;
     }
-
+    PDMCritSectLeave(&pThis->lock);
     return rc;
 }
@@ -5077,4 +5203,5 @@
     if (pThis->pDrv)
         pThis->pDrv->pfnRefresh(pThis->pDrv);
+
     if (pThis->cMilliesRefreshInterval)
         TMTimerSetMillies(pTimer, pThis->cMilliesRefreshInterval);
@@ -5780,4 +5907,12 @@
         return rc;
 
+    /* Initialize the PDM lock. */
+    rc = PDMDevHlpCritSectInit(pDevIns, &pThis->lock, "VGA");
+    if (RT_FAILURE(rc))
+    {
+        Log(("%s: Failed to create critical section.\n", __FUNCTION__));
+        return rc;
+    }
+
     /*
      * Create the refresh timer.
@@ -5817,5 +5952,6 @@
      * Allocate and initialize buffer for the VBE BIOS Extra Data.
      */
-    pThis->cbVBEExtraData = sizeof(VBEHEADER) + cb;
+    AssertRelease(sizeof(VBEHEADER) + cb < 65536);
+    pThis->cbVBEExtraData = (uint16_t)(sizeof(VBEHEADER) + cb);
     pThis->pu8VBEExtraData = (uint8_t *)PDMDevHlpMMHeapAllocZ(pDevIns, pThis->cbVBEExtraData);
     if (!pThis->pu8VBEExtraData)
@@ -6201,4 +6337,5 @@
 #endif
 
+    PDMR3CritSectDelete(&pThis->lock);
     return VINF_SUCCESS;
 }
Index: /trunk/src/VBox/Devices/Graphics/DevVGA.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA.h	(revision 20443)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA.h	(revision 20444)
@@ -305,4 +305,7 @@
     PPDMDEVINSR0                pDevInsR0;
 
+    /** The critical section. */
+    PDMCRITSECT                 lock;
+
     /** The display port base interface. */
     PDMIBASE                    Base;
