Changeset 20493 in vbox

Timestamp:

Jun 12, 2009 9:55:46 AM (16 years ago)

Author:

vboxsync

Message:

ACPI: fixed incorrect checksumming, noew 32 CPUs total

Location:

trunk/src/VBox/Devices/PC

Files:

• ACPI/VBoxAcpi.cpp (modified) (1 diff)
• vbox.dsl (modified) (4 diffs)

trunk/src/VBox/Devices/PC/ACPI/VBoxAcpi.cpp

@@ -55 +55 @@
     return 0;
 }
+
+#else
+static int patchAml(PPDMDEVINS pDevIns, uint8_t* pAml, size_t uAmlLen)
+{
+    uint16_t cNumCpus;
+    int rc;
+    
+    rc = CFGMR3QueryU16Def(pDevIns->pCfgHandle, "NumCPUs", &cNumCpus, 1);
+   
+    if (RT_FAILURE(rc))
+        return rc;
+    
+    /** 
+     * Now search AML for:
+     *  AML_PROCESSOR_OP            (UINT16) 0x5b83
+     * and replace whole block with
+     *  AML_NOOP_OP                 (UINT16) 0xa3 
+     * for VCPU not configured
+     */
+    uint16_t cAcpiCpus = 0;
+    for (uint32_t i = 0; i < uAmlLen - 5; i++)
+    {
+        /*
+         * AML_PROCESSOR_OP 
+         *
+         * DefProcessor := ProcessorOp PkgLength NameString ProcID 
+                             PblkAddr PblkLen ObjectList
+         * ProcessorOp  := ExtOpPrefix 0x83
+         * ProcID       := ByteData
+         * PblkAddr     := DwordData
+         * PblkLen      := ByteData
+         */
+        if ((pAml[i] == 0x5b) && (pAml[i+1] == 0x83))
+        {
+            if ((pAml[i+3] != 'C') || (pAml[i+4] != 'P'))
+                /* false alarm, not named starting CP */
+                continue;
+            
+            /* Maybe use ProcID instead? */
+            cAcpiCpus++;
+            if (cAcpiCpus <= cNumCpus)
+                continue;
+
+            /* Will fill unwanted CPU block with NOOPs */
+            /* 
+             * See 18.2.4 Package Length Encoding in ACPI spec 
+             * for full format 
+             */
+            uint32_t cBytes = pAml[i + 2];
+            AssertReleaseMsg((cBytes >> 6) == 0, 
+                             ("So far, we only understand simple package length"));
+                
+            /* including AML_PROCESSOR_OP itself */
+            for (uint32_t j = 0; j < cBytes + 2; j++)
+                pAml[i+j] = 0xa3;
+
+            /* Can increase i by cBytes + 1, but not really worth it */
+        }
+    }
+
+    /* now recompute checksum, whole file byte sum must be 0 */
+    pAml[9] = 0;
+    uint8_t         aSum = 0;
+    for (uint32_t i = 0; i < uAmlLen; i++)
+      aSum = aSum + (uint8_t)pAml[i];
+    pAml[9] = (uint8_t) (0 - aSum);
+    
+    return 0;
+}
 #endif
 

trunk/src/VBox/Devices/PC/vbox.dsl

@@ -128 +128 @@
     Scope (\_PR)
     {
-       Processor (CPU0, /* Name */
+        Processor (CPU0, /* Name */
                    0x00, /* Id */
                    0x0,  /* Processor IO ports range start */
@@ -142 +142 @@
                    )
         {
-           Method (_STA) { Return(\_SB.UCP1) }
         }
         Processor (CPU2, /* Name */
@@ -150 +149 @@
                    )
         {
-           Method (_STA) { Return(\_SB.UCP2) }
         }
         Processor (CPU3, /* Name */
@@ -158 +156 @@
                    )
         {
-           Method (_STA) { Return(\_SB.UCP3) }
-        }
+        }
+        Processor (CPU4, /* Name */
+                   0x04, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPU5, /* Name */
+                   0x05, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPU6, /* Name */
+                   0x06, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPU7, /* Name */
+                   0x07, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPU8, /* Name */
+                   0x08, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPU9, /* Name */
+                   0x09, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUA, /* Name */
+                   0x0a, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUB, /* Name */
+                   0x0b, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUC, /* Name */
+                   0x0c, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUD, /* Name */
+                   0x0d, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUE, /* Name */
+                   0x0e, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUF, /* Name */
+                   0x0f, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUG, /* Name */
+                   0x10, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUH, /* Name */
+                   0x11, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUI, /* Name */
+                   0x12, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUJ, /* Name */
+                   0x13, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUK, /* Name */
+                   0x14, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUL, /* Name */
+                   0x15, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUM, /* Name */
+                   0x16, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUN, /* Name */
+                   0x17, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUO, /* Name */
+                   0x18, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUP, /* Name */
+                   0x19, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUQ, /* Name */
+                   0x1a, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUR, /* Name */
+                   0x1b, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUS, /* Name */
+                   0x1c, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUT, /* Name */
+                   0x1d, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUU, /* Name */
+                   0x1e, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        Processor (CPUV, /* Name */
+                   0x1f, /* Id */
+                   0x0,  /* Processor IO ports range start */
+                   0x0   /* Processor IO ports range length */
+                   )
+        {
+        }
+        
     }