Changeset 20666 in vbox

Timestamp:

Jun 17, 2009 1:01:56 PM (16 years ago)

Author:

vboxsync

Message:

Changed PDMApicGet/SetTPR to get/set the full task priority register.

Location:

trunk/src/VBox

Files:

• Devices/PC/DevAPIC.cpp (modified) (2 diffs)
• VMM/VMMAll/EMAll.cpp (modified) (2 diffs)
• VMM/VMMR0/HWSVMR0.cpp (modified) (4 diffs)
• VMM/VMMR0/HWVMXR0.cpp (modified) (3 diffs)

trunk/src/VBox/Devices/PC/DevAPIC.cpp

@@ -681 +681 @@
     APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
     APICState *s = getLapicById(dev, idCpu);
-    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, (val & 0x0f) << 4));
-    apic_update_tpr(dev, s, (val & 0x0f) << 4);
+    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, val));
+    apic_update_tpr(dev, s, val);
 }
 
@@ -689 +689 @@
     APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
     APICState *s = getLapicById(dev, idCpu);
-    Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
-    return s->tpr >> 4;
+    Log2(("apicGetTPR: returns %#x\n", s->tpr));
+    return s->tpr;
 }
 

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -1995 +1995 @@
         rc = PDMApicGetTPR(pVCpu, (uint8_t *)&val64, NULL);
         AssertMsgRCReturn(rc, ("PDMApicGetTPR failed\n"), VERR_EM_INTERPRETER);
+        val64 >>= 4;     /* bits 7-4 contain the task priority that go in cr8, bits 3-0*/
     }
     else
@@ -2170 +2171 @@
 
     case USE_REG_CR8:
-        return PDMApicSetTPR(pVCpu, val);
+        return PDMApicSetTPR(pVCpu, val << 4);  /* cr8 bits 3-0 correspond to bits 7-4 of the task priority mmio register. */
 
     default:

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -986 +986 @@
         int rc = PDMApicGetTPR(pVCpu, &u8LastTPR, &fPending);
         AssertRC(rc);
-        pVMCB->ctrl.IntCtrl.n.u8VTPR = u8LastTPR;
+        pVMCB->ctrl.IntCtrl.n.u8VTPR = (u8LastTPR >> 4); /* cr8 bits 3-0 correspond to bits 7-4 of the task priority mmio register. */
 
         if (fPending)
@@ -1380 +1380 @@
     /* Sync back the TPR if it was changed. */
     if (    fSyncTPR
-        &&  u8LastTPR != pVMCB->ctrl.IntCtrl.n.u8VTPR)
-    {
-        rc = PDMApicSetTPR(pVCpu, pVMCB->ctrl.IntCtrl.n.u8VTPR);
+        &&  (u8LastTPR >> 4) != pVMCB->ctrl.IntCtrl.n.u8VTPR)
+    {
+        rc = PDMApicSetTPR(pVCpu, pVMCB->ctrl.IntCtrl.n.u8VTPR << 4);   /* cr8 bits 3-0 correspond to bits 7-4 of the task priority mmio register. */
         AssertRC(rc);
     }
@@ -2364 +2364 @@
             rc = DISFetchReg32(CPUMCTX2CORE(pCtx), pDis->param2.base.reg_gen, &val);
             AssertRC(rc);
-            u8Tpr = val >> 4;
+            u8Tpr = val;
         }
         else
         if (pDis->param2.flags == USE_IMMEDIATE32)
         {
-            u8Tpr = (uint8_t)pDis->param2.parval >> 4;
+            u8Tpr = (uint8_t)pDis->param2.parval;
         }
         else
@@ -2392 +2392 @@
         AssertRC(rc);
 
-        rc = DISWriteReg32(CPUMCTX2CORE(pCtx), pDis->param1.base.reg_gen, u8Tpr << 4);
+        rc = DISWriteReg32(CPUMCTX2CORE(pCtx), pDis->param1.base.reg_gen, u8Tpr);
         AssertRC(rc);
 

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -2218 +2218 @@
     {
         /* TPR caching in CR8 */
-        uint8_t u8TPR;
         bool    fPending;
 
-        int rc = PDMApicGetTPR(pVCpu, &u8TPR, &fPending);
+        int rc = PDMApicGetTPR(pVCpu, &u8LastTPR, &fPending);
         AssertRC(rc);
         /* The TPR can be found at offset 0x80 in the APIC mmio page. */
-        u8LastTPR = pVCpu->hwaccm.s.vmx.pVAPIC[0x80] = u8TPR << 4; /* bits 7-4 contain the task priority */
+        pVCpu->hwaccm.s.vmx.pVAPIC[0x80] = u8LastTPR;
 
         /* Two options here:
@@ -2232 +2231 @@
          *   -> We don't need to be explicitely notified. There are enough world switches for detecting pending interrupts.
          */
-        rc  = VMXWriteVMCS(VMX_VMCS_CTRL_TPR_THRESHOLD, (fPending) ? u8TPR : 0);
+        rc  = VMXWriteVMCS(VMX_VMCS_CTRL_TPR_THRESHOLD, (fPending) ? (u8LastTPR >> 4) : 0);     /* cr8 bits 3-0 correspond to bits 7-4 of the task priority mmio register. */
         AssertRC(rc);
     }
@@ -2427 +2426 @@
         &&  u8LastTPR != pVCpu->hwaccm.s.vmx.pVAPIC[0x80])
     {
-        rc = PDMApicSetTPR(pVCpu, pVCpu->hwaccm.s.vmx.pVAPIC[0x80] >> 4);
+        rc = PDMApicSetTPR(pVCpu, pVCpu->hwaccm.s.vmx.pVAPIC[0x80]);
         AssertRC(rc);
     }