Changeset 2107 in vbox for trunk

Timestamp:

Apr 16, 2007 4:01:54 PM (18 years ago)

Author:

vboxsync

Message:

Proper init of hidden selector registers.

File:

• trunk/src/VBox/VMM/CPUM.cpp (modified) (1 diff)

trunk/src/VBox/VMM/CPUM.cpp

@@ -458 +458 @@
     pVM->cpum.s.fUseFlags   = fUseFlags;
 
-    pCtx->cr0 = X86_CR0_CD | X86_CR0_NW | X86_CR0_ET;  //0x60000010
-    pCtx->eip               = 0x0000fff0;
-    pCtx->edx               = 0x00000600;   /* P6 processor */
-    pCtx->eflags.Bits.u1Reserved0 = 1;
-
-    pCtx->cs                =     0xf000;
-    pCtx->csHid.u32Base     = 0xffff0000;
-    pCtx->csHid.u32Limit    = 0x0000ffff;
-    pCtx->dsHid.u32Limit    = 0x0000ffff;
-    pCtx->esHid.u32Limit    = 0x0000ffff;
-    pCtx->fsHid.u32Limit    = 0x0000ffff;
-    pCtx->gsHid.u32Limit    = 0x0000ffff;
-    pCtx->ssHid.u32Limit    = 0x0000ffff;
-    pCtx->idtr.cbIdt        = 0xffff;
-    pCtx->gdtr.cbGdt        = 0xffff;
-    pCtx->ldtrHid.u32Limit  = 0xffff;
-    pCtx->ldtrHid.Attr.u    = X86_DESC_P;
-    pCtx->trHid.u32Limit    = 0xffff;
-    pCtx->trHid.Attr.u      = X86_DESC_P;
-
-    pCtx->fpu.FTW           = 0xff;         /* All tags are set, i.e. the regs are empty. */
-    pCtx->fpu.FCW           = 0x37f;
+    pCtx->cr0                       = X86_CR0_CD | X86_CR0_NW | X86_CR0_ET;  //0x60000010
+    pCtx->eip                       = 0x0000fff0;
+    pCtx->edx                       = 0x00000600;   /* P6 processor */
+    pCtx->eflags.Bits.u1Reserved0   = 1;
+
+    pCtx->cs                        = 0xf000;
+    pCtx->csHid.u32Base             = 0xffff0000;
+    pCtx->csHid.u32Limit            = 0x0000ffff;
+    pCtx->csHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->csHid.Attr.n.u1Present    = 1;
+    pCtx->csHid.Attr.n.u4Type       = X86_SEL_TYPE_READ | X86_SEL_TYPE_CODE;
+
+    pCtx->dsHid.u32Limit            = 0x0000ffff;
+    pCtx->dsHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->dsHid.Attr.n.u1Present    = 1;
+    pCtx->dsHid.Attr.n.u4Type       = X86_SEL_TYPE_RW;
+
+    pCtx->esHid.u32Limit            = 0x0000ffff;
+    pCtx->esHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->esHid.Attr.n.u1Present    = 1;
+    pCtx->esHid.Attr.n.u4Type       = X86_SEL_TYPE_RW;
+
+    pCtx->fsHid.u32Limit            = 0x0000ffff;
+    pCtx->fsHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->fsHid.Attr.n.u1Present    = 1;
+    pCtx->fsHid.Attr.n.u4Type       = X86_SEL_TYPE_RW;
+
+    pCtx->gsHid.u32Limit            = 0x0000ffff;
+    pCtx->gsHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->gsHid.Attr.n.u1Present    = 1;
+    pCtx->gsHid.Attr.n.u4Type       = X86_SEL_TYPE_RW;
+
+    pCtx->ssHid.u32Limit            = 0x0000ffff;
+    pCtx->ssHid.Attr.n.u1Present    = 1;
+    pCtx->ssHid.Attr.n.u1DescType   = 1; /* code/data segment */
+    pCtx->ssHid.Attr.n.u4Type       = X86_SEL_TYPE_RW;
+
+    pCtx->idtr.cbIdt                = 0xffff;
+    pCtx->gdtr.cbGdt                = 0xffff;
+
+    pCtx->ldtrHid.u32Limit          = 0xffff;
+    pCtx->ldtrHid.Attr.n.u1Present  = 1;
+    pCtx->ldtrHid.Attr.n.u4Type     = X86_SEL_TYPE_SYS_LDT;
+
+    pCtx->trHid.u32Limit            = 0xffff;
+    pCtx->trHid.Attr.n.u1Present    = 1;
+    pCtx->trHid.Attr.n.u4Type       = X86_SEL_TYPE_SYS_286_TSS_BUSY;
+
+    pCtx->dr6                       = 0xFFFF0FF0;
+    pCtx->dr7                       = 0x400;
+
+    pCtx->fpu.FTW                   = 0xff;         /* All tags are set, i.e. the regs are empty. */
+    pCtx->fpu.FCW                   = 0x37f;
 }