Changeset 22493 in vbox for trunk/include/VBox
- Timestamp:
- Aug 26, 2009 10:22:16 PM (16 years ago)
- svn:sync-xref-src-repo-rev:
- 51513
- Location:
- trunk/include/VBox
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/em.h
r21217 r22493 140 140 VMMDECL(int) EMInterpretLMSW(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint16_t u16Data); 141 141 VMMDECL(int) EMInterpretCLTS(PVM pVM, PVMCPU pVCpu); 142 VMMDECL( int)EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp);142 VMMDECL(VBOXSTRICTRC) EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pCpu, uint32_t cbOp); 143 143 VMMDECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame); 144 144 VMMDECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame); -
trunk/include/VBox/hwaccm.h
r21653 r22493 76 76 #define HWACCMCanEmulateIoBlockEx(pCtx) (!CPUMIsGuestInPagedProtectedModeEx(pCtx)) 77 77 78 VMMDECL(int) HWACCMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);79 VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM);78 VMMDECL(int) HWACCMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt); 79 VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM); 80 80 81 81 #ifndef IN_RC 82 VMMDECL(int) HWACCMFlushTLB(PVMCPU pVCpu);83 VMMDECL(int) HWACCMFlushTLBOnAllVCpus(PVM pVM);84 VMMDECL(int) HWACCMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);85 VMMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);86 VMMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM);87 VMMDECL(PGMMODE) HWACCMGetShwPagingMode(PVM pVM);82 VMMDECL(int) HWACCMFlushTLB(PVMCPU pVCpu); 83 VMMDECL(int) HWACCMFlushTLBOnAllVCpus(PVM pVM); 84 VMMDECL(int) HWACCMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt); 85 VMMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys); 86 VMMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM); 87 VMMDECL(PGMMODE) HWACCMGetShwPagingMode(PVM pVM); 88 88 #else 89 89 /* Nop in GC */ … … 98 98 * @{ 99 99 */ 100 VMMR0DECL(int) HWACCMR0Init(void);101 VMMR0DECL(int) HWACCMR0Term(void);102 VMMR0DECL(int) HWACCMR0InitVM(PVM pVM);103 VMMR0DECL(int) HWACCMR0TermVM(PVM pVM);104 VMMR0DECL(int) HWACCMR0EnableAllCpus(PVM pVM);105 VMMR0DECL(int) HWACCMR0EnterSwitcher(PVM pVM, bool *pfVTxDisabled);106 VMMR0DECL(int) HWACCMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);100 VMMR0DECL(int) HWACCMR0Init(void); 101 VMMR0DECL(int) HWACCMR0Term(void); 102 VMMR0DECL(int) HWACCMR0InitVM(PVM pVM); 103 VMMR0DECL(int) HWACCMR0TermVM(PVM pVM); 104 VMMR0DECL(int) HWACCMR0EnableAllCpus(PVM pVM); 105 VMMR0DECL(int) HWACCMR0EnterSwitcher(PVM pVM, bool *pfVTxDisabled); 106 VMMR0DECL(int) HWACCMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled); 107 107 108 VMMR0DECL(PVMCPU) HWACCMR0GetVMCPU(PVM pVM);109 VMMR0DECL(VMCPUID) HWACCMR0GetVMCPUId(PVM pVM);108 VMMR0DECL(PVMCPU) HWACCMR0GetVMCPU(PVM pVM); 109 VMMR0DECL(VMCPUID) HWACCMR0GetVMCPUId(PVM pVM); 110 110 111 VMMR0DECL(void) HWACCMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);112 VMMR0DECL(void) HWACCMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);111 VMMR0DECL(void) HWACCMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize); 112 VMMR0DECL(void) HWACCMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize); 113 113 114 114 /** @} */ … … 121 121 * @{ 122 122 */ 123 VMMR3DECL(bool) HWACCMR3IsEventPending(PVMCPU pVCpu);124 VMMR3DECL(int) HWACCMR3Init(PVM pVM);125 VMMR3DECL(int) HWACCMR3InitCPU(PVM pVM);126 VMMR3DECL(int) HWACCMR3InitFinalizeR0(PVM pVM);127 VMMR3DECL(void) HWACCMR3Relocate(PVM pVM);128 VMMR3DECL(int) HWACCMR3Term(PVM pVM);129 VMMR3DECL(int) HWACCMR3TermCPU(PVM pVM);130 VMMR3DECL(void) HWACCMR3Reset(PVM pVM);131 VMMR3DECL(void) HWACCMR3CheckError(PVM pVM, int iStatusCode);132 VMMR3DECL(bool) HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);133 VMMR3DECL(void) HWACCMR3NotifyScheduled(PVMCPU pVCpu);134 VMMR3DECL(void) HWACCMR3NotifyEmulated(PVMCPU pVCpu);135 VMMR3DECL(bool) HWACCMR3IsActive(PVMCPU pVCpu);136 VMMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM);137 VMMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM);138 VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);139 VMMR3DECL(bool) HWACCMR3IsVPIDActive(PVM pVM);140 VMMR3DECL(int) HWACCMR3InjectNMI(PVM pVM);141 VMMR3DECL(int) HWACCMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);142 VMMR3DECL( int)HWACCMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);143 VMMR3DECL(int) HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);144 VMMR3DECL(int) HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);145 VMMR3DECL(int) HWACCMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);123 VMMR3DECL(bool) HWACCMR3IsEventPending(PVMCPU pVCpu); 124 VMMR3DECL(int) HWACCMR3Init(PVM pVM); 125 VMMR3DECL(int) HWACCMR3InitCPU(PVM pVM); 126 VMMR3DECL(int) HWACCMR3InitFinalizeR0(PVM pVM); 127 VMMR3DECL(void) HWACCMR3Relocate(PVM pVM); 128 VMMR3DECL(int) HWACCMR3Term(PVM pVM); 129 VMMR3DECL(int) HWACCMR3TermCPU(PVM pVM); 130 VMMR3DECL(void) HWACCMR3Reset(PVM pVM); 131 VMMR3DECL(void) HWACCMR3CheckError(PVM pVM, int iStatusCode); 132 VMMR3DECL(bool) HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx); 133 VMMR3DECL(void) HWACCMR3NotifyScheduled(PVMCPU pVCpu); 134 VMMR3DECL(void) HWACCMR3NotifyEmulated(PVMCPU pVCpu); 135 VMMR3DECL(bool) HWACCMR3IsActive(PVMCPU pVCpu); 136 VMMR3DECL(bool) HWACCMR3IsNestedPagingActive(PVM pVM); 137 VMMR3DECL(bool) HWACCMR3IsAllowed(PVM pVM); 138 VMMR3DECL(void) HWACCMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode); 139 VMMR3DECL(bool) HWACCMR3IsVPIDActive(PVM pVM); 140 VMMR3DECL(int) HWACCMR3InjectNMI(PVM pVM); 141 VMMR3DECL(int) HWACCMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx); 142 VMMR3DECL(VBOXSTRICTRC) HWACCMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 143 VMMR3DECL(int) HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem); 144 VMMR3DECL(int) HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem); 145 VMMR3DECL(int) HWACCMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 146 146 147 147 /** @} */ … … 152 152 * @{ 153 153 */ 154 VMMR0DECL(int) HWACCMR0SetupVM(PVM pVM);155 VMMR0DECL(int) HWACCMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);156 VMMR0DECL(int) HWACCMR0Enter(PVM pVM, PVMCPU pVCpu);157 VMMR0DECL(int) HWACCMR0Leave(PVM pVM, PVMCPU pVCpu);158 VMMR0DECL(int) HWACCMR0InvalidatePage(PVM pVM, PVMCPU pVCpu);159 VMMR0DECL(int) HWACCMR0FlushTLB(PVM pVM);160 VMMR0DECL(bool) HWACCMR0SuspendPending();154 VMMR0DECL(int) HWACCMR0SetupVM(PVM pVM); 155 VMMR0DECL(int) HWACCMR0RunGuestCode(PVM pVM, PVMCPU pVCpu); 156 VMMR0DECL(int) HWACCMR0Enter(PVM pVM, PVMCPU pVCpu); 157 VMMR0DECL(int) HWACCMR0Leave(PVM pVM, PVMCPU pVCpu); 158 VMMR0DECL(int) HWACCMR0InvalidatePage(PVM pVM, PVMCPU pVCpu); 159 VMMR0DECL(int) HWACCMR0FlushTLB(PVM pVM); 160 VMMR0DECL(bool) HWACCMR0SuspendPending(); 161 161 162 162 # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) 163 VMMR0DECL(int) HWACCMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);164 VMMR0DECL(int) HWACCMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);165 VMMR0DECL(int) HWACCMR0TestSwitcher3264(PVM pVM);163 VMMR0DECL(int) HWACCMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 164 VMMR0DECL(int) HWACCMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 165 VMMR0DECL(int) HWACCMR0TestSwitcher3264(PVM pVM); 166 166 # endif 167 167 -
trunk/include/VBox/iom.h
r21217 r22493 201 201 typedef FNIOMMMIOFILL *PFNIOMMMIOFILL; 202 202 203 VMMDECL( int)IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue);204 VMMDECL( int)IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue);205 VMMDECL( int)IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);206 VMMDECL( int)IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);207 VMMDECL( int)IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb);208 VMMDECL( int)IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb);209 VMMDECL( int)IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);210 VMMDECL( int)IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer);211 VMMDECL( int)IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);212 VMMDECL( int)IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer);213 VMMDECL( int)IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue);214 VMMDECL( int)IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue);215 VMMDECL( int)IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault);216 VMMDECL( int)IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb);217 VMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags);218 VMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags);219 VMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys);220 VMMDECL(bool) IOMIsLockOwner(PVM pVM);203 VMMDECL(VBOXSTRICTRC) IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue); 204 VMMDECL(VBOXSTRICTRC) IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue); 205 VMMDECL(VBOXSTRICTRC) IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu); 206 VMMDECL(VBOXSTRICTRC) IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu); 207 VMMDECL(VBOXSTRICTRC) IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb); 208 VMMDECL(VBOXSTRICTRC) IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb); 209 VMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu); 210 VMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer); 211 VMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu); 212 VMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer); 213 VMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue); 214 VMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue); 215 VMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault); 216 VMMDECL(VBOXSTRICTRC) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb); 217 VMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags); 218 VMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags); 219 VMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys); 220 VMMDECL(bool) IOMIsLockOwner(PVM pVM); 221 221 222 222 #ifdef IN_RC … … 225 225 * @{ 226 226 */ 227 VMMRCDECL( int) IOMGCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);227 VMMRCDECL(VBOXSTRICTRC) IOMGCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu); 228 228 /** @} */ 229 229 #endif /* IN_RC */ -
trunk/include/VBox/types.h
r22334 r22493 95 95 96 96 /** Virtual CPU ID. */ 97 typedef uint32_t VMCPUID;97 typedef uint32_t VMCPUID; 98 98 /** Pointer to a virtual CPU ID. */ 99 typedef VMCPUID *PVMCPUID;99 typedef VMCPUID *PVMCPUID; 100 100 /** @name Special CPU ID values. 101 101 * Most of these are for request scheduling. … … 143 143 144 144 145 /** VM State 145 /** 146 * VM State 146 147 */ 147 148 typedef enum VMSTATE … … 174 175 VMSTATE_MAKE_32BIT_HACK = 0x7fffffff 175 176 } VMSTATE; 177 178 /** @def VBOXSTRICTRC_STRICT_ENABLED 179 * Indicates that VBOXSTRICTRC is in strict mode. 180 */ 181 #if defined(__cplusplus) \ 182 && ( defined(RT_STRICT) \ 183 || defined(VBOX_STRICT) \ 184 || defined(DEBUG) \ 185 || defined(DOXYGEN_RUNNING) ) 186 # define VBOXSTRICTRC_STRICT_ENABLED 1 187 #endif 188 189 /** We need RTERR_STRICT_RC. */ 190 #if defined(VBOXSTRICTRC_STRICT_ENABLED) && !defined(RTERR_STRICT_RC) 191 # define RTERR_STRICT_RC 1 192 #endif 193 194 /** 195 * Strict VirtualBox status code. 196 * 197 * This is normally an 32-bit integer and the only purpose of the type is to 198 * highlight the special handling that is required. But in strict build it is a 199 * class that causes compilation and runtime errors for some of the incorrect 200 * handling. 201 */ 202 #ifdef VBOXSTRICTRC_STRICT_ENABLED 203 class VBOXSTRICTRC 204 { 205 protected: 206 /** The status code. */ 207 int32_t m_rc; 208 209 public: 210 /** Default constructor setting the status to VERR_IPE_UNINITIALIZED_STATUS. */ 211 VBOXSTRICTRC() 212 #ifdef VERR_IPE_UNINITIALIZED_STATUS 213 : m_rc(VERR_IPE_UNINITIALIZED_STATUS) 214 #else 215 : m_rc(-233 /*VERR_IPE_UNINITIALIZED_STATUS*/) 216 #endif 217 { 218 } 219 220 /** Constructor for normal integer status codes. */ 221 VBOXSTRICTRC(int32_t const rc) 222 : m_rc(rc) 223 { 224 } 225 226 /** Getter that VBOXSTRICTRC_VAL can use. */ 227 int32_t getValue() const { return m_rc; } 228 229 /** @name Comparison operators 230 * @{ */ 231 bool operator==(int32_t rc) const { return m_rc == rc; } 232 bool operator!=(int32_t rc) const { return m_rc != rc; } 233 bool operator<=(int32_t rc) const { return m_rc <= rc; } 234 bool operator>=(int32_t rc) const { return m_rc >= rc; } 235 bool operator<(int32_t rc) const { return m_rc < rc; } 236 bool operator>(int32_t rc) const { return m_rc > rc; } 237 /** @} */ 238 239 /** Special automatic cast for RT_SUCCESS_NP. */ 240 operator RTErrStrictType2() const { return RTErrStrictType2(m_rc); } 241 242 private: 243 /** @name Constructors that will prevent some of the bad types. 244 * @{ */ 245 VBOXSTRICTRC(uint8_t rc) : m_rc(-999) { NOREF(rc); } 246 VBOXSTRICTRC(uint16_t rc) : m_rc(-999) { NOREF(rc); } 247 VBOXSTRICTRC(uint32_t rc) : m_rc(-999) { NOREF(rc); } 248 VBOXSTRICTRC(uint64_t rc) : m_rc(-999) { NOREF(rc); } 249 250 VBOXSTRICTRC(int8_t rc) : m_rc(-999) { NOREF(rc); } 251 VBOXSTRICTRC(int16_t rc) : m_rc(-999) { NOREF(rc); } 252 VBOXSTRICTRC(int64_t rc) : m_rc(-999) { NOREF(rc); } 253 /** @} */ 254 }; 255 #else 256 typedef int32_t VBOXSTRICTRC; 257 #endif 258 259 /** @def VBOXSTRICTRC_VAL 260 * Explicit getter. 261 * @param rcStrict The strict VirtualBox status code. 262 */ 263 #ifdef VBOXSTRICTRC_STRICT_ENABLED 264 # define VBOXSTRICTRC_VAL(rcStrict) ( (rcStrict).getValue() ) 265 #else 266 # define VBOXSTRICTRC_VAL(rcStrict) (rcStrict) 267 #endif 268 269 /** @def VBOXSTRICTRC_TODO 270 * Returns that needs dealing with. 271 * @param rcStrict The strict VirtualBox status code. 272 */ 273 #define VBOXSTRICTRC_TODO(rcStrict) VBOXSTRICTRC_VAL(rcStrict) 176 274 177 275
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